JP2013251657A - Voltage follower input type differential amplifier - Google Patents

Voltage follower input type differential amplifier Download PDF

Info

Publication number
JP2013251657A
JP2013251657A JP2012123894A JP2012123894A JP2013251657A JP 2013251657 A JP2013251657 A JP 2013251657A JP 2012123894 A JP2012123894 A JP 2012123894A JP 2012123894 A JP2012123894 A JP 2012123894A JP 2013251657 A JP2013251657 A JP 2013251657A
Authority
JP
Japan
Prior art keywords
operational amplifier
voltage follower
voltage
output
type differential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2012123894A
Other languages
Japanese (ja)
Other versions
JP5827176B2 (en
Inventor
Masateru Kurihara
正輝 栗原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
New Japan Radio Co Ltd
Original Assignee
New Japan Radio Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by New Japan Radio Co Ltd filed Critical New Japan Radio Co Ltd
Priority to JP2012123894A priority Critical patent/JP5827176B2/en
Publication of JP2013251657A publication Critical patent/JP2013251657A/en
Application granted granted Critical
Publication of JP5827176B2 publication Critical patent/JP5827176B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Amplifiers (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a voltage follower input type differential amplifier that prevents an offset voltage from appearing in an output voltage.SOLUTION: The voltage follower input type differential amplifier having a non-inverting side operational amplifier A1 in voltage follower configuration, an inverting side operational amplifier A2 in voltage follower configuration, series resistances Rs1, Rs2, feedback resistances Rf1, Rf2 and an operational amplifier A3 includes an operational amplifier A4, a transistor Q1 and a feedback resistance Rf3 all for causing a current Ic diverted from an output terminal of the operational amplifier A2 to increase in proportion to an output voltage Vo of the operational amplifier A3 such that an output current I2+Ic of the operational amplifier A2 matches an output current I1 of the operational amplifier A1.

Description

本発明は、反転側および非反転側の入力段にボルテージフォロア構成のオペアンプを用いたボルテージフォロア入力型差動増幅器に関する。   The present invention relates to a voltage follower input type differential amplifier using an operational amplifier having a voltage follower configuration in an inverting side and a non-inverting side input stage.

図2に、反転側および非反転側の入力段にボルテージフォロア構成のオペアンプを用いた従来のボルテージフォロア入力型差動増幅器を示す(例えば、特許文献1の図1参照)。このようなボルテージフォロア入力型差動増幅器は、基準電圧発生回路、直列接続された電池のセル電圧の取得、電流検出抵抗による電流値の取得等のために利用されている。図2において、A1,A2は反転入力端子を出力端子に接続したボルテージフォロア構成のオペアンプである。A3はオペアンプであり、非反転入力端子にオペアンプA1の出力電圧をシリーズ抵抗Rs1と帰還抵抗Rf1で分圧して入力し、反転入力端子にオペアンプA2の出力電圧をシリーズ抵抗Rs2と帰還抵抗Rf2を介して入力する。なお、抵抗値は、Rf1=Rf2,Rs1=Rs2である。   FIG. 2 shows a conventional voltage follower input type differential amplifier using an operational amplifier having a voltage follower configuration in the inverting and non-inverting input stages (see, for example, FIG. 1 of Patent Document 1). Such a voltage follower input type differential amplifier is used for a reference voltage generation circuit, acquisition of cell voltages of batteries connected in series, acquisition of a current value by a current detection resistor, and the like. In FIG. 2, A1 and A2 are operational amplifiers having a voltage follower configuration in which an inverting input terminal is connected to an output terminal. A3 is an operational amplifier, and the output voltage of the operational amplifier A1 is divided and input to the non-inverting input terminal by the series resistor Rs1 and the feedback resistor Rf1, and the output voltage of the operational amplifier A2 is input to the inverting input terminal via the series resistor Rs2 and the feedback resistor Rf2. Enter. The resistance values are Rf1 = Rf2 and Rs1 = Rs2.

このボルテージフォロア入力型差動増幅器では、入力端子IN+,IN−に入力する電圧の差分が大きくなると、つまり差動信号のレベルが大きくなると、オペアンプA3の出力電圧も大きくなるため、非反転入力側に接続されたオペアンプA1の負荷と反転入力側に接続されたオペアンプA2の負荷とを比較した場合、非反転入力側に接続されたオペアンプA1の負荷の方が重くなってしまう。   In this voltage follower input type differential amplifier, when the difference between the voltages input to the input terminals IN + and IN− increases, that is, when the level of the differential signal increases, the output voltage of the operational amplifier A3 also increases. When the load of the operational amplifier A1 connected to the inverting input side is compared with the load of the operational amplifier A2 connected to the inverting input side, the load of the operational amplifier A1 connected to the non-inverting input side becomes heavier.

すなわち、オペアンプA3の反転入力端子と非反転入力端子はイマジナリショートによりほぼ同電位となるが、非反転入力端子に接続された抵抗Rf1は他端が接地に接続され、反転入力端子に接続された抵抗Rf2は他端がオペアンプA3の出力端子に接続されているので、オペアンプA3の出力電圧が大きくなると、抵抗Rf1に流れる電流I1と抵抗Rf2に流れる電流I2は、I1>I2という関係になる。オペアンプA3の出力電圧がGNDであれば、I1=I2となるが、出力電圧が大きくなればなるほど、電流I1とI2の差が開いてゆく。これは、オペアンプA1の負荷が、オペアンプA2の負荷よりも相対的に重くなっていくことに相当する。   In other words, the inverting input terminal and the non-inverting input terminal of the operational amplifier A3 have substantially the same potential due to an imaginary short, but the other end of the resistor Rf1 connected to the non-inverting input terminal is connected to the ground and connected to the inverting input terminal. Since the other end of the resistor Rf2 is connected to the output terminal of the operational amplifier A3, when the output voltage of the operational amplifier A3 increases, the current I1 flowing through the resistor Rf1 and the current I2 flowing through the resistor Rf2 have a relationship of I1> I2. If the output voltage of the operational amplifier A3 is GND, I1 = I2, but the difference between the currents I1 and I2 increases as the output voltage increases. This corresponds to the fact that the load of the operational amplifier A1 becomes relatively heavier than the load of the operational amplifier A2.

特開2012−59097号公報JP 2012-59097 A

このため、2つのオペアンプA1,A2から出力する負荷電流I1,I2の値が異なり、オフセット電圧が発生する原因となる。これを解決するには、オペアンプA1,A2の負荷駆動能力を向上させればよいが、それは出力段の面積を大きくすることを意味するため、特にIC化の際には回路面積が大きくなり、コスト増大が避けられない。また、負荷を軽くするという手法もあるが、それは抵抗値(面積)を大きくすることを意味するため、これもIC化ではコスト増大が避けられない。   For this reason, the values of the load currents I1 and I2 output from the two operational amplifiers A1 and A2 are different, which causes an offset voltage. In order to solve this, it is only necessary to improve the load driving capability of the operational amplifiers A1 and A2. However, this means that the area of the output stage is increased. Increase in cost is inevitable. There is also a method of reducing the load, but this means increasing the resistance value (area), and this also inevitably increases the cost in the case of IC.

本発明の目的は、2つのオペアンプの負荷電流が等しくなるような対策を施すことで、出力電圧にオフセット電圧成分が現れないようにしたボルテージフォロア入力型差動増幅器を提供することである。   An object of the present invention is to provide a voltage follower input type differential amplifier in which an offset voltage component does not appear in an output voltage by taking measures to equalize load currents of two operational amplifiers.

上記目的を達成するために、請求項1にかかる発明は、非反転信号が入力するボルテージフォロア構成の第1のオペアンプと、反転信号が入力するボルテージフォロア構成の第2のオペアンプと、前記第1のオペアンプの出力端子が第1のシリーズ抵抗を介して非反転入力端子に接続され、前記第2のオペアンプの出力端子が第2のシリーズ抵抗を介して反転入力端子に接続され、前記非反転入力端子は第1の帰還抵抗を介して接地に接続され、前記反転入力端子は出力端子との間に第2の帰還抵抗が接続された第3のオペアンプとを備えたボルテージフォロア入力型差動増幅器において、前記第2のオペアンプの出力端子から分流する電流を、前記第3のオペアンプの出力電圧に比例して増大させ、前記第2のオペアンプの出力電流が前記第1のオペアンプの出力電流と同じになるように制御する電流制御回路を設けたことを特徴とする。
請求項2にかかる発明は、請求項1に記載のボルテージフォロア入力型差動増幅器において、前記電流制御回路が、前記第2のオペアンプの出力端子にドレイン又はコレクタが接続されたトランジスタと、該トランジスタのソース又はエミッタと接地間に接続された第3の帰還抵抗と、前記第3のオペアンプの出力電圧と前記トランジスタのソース又はエミッタの電圧とを比較し、前記第3のオペアンプの出力電圧が高くなるほど前記トランジスタのドレイン又はコレクタの電流を大きくするよう制御する第4のオペアンプとを備えたことを特徴とする。
請求項3にかかる発明は、請求項2に記載のボルテージフォロア入力型差動増幅器において、前記第1および第2のシリーズ抵抗の抵抗値は同値、前記第1、第2および第3の帰還抵抗の抵抗値は同値であることを特徴とする。
To achieve the above object, the invention according to claim 1 is directed to a first operational amplifier having a voltage follower configuration to which a non-inverted signal is input, a second operational amplifier having a voltage follower configuration to which an inverted signal is input, and the first operational amplifier. The output terminal of the operational amplifier is connected to the non-inverting input terminal via a first series resistor, the output terminal of the second operational amplifier is connected to the inverting input terminal via a second series resistor, and the non-inverting input A voltage follower input type differential amplifier having a terminal connected to ground via a first feedback resistor, and a third operational amplifier having a second feedback resistor connected between the inverting input terminal and the output terminal. The current shunted from the output terminal of the second operational amplifier is increased in proportion to the output voltage of the third operational amplifier, and the output current of the second operational amplifier is Characterized in that a current control circuit that controls to be the same as the output current of the first operational amplifier.
According to a second aspect of the present invention, in the voltage follower input type differential amplifier according to the first aspect, the current control circuit includes a transistor having a drain or a collector connected to an output terminal of the second operational amplifier, and the transistor The third feedback resistor connected between the source or emitter of the transistor and the ground, the output voltage of the third operational amplifier and the voltage of the source or emitter of the transistor are compared, and the output voltage of the third operational amplifier is high. A fourth operational amplifier that controls to increase the drain or collector current of the transistor is included.
According to a third aspect of the present invention, in the voltage follower input type differential amplifier according to the second aspect, the first and second series resistors have the same resistance value, and the first, second and third feedback resistors. The resistance values are the same.

本発明によれば、第2のオペアンプの出力から分流する電流を、第1のオペアンプの出力電圧に比例して増大させ、第2のオペアンプの出力電流が第1のオペアンプの出力電流と同じになるように制御するので、第1および第2のオペアンプのオフセット電圧は同一となり、第3のオペアンプによってキャンセルされるので、出力電圧には第1および第2のオフセット電圧に起因するオフセット電圧は現れなくなる。このとき、第1および第2のオペアンプの負荷駆動能力を大きくする必要はなく、また、それらの負荷を特別軽くする必要もなく、さらに第4のオペアンプにも大きな駆動能力は必要なく、IC化に際しての面積削減に資する。   According to the present invention, the current shunted from the output of the second operational amplifier is increased in proportion to the output voltage of the first operational amplifier, and the output current of the second operational amplifier is the same as the output current of the first operational amplifier. Since the offset voltages of the first and second operational amplifiers are the same and are canceled by the third operational amplifier, the offset voltage due to the first and second offset voltages appears in the output voltage. Disappear. At this time, it is not necessary to increase the load driving capability of the first and second operational amplifiers, and it is not necessary to lighten those loads, and the fourth operational amplifier does not need a large driving capability. Contributes to area reduction.

本発明のボルテージフォロア入力型差動増幅器の回路図である。It is a circuit diagram of the voltage follower input type differential amplifier of the present invention. 従来のボルテージフォロア入力型差動増幅器の回路図である。It is a circuit diagram of a conventional voltage follower input type differential amplifier.

図1に本発明の1つの実施例のボルテージフォロア入力型差動増幅器を示す。A1,A2はボルテージフォロア構成のオペアンプ、A3はオペアンプ、Rf1,Rf2は帰還抵抗、Rs1,Rs2はシリーズ抵抗であり、図2で説明したものと同じである。本実施例では、これに加えて、帰還抵抗Rf3(抵抗Rf1,Rf2と同一抵抗値)と、その抵抗Rf3に発生する電圧とオペアンプA3の出力電圧Voの差分を検出するオペアンプA4と、そのオペアンプA4の出力電圧によってオペアンプA2の出力端子から分流する電流Icの値を制御するnpnトランジスタQ1とを備えている。これらは、オペアンプA2の出力端子から分流する電流Icを制御する電流制御回路を構成する。   FIG. 1 shows a voltage follower input type differential amplifier according to one embodiment of the present invention. A1 and A2 are operational amplifiers having a voltage follower configuration, A3 is an operational amplifier, Rf1 and Rf2 are feedback resistors, and Rs1 and Rs2 are series resistors, which are the same as those described in FIG. In this embodiment, in addition to this, the feedback resistor Rf3 (the same resistance value as the resistors Rf1 and Rf2), the operational amplifier A4 for detecting the difference between the voltage generated in the resistor Rf3 and the output voltage Vo of the operational amplifier A3, and the operational amplifier And an npn transistor Q1 that controls the value of the current Ic that is shunted from the output terminal of the operational amplifier A2 by the output voltage of A4. These constitute a current control circuit for controlling the current Ic shunted from the output terminal of the operational amplifier A2.

オペアンプA1,A2はもともと負荷駆動能力が小さく設定されており、負荷電流が流れるとオフセット電圧が発生してしまうが、反転入力側のオペアンプA2に発生するオフセット電圧と非反転入力側のオペアンプA1に発生するオフセット電圧の大きさが等しくなると、オペアンプA3によってそのオフセット電圧が相殺される。   The operational amplifiers A1 and A2 are originally set to have a small load driving capability, and an offset voltage is generated when a load current flows. However, the operational amplifier A1 on the inverting input side and the operational amplifier A1 on the non-inverting input side When the generated offset voltages have the same magnitude, the offset voltage is canceled by the operational amplifier A3.

さて、入力端子IN+とIN−の間に電圧ΔVを印加し、入力端子IN−とGNDとの間に電圧Vcを印加したとき、オペアンプA1の出力電流I1は、

Figure 2013251657
であり、オペアンプA2の出力電流I2+Icは、
Figure 2013251657
となる。 When the voltage ΔV is applied between the input terminals IN + and IN− and the voltage Vc is applied between the input terminals IN− and GND, the output current I1 of the operational amplifier A1 is
Figure 2013251657
The output current I2 + Ic of the operational amplifier A2 is
Figure 2013251657
It becomes.

また、オペアンプA3の出力電圧Voは、

Figure 2013251657
で表される。分流電流Icは、Rf2=Rf3であるので、
Figure 2013251657
となる。 The output voltage Vo of the operational amplifier A3 is
Figure 2013251657
It is represented by Since the shunt current Ic is Rf2 = Rf3,
Figure 2013251657
It becomes.

よって、オペアンプA2の出力電流I2+Icは、式(2)に式(3)および式(4)を代入して、

Figure 2013251657
となる。つまり、式(1)と式(5)は同じであり、I1=I2+Icが成立する。 Therefore, the output current I2 + Ic of the operational amplifier A2 is obtained by substituting the equations (3) and (4) into the equation (2).
Figure 2013251657
It becomes. That is, Expression (1) and Expression (5) are the same, and I1 = I2 + Ic is established.

このように、本実施例のボルテージフォロア入力型差動増幅器は、オペアンプA1とオペアンプA2の出力電流が等しくなるようにオペアンプA4が動作するので、オペアンプA1,A2に発生する負荷電流起因のオフセット電圧は等しくなる。このため、それらのオフセット電圧はオペアンプA3によってキャンセルされ、オペアンプA3の出力電圧Voにオフセット電圧は含まれないことになる。   As described above, in the voltage follower input type differential amplifier of this embodiment, the operational amplifier A4 operates so that the output currents of the operational amplifier A1 and the operational amplifier A2 are equal to each other. Are equal. Therefore, these offset voltages are canceled by the operational amplifier A3, and the offset voltage is not included in the output voltage Vo of the operational amplifier A3.

A1,A2:ボルテージフォロア構成のオペアンプ
A3,A4:オペアンプ
A1, A2: operational amplifiers with voltage follower configuration A3, A4: operational amplifiers

Claims (3)

非反転信号が入力するボルテージフォロア構成の第1のオペアンプと、反転信号が入力するボルテージフォロア構成の第2のオペアンプと、前記第1のオペアンプの出力端子が第1のシリーズ抵抗を介して非反転入力端子に接続され、前記第2のオペアンプの出力端子が第2のシリーズ抵抗を介して反転入力端子に接続され、前記非反転入力端子は第1の帰還抵抗を介して接地に接続され、前記反転入力端子は出力端子との間に第2の帰還抵抗が接続された第3のオペアンプとを備えたボルテージフォロア入力型差動増幅器において、
前記第2のオペアンプの出力端子から分流する電流を、前記第3のオペアンプの出力電圧に比例して増大させ、前記第2のオペアンプの出力電流が前記第1のオペアンプの出力電流と同じになるように制御する電流制御回路を設けたことを特徴とするボルテージフォロア入力型差動増幅器。
A first operational amplifier having a voltage follower configuration to which a non-inverted signal is input, a second operational amplifier having a voltage follower configuration to which an inverted signal is input, and an output terminal of the first operational amplifier is non-inverted via a first series resistor Connected to an input terminal, an output terminal of the second operational amplifier is connected to an inverting input terminal via a second series resistor, and the non-inverting input terminal is connected to the ground via a first feedback resistor, In the voltage follower input type differential amplifier including the third operational amplifier in which the second feedback resistor is connected between the inverting input terminal and the output terminal,
The current shunted from the output terminal of the second operational amplifier is increased in proportion to the output voltage of the third operational amplifier, and the output current of the second operational amplifier becomes the same as the output current of the first operational amplifier. A voltage follower input type differential amplifier, characterized in that a current control circuit for controlling is provided.
請求項1に記載のボルテージフォロア入力型差動増幅器において、前記電流制御回路は、
前記第2のオペアンプの出力端子にドレイン又はコレクタが接続されたトランジスタと、該トランジスタのソース又はエミッタと接地間に接続された第3の帰還抵抗と、前記第3のオペアンプの出力電圧と前記トランジスタのソース又はエミッタの電圧とを比較し、前記第3のオペアンプの出力電圧が高くなるほど前記トランジスタのドレイン又はコレクタの電流を大きくするよう制御する第4のオペアンプとを備えたことを特徴とするボルテージフォロア入力型差動増幅器。
The voltage follower input type differential amplifier according to claim 1, wherein the current control circuit includes:
A transistor having a drain or collector connected to the output terminal of the second operational amplifier; a third feedback resistor connected between the source or emitter of the transistor and ground; the output voltage of the third operational amplifier; and the transistor And a fourth operational amplifier that controls to increase the drain or collector current of the transistor as the output voltage of the third operational amplifier increases. Follower input type differential amplifier.
請求項2に記載のボルテージフォロア入力型差動増幅器において、
前記第1および第2のシリーズ抵抗の抵抗値は同値、前記第1、第2および第3の帰還抵抗の抵抗値は同値であることを特徴とするボルテージフォロア入力型差動増幅器。
The voltage follower input type differential amplifier according to claim 2,
2. A voltage follower input type differential amplifier, wherein the first and second series resistors have the same resistance value, and the first, second and third feedback resistors have the same resistance value.
JP2012123894A 2012-05-31 2012-05-31 Voltage follower input type differential amplifier Active JP5827176B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2012123894A JP5827176B2 (en) 2012-05-31 2012-05-31 Voltage follower input type differential amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012123894A JP5827176B2 (en) 2012-05-31 2012-05-31 Voltage follower input type differential amplifier

Publications (2)

Publication Number Publication Date
JP2013251657A true JP2013251657A (en) 2013-12-12
JP5827176B2 JP5827176B2 (en) 2015-12-02

Family

ID=49849961

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012123894A Active JP5827176B2 (en) 2012-05-31 2012-05-31 Voltage follower input type differential amplifier

Country Status (1)

Country Link
JP (1) JP5827176B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106788438A (en) * 2017-03-14 2017-05-31 佛山科学技术学院 A kind of voltage is to time converting circuit
CN107040228A (en) * 2017-06-09 2017-08-11 佛山科学技术学院 A kind of failure circuit suitable for dead-band regulator
CN110221642A (en) * 2019-05-22 2019-09-10 重庆川仪自动化股份有限公司 The adjusting method of voltage/current conversion circuit and its output current scope

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0421001A (en) * 1990-05-14 1992-01-24 Komatsu Ltd Offset drift reducing device for comparator circuit
JPH0543615U (en) * 1991-11-07 1993-06-11 株式会社小松製作所 Differential amplifier circuit
US5276367A (en) * 1990-05-14 1994-01-04 Kabushiki Kaisha Komatsu Seisakusho Offset drift reducing device for use in a differential amplification circuit
JP2004053528A (en) * 2002-07-23 2004-02-19 Mitsubishi Electric Corp Current detecting circuit
JP2007027895A (en) * 2005-07-12 2007-02-01 Rohm Co Ltd Current-voltage conversion circuit, and power consumption detection circuit and electronic equipment using the same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0421001A (en) * 1990-05-14 1992-01-24 Komatsu Ltd Offset drift reducing device for comparator circuit
US5276367A (en) * 1990-05-14 1994-01-04 Kabushiki Kaisha Komatsu Seisakusho Offset drift reducing device for use in a differential amplification circuit
JPH0543615U (en) * 1991-11-07 1993-06-11 株式会社小松製作所 Differential amplifier circuit
JP2004053528A (en) * 2002-07-23 2004-02-19 Mitsubishi Electric Corp Current detecting circuit
JP2007027895A (en) * 2005-07-12 2007-02-01 Rohm Co Ltd Current-voltage conversion circuit, and power consumption detection circuit and electronic equipment using the same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106788438A (en) * 2017-03-14 2017-05-31 佛山科学技术学院 A kind of voltage is to time converting circuit
CN106788438B (en) * 2017-03-14 2023-05-05 佛山科学技术学院 Voltage-to-time conversion circuit
CN107040228A (en) * 2017-06-09 2017-08-11 佛山科学技术学院 A kind of failure circuit suitable for dead-band regulator
CN107040228B (en) * 2017-06-09 2023-09-26 佛山科学技术学院 Failure circuit suitable for nonlinear regulator
CN110221642A (en) * 2019-05-22 2019-09-10 重庆川仪自动化股份有限公司 The adjusting method of voltage/current conversion circuit and its output current scope
CN110221642B (en) * 2019-05-22 2024-05-03 重庆川仪自动化股份有限公司 Voltage/current conversion circuit and output current range adjusting method thereof

Also Published As

Publication number Publication date
JP5827176B2 (en) 2015-12-02

Similar Documents

Publication Publication Date Title
JP5331508B2 (en) Voltage regulator
JP6150149B2 (en) Capacitor parallel monitor circuit
US8508200B2 (en) Power supply circuit using amplifiers and current voltage converter for improving ripple removal rate and differential balance
JP5827176B2 (en) Voltage follower input type differential amplifier
US7994771B2 (en) Current measurement circuit, current detection circuit and saturation prevention and recovery circuit for operational amplifier
JP2015095830A (en) Differential amplification circuit
JP2008009968A (en) Voltage generating apparatus, current generating apparatus, and test apparatus
EP1887830A2 (en) Protection circuit and load current detection circuit
JP6646380B2 (en) Current detection circuit
US7342443B2 (en) Operational amplifier
JP5819212B2 (en) Load connection status detection circuit
JP2008067045A (en) Low-pass filter and voltage-current conversion circuit for use in the same
JP5989171B1 (en) CURRENT DETECTION CIRCUIT AND ELECTRIC CONTROL DEVICE FOR VEHICLE HAVING THE CIRCUIT
US9787284B2 (en) Waveform shaping filter and radiation detection device
JP2007324991A (en) Current detection circuit
JP2012178670A (en) Buffer circuit
JP2013150199A (en) Push-pull gain amplifier
JP2011221778A (en) Ac constant current output device
JP6097920B2 (en) Brushless motor control device
JP6392644B2 (en) Power control device
JP4941718B2 (en) Voltage shift circuit
JP5559905B1 (en) Electronic circuit
TW423208B (en) Operational amplifier
US9735762B2 (en) Amplifier
JP2017211944A (en) Power supply circuit

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20150403

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20151007

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20151009

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20151015

R150 Certificate of patent or registration of utility model

Ref document number: 5827176

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250