JP2013210666A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device whose frame can be narrowed down, and whose definition can be increased without enlarging frame size.SOLUTION: In a liquid crystal display device, an array substrate 200 of a liquid crystal display panel 100 includes: a gate line Y arranged so as to extend in a line direction H of an active area; gate connection wiring YC arranged so as to extend in a column direction V of the active area and to cross the gate line via an insulating film; a contact part CT which electrically connects the gate line with the gate connection wiring; a source line X arranged so as to extend in parallel with the gate connection wiring in the active area; and a signal supply part 131 which includes a first pad PG arranged along one side out of the active area located on an extension line in the column direction, connected to the gate connection wiring, and supplying a signal to the gate line, and a second pad PS connected to the source line, and supplying the signal to the gate line. The first pad and the second pad are alternately arranged.

Description

  The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device in which a connection wiring for connecting a signal wiring such as a gate line or a source line and a signal supply unit is arranged in an active area.

  A typical liquid crystal display device as a flat display device is used in various fields as a display device for OA equipment such as a personal computer and a television by utilizing features such as light weight, thinness, and low power consumption. In recent years, liquid crystal display devices are also used as mobile terminal devices such as mobile phones, display devices such as car navigation devices and game machines.

  The liquid crystal display device includes a liquid crystal display panel configured by holding a liquid crystal layer between an array substrate and a counter substrate bonded together with a sealing material.

  In recent years, liquid crystal display panels are required to have high definition, and the number of gate lines and source lines tends to increase as the number of pixels increases. Therefore, the number of connection wirings connecting these gate lines and source lines and each input terminal (pad) increases, and the size outside the active area (frame size) for arranging these connection wirings increases. There is a tendency.

  For example, according to Patent Document 1, for example, a plurality of gate lines are connected every two adjacent to each other, and each of the two connected lines has a gate routing wiring, and each source line has A configuration having a source first input line and a source second input line extending between the pixels in parallel with each other is disclosed.

In such a configuration, one of the TFTs connected to the connected gate line is connected to the source first input line and the other of the TFTs is connected to the source second input line, and each of them is independently driven and controlled. Yes.
JP 2008-58357 A

  In the configuration disclosed in Patent Document 1, the gate routing wiring for connecting the gate line and the gate signal input terminal is different from one side of the substrate body on which the gate signal input terminal and the source signal input terminal are provided. Is arranged in a peripheral region along the line. For this reason, it is still necessary to secure an area for arranging the gate routing wiring.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a liquid crystal display device capable of narrowing the frame and achieving high definition without enlarging the frame size. It is in.

According to one aspect of the invention,
A liquid crystal display device including a liquid crystal display panel configured to hold a liquid crystal layer between a first substrate and a second substrate, and including an active area configured by a plurality of pixels,
The first substrate is
A first wiring arranged to extend in a first direction of the active area;
A connection wiring that extends in a second direction intersecting the first direction of the active area and is arranged to intersect the first wiring via an insulating film;
A contact portion for electrically connecting the first wiring and the connection wiring;
A second wiring arranged to extend in parallel with the connection wiring in the active area;
It is arranged along one side outside the active area located on the extension line in the second direction, connected to the connection wiring, connected to the first pad and the second wiring for supplying a signal to the first wiring, A signal supply unit including a second pad for supplying a signal to the two wirings;
With
A liquid crystal display device is provided in which the first pads and the second pads are alternately arranged.

According to another aspect of the invention,
A liquid crystal display device including a liquid crystal display panel configured to hold a liquid crystal layer between a first substrate and a second substrate, and including an active area configured by a plurality of pixels,
The first substrate is
A first wiring arranged to extend in a first direction of the active area;
A connection wiring that extends in a second direction intersecting the first direction of the active area and is arranged to intersect the first wiring via an insulating film;
A contact portion for electrically connecting the first wiring and the connection wiring;
A second wiring arranged to extend in parallel with the connection wiring in the active area;
It is arranged along one side outside the active area located on the extension line in the second direction, connected to the connection wiring, connected to the first pad and the second wiring for supplying a signal to the first wiring, A signal supply unit including a second pad for supplying a signal to the two wirings;
With
The first pad and the second pad are arranged in a straight line extending in the first direction,
The second wiring is alternately arranged with the connection wiring drawn out of the active area, and is routed to the second pad without crossing each other on the substrate end side of the first substrate with respect to the first pad. A liquid crystal display device characterized by the above is provided.

  According to the present invention, it is possible to provide a liquid crystal display device capable of narrowing the frame and achieving high definition without enlarging the frame size.

FIG. 1 schematically shows a configuration of a liquid crystal display panel of a liquid crystal display device according to an embodiment of the present invention. FIG. 2 is a cross-sectional view schematically showing the configuration of the liquid crystal display panel and the array substrate shown in FIG. FIG. 3 is a plan view schematically showing the configuration of the pixels in the liquid crystal display panel shown in FIG. FIG. 4 is a cross-sectional view schematically showing the structure when the array substrate shown in FIG. 3 is cut along line BB. FIG. 5 is a diagram for explaining an example of contact between the gate line and the gate connection wiring. FIG. 6 is a diagram schematically showing a configuration of a signal supply unit in the liquid crystal display panel shown in FIG. FIG. 7 is a diagram schematically showing another configuration of the signal supply unit in the liquid crystal display panel shown in FIG. FIG. 8 is a diagram schematically showing another configuration of the signal supply unit in the liquid crystal display panel shown in FIG. FIG. 9 is a diagram schematically showing another configuration of the signal supply unit in the liquid crystal display panel shown in FIG. FIG. 10 schematically shows another configuration of the signal supply unit in the liquid crystal display panel shown in FIG.

  Hereinafter, a display device, particularly a liquid crystal display device according to an embodiment of the present invention will be described with reference to the drawings.

  As shown in FIG. 1, the liquid crystal display device includes a liquid crystal display panel 100 having a substantially rectangular flat plate shape. That is, the liquid crystal display panel 100 includes a pair of substrates, that is, an array substrate (first substrate) 200 and a counter substrate (second substrate) 300, a liquid crystal layer 400 held between the array substrate 200 and the counter substrate 300, It is constituted by.

  The array substrate 200 and the counter substrate 300 are bonded together by a sealing material 110, and a predetermined cell gap for holding the liquid crystal layer 400 is formed therebetween. Such a cell gap can be formed by, for example, a columnar spacer formed integrally with one substrate. The liquid crystal layer 400 is formed of a liquid crystal composition sealed in a cell gap between the array substrate 200 and the counter substrate 300.

  The liquid crystal display panel 100 includes a substantially rectangular active area 120 that displays an image on the inner side surrounded by the sealing material 110. The active area 120 includes a plurality of pixels PX arranged in a matrix.

  In the active area 120, the array substrate 200 includes a plurality of gate lines Y (1, 2, 3,..., M) that are a plurality of first wirings arranged to extend along the first direction, for example, the row direction H. A plurality of gate connection wirings YC (1, 2, 3,..., N) arranged so as to extend along a second direction, for example, the column direction V intersecting the first direction, and along the column direction V A plurality of second wirings arranged so as to extend, the source lines X (1, 2, 3,..., N) and the source lines X and gate lines Y in each pixel PX are arranged at the intersections. A switching element 220 and a pixel electrode 230 disposed in each pixel PX and connected to the switching element 220 are provided (where m and n are positive integers).

  The gate line Y and the gate connection wiring YC are arranged so as to cross each other through an insulating film. Further, the gate line Y and the source line X are arranged so as to cross each other through an insulating film. The gate connection wiring YC and the source line X are arranged in the active area 120 so as to extend in parallel with each other. The gate connection wiring YC and the source line X may be arranged in the same layer (that is, on the same insulating film), or different layers (that is, one is covered with the insulating film and the other is interposed through the insulating film). It may be disposed on the insulating film).

  In particular, in this embodiment, as will be described later, the gate connection wiring YC and the gate line Y are electrically connected via a contact portion described later.

  The switching element 220 is configured by a thin film transistor (TFT) including a semiconductor layer formed of, for example, amorphous silicon or polysilicon.

  The gate electrode 222 of the switching element 220 is electrically connected to the gate line Y (or formed integrally with the gate line Y). The source electrode 225 of the switching element 220 is electrically connected to the source line X (or formed integrally with the source line X). The drain electrode 227 of the switching element 220 is electrically connected to the pixel electrode 230.

  The counter substrate 300 includes a counter electrode 330 that faces each of the plurality of pixel electrodes 230 in the active area 120.

  In addition, the liquid crystal display panel 100 includes a signal supply unit 131 disposed outside the active area 130. The signal supply unit 131 includes a plurality of pads P that can be connected to a driving IC chip that functions as a signal supply source including a gate driver and a source driver. The pad P includes an input pad for inputting a signal to the signal supply source, an output pad for outputting a signal from the signal supply source, and the like. The output pads include a pad PG connected to the gate connection wiring YC, a pad PS connected to the source line X, and the like.

  In the example illustrated in FIG. 1, the signal supply unit 131 is formed in the extended portion 200 </ b> E of the array substrate 200 that extends outward from the end portion 300 </ b> A of the counter substrate 300. That is, the array substrate 200 is formed in a rectangular shape like the counter substrate 300, and is substantially aligned with the end portion of the counter substrate 300 on three sides (that is, the end portion of the array substrate 200 and the end portion of the counter substrate face each other). Only one side extends from the counter substrate 300. That is, the end portion 300 </ b> A of the counter substrate 300 does not face the end portion 200 </ b> A of the array substrate 200, but faces the wiring extending toward the signal supply unit in the array substrate 200. As described above, in the example illustrated in FIG. 1, the extending portion 200 </ b> E is formed only on one side of the liquid crystal display panel 100.

  In particular, in this embodiment, the extending part 200E is located on an extension line in the column direction V of the liquid crystal display panel 100. That is, the signal supply unit 131 has one side outside the active area 130 located on the extended line in the column direction V (that is, one side of the liquid crystal display panel 100 parallel to the end 200A of the array substrate 200 and the end 300A of the counter substrate 300). ).

  As shown in FIG. 1, when the liquid crystal display panel 100 is viewed in a plan view, the extended portion 200 </ b> E corresponds to a region between the end portion 200 </ b> A of the array substrate 200 and the end portion 300 </ b> A of the counter substrate 300. The part 131 is disposed between the end part 200 </ b> A of the array substrate 200 and the end part 300 </ b> A of the counter substrate 300.

  Each of the gate lines Y arranged along the row direction H in the active area 120 extends substantially in a straight line over the entire active area 120 and is generally equivalent to the width of the active area 120 along the row direction H (or In consideration of a margin or the like, the active area 120 is formed to have a length (slightly longer than the width along the row direction H).

  Each of these gate lines Y is connected to one of the gate connection wirings YC arranged along the column direction V in the active area 120. Each gate connection wiring YC is drawn out of the active area 130 from the active area 120 toward the signal supply unit 131 and is connected to the pad PG of the signal supply unit 131. Thereby, the scanning signal output from the signal supply source is supplied to the gate line Y via the gate connection wiring YC via the pad PG of the signal supply unit 131.

  Similarly, each source line X is drawn out of the active area 130 from the active area 120 toward the signal supply unit 131 and connected to the pad PS of the signal supply unit 131. Thereby, the video signal output from the signal supply source is supplied to each source line X via the pad PS of the signal supply unit 131.

  As described above, in this embodiment, the signal connection unit 131 that supplies a signal to the gate connection wiring YC and the source line X electrically connected to the gate line Y includes the gate connection wiring YC and the source line X. It is arranged along one side of the outside active area 130 located on the extended line in the extending column direction V.

  Thus, in the configuration in which the signal supply unit 131 is arranged in a direction orthogonal to the extending direction of the gate line Y, the gate connection wiring YC orthogonal to the extending direction of the gate line Y is arranged in the active area 120, and the gate By electrically connecting to the line Y, it is not necessary to secure a space for routing the gate connection wiring YC that connects the signal supply unit 131 and the gate line Y to the outside of the active area 130. For this reason, the frame size outside the active area 130 can be reduced except for one side where the signal supply unit 131 is arranged.

  Specifically, the width from the active area 120 to both sides 100B and 100C of the liquid crystal display panel 100 located on the extension line in the row direction H can be reduced. Further, the width from the active area 120 to one side 100D of the liquid crystal display panel facing the extending part 200E across the active area 120 can also be reduced.

  Therefore, the frame of the liquid crystal display device can be reduced.

  In addition, since the gate connection wiring YC is arranged in the active area 120, the frame size is increased even when the number of pixels increases with the increase in definition, that is, when the number of gate lines Y increases. It becomes possible to cope without doing. That is, the frame can be narrowed regardless of the number of pixels and the number of gate lines.

  Next, the structures of the array substrate 200 and the counter substrate 300 will be described in more detail.

  2 shows a cross-sectional view of the liquid crystal display panel shown in FIG. 1 and a cross-sectional view of the array substrate cut along line AA in FIG. As shown in FIGS. 2 and 3, the array substrate 200 is formed using a rectangular insulating substrate 210 having light transmissivity such as glass. The gate electrode 222 of the switching element 220 is disposed on one main surface (a surface facing the liquid crystal layer) of the insulating substrate 210 together with the gate line Y and the like. In the example shown in FIG. 3, the gate electrode 222 is formed integrally with the gate line Y. That is, the gate line Y and the gate electrode 222 are formed of the same material.

These gate lines Y and gate electrodes 222 are covered with a gate insulating film 240. The gate insulating film 240 is formed of, for example, silicon nitride (Si ₃ N ₄ ).

  The semiconductor layer 242 of the switching element 220 is formed of, for example, amorphous silicon, and is disposed on the gate insulating film 240 so as to face the gate electrode 222.

  The source electrode 225 and the drain electrode 227 of the switching element 220 are disposed on the gate insulating film 240 together with the source line X and the like, and a part of each is in contact with the semiconductor layer 242. The source line X, the source electrode 225, and the drain electrode 227 can be formed of the same material. The gate line Y, the source line X, and the like are formed of a conductive material such as molybdenum, tungsten, aluminum, or titanium.

These source electrode 225 and drain electrode 227 are covered with an interlayer insulating film 244 together with the source line X and the like. The interlayer insulating film 244 is made of, for example, silicon nitride (Si ₃ N ₄ ).

  This interlayer insulating film 244 may be further covered with an insulating film or the like. This insulating film can be formed of an organic material or an inorganic material. As an example, the insulating film is formed by applying an organic material having a relatively low viscosity such as a liquid (for example, a thermosetting resin material, a photosensitive resin material, etc.), and then heating or electromagnetic wave irradiation. It can be formed by performing a curing process, and its surface can be made generally flat.

  The pixel electrode 230 is disposed on the interlayer insulating film 244 so as to correspond to each pixel PX. The pixel electrode 230 is electrically connected to the drain electrode 227 of the switching element 220 through a contact hole formed in the interlayer insulating film 244.

  In a transmissive liquid crystal display panel that selectively transmits backlight light and displays an image, the pixel electrode 230 includes, for example, light such as indium tin oxide (ITO) and indium zinc oxide (IZO). It is made of a conductive material having transparency. In a reflective liquid crystal display panel that selectively reflects external light to display an image, the pixel electrode 230 is formed of a light-reflective conductive material such as aluminum (Al) or molybdenum (Mo). Has been.

  The surface of such an array substrate 200 is covered with an alignment film 250 for controlling the alignment of liquid crystal molecules included in the liquid crystal layer 400.

  The counter substrate 300 is formed using a rectangular insulating substrate 310 having light transmissivity, such as glass.

  In the color display type liquid crystal display device, the liquid crystal display panel 100 includes, in the active area 120, a plurality of types of pixels, for example, a red pixel PXR that displays red (R), a green pixel PXG that displays green (G), and a blue ( It has a blue pixel PXB that displays B).

  In the embodiment shown in FIG. 2, the counter substrate 300 is formed in the active area 120 in the black matrix BM and each pixel PX that are opposed to the wiring portion W including the switching element 220 in addition to the gate line Y and the source line X. The color filter layer 320, the counter electrode 330, etc. which are arrange | positioned correspondingly are provided.

  The black matrix BM is disposed on one main surface (the surface facing the liquid crystal layer) of the insulating substrate 310. The black matrix BM is made of, for example, a resin material colored in black or a light shielding metal material.

  The color filter layer 320 is disposed in a region surrounded by the black matrix BM. The color filter layer 320 is formed of colored resins colored red (R), green (G), and blue (B).

  That is, the red color filter layer 320R that is colored so as to transmit red light having the main wavelength is disposed in the red pixel PXR. The green color filter layer 320G that is colored so as to transmit light having a green dominant wavelength is disposed in the green pixel PXG. The blue color filter layer 320B that is colored so as to transmit light having a blue dominant wavelength is disposed in the blue pixel PXB. Such color filter layer 320 (R, G, B) may be arranged on the array substrate side.

  The counter substrate 300 includes a peripheral light shielding layer 500 arranged in a frame shape around the active area 120. The peripheral light shielding layer 500 is formed of a resin material colored in black, for example. Such a peripheral light shielding layer 500 can be formed in the same process using the same material as the black matrix BM.

  The counter electrode 330 is disposed on the color filter layer 320 so as to face the plurality of pixels PX in the active area 120. The counter electrode 330 is formed of a light-transmitting conductive material such as ITO or IZO.

  The example shown in FIG. 2 corresponds to a vertical electric field mode that mainly uses a vertical electric field (an electric field substantially perpendicular to the main surface of the substrate), and the counter electrode 330 is opposed to the plurality of pixel electrodes 230 via the liquid crystal layer 400. As described above, the counter substrate 300 is provided, but the counter electrode 330 may be provided on the array substrate 200. That is, in the horizontal electric field mode mainly using the horizontal electric field (electric field substantially parallel to the main surface of the substrate), the counter electrode 330 is electrically insulated from the pixel electrode 230 and is opposed to the pixel electrode 230. 200.

  The surface of the counter substrate 300 is covered with an alignment film 350 for controlling the alignment of liquid crystal molecules included in the liquid crystal layer 400.

  For the reflective liquid crystal display panel 100, an optical element 360 is provided on the outer surface of the counter substrate 300. For the transmissive liquid crystal display panel 100, optical elements 260 and 360 are provided on the outer surfaces of the array substrate 200 and the counter substrate 300, respectively. These optical elements 260 and 360 include a polarizing plate whose polarization direction is set in accordance with the characteristics of the liquid crystal layer 400. Moreover, these optical elements 260 and 360 may include a phase difference plate as necessary.

  Incidentally, as shown in FIGS. 3 and 4, the gate connection wiring YC is disposed on the gate insulating film 240 covering the gate line Y together with the source line X. That is, the gate line Y and the gate connection wiring YC cross each other with the gate insulating film 240 interposed therebetween. The gate connection wiring YC and the source line X are spaced apart from each other on the gate insulating film 240 and are substantially parallel to each other. Therefore, the gate connection wiring YC can be formed of the same material as the source line X.

  That is, when the gate connection wiring YC is formed of the same material as the source line X on the gate insulating film 240, these can be formed in the same process, and a manufacturing process is added when the gate connection wiring YC is added. (Ie, without deteriorating productivity). For this reason, the increase in manufacturing cost can be suppressed.

  As an example of dimensions, when the width of the source line X is 3 to 5 μm, the width of the gate connection wiring YC is about 10 μm, and the width along the row direction H of one pixel is 80 μm, the gate connection By arranging the wiring YC so as to pass through the approximate center of the pixel PX (that is, the approximate center of the pixel electrode 230), an interval of about 30 μm can be secured between the gate connection wiring YC and the source line X. is there. Thereby, even when the gate connection wiring YC and the source line X are formed in the same process, a short circuit between them can be prevented by a general resolution photolithography process.

  Such a gate connection wiring YC is covered with an interlayer insulating film 244 together with the source line X. Further, the gate connection wiring YC faces the pixel electrode 230 with the interlayer insulating film 244 interposed therebetween. When the gate connection wiring YC is formed of the same material as that of the source line X, these are generally formed of a conductive material that does not have optical transparency such as molybdenum, tungsten, aluminum, and titanium.

  In the reflective liquid crystal display panel 100, the arrangement of the gate connection wiring YC and the pixel electrode 230 facing each other is not particularly affected by the pixel aperture ratio. The portion of the connection wiring YC that faces the pixel electrode 230 is shielded from light and does not contribute to display (that is, the pixel aperture ratio is reduced).

  Therefore, in the transmissive liquid crystal display panel 100, it is desirable that the gate connection wiring YC be formed of a light-transmitting conductive material. In this case, it is desirable that at least a portion of the gate connection wiring YC facing the pixel electrode 230 has light transmittance. Thereby, in the transmissive liquid crystal display panel 100, the portion where the gate connection wiring YC and the pixel electrode 230 face each other also contributes to the display, so that the loss of the pixel aperture ratio can be suppressed.

  As described above, in the configuration in which the gate line Y and the gate connection wiring YC intersect with each other through the gate insulating film 240, the contact portion CT that electrically connects the two is a pixel as shown in FIGS. It is disposed in a portion that does not overlap with the electrode 230, that is, a portion that does not contribute to display.

  In the example shown here, the contact portion CT is disposed on the interlayer insulating film 244 at a portion where the gate line Y and the gate connection wiring YC intersect. The contact portion CT is in contact with the gate line Y through the first contact hole CH1 penetrating the gate insulating film 240 and the interlayer insulating film 244. On the other hand, the contact portion CT is in contact with the gate connection wiring YC through the second contact hole CH2 penetrating the interlayer insulating film 244. The gate line Y and the gate connection wiring YC are electrically connected by the contact portion CT having such a configuration.

  The contact portion CT is disposed on the interlayer insulating film 244 so as to be separated from the pixel electrode 230. Such a contact portion CT can be formed of the same material as the pixel electrode 230.

  That is, when the contact part CT and the pixel electrode 230 are formed of the same material on the interlayer insulating film 244, they can be formed in the same process, and a manufacturing process is added when the contact part CT is added. It becomes possible to cope without. For this reason, the increase in manufacturing cost can be suppressed.

  As shown in FIG. 1, the source lines X and the gate connection lines YC are alternately arranged in the active area 120. That is, one gate connection wiring YC (for example, YC2) is disposed between two adjacent source lines X (for example, X1 and X2). At this time, the gate connection wiring YC is opposed to the pixel electrode 230 sandwiched between two adjacent source lines X.

  In particular, in the example shown in FIG. 1, the number of source lines X and gate connection lines YC arranged in the active area 120 is the same. In other words, if the number of source lines X is n, the number of gate connection wirings YC is n. That is, one gate connection wiring YC is configured to face each pixel electrode 230 of the pixel column connected to each source line X.

  At this time, it is desirable that each of the gate connection wirings YC extends to the entire active area 120. In this case, each of the gate connection wirings YC arranged along the column direction V in the active area 120 extends substantially in a straight line over the entire active area 120 and is formed to have substantially the same length. These gate connection wirings YC are formed longer than the width along the column direction V of the active area 120 and are connected to the signal supply unit 131.

  In other words, each of the gate connection wirings YC intersects all the gate lines Y (m gate lines Y in the example shown in FIG. 1) arranged in the active area 120 and is connected to each source line X. It faces all the pixel electrodes 230 in the pixel column. The gate line Y is electrically connected to any one of these gate connection wirings YC.

  That is, there is almost no (or very small) difference in wiring capacitance between the gate connection wirings YC, and a desired signal can be supplied to each gate line Y.

  Further, even when the gate connection wiring YC is formed of a conductive material that does not transmit light, the area facing the pixel electrode 230 is equal in each pixel PX, and the difference in area contributing to display (That is, the difference in aperture ratio) can be eliminated.

  Therefore, good display quality can be obtained.

  Next, a case where the number of gate lines Y and the number of source lines X are the same (that is, in the example shown in FIG. 1 where m = n) will be described. In the example shown below, only the main parts necessary for the explanation are shown.

  In the example illustrated in FIG. 5, the number of gate lines Y and source lines X arranged in the active area 120 is six. That is, the gate lines Y1, Y2, Y3, Y4, Y5, and Y6 are arranged in this order in the column direction V. The source lines X1, X2, X3, X4, X5, and X6 are arranged in this order in the row direction H.

  In the example shown here, the gate connection lines YC are alternately arranged with the source lines X, and the number of the gate connection lines YC and the source lines X is the same. That is, the gate connection wirings YC1, YC2, YC3, YC4, YC5, and YC6 are arranged in this order in the row direction H. Each of these gate connection wirings YC1 to YC6 intersects with all six gate lines Y1 to Y6 and is connected to a single gate line Y through a single contact portion CT.

  In the example shown in FIG. 5, each of the gate lines Y is sequentially connected to the gate connection wiring YC in the arrangement order. That is, the gate line Y1 is connected to the gate connection wiring YC1 through the contact portion CT1. Similarly, the gate line Y2 is connected to the gate connection wiring YC2 via the contact portion CT2, the gate line Y3 is connected to the gate connection wiring YC3 via the contact portion CT3, and the gate line Y4 is gated via the contact portion CT4. Connected to the connection wiring YC4, the gate line Y5 is connected to the gate connection wiring YC5 via the contact portion CT5, and the gate line Y6 is connected to the gate connection wiring YC6 via the contact portion CT6.

  In at least a part of the active area 120, the contact portions CT that connect the gate line Y and the gate connection wiring YC may be randomly arranged.

  In such a configuration, as shown in FIG. 6, the signal supply unit 131 includes pads (first pads) PG1 to PG6 connected to the gate connection wirings YC1 to YC6 and source lines X1 to X6, respectively. Pads (second pads) PS1 to PS6 connected to the. These pads PG and pads PS are alternately arranged. Naturally, the output pin of the signal supply source connected to the signal supply unit 131 corresponds to the above-described pad layout.

  Thereby, in the narrow frame liquid crystal display panel 100 described above, it is possible to supply a predetermined signal from the signal supply source to each gate line Y and each source line X.

  In the example shown in FIG. 6, the pads PG and PS are arranged in a straight line extending in the row direction H. A single driver IC chip 600 including a gate driver that supplies a signal to the gate line Y and a source driver that supplies a signal to the source line X is connected to the pad PG and the pad PS having such a layout. . That is, the output pins of the driving IC chip 600 are arranged in a straight line corresponding to the pad layout shown in FIG. 6, and output pins for outputting scanning signals for gate lines and video signals for source lines are output. The output pins are alternately arranged.

  According to such a configuration, the distance from the active area 120 to the end 200A of the array substrate 200 can be shortened. That is, not only the width from the active area 120 of the liquid crystal display panel 100 to the three sides 100B, 100C, and 100D, but also the area of the extending portion 200E can be reduced, and the frame can be further narrowed.

  In the example illustrated in FIG. 7, the pads PG and the pads PS are alternately arranged, and the pads PG and the pads PS are staggered in two columns extending in the row direction H. Here, on the active area side of the signal supply unit 131, six pads PG are arranged in a straight line extending in the row direction H. That is, the six pads PG are located on the straight line L1. Further, six pads PS are arranged in a straight line extending in the row direction H on the array substrate end portion 200 </ b> A side of the signal supply unit 131. That is, the six pads PG are located on the straight line L2.

  At this time, each of the source lines X connected to the pad PS is led out to the array substrate end 200A side from the pad PG. That is, each source line X intersects the straight line L1 on which the six pads PG are located. In other words, the pads PG and the source lines X are alternately arranged on the straight line L1.

  A single driver IC chip 600 including a gate driver that supplies a signal to the gate line Y and a source driver that supplies a signal to the source line X is connected to the pad PG and the pad PS having such a layout. . That is, the output pins of the driving IC chip 600 are staggered in correspondence with the pad layout shown in FIG.

  According to such a configuration, in the signal supply unit 131, it is possible to shorten the interval between the pads PG and the interval between the pads PS. Therefore, the signal supply unit 131 can be reduced, and the size of the drive IC chip 600 can be reduced correspondingly.

  Further, as in the example illustrated in FIG. 8, the signal supply unit 131 in which the pads PG and the pads PS are arranged in a staggered manner is connected to the first driving IC chip 610 connected to the pads PG and the pads PS. The second driving IC chip 620 may be arranged in the column direction V. In this case, the first driving IC chip 610 includes a gate driver. The second driving IC chip 620 includes a source driver.

  Even in such a configuration, the signal supply unit 131 can be reduced, and the sizes of the first drive IC chip 610 and the second drive IC chip 620 can be reduced.

  In the example shown in FIGS. 7 and 8, the case where the pad PG is arranged on the active area side from the pad PS has been described. However, the case where the pad PS is arranged on the active area side from the pad PG is described. However, the same effect can be obtained.

  Next, another form of the signal supply unit 131 will be described.

  That is, the signal supply unit 131 is arranged in a straight line extending in the row direction H and the pads (first pads) PG1 to PG6 arranged in a straight line extending in the row direction H, as shown in FIG. Pads (second pads) PS1 to PS6. The pads PG are alternately arranged with the source lines X drawn out of the active area 130. The source line X is routed to the pad PS without crossing each other on the end 200A side of the array substrate 200 with respect to the pad PG.

  In the example shown in FIG. 9, each of the pad PG and the pad PS is arranged in a straight line extending in the row direction H. For the pad PG and pad PS having such a layout, a single driver IC chip 600 in which a gate driver for supplying a signal to the gate line Y and a source driver for supplying a signal to the source line X are arranged in the row direction H. Can be connected.

  Further, when wirings are routed, wirings to which different signals are supplied do not cross each other, and it is possible to prevent the occurrence of a short circuit and the occurrence of defects due to capacitance.

  Further, as in the example illustrated in FIG. 10, for the signal supply unit 131 in which the pads PG and the pads PS are arranged in a straight line, the first driving IC chip 610 connected to the pads PG and the pads PS The connected second drive IC chips 620 may be arranged in the row direction H. In this case, the first driving IC chip 610 includes a gate driver. The second driving IC chip 620 includes a source driver.

  Even in such a configuration, the same effect as the example shown in FIG. 9 can be obtained.

  Further, according to the configuration of FIGS. 9 and 10, there is almost no need to redesign the output pin arrangement of the driving IC chip in accordance with the liquid crystal display device of the present embodiment, or the arrangement of the output pin is designed. Even if it is done again, it becomes possible to use a driving IC chip used in a general liquid crystal display device with only minor changes.

  In the example shown in FIGS. 9 and 10, the case where the pads PG and the source lines X are alternately arranged and the source lines X are routed on the array substrate end 200A side has been described. However, the pads PS and the connection wirings YC are described. Are alternately arranged, and the connection wiring YC may be routed on the array substrate end portion 200A side. Even in such a case, the same effect can be obtained.

  As described above, according to the liquid crystal display device of this embodiment, the frame can be narrowed, and high definition can be achieved without increasing the frame size.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the spirit of the invention in the stage of implementation. For example, in the above embodiment, the source line and the gate connection wiring are arranged in parallel. However, the gate connection wiring is eliminated, a source connection wiring parallel to the gate line is provided, and the source connection wiring and the source line are contacted. You may make it the embodiment connected through a hole. In this case, the first wiring is a source line, the connection wiring is a source connection wiring, and the second wiring is a gate line. In this embodiment, the gate line is directly connected to the signal supply unit, and the source line is connected to the signal supply unit via the source connection wiring. Even in such an embodiment, high definition can be achieved without increasing the frame size.

  In addition, various inventions can be formed by appropriately combining a plurality of components disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, you may combine the component covering different embodiment suitably.

PX (R, G, B) ... Pixel Y ... Gate line YC ... Gate connection wiring X ... Source line CT ... Contact part 100 ... Liquid crystal display panel 120 ... Active area 130 ... Outside active area 131 ... Signal supply part 200 ... Array substrate 200E ... Extension part 300 ... Counter substrate 400 ... Liquid crystal layer 600 ... Drive IC chip PS ... Pad PG ... Pad

Claims (4)

A liquid crystal display device including a liquid crystal display panel configured to hold a liquid crystal layer between a first substrate and a second substrate, and including an active area configured by a plurality of pixels,
The first substrate is
A first wiring arranged to extend in a first direction of the active area;
An insulating film covering the first wiring;
A connection wiring that extends in a second direction intersecting the first direction over the entire active area and is arranged to intersect the first wiring via the insulating film;
A contact portion for electrically connecting the first wiring and the connection wiring;
In the active area, a second wiring arranged on the insulating film so as to extend in parallel with the connection wiring;
It is arranged along one side outside the active area located on the extension line in the second direction, connected to the connection wiring, connected to the first pad and the second wiring for supplying a signal to the first wiring, A signal supply unit including a second pad for supplying a signal to the two wirings;
With
The first pad and the second pad are arranged in a straight line extending in the first direction,
The second wiring is alternately arranged with the connection wiring drawn out of the active area, and is routed to the second pad without crossing each other on the substrate end side of the first substrate with respect to the first pad. A liquid crystal display device characterized by that.   2. The apparatus according to claim 1, further comprising a single driving IC chip including a driver connected to the first pad and the second pad and supplying a signal to the first wiring and the second wiring, respectively. A liquid crystal display device according to 1. A first driver IC chip including a first driver connected to the first pad and supplying a signal to the first wiring;
A second driving IC chip including a second driver connected to the second pad and supplying a signal to the second wiring;
The liquid crystal display device according to claim 1, wherein the first driving IC chip and the second driving IC chip are arranged side by side in a first direction.   4. The liquid crystal display device according to claim 1, wherein the number of the first wiring and the connection wiring is the same as that of the second wiring.

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