JP2013191620A - Component built-in substrate manufacturing method and component built-in substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method for efficient manufacturing of a highly reliable substrate with built-in component.SOLUTION: A manufacturing method for component built-in substrate comprises the steps of: (i) a step for preparing a core layer having a component mounting face forming a land thereon; (ii) a step of disposing bonding material including flux, a solder particle, and a granular material with a higher melting point than the solder particle and with particle diameter 5-50 μm in particle distribution d90; (iii) a step of mounting an electronic component on the core layer; (iv) a step of forming a solder joint part by heating the core layer having the electronic component thereon with higher temperature than a melting point of the solder and lower temperature than a melting point of the granular material, and controlling an interval between the land and a terminal in 20-50 μm using the granular material; (v) a step of laminating a prepreg on the core layer surrounding the electronic component with the prepreg; (vi) a step of applying pressure and heat on the laminate in a lamination direction so that the hardened material of the prepreg is filled between the electronic component and the core layer.

Description

  The present invention relates to a component-embedded substrate comprising a core layer having a component mounting surface on which a metal foil wiring pattern is formed, an electronic component mounted on the component mounting surface, and a resin layer for sealing the electronic component. In particular, it relates to a manufacturing method thereof.

  Many electronic components such as semiconductor elements are incorporated in electronic devices in the form of electronic component modules. An electronic component module is generally formed by mounting an electronic component on a substrate on which a metal foil wiring pattern is formed, and then sealing the electronic component with a resin layer. While a higher mounting density of electronic component modules is required, a component-embedded substrate in which a plurality of wiring patterns are stacked and an electronic component is mounted on an inner layer wiring pattern has been used (for example, Patent Documents 1 and 2).

  In the component-embedded substrates of Patent Documents 1 and 2, first, cream solder is supplied to the land (electrode) of the wiring pattern of the core layer. Cream solder contains a flux and solder particles dispersed in the flux, and the flux has an action of removing an oxide film on the solder surface. Thereafter, the electronic component is mounted on the core layer via cream solder, and then the core layer is heated to form a solder joint that connects the terminal of the electronic component and the land.

  Next, a cleaning process for removing the flux residue is performed, and then a prepreg is disposed on the surface of the wiring pattern of the core layer so as to surround the electronic component (Patent Document 2). And another wiring layer or metal foil is arrange | positioned so that a core layer may be opposed via a prepreg, and a component built-in board | substrate is formed by pressing and heating the obtained laminated body in the lamination direction.

JP 2009-110992 A JP 2006-59952 A

  However, in the manufacturing methods of Patent Documents 1 and 2, the following problems may occur when heating the core layer on which the electronic component is mounted.

  6A, the terminal 7a of the electronic component 7 is landed on the land 3a of the wiring pattern 3 of the core layer 1 through the cream solder 6 including the flux 6a and the solder particles 6b dispersed therein. Indicates. At this stage, the cream solder 6 has a relatively large thickness, and a gap 8 corresponding to the thickness of the cream solder 6 is formed between the lower surface of the electronic component 7 and the core layer 1.

  However, when the core layer 1 is heated, the viscosity of the flux 6a contained in the cream solder 6 is reduced, and the solder particles 6b are melted and crawl up to the surface of the terminal 7a, so that the electronic component 7 moves in the direction of gravity. Therefore, as shown in FIG. 6B, the thickness of the solder joint 6x is reduced, and the gap 8b between the lower surface of the electronic component 7 and the core layer 1 is narrowed.

  On the other hand, it is desirable that the gap 8b between the lower surface of the electronic component 7 and the core layer 1 is completely sealed with a resin material derived from the prepreg. However, as described above, when the gap 8b is narrowed, it becomes difficult for the prepreg to enter the gap 8b.

  When the gap 8b between the electronic component 7 and the core layer 1 is sealed halfway by the cured product of prepreg (sealing resin), during re-flow for heating the component-embedded substrate, from the solder joint 6x, Molten solder enters the gap 8b that is narrowed by the capillary phenomenon, and the reliability of the solder joint 6x is impaired. Sometimes, the solder flash may cause a short circuit between the terminals 7a.

  It is more difficult for the prepreg to enter the gap 8b between the electronic component 7 and the core layer 1 as the electronic components are mounted at higher density and more electronic components are mounted at a narrow pitch. This is because the narrower the pitch, the smaller the space that can serve as a movement path for the molten prepreg. In particular, as shown in a plan view in FIG. 7A, when a plurality of electronic components 7 are densely mounted on the core layer 1 with a narrow pitch, as shown in a side view in FIG. The inflow path of the prepreg 10 that enters the gap between the lower surface of the electronic component (for example, the electronic components 7C and 7D) near the center and the core layer 1 is almost limited to the gap between the electronic components.

  However, for example, in the gap between the electronic component 7C and the electronic component 7D, the prepreg 10 can flow in the direction from the top toward the component mounting surface of the core layer (the direction of the arrow Y), but the surface direction of the component mounting surface (the arrow) It is difficult to flow in the direction of X). The flow of the prepreg 10 in the X direction becomes more difficult as it goes from the periphery of the dense region of the electronic component toward the center. Therefore, in the electronic component 7A and the electronic component 7F located at the peripheral edge, even if the prepreg can be penetrated into the gap between the lower surface of the electronic component 7 and the core layer 1, the electronic component 7C located near the center In the electronic component 7 </ b> D, it becomes difficult to allow the prepreg to enter the gap between the lower surface of the electronic component 7 and the core layer 1. 7B assumes a case where the metal foil 11 (wiring layer) is bonded to the core layer 1 through the prepreg 10. FIG.

  Accordingly, one aspect of the present invention is: (i) a step of preparing a core layer having a component mounting surface on which a first wiring pattern including a land for connecting electronic components is formed; and (ii) the first wiring pattern At least a portion covering the land, a flux, solder particles dispersed in the flux, and a granular material having a melting point higher than the melting point of the solder particles and having a particle size in a particle size distribution d90 of 5 μm to 50 μm, And (iii) preparing an electronic component having a terminal, landing the terminal on the land via the bonding material, and mounting the electronic component on the component mounting surface And (iv) first heating the core layer on which the electronic component is mounted at a temperature higher than the melting point of the solder and lower than the melting point of the granular material to melt the solder, After being attached to the terminal, the solder is solidified to form a solder joint for joining the terminal and the land, and the distance between the land and the terminal is controlled to 20 μm to 50 μm by the granular material. And (v) a step of laminating the prepreg on the core layer so that the electronic component mounted on the component mounting surface is surrounded by the prepreg, and (vi) a laminate of the core layer and the prepreg Are pressed in the laminating direction and second heated to seal the electronic component with the cured product so that the cured product of the prepreg is filled in the gap between the electronic component and the core layer. And a method of manufacturing a component-embedded substrate including a process.

  According to another aspect of the present invention, there is provided a core layer having a component mounting surface on which a first wiring pattern including lands is formed, an electronic component having terminals facing the lands, and solder for connecting the lands and the terminals. And a sealing resin that seals the component mounting surface together with the electronic component and the solder joint, and the solder joint is a granular material having a particle size distribution of 5 μm to 50 μm in a particle size distribution d90. Including a first region and a second region (matrix region) covering at least a part of the first region, at least the second region is a metal region that electrically connects the land and the terminal, The present invention relates to a component-embedded substrate in which a distance between the land and the terminal is 20 μm to 50 μm, and a gap between the electronic component and the core layer is sealed with the sealing resin.

  According to the present invention, since the bonding material for bonding the land of the core layer and the terminal of the electronic component includes a granular material that does not melt at the melting point of the solder particles, when heating the core layer on which the electronic component is mounted, The granular material serves as a spacer, and the narrowing of the gap between the lower surface of the electronic component and the core layer is suppressed. Therefore, when the electronic component is sealed with the prepreg, the prepreg is likely to enter between the lower surface of the electronic component and the core layer, thereby achieving highly reliable sealing. Therefore, the problem that the molten solder enters the narrowed gap as a result of the capillary phenomenon during re-flow for heating the component-embedded substrate is also reduced.

  Even when a plurality of electronic components are densely mounted on the core layer at a narrow pitch, the inflow path of the prepreg that enters the gap between the electronic component near the center and the core layer is the core from above the electronic component. Not only the gap between the electronic components facing the component mounting surface of the layer, but also the gap between the lower surface of the adjacent electronic component and the core layer becomes an inflow path of the prepreg. Therefore, even when the mounting density of electronic components is high, highly reliable sealing is achieved.

Explanatory drawing which shows the process ((A)-(C)) until it mounts an electronic component in the component mounting surface of a core layer through a bonding material among the manufacturing processes of the component built-in board which concerns on one Embodiment of this invention. It is. It is explanatory drawing which shows the process ((D)-(F)) until it arrange | positions a prepreg after forming a solder joint part by a reflow process among the manufacturing processes of the component built-in board which concerns on one Embodiment of this invention. . Among the manufacturing steps of the component built-in substrate according to the embodiment of the present invention, the steps ((G) to (I) until the component built-in substrate in which a plurality of wiring patterns are laminated from the laminated body of the core layer and the prepreg are completed. It is explanatory drawing which shows)). It is an enlarged view which shows notionally the principal part structure of the component built-in board which concerns on one Embodiment of this invention. It is an enlarged view which shows notionally the principal part structure of the component built-in board | substrate which concerns on another embodiment of this invention. Among conventional manufacturing processes of component-embedded substrates, steps from mounting an electronic component on a component mounting surface of a core layer via a bonding material to forming a solder joint by a reflow process ((A) to (B) FIG. A plan view (A) conceptually showing a core layer on which a plurality of electronic components are densely mounted at a narrow pitch, and a prepreg in the gap between the electronic components densely mounted or in the gap between the electronic component and the core layer It is a side view (B) which shows notionally a flow direction.

First, the basic structure of the component built-in substrate will be described.
The component-embedded substrate has a structure in which a plurality of wiring layers or wiring patterns (metal foils) are stacked around a base layer. The base layer includes a core layer having a component mounting surface on which a wiring pattern is formed, and an electronic component mounted on the component mounting surface by a solder joint.

  Electronic components mounted on the component mounting surface of the core layer include chip-type small electronic components with connection terminals formed at both ends, such as chip capacitors and chip resistors, and metal bumps that serve as connection terminals on the bottom surface Examples thereof include, but are not particularly limited to, an electronic component including the prepared semiconductor.

  A sealing resin (resin layer) made of a cured prepreg is disposed between adjacent wiring patterns. The sealing resin has a function of bonding the wiring patterns adjacent to each other. Since an electronic component such as a chip component is mounted on the wiring pattern of the core layer, the sealing resin has a function of protecting the component mounting surface together with the electronic component.

  Cream solder is generally used to connect the terminals of the electronic component and the land of the wiring pattern. Therefore, when manufacturing the component-embedded substrate, heating for mounting the electronic component on the wiring pattern, and heating for bonding the wiring patterns together are repeated.

  The core layer has a thin resin substrate having a thickness of about 30 μm to 100 μm, for example, and a wiring pattern (first wiring pattern) is formed on one or both surfaces thereof. The shape of the wiring pattern varies, and the portion of the wiring pattern that is connected to the terminal of the electronic component is called a land. Such a core layer is formed by attaching a metal foil such as a copper foil to a resin substrate and then patterning the metal foil.

Next, the manufacturing method of the component built-in substrate of this invention is demonstrated.
The component-embedded substrate manufacturing method includes: (i) preparing a core layer having a component mounting surface on which a first wiring pattern including lands for connecting electronic components is formed; and (ii) at least one of the first wiring patterns. In the portion covering the land, a flux, solder particles dispersed in the flux, and a granular material having a melting point higher than the melting point of the solder particles and having a particle size in a particle size distribution d90 of 5 μm to 50 μm, And (iii) preparing an electronic component having a terminal, landing the terminal on the land via the bonding material, and mounting the electronic component on the component mounting surface. And (iv) first heating the core layer on which the electronic component is mounted at a temperature higher than the melting point of the solder and lower than the melting point of the granular material to melt the solder, After being attached to the terminal, the solder is solidified to form a solder joint for joining the terminal and the land, and the distance between the land and the terminal is controlled to 20 μm to 50 μm by the granular material. And (v) a step of laminating the prepreg on the core layer so that the electronic component mounted on the component mounting surface is surrounded by the prepreg, and (vi) a laminate of the core layer and the prepreg Are pressed in the laminating direction and second heated to seal the electronic component with the cured product so that the cured product of the prepreg is filled in the gap between the electronic component and the core layer. And a process.

  In addition, before pressurizing the said laminated body and carrying out 2nd heating, you may arrange | position metal foil, such as copper foil, so that a core layer may be opposed via a prepreg. In this case, after the second heating, via conductors connecting the plurality of wiring patterns are formed, or the metal foil is patterned to form second and third wiring patterns derived from the metal foil. can do. By repeating the same operation, it is possible to obtain a component-embedded substrate having a high mounting density in which a plurality of wiring patterns are stacked.

Hereinafter, each process will be described with reference to the drawings.
1-3 is explanatory drawing which shows each process of the manufacturing method of the component built-in board | substrate which concerns on one Embodiment of this invention.

First, a core layer having a component mounting surface on which a first wiring pattern including lands for connecting electronic components is formed is prepared (step (i)).
In FIG. 1A, the core layer 1 includes an insulating resin substrate 2, a first wiring pattern 3 disposed on the upper surface of the resin substrate 2, and a first wiring pattern 4 disposed on the lower surface of the resin substrate 2. It consists of and. Each wiring pattern is formed of a metal thin film (for example, a metal foil such as a copper foil). The upper surface of the core layer 1 is a component mounting surface, and a part of the first wiring pattern 3 functions as an electrode for connecting with a terminal of an electronic component, that is, a land 3a. For example, electronic components such as a chip resistor and a chip capacitor are mounted on the land 3a.

  The size of the electronic component is not particularly limited, but from the viewpoint of enabling high-density mounting, the height from the land is 0.5 mm or less, and further 0.05 mm to It is preferable to use a 0.2 mm electronic component. Such a small electronic component has a small gap formed between the core layer 1 and the demand for suppressing the narrowing of the gap is high.

  Note that the wiring patterns 3 and 4 include not only a part that actually functions as a wiring circuit but also a part that remains on the surface of the core layer 1 after patterning and does not have a function as a wiring circuit. Such a portion has a function of ensuring the strength of the core layer 1, for example.

Next, as shown in FIG. 1B, cream solder is disposed as a bonding material 6 in a portion covering at least the land 3a of the wiring pattern 3 (step (ii)).
Examples of the method for arranging the bonding material 6 on the surface of the core layer 1 include a screen printing method and a coating method using a dispenser. Various methods can be selected according to the shape and range of the part where the bonding material 6 is disposed.

  The bonding material 6 is disposed at least in a portion covering the land 3a. However, the bonding material 6 may be disposed so that not only the surface of the land 3a but also the first wiring pattern 3 is entirely covered. For example, the bonding material 6 may be disposed over the entire area where the first wiring pattern 3 is formed on the upper surface of the resin substrate 2.

  A general cream solder used as the bonding material 6 is a paste including a flux 6a and solder particles 6b dispersed in the flux 6a. However, the cream solder used in the present invention further has a melting point of the solder particles 6b. The granular material 6A that does not melt is included. Since the granular material 6A does not melt even when the solder particles 6b are melted by the reflow process, the granular material 6A serves as a spacer for securing a certain distance between the land 3a of the core layer 1 and the terminal 7a of the electronic component 7. Function.

  From the viewpoint of securing the function of the spacer as described above, the particle size of the granular material 6A is determined according to the size of the gap between the desired electronic component and the core layer. Depending on the amount of the granular material 6A contained in the bonding material 6, the particle diameter in the particle size distribution d90 of the granular material 6A is selected from the range of 5 μm to 50 μm. By using a granular material having a particle diameter in such a range, it becomes easy to control the distance between the electronic component mounted on the component mounting surface and the land to a range of 20 μm to 50 μm. The “particle size in the particle size distribution d90” is a particle size in which the cumulative number from the smallest particle size in the cumulative particle size distribution becomes 90%.

  The melting point of the granular material 6A may be higher than the reflow temperature at which the solder particles 6b are melted. However, from the viewpoint of suppressing melting of the granular material 6A when the solder particles 6b are melted, the difference between the melting point of the solder particles 6b and the melting point of the granular material 6A is preferably 30 ° C. or higher.

  The composition of the flux 6a included in the bonding material 6 is not particularly limited, but includes, for example, a base agent such as rosin, an activator, a solvent, a thixotropic agent, and the like. The activator is a component having an action of removing an oxide film on the surface of the solder particles. As the activator, for example, at least one selected from the group consisting of organic acids, amines, and halides can be used. These materials may be used individually by 1 type, and may be used in combination of multiple types. Examples of the halogen contained in the halide (for example, hydrohalide) include bromine and chlorine. Boron based activators can also be used.

  Although it does not specifically limit as solder particle 6b, It is preferable to have a composition which does not melt | dissolve in the heating process for bonding the prepreg performed later to the core layer 1. FIG. For example, a solder such as a Sn—Cu alloy, a Sn—Ag alloy, a Sn—Ag—Cu alloy, a Sn—Bi alloy, or a Sn—Zn alloy can be used. Each alloy may further include at least one of In, Zn, Bi and the like as the third or fourth element. The particle diameter of the solder particles 6b may be appropriately selected according to the size of the electronic component or the land. For example, solder particles having a particle diameter of 15 to 25 μm in the particle size distribution d50 can be used. The “particle size in the particle size distribution d50” is a particle size in which the cumulative number from the smallest particle size in the cumulative particle size distribution becomes 50%.

  Next, an electronic component 7 having a terminal 7a is prepared. As shown in FIG. 1C, the terminal 7a is landed on the land 3a through the bonding material 6, and the electronic component 7 is mounted on the component mounting surface. (Step (iii)). In FIG. 1C, a chip component having terminals 7a at both ends is mounted as the electronic component 7, but the electronic component is not limited to this.

  Various electronic component mounting apparatuses can be used for mounting the electronic component 7. Generally, an electronic component mounting apparatus has a mounting head provided with a suction nozzle, and the mounting head can freely move in a three-dimensional direction. The electronic component 7 is supplied to the component supply unit of the electronic component mounting apparatus by a tape feeder or the like. In the component supply unit, the mounting head picks up the electronic component 7 and moves it above the component mounting surface of the core layer 1. Then, the alignment between the terminal 7a of the electronic component 7 and the land 3a of the first wiring pattern 3 is automatically performed. Subsequently, the electronic component 7 is mounted so that the terminal 7 a is landed on the land 3 a via the bonding material 6.

  Thereby, the electronic component 7 is held by the core layer 1 through the adhesive bonding material 6. At this time, as shown in FIG. 1C, a gap 8 corresponding to the coating height of the bonding material 6 is formed between the upper surface of the core layer 1 and the lower surface of the electronic component 7. The distance L of the gap 8 at this time depends on the coating thickness of the bonding material 6 (cream solder).

  Next, as shown in FIG. 2D, the core layer 1 on which the electronic component 7 is mounted is heated (first heating), and the terminals 7 a of the electronic component 7 are connected by solder contained in the bonding material 6. Bonded to the land 3a. By heating, the solder particles 6b are melted and agglomerated while spreading on the lands 3a and the terminals 7a. Thereafter, when the temperature of the solder is lowered, the solder is solidified to form a solder joint 6x that joins the terminal 7a and the land 3a (step (iv)).

  As described above, in the first heating, since it is necessary to melt the solder particles 6b included in the bonding material 6, it is necessary to heat the core layer 1 at a temperature higher than the melting point of the solder. In such a situation, when there is no granular material 6A that does not melt at the melting point of the solder, the bonding material 6 cannot support the electronic component 7, and the electronic component 7 moves in the direction of gravity. Further, the terminal 7a of the electronic component 7 is attracted to the land 3a by the surface tension of the molten solder when the land 3a and the terminal 7a are spread. Therefore, the gap between the lower surface of the electronic component 7 and the upper surface of the core layer 1 is narrowed to a considerable extent.

  On the other hand, when the bonding material 6 includes a granular material 6A that does not melt at the melting point of the solder, the granular material 6A serves as a spacer and the electronic component 7 moves in the direction of gravity as shown in FIG. (Subduction) is suppressed. Therefore, although the gap 8a between the lower surface of the electronic component 7 and the upper surface of the core layer 1 is narrowed to some extent, the degree is small. That is, a fixed space is maintained between the lower surface of the electronic component 7 and the core layer 1 even after the first heating. The distance S of the narrowed gap 8a depends on the maximum diameter of the granular material 6A and the amount of the granular material A included in the bonding material 6.

  At this time, the distance between the land 3a and the terminal 7a of the electronic component 7 is at least the maximum diameter of the granular material 6A. However, when functioning as a spacer in a state where a plurality of particles of the granular material are aggregated, the maximum diameter of the granular material may be sufficiently smaller than the distance S of the gap to be secured.

  From the viewpoint of facilitating entry of the prepreg into the gap 8a in a later step, the distance between the land 3a and the terminal 7a of the electronic component 7 after the first heating needs to be at least 20 μm or more. However, if the distance between the land 3a and the terminal 7a of the electronic component 7 exceeds 50 μm, it is difficult to obtain a component-embedded substrate having a high mounting density. Therefore, the distance needs to be controlled to 20 to 50 μm, and is preferably controlled to 30 to 50 μm. The distance between the land 3a and the terminal 7a of the electronic component 7 means a distance along a direction perpendicular to the component mounting surface of the core layer 1.

  When the solder is solidified, a fillet-shaped solder joint 6x is formed between the terminal 7a of the electronic component 7 and the land 3a. Here, the solder joint portion 6x includes at least two regions. One is a first region including the granular material 6A, and the other is a second region that covers at least a part of the first region. Among these, the second region is a region formed by solidifying the constituent components of the solder particles 6b after melting, and is a metal region that electrically connects the land 3a and the terminal 7a of the electronic component 7. When the granular material 6A is a metal, the first region also forms a metal region that electrically connects the land 3a and the terminal 7a of the electronic component 7.

Although it does not specifically limit as granular material 6A which has melting | fusing point higher than melting | fusing point of solder particle 6b, Metal powder, ceramic powder, resin powder, etc. can be used. Among these, metal powder is particularly preferable because of its high affinity with the second region, which is a metal region, and easy distribution in the solder joints 6x. For example, Cu, Ag, Ni, or the like can be used as the metal powder. As the ceramic powder, Al ₂ O ₃ , SiO ₂ or the like can be used. Moreover, as resin powder, a fluororesin, a divinylbenzene crosslinked polymer, PEK (polyetherketone), etc. can be used.

  The metal powder preferably contains a component that forms an alloy with the solder. Such a surface layer portion of the metal powder forms an alloy with the components contained in the solder particles during solder joining by heating. In this case, the solder joint portion 6x includes a first region including the particulate matter 6A, a second region covering at least a part of the first region, and a third region interposed between the first region and the second region. Three areas are included. The third region includes an alloy of a component contained in the first region derived from the metal powder and a component contained in the second region derived from the solder. For example, when the metal powder is Cu and the solder is a Sn—Bi alloy, a Cu—Sn intermetallic compound is formed as the third region. By forming such a third region, it becomes difficult to generate a gap between the metal powder (first region) and the solder (second region), and the strength and reliability of the solder joint 6x are further improved. .

  You may perform the process of wash | cleaning the residue of the flux 6a contained in the cream solder after 1st heating. By washing the residue of the flux 6a, the flow of the molten solder is suppressed when the component-embedded substrate is reflowed. Therefore, it is possible to prevent a problem that the shape of the solder joint portion 6x is broken. Although the narrowing of the gap between the lower surface of the electronic component 7 and the core layer 1 is suppressed to some extent by the action of the granular material 6A, from the viewpoint of sufficiently removing the flux residue entering the gap. It is desirable to perform careful cleaning.

Furthermore, the surface of the wiring patterns 3 and 4 is roughened as necessary.
The roughening treatment is performed in a later step in order to improve the adhesion between the prepreg and each wiring pattern. By the roughening treatment, fine irregularities are formed on the surface of each wiring pattern, and the adhesion between the thermosetting resin contained in the prepreg and the wiring pattern is improved. The method of the roughening treatment is not particularly limited, but can be performed by immersing the core layer in a treatment solution (strongly acidic solution or strongly alkaline solution) having an action of chemically eroding the metal surface. The surfaces 3b and 4b of the wiring pattern roughened by the treatment liquid change color as conceptually shown in FIG. 2E and become black or a color close thereto. Called.
Note that as a roughening treatment method, plasma treatment or the like may be performed in addition to the wet blackening treatment using a treatment liquid.

  Alternatively, the roughening treatment is not necessarily performed after the first heating. For example, the surface of the first wiring pattern before the bonding material is disposed may be roughened before the step (ii). In this case, since the fillet of the solder joint portion 6x formed by the first heating is not eroded by the roughening treatment liquid, the reliability of the solder joint portion 6x can be improved.

  Next, as shown in FIG. 2F, the prepreg 9 is laminated on the core layer 1 so as to surround the electronic component 7 mounted on the component mounting surface (step (v)).

  When the prepregs 9 are stacked and arranged, it is desirable that the prepregs 9 be arranged so that no gap is generated between the electronic component 7 and the prepreg 9 as much as possible. The prepreg 9 is arranged so that not only the electronic component 7 but also the first wiring pattern 3 is entirely sealed. By doing in this way, the component mounting surface of the core layer 1 with the electronic component 7 can be sealed entirely with the cured product of the prepreg.

  In FIG. 2F, a prepreg 9 having an opening corresponding to the electronic component 7 is disposed so as to be in close contact with the upper surface of the core layer 1 and the electronic component 7 and to surround the electronic component 7. Further, a pair of prepregs 10a and 10b are arranged so as to sandwich the core layer 1 from both sides, and metal foils 11a and 11b are respectively attached to the surfaces of the prepregs 10a and 10b opposite to the core layer 1 side. It has been. By setting it as such a structure, both surfaces of the core layer 1 can be completely protected by sealing resin derived from a prepreg. In a later step, desired wiring patterns can be formed on the metal foils 11a and 11b, respectively.

  However, when a plurality of electronic components 7 are densely mounted at a narrow pitch and mounted on the core layer 1 as shown in FIG. 7, one electronic component 7 is respectively provided as shown in FIG. Or it is not necessary to enclose a small number. In such a case, a prepreg having an opening corresponding to the dense region may be prepared, and the prepreg may be arranged in the core layer so that the opening is fitted into the dense region. When the shortest distance between a pair of adjacent electronic components is 0.3 mm or less (for example, 80 μm to 0.3 mm), it is difficult to surround the electronic components 7 one by one or a small number by a prepreg. It is. And in such a case, the request | requirement of suppressing narrowing of the clearance gap between the lower surface of the electronic component 7 and the core layer 1 by the granular material 6A becomes high especially.

  Next, as shown in FIG. 3G, the laminated body of the core layer 1 and the prepregs 9, 10a, and 10b is pressurized in the laminating direction and heated (second heating). Thereby, the electronic component 7 is sealed with the sealing resin 12 which is a cured product of the prepregs 9 and 10a (step (vi)). At this time, since a certain space is held in the gap 8a between the lower surface of the electronic component 7 and the upper surface of the core layer 1, a part of the prepreg can easily enter the gap. Accordingly, a gap filling portion 12a made of a cured product of the prepreg is also formed in the gap, and highly reliable sealing is achieved. Further, as described above, even in a dense region of electronic components where the shortest distance between a pair of adjacent electronic components is 0.3 mm or less, the gap between the lower surface of each electronic component and the core layer is the inflow path of the prepreg. As a result, highly reliable sealing is achieved.

  From the viewpoint of efficiently allowing the prepreg to penetrate into the gap between the lower surface of the electronic component 7 and the upper surface of the core layer 1, it is preferable that the pressurization in the stacking direction of the stacked body is performed in a reduced pressure atmosphere. The pressure of the reduced pressure atmosphere may be, for example, 13.3 kPa (100 Torr) or less.

The laminated body may be heated with a general press device at a pressure of about 30 kgf / cm ² , for example. At this time, the temperature of the second heating may be a temperature at which the curing reaction of the thermosetting resin contained in the prepreg proceeds.
However, the composition of the solder joint portion should have a melting temperature that is higher than the temperature of the second heating (for example, a temperature that is 20 ° C. higher than the second heating temperature) so that no deviation occurs in the solder joint portion 6x. Is desirable. For example, when the second heating temperature is about 150 to 175 ° C., the composition of the solder joint may be set to Sn: Bi = 92: 8 (melting temperature about 195 ° C.).

  By the second heating, as shown in FIG. 3G, the first wiring pattern 3 and the electronic component 7 are in close contact with the adjacent prepreg. Similarly, the prepreg 10 b adjacent to the wiring pattern 4 on the lower surface of the core layer 1 forms a resin layer 13 in close contact with the wiring pattern 4. When fine irregularities are formed on the surfaces of the wiring patterns 3 and 4 by the roughening treatment, good adhesion between the wiring patterns 3 and 4 and the sealing resin or the resin layer is achieved.

  Next, as shown in FIG. 3H, via holes are formed in the obtained component-embedded substrate 14 in the thickness direction, and a plated layer 15 is formed on the inner surface of the holes. As a result, via conductors (interlayer wiring) connecting the first wiring pattern 3 of the core layer 1 and the metal foils 11a and 11b respectively disposed on both surfaces of the component-embedded substrate 14 are formed.

  For example, a conformal method can be used for forming the via hole. First, only the metal foil present on the surface of the via hole forming portion is removed by etching by photolithography or the like. Next, when the portion where the metal foil is removed is irradiated with a laser, the remaining surrounding metal foil becomes a conformal mask, and a via hole can be formed in the portion where the metal foil is removed. For the laser processing, a carbon dioxide laser, a YAG laser, or the like can be used.

  Next, since smear (resin residue) is generated in laser processing, desmear processing in the via hole is performed. As the chemical for desmear treatment, for example, an oxidizing agent aqueous solution or the like can be used. Specifically, an alkaline aqueous solution of potassium permanganate or sodium permanganate, an aqueous sulfuric acid solution of chromic acid or sodium dichromate, or the like can be used. Prior to treatment with these chemicals, pretreatment in the via hole may be performed using an alkali swelling liquid.

After the desmear process, after neutralizing with a predetermined neutralizing solution, a plating layer 15 is formed on the inner surface of the desmeared via hole, and a conduction process is performed. At this time, treatment by a dry method such as vapor deposition, sputtering, or ion plating may be performed, but treatment by a wet method such as electroless plating or electrolytic plating is preferable in consideration of mass productivity.
The method for forming the via conductor is not limited to the above.

  Thereafter, as shown in FIG. 3I, the second wiring pattern 16 is formed by patterning the one metal foil 11a. Of course, the other metal foil 11b may be patterned, and in this case, the third wiring pattern 17 is formed. The second and third wiring patterns formed in this way are further targets for mounting electronic components. By repeating the same operation, it is possible to obtain a component-embedded substrate with a higher mounting density in which more wiring patterns are stacked.

FIG. 4 conceptually shows an essential part structure of the completed component-embedded substrate.
Between the land 3a formed on the component mounting surface of the core layer 1 and the terminal 7a of the electronic component 7, a solder joint portion 6x that electrically connects them is formed. The component mounting surface on which the electronic component 7 is mounted is sealed with a sealing resin (not shown), and the gap between the core layer 1 and the lower surface of the electronic component 7 is also sealed with a gap filling portion 12a derived from the prepreg. It has been stopped. With such a structure, a solder flash does not occur during reflow for heating the component-embedded substrate 14, and a short circuit between the terminals 7a of the electronic component 7 does not occur.

The solder joint portion 6x has a first region containing particulate matter (for example, Cu particles) 6A and a second region derived from solder (for example, Sn—Bi alloy), and the first region is formed by the second region. Covered. In such a combination of solder and granular material 6A, a third region 6z made of an alloy or an intermetallic compound (for example, Cu ₆ Sn ₅ ) is usually interposed between the first region and the second region. ing. In FIG. 4, the range of the third region 6z is conceptually indicated by a broken line.

  In FIG. 4, the maximum diameter of the granular material 6A matches the distance between the land 3a and the terminal 7a of the electronic component 7, but the maximum diameter of the granular material 6A does not need to match the distance. For example, as shown in FIG. 5, when the particles function as a spacer in a state in which the particles of the plurality of granular materials 6B are aggregated, the distance between the land 3a and the terminal 7a of the electronic component 7 is the aggregate of the granular materials 6B. Depends on size.

  However, the smaller the amount of particulate matter contained in the bonding material 6, the more the number of particulate matter interposed between the land 3a and the terminal 7a of the electronic component 7 is reduced probabilistically. Therefore, it is desirable that the particle size of the granular material is larger as the amount of the granular material contained in the bonding material 6 is smaller.

Hereinafter, the preferable composition of the bonding material 6 will be exemplified.
The total amount of the solder particles contained in the bonding material 6 and the particulate matter having a melting point higher than the melting point of the solder is preferably 40 to 65% by volume. In this case, components other than the solder particles and the particulates contained in the bonding material 6, that is, the amount of flux is 60 to 35% by volume.

As described above, the preferable range of the amount (volume ratio) of the particulate matter in the total amount of the solder particles and the particulate matter varies depending on the particle diameter of the particulate matter.
Specifically, when the particle size in the particle size distribution d90 is 5 to 15 μm, the volume ratio of the granular material to the total amount of the solder particles and the granular material is 15 to 40 vol% (the solder particles are 60 to 85 vol. (Condition A), and when the particle size in the particle size distribution d90 is 10 to 30 μm, the volume ratio of the granular material to the total amount of the solder particles and the granular material is 5 to 20% by volume ( It is preferable that the solder particles are 80 to 95% by volume) (Condition B). When the particle size in the particle size distribution d90 is 20 to 40 μm, the volume ratio of the particles to the total amount of the solder particles and the particles Is preferably 3 to 10% by volume (the solder particles are 90 to 97% by volume) (Condition C). When the particle size in the particle size distribution d90 is 30 to 50 μm, 1-5% by volume is the volume fraction of the particulate matter to the total amount is preferably (solder particles 95 to 99 vol%) is (condition D).

Preferred compositions that satisfy the above conditions A to D are summarized in Table 1.
Table 2 shows preferable combinations of solder particles and granular materials.

  The present invention comprises a core layer having a component mounting surface on which a metal foil wiring pattern is formed, an electronic component mounted on the component mounting surface, a resin layer for sealing the electronic component, and a plurality of wirings This is useful in the field of component-embedded substrates in which patterns are stacked, and is particularly useful when a plurality of small electronic components are densely packed at a narrow pitch and mounted on the core layer.

  1: Core layer, 2: Resin substrate, 3, 4: Wiring pattern, 3a: Land, 6: Joining material, 6a: Flux, 6b: Solder particles, 6A, 6B: Granular material, 6x: Solder joint, 7: Electronic component, 7a: terminal, 8, 8a: gap, 9, 10a, 10b: prepreg, 11a, 11b: metal foil, 12: sealing resin, 12a: gap filling part, 13: resin layer, 14: component built-in substrate , 15: plating layer, 16: second wiring pattern, 17: third wiring pattern

Claims (11)

(I) preparing a core layer having a component mounting surface on which a first wiring pattern including lands for connecting electronic components is formed;
(Ii) In a portion covering at least the land of the first wiring pattern,
With flux,
Solder particles dispersed in the flux;
A step of disposing a bonding material including a granular material having a melting point higher than the melting point of the solder particles and having a particle size of 5 μm to 50 μm in the particle size distribution d90;
(Iii) preparing an electronic component having a terminal, landing the terminal on the land via the bonding material, and mounting the electronic component on the component mounting surface;
(Iv) The core layer on which the electronic component is mounted is first heated at a temperature higher than the melting point of the solder and lower than the melting point of the granular material to melt the solder and adhere to the land and the terminal. And then solidifying to form a solder joint for joining the terminal and the land, and controlling the distance between the land and the terminal to 20 μm to 50 μm with the granular material;
(V) laminating the prepreg on the core layer so that the electronic component mounted on the component mounting surface is surrounded by the prepreg;
(Vi) Pressurizing the laminated body of the core layer and the prepreg in the laminating direction and performing the second heating so that the cured product of the prepreg is filled in the gap between the electronic component and the core layer. And a step of sealing the electronic component with the cured product.   The component built-in according to claim 1, wherein the step (iii) is a step of mounting a plurality of the electronic components on the component mounting surface, and a shortest distance between a pair of adjacent electronic components is 0.3 mm or less. A method for manufacturing a substrate.   The method for manufacturing a component-embedded board according to claim 1, further comprising a step of removing the flux residue by washing after the step (iv). In the bonding material, the volume ratio of the granular material to the total amount of the solder particles and the granular material, and the particle diameter in the particle size distribution d90 of the granular material are:
Condition A: the volume ratio is 15 to 40% by volume and the particle size in the particle size distribution d90 is 5 to 15 μm,
Condition B: the volume ratio is 5 to 20% by volume and the particle size in the particle size distribution d90 is 10 to 30 μm,
Condition C: the volume ratio is 3 to 10% by volume and the particle size in the particle size distribution d90 is 20 to 40 μm,
Condition D: The method for manufacturing a component-embedded substrate according to any one of claims 1 to 3, wherein the volume ratio is 1 to 5% by volume and the particle size in the particle size distribution d90 is 30 to 50 µm. .   The manufacturing method of the component built-in board according to any one of claims 1 to 4, wherein a difference between the melting point of the solder and the melting point of the granular material is 30 ° C or higher.   The method for manufacturing a component built-in substrate according to claim 1, wherein the granular material is a metal powder, and the metal powder includes a component capable of forming an alloy with a component contained in the solder. .   The component built-in according to claim 1, further comprising a step of roughening a surface of the first wiring pattern after the first heating and before laminating the prepreg on the core layer. A method for manufacturing a substrate.   The method for manufacturing a component built-in substrate according to claim 1, wherein a temperature of the second heating is lower than a melting point of the solder. A core layer having a component mounting surface on which a first wiring pattern including lands is formed;
An electronic component having a terminal facing the land;
A solder joint for connecting the land and the terminal;
A sealing resin for sealing the component mounting surface together with the electronic component and the solder joint portion;
The solder joint includes a first region including a granular material having a particle size of 5 μm to 50 μm in a particle size distribution d90, and a second region covering at least a part of the first region, and at least the second region is the A metal region that electrically connects the land and the terminal;
The distance between the land and the terminal is 20 μm to 50 μm,
A component-embedded substrate in which a gap between the electronic component and the core layer is sealed with the sealing resin.   The first region is a metal region, a third region is interposed between the first region and the second region, and the third region includes a component contained in the first region and the first region. The component built-in board according to claim 9, comprising an alloy with a component contained in two regions.   The component-embedded substrate according to claim 9 or 10, wherein the component mounting surface has a plurality of the electronic components mounted thereon, and a shortest distance between a pair of adjacent electronic components is 0.3 mm or less.

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