JP2013158169A - Driver of driven switching element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve such a problem that a surge voltage may increase excessively, if a switching element S¥# is driven continuously when abnormalities occur in the active gate control function.SOLUTION: When a switching element S¥# is turned off, switching elements for discharge Pdd1, Pdd2 are turned on, at first, and then the switching element for discharge Pdd2 is turned off. Consequently, surge voltage is suppressed while reducing the switching loss as much as possible. The potential nd1 at the joint of the switching element for discharge Pdd1 and a resistor Rd1, and the potential nd2 at the joint of the switching element for discharge Pdd2 and a resistor Rd2 are compared with a threshold voltage by means of comparators 44, 46, respectively. An abnormality diagnosis section 32 diagnoses the presence or absence of abnormalities on the basis of the magnitude comparison results.

Description

  According to the present invention, a voltage-controlled switching element is a driving target switching element, and the driving target switching element is configured to switch the driving target switching element to the other to switch from one of an on state and an off state to the other. The present invention relates to a drive device for a drive target switching element that is used when charging an opening / closing control terminal of an element and includes a charging path connected to the opening / closing control terminal.

  As this type of driving device, as seen in, for example, Patent Document 1 below, when discharging a positive charge from the gate in order to turn off an insulated gate bipolar transistor (IGBT) as a switching element to be driven, a collector current Some have been proposed that reduce the switching speed by detecting a decrease in the. Specifically, it has two discharge paths with different resistance values, triggered by the detection of a decrease in collector current, and opens the discharge path with a low resistance value and closes the discharge path with a high resistance value. State. As a result, the rate of decrease in the collector current can be reduced, and as a result, the surge voltage can be reduced while suppressing the switching loss.

Japanese Patent No. 3339311

  By the way, when an abnormality occurs in the function of reducing the rate of decrease in the collector current, the temperature of the switching element may be excessively increased or an excessively high voltage may be applied to the switching element. That is, when an abnormality occurs in which the collector current decrease rate decreases immediately after the switching element is turned off, the switching loss increases, and the temperature of the switching element may become excessively high. In addition, when the rate of decrease in the collector current does not decrease, the surge voltage increases, and as a result, an excessively high voltage may be applied to the switching element.

  The present invention has been made in the process of solving the above-mentioned problems, and an object thereof is to use a voltage-controlled switching element as a driving target switching element, and the driving target switching element from any one of an on state and an off state. A new drive target switching element that is used when charging the switching control terminal of the driving target switching element to charge to the other to be switched to the other and has a charging path connected to the switching control terminal It is in providing the drive device of.

  Hereinafter, means for solving the above-described problems and the operation and effect thereof will be described.

  According to the first aspect of the present invention, the voltage-controlled switching element is a driving object switching element (S ¥ #: ¥ = u, v, w, c, # = p, n), and the driving object switching element is turned on. And a charge path used when charging the switching control terminal of the drive target switching element to charge the switching control terminal of the drive target switching element to switch from one of the OFF state to the other. And the charging path is a series connection body of switching elements (Pdc1, Pdc2, Pdd1, Pdd2) for predrive and resistors (Rc1, Rc2, Rd1, Rd2), and the switching element and resistors for predrive. Input means (40, 42, 44, 46, 47, 58, 60) for inputting the potential at the connection point of And diagnosing means (32) for diagnosing the presence or absence of an abnormality related to driving of the drive target switching element.

  The potential at the connection point is determined according to the switching state of the pre-drive switching element, and is considered to be different from that at normal time in the event of an abnormality. In view of this point, the above invention diagnoses the presence or absence of an abnormality.

  In addition, the concept regarding the following typical embodiment concerning this invention is demonstrated in the column of "other embodiment" after typical embodiment.

1 is a system configuration diagram according to a first embodiment. FIG. The circuit diagram which shows the circuit structure of the drive unit concerning the embodiment. The time chart which shows the process of the drive unit concerning the embodiment. The flowchart which shows the procedure of the abnormality diagnosis process concerning the embodiment. The flowchart which shows the procedure of the abnormality diagnosis process concerning the embodiment. The flowchart which shows the procedure of the abnormality diagnosis process concerning the embodiment. The figure which shows the fail safe process concerning the embodiment. The circuit diagram which shows the circuit structure of the drive unit concerning 2nd Embodiment. The flowchart which shows the procedure of the abnormality diagnosis process concerning the embodiment. The flowchart which shows the process sequence of execution determination of the abnormality diagnosis concerning 3rd Embodiment. The flowchart which shows the procedure of the execution judgment process of the active gate control concerning 4th Embodiment. The circuit diagram which shows the circuit structure of the drive unit concerning 5th Embodiment. The flowchart which shows the procedure of the abnormality diagnosis process concerning the embodiment. The circuit diagram which shows the circuit structure of the drive unit concerning 6th Embodiment.

<First Embodiment>
Hereinafter, a first embodiment in which a drive device for a drive target switching element according to the present invention is applied to a drive device for a power conversion circuit connected to a rotating machine as an in-vehicle main machine will be described with reference to the drawings.

  FIG. 1 shows an overall configuration of a control system according to the present embodiment. The motor generator 10 is a rotating machine as an in-vehicle main machine, and is mechanically coupled to drive wheels (not shown). The motor generator 10 is connected to the high voltage battery 12 via an inverter INV, a boost converter CNV, and a power switching means (relay SMR). Here, boost converter CNV includes a capacitor C, a pair of switching elements Scp and Scn connected in parallel to capacitor C, and a reactor that connects a connection point between the pair of switching elements Scp and Scn and the positive electrode of high-voltage battery 12. L. The voltage of the high voltage battery 12 (for example, 100 V or more) is boosted up to a predetermined voltage (for example, “666 V”) by turning on / off the switching elements Scp, Scn. On the other hand, the inverter INV includes a series connection body of the switching elements Sup and Sun, a series connection body of the switching elements Svp and Svn, and a series connection body of the switching elements Swp and Swn. The points are connected to the U, V, and W phases of the motor generator 10, respectively. In the present embodiment, an insulated gate bipolar transistor (IGBT) is used as these switching elements S ¥ # (¥ = u, v, w, c; # = p, n). In addition, a diode D ¥ # is connected in antiparallel to each of these.

  The control device 18 is a control device that uses the low-voltage battery 16 as a power source. The control device 18 controls the motor generator 10 and operates the inverter INV and the boost converter CNV to control the control amount as desired. Specifically, operation signals gcp and gcn are output to drive unit DU in order to operate switching elements Scp and Scn of boost converter CNV. Further, in order to operate the switching elements Sup, Sun, Svp, Svn, Swp, Swn of the inverter INV, operation signals gup, gun, gvp, gvn, gwp, gwn are output to the drive unit DU. Here, the high-potential side operation signal g ¥ p and the corresponding low-potential side operation signal g ¥ n are complementary to each other. In other words, the high-potential side switching element S ¥ p and the corresponding low-potential side switching element S ¥ n are alternately turned on.

  Here, the high-voltage system including the high-voltage battery 12 and the low-voltage system including the low-voltage battery 16 have different reference potentials. That is, for example, the negative potential of the high voltage battery 12 and the negative potential of the low voltage battery 16 are set such that the median value of the positive potential and the negative potential of the high voltage battery 12 is the vehicle body potential and the negative potential of the low voltage battery 16 is the vehicle body potential. Are different from each other. Then, transmission and reception of signals between these two systems is performed via an interface 14 including an insulating communication means such as a photocoupler.

  FIG. 2 shows the configuration of the drive unit DU.

  As shown in the figure, the drive unit DU includes a drive IC 20 that is a one-chip semiconductor integrated circuit. A voltage Vom of a power source using power supplied from, for example, the low voltage battery 16 via the flyback converter is applied to the terminal T1 of the drive IC 20. The terminal T1 is connected to the terminal T2 via a P-channel MOS field effect transistor (charging switching element Pdc1), and the terminal T2 is connected to the switching control terminal (gate) of the switching element S ¥ # via the resistor Rc1. Has been. The terminal T1 is connected to the terminal T3 via a P-channel MOS field effect transistor (charging switching element Pdc2), and the terminal T3 is connected to the gate of the switching element S ¥ # via a resistor Rc2. . Here, the resistance value r1 of the resistor Rc1 is set to a value larger than the resistance value r2 of the resistor Rc2.

  The gate of the switching element S ¥ # is connected to a terminal T4 via a resistor Rd1, and the terminal T4 is an object to be opened / closed of the switching element S ¥ # via an N-channel MOS field effect transistor (discharge switching element Pdd1). Is connected to one end (emitter) of the flow path (between collector and emitter). The gate of the switching element S ¥ # is connected to the terminal T5 via the resistor Rd2, and the terminal T5 opens and closes the switching element S ¥ # via the N-channel MOS field effect transistor (discharge switching element Pdd2). It is connected to one end (emitter) of the target distribution channel. Here, the resistance value r3 of the resistor Rd1 is set to a value larger than the resistance value r4 of the resistor Rd2.

  The charging switching elements Pdc1 and Pdc2 and the discharging switching elements Pdd1 and Pdd2 are pre-drive switching elements for driving the switching element S ¥ # as a driving target. They are operated by the drive control unit 22.

  Potential fixing resistors 24, 26, 28, and 30 are connected in parallel to the charging switching elements Pdc1 and Pdc2 and the discharging switching elements Pdd1 and Pdd2. In this embodiment, these resistance values are all set to the same resistance value r0. These values are sufficiently larger than the resistance values r1 to r4 of the resistors Rc1, Rc2, Rd1, and Rd2. This is because the charging current between the power source and the gate of the voltage Vom when the charging switching elements Pdc1 and Pdc2 are in the off state and the discharging current between the gate and emitter when the switching elements Pdd1 and Pdd2 are in the off state are regarded as zero. It is a setting to make it possible.

  The switching element S ¥ # includes a sense terminal St that outputs a minute current having a correlation with a current (collector current) flowing through a flow path (an electrical path between the collector and the emitter) that opens and closes. The sense terminal St is electrically connected to the emitter via the sense resistor 34. As a result, a voltage drop occurs in the sense resistor 34 due to the current output from the sense terminal St. Therefore, the voltage drop amount (sense voltage Vse) due to the sense resistor 34 is used as a detection signal for the collector current of the switching element S ¥ #. Can do.

  On the other hand, the gate of the switching element S ¥ # is connected to one end (emitter) of the flow path of the switching element S ¥ # via the soft blocking resistor 36 and the soft blocking switching element Ssf. . Here, the resistance value of the soft cutoff resistor 36 is set to a value larger than the resistance values r3 and r4 of the resistors Rd1 and Rd2. This is to make the electrical path including the soft cutoff resistor 36 and the soft cutoff switching element Ssf a path having a larger resistance value as compared with the discharge path of the positive charge at the normal time.

  When the drive control unit 22 determines that the amount of current flowing through the switching element S ¥ # exceeds the allowable upper limit value based on the sense voltage Vse input via the terminal T8, the charging switching elements Pdc1, Pdc2 Alternatively, the discharge switching elements Pdd1 and Pdd2 are turned off, and the soft cutoff switching element Ssf is turned on via the terminal T10. As a result, under the situation where an excessively large current flows through the switching element S ¥ #, the switching control to the off state can be performed at a switching speed lower than normal, and the surge voltage can be suppressed.

  The sense voltage Vse is also taken into the abnormality diagnosis unit 32. If it is determined that the allowable upper limit value is exceeded, the abnormality diagnosis unit 32 outputs a fail signal FL from the drive IC 20 to the low voltage system (control device 18).

  The drive unit DU further includes an N-channel MOS field effect transistor (off-holding switching element Sok) for short-circuiting between the gate and emitter of the switching element S ¥ #. The off-holding switching element Sok is provided as close as possible to the switching element S ¥ # so as to connect the gate and emitter of the switching element S ¥ # with a low resistance. Of the paths connecting the gate and emitter of the switching element S ¥ #, the impedance of the path including the off-holding switching element Sok is set to be lower than the impedance of the path including the resistors Rd1 and Rd2. ing. This is because the parasitic capacitance between the end (collector and emitter) of the flow path of the switching element S ¥ # and the gate when the switching element S ¥ # is turned off in response to the operation signal g ¥ #. The switching element S ¥ # is prevented from being erroneously turned on by superimposing high-frequency noise on the gate via.

  The gate of the off-holding switching element Sok is connected to the drive control unit 22 in the drive IC 20 via the terminal T9. The drive control unit 22 monitors the potential difference (gate voltage Vge) between one end (emitter) of the flow path of the switching element S ¥ # taken in via the terminal T9 and the open / close control terminal (gate), and the gate voltage When Vge becomes the off-hold start voltage Vgth, a process of turning on the off-hold switching element Sok is performed. The off-holding switching element Sok is turned off when both the discharge switching elements Pdd1 and Pdd2 are turned off.

  The drive IC 20 further takes in the temperature Tj detected by the temperature sensitive diode SD via the terminal T11. Here, the temperature sensitive diode SD is means for detecting the temperature of the switching element S ¥ #.

  In the present embodiment, as a path for charging the gate with the charge for turning on the switching element S ¥ #, a pair of paths including a path including the charging switching element Pdc1 and a path including the charging switching element Pdc2 is used. Prepare. Thus, the resistance value of the linear element in the charging path can be changed during the switching period of the switching element S ¥ # from the off state to the on state, and thus active gate control can be performed.

  Similarly, as a path for charging the gate to charge for turning off the switching element S ¥ # (positive charge discharging path), a path including the discharging switching element Pdd1 and a path including the discharging switching element Pdd2 And a pair of paths. As a result, the resistance value of the linear element in the charge charging path for turning off can be changed during the switching period of the switching element S ¥ # from the on state to the off state, and hence active gate control is executed. Can do.

  By the way, when performing active gate control, the switching timing of the switching states of the charging switching elements Pdc1 and Pdc2 and the discharging switching elements Pdd1 and Pdd2 is important. This is because a higher accuracy is required for the switching timing than when no active gate control is performed. Here, in the active gate control, the high accuracy is required for the switching timing because the timing adjustment is required in a very short time of the switching state switching period.

  In view of such circumstances, in the present embodiment, comparison signals CMc1, CMc2, CMd1, and CMd2 of the comparators 40 to 46 are input to the abnormality diagnosis unit 32. The comparator 40 outputs a comparison result between the potential nc1 at the connection point between the charging switching element Pdc1 and the resistor Rc1 and the reference potential to the abnormality diagnosis unit 32 as a comparison signal CMc1. The comparator 42 outputs a comparison result between the reference potential and the potential nc2 at the connection point between the charging switching element Pdc2 and the resistor Rc2 to the abnormality diagnosis unit 32 as a comparison signal CMc2. The comparator 44 outputs the comparison result between the reference potential and the potential nd1 of the connection point between the discharge switching element Pdd1 and the resistor Rd1 as the comparison signal CMd1 to the abnormality diagnosis unit 32. The comparator 46 outputs a comparison result between the reference potential and the potential nd2 of the connection point between the discharge switching element Pdd2 and the resistor Rd2 to the abnormality diagnosis unit 32 as a comparison signal CMd2.

  FIG. 3 shows transitions of the comparison signals CMc1, CMc2, CMd1, and CMd2 during normal driving of the switching element S ¥ # together with the following transitions. That is, operation signal g ¥ #, gate voltage Vge, sense voltage Vse, transition of switching timing (ACG) by active gate control, charging switching elements Pdc1, Pdc2, discharging switching elements Pdd1, Pdd2, off-holding switching elements Shown with Sok on / off.

  As shown in the figure, when the operation signal g ¥ # is switched to the ON operation command, the charging switching element Pdc1 is turned ON. Then, after the gate voltage Vge rises, the threshold voltage is exceeded and the collector current begins to flow, and after the timing when the collector current rise rate becomes substantially zero, the resistance value of the linear element in the charging path by active gate control Switching timing (ACG: L → H) is reached. Thereby, switching element Pdc2 for charge is turned on. For this reason, the resistance value of the linear element in the charging path is reduced from the resistance value r1 to “r1 · r2 / (r1 + r2)”. For this reason, in the switching period to the ON state, first, the surge voltage is suppressed by limiting the increase rate of the collector current of the switching element S ¥ # by the resistance value r1. Thereafter, the switching loss is increased by increasing the rate of decrease of the on-resistance of the switching element S ¥ # by switching the resistance value.

  On the other hand, when the operation signal g ¥ # is switched to the off operation command, the charging switching elements Pdc1 and Pdc2 are turned off and the discharging switching elements Pdd1 and Pdd2 are turned on. As a result, the positive charge of the gate of the switching element S ¥ # is discharged, so that the gate voltage Vge decreases. Then, although the collector current starts to decrease in the mirror period in which the decrease rate of the gate voltage Vge once decreases, the sense voltage Vse increases at this time. That is, there is a phenomenon in which the correlation between the sense voltage Vse and the collector current temporarily collapses during the switching period of the switching state.

  Here, the timing at which the sense voltage Vse rises and reaches a peak is synchronized with the timing at which the peak occurs in the process in which the voltage across the distribution path of the switching element S ¥ # (collector-emitter voltage Vce) rises. Has been found by the inventors. In the present embodiment, in view of this point, at the timing when the sense voltage Vse rises to the peak, the positive charge discharge path of the gate of the switching element S ¥ # is discharged from the path including the discharge switching elements Pdd1 and Pdd2. The path is switched to a path having only the switching element Pdd1 for use. Specifically, the discharge switching element Pdd2 is turned off at a timing when the sense voltage Vse becomes equal to or higher than the active gate threshold voltage Vsth. Thereby, it is possible to suitably suppress the surge while reducing the switching loss as much as possible.

  That is, in order to reduce the switching loss, the higher the gate discharge rate, the better. On the other hand, in order to suppress the surge, the smaller the discharge rate of the gate, the better. However, even if the electromotive voltage of the parasitic inductor due to the change in the current flowing through the switching element S ¥ # increases to some extent, the switching element S In a region where the voltage at both ends of the distribution path of ## (collector-emitter voltage Vce) is equal to or lower than the output voltage of converter CNV, an excessively high voltage is not applied to switching element S ¥ #. Therefore, ideally, it is desirable to increase the resistance value of the gate discharge path by making the collector-emitter voltage the output voltage of the converter CNV. On the other hand, they approximate the pair of timings, that is, the timing at which the collector-emitter voltage becomes the output voltage of converter CNV and the timing at which sense voltage Vse rises to the peak. For this reason, in this embodiment, the resistance value of the discharge path is switched using the rising timing of the sense voltage Vse.

  Then, when the gate voltage Vge becomes equal to or lower than the off-holding threshold voltage Vg0, the off-holding switching element Sok is turned on.

  In such a series of processing, as the charging switching element Pdc1 is turned on, the potential nc1 at the connection point between the charging switching element Pdc1 and the resistor Rc1 rises, so that the comparison signal CMc1 is inverted to logic L. Further, as the charging switching element Pdc2 is turned on by the active gate control, the potential nc2 at the connection point between the charging switching element Pdc2 and the resistor Rc2 rises, so that the comparison signal CMc2 is inverted to logic L. On the other hand, as the discharge switching elements Pdd1 and Pdd2 are turned on, the potential nd1 at the connection point between the discharge switching element Pdd1 and the resistor Rd1 and the connection between the discharge switching element Pdd2 and the resistor Rd2 Since the potential nd2 at the point decreases, the comparison signals CMd1 and CMd2 are inverted to logic H. Further, as the discharge switching element Pdd2 is turned off by the active gate control, the potential nd2 at the connection point between the discharge switching element Pdd2 and the resistor Rc2 rises, so that the comparison signal CMd2 is inverted to logic L.

  Hereinafter, the abnormality diagnosis process performed by the abnormality diagnosis unit 32 will be described with reference to FIGS.

  In the series of processes shown in FIG. 4, first, in step S10, it is determined whether or not the operation signal g ¥ # has been switched from the off operation command to the on operation command. If an affirmative determination is made in step S10, in step S12, the discharging switching element Pdd1 is turned off and the charging switching element Pdc1 is turned on.

  In the subsequent step S14, it is determined whether or not the comparison signal CMc1 is inverted from logic H to logic L. Specifically, it is determined whether or not the elapsed time T from the switching of the operation signal g ¥ # to the on operation command is inverted to the logic L before reaching the threshold time Tth. This process is for diagnosing the presence or absence of an open abnormality of the charging switching element Pdc1. That is, since the potential nd1 at the connection point between the charging switching element Pdc1 and the resistor Rd1 should be raised by switching the charging switching element Pdc1 to the on state, when the comparison signal CMc1 does not invert to the logic L, This is considered to be an open abnormality of the charging switching element Pdc1 (step S16). Note that the threshold time Tth is set to a time that is equal to or longer than the upper limit of the time required for the charging switching element Pdc1 to switch to the ON state and is as short as possible. According to such a setting, an abnormality in which the time required to actually switch to the ON state in response to the ON operation command of the charging switching element Pdc1 can be diagnosed as an open abnormality.

  On the other hand, if it is determined in step S14 that the logic is inverted to L, it is determined in step S18 whether or not it is the switching timing (ACG: L → H) by active gate control. Then, at the switching timing, the charging switching element Pdc2 is turned on in step S20. In a succeeding step S22, it is determined whether or not the comparison signal CMc2 is inverted from logic H to logic L. Specifically, it is determined whether or not the elapsed time T from the switching to the ON operation command of the charging switching element Pdc2 is inverted to the logic L before reaching the threshold time Tth. This process is for diagnosing the presence or absence of an open abnormality of the charging switching element Pdc2. That is, since the potential nd2 at the connection point between the charging switching element Pdc2 and the resistor Rd2 should be raised by switching the charging switching element Pdc2 to the ON state, when the comparison signal CMc2 is not inverted to logic L, This is considered to be an open abnormality of the charging switching element Pdc2 (step S24). Note that the threshold time Tth is set to a time that is equal to or shorter than the upper limit of the time required for the charging switching element Pdc2 to be switched on in a normal state and is as short as possible. According to such setting, an abnormality in which the time required to actually switch to the ON state in response to the ON operation command for the charging switching element Pdc2 can be diagnosed as an open abnormality.

  If an affirmative determination is made in step S22, it is determined in step S26 whether or not the comparison signal CMd1 is logic L. This process is for diagnosing whether there is a short circuit abnormality in the discharge switching element Pdd1 or an open abnormality in the resistor Rd1. That is, when the switching element S ¥ # is in the ON state, the gate voltage Vge rises to the voltage Vom, so that the potential nd1 at the connection point between the discharging switching element Pdd1 and the resistor Rd1 rises to about the voltage Vom. Specifically, at this time, the potential nd1 is “Vom · r0 / (r0 + r3)”, but since the resistance value r3 is negligibly small compared to the resistance value r0, this potential is regarded as the voltage Vom. be able to. For this reason, if the comparison signal CMd1 does not become logic L, an abnormality that the potential nd1 decreases occurs, so it is considered that the short circuit abnormality of the discharging switching element Pdd1 or the open abnormality of the resistor Rd1 (step S28).

  On the other hand, if a positive determination is made in step S26, it is determined in step S30 whether or not the comparison signal CMd2 is logic L. This process is for diagnosing the presence or absence of a short circuit abnormality of the discharge switching element Pdd2 or an open abnormality of the resistor Rd2. That is, when the switching element S ¥ # is in the ON state, the gate voltage Vge rises to the voltage Vom, so that the potential nd2 at the connection point between the discharging switching element Pdd2 and the resistor Rd2 rises to about the voltage Vom. Specifically, at this time, the potential nd2 is “Vom · r0 / (r0 + r4)”, but since the resistance value r4 is negligibly small compared to the resistance value r0, this potential is regarded as the voltage Vom. be able to. For this reason, if the comparison signal CMd2 does not become logic L, an abnormality in which the potential nd2 decreases occurs, so it is considered that there is a short circuit abnormality of the discharging switching element Pdd2 or an open abnormality of the resistor Rd2 (step S32).

  On the other hand, in the series of processes shown in FIG. 5, first, in step S40, it is determined whether or not the operation signal g ¥ # has been switched from the on operation command to the off operation command. If an affirmative determination is made in step S40, the charging switching elements Pdc1 and Pdc2 are turned off and the discharging switching elements Pdd1 and Pdd2 are turned on in step S42.

  In a succeeding step S44, it is determined whether or not the comparison signal CMd1 is inverted from logic L to logic H. Specifically, it is determined whether or not the elapsed time T from the switching of the operation signal g ¥ # to the off operation command is inverted to logic H before reaching the threshold time Tth. This process is for diagnosing the presence / absence of an open abnormality of the discharge switching element Pdd1. That is, when the discharge switching element Pdd1 is turned on, the potential nd1 at the connection point between the discharge switching element Pdd1 and the resistor Rd1 should be lowered. Therefore, when the comparison signal CMc1 is not inverted to logic H This is considered to be an open abnormality of the discharge switching element Pdd1 (step S46).

  In step S48, it is determined whether or not the comparison signal CMd2 is inverted from logic L to logic H. Specifically, it is determined whether or not the elapsed time T from the switching of the operation signal g ¥ # to the off operation command is inverted to logic H before reaching the threshold time Tth. This process is for diagnosing the presence or absence of an open abnormality of the discharge switching element Pdd2. That is, when the discharge switching element Pdd2 is turned on, the potential nd2 at the connection point between the discharge switching element Pdd2 and the resistor Rd2 should be lowered. Therefore, when the comparison signal CMc2 is not inverted to logic H This is considered to be an open abnormality of the discharge switching element Pdd2 (step S50).

  Note that the threshold time Tth is set to a time that is equal to or longer than the upper limit of the time required for the charging switching elements Pdd1 and Pdd2 to switch to the ON state and is as short as possible. According to such a setting, an abnormality in which the time required to actually switch to the ON state in response to the ON operation command of the discharge switching elements Pdd1 and Pdd2 is excessively long can be regarded as an open abnormality and diagnosed. it can.

  If an affirmative determination is made in step S48, it is determined in step S52 whether or not it is the switching timing (ACG: L → H) by active gate control. Then, at the switching timing, the discharge switching element Pdd2 is turned off in step S54. Then, the process waits until the gate voltage Vge drops below the off-holding threshold voltage Vg0 (step S56). In step S58, the off-holding switching element Sok is turned on.

  Thereafter, in step S60, it is determined whether or not the comparison signal CMc1 is logic H. This process is for diagnosing whether there is a short circuit abnormality of the charging switching element Pdc1 or an open abnormality of the resistor Rc1. That is, when the switching element S ¥ # is in the off state, the gate voltage Vge is reduced to almost zero V, so that the potential nc1 at the connection point between the charging switching element Pdc1 and the resistor Rc1 is reduced to about zero V. . Specifically, at this time, the potential nc1 is “Vom · r1 / (r0 + r1)”. However, since the resistance value r1 is negligibly small compared to the resistance value r0, this potential is regarded as zero. Can do. For this reason, if the comparison signal CMc1 does not become logic H, an abnormality in which the potential nc1 rises has occurred, so it is considered that the charging switching element Pdc1 is short-circuited or the resistor Rc1 is open (step S62).

  If an affirmative determination is made in step S60, it is determined in step S64 whether or not the comparison signal CMc2 is logic H. This process is for diagnosing whether there is a short circuit abnormality of the charging switching element Pdc2 or an open abnormality of the resistor Rc2. That is, when the switching element S ¥ # is in the OFF state, the gate voltage Vge is reduced to almost zero V, and therefore the potential nc2 at the connection point between the charging switching element Pdc2 and the resistor Rc2 is reduced to about zero V. . Specifically, at this time, the potential nc2 is “Vom · r2 / (r0 + r2)”. However, since the resistance value r2 is negligibly small compared to the resistance value r0, this potential is regarded as zero. Can do. For this reason, if the comparison signal CMc2 does not become logic H, an abnormality in which the potential nc2 rises has occurred, so it is considered that the charging switching element Pdc2 is short-circuited or the resistor Rc2 is open (step S66).

  The process shown in FIG. 6 is for identifying whether the abnormality diagnosed in steps S28 and S32 of FIG. 4 and steps S62 and S66 of FIG. 5 is a short abnormality or an open abnormality. It is.

  That is, in step S70, it is determined whether or not it has been diagnosed that there is an abnormality in the processing of steps S28 and S32 of FIG. 4 and steps S62 and S66 of FIG. If an affirmative determination is made in step S70, it is determined in step S72 whether or not the gate voltage Vge is not less than the lower limit voltage VthL and not more than the upper limit voltage VthH. This process is for identifying whether the charging switching elements Pdc1 and Pdc2 and the discharging switching elements Pdd1 and Pdd2 are short-circuited or the resistors Rc1, Rc2, Rd1 and Rd2 are open.

  That is, in the case of an open abnormality of the resistors Rc1 and Rc2, the potentials nc1 and nc2 are pulled up to the voltage Vom at the time of steps S60 and S64 in FIG. On the other hand, when the charging switching elements Pdc1 and Pdc2 are short-circuited abnormally, at the time of steps S60 and S64 in FIG. 5, the potentials nc1 and nc2 are the charging switching elements Pdc1 and Pdc2, resistors Rc1 and Rc2, and Thus, the voltage Vom is divided. In the case of an open abnormality of the resistors Rd1 and Rd2, the potentials nd1 and nd2 are pulled down to zero V by the potential fixing resistors 28 and 30 at the time of steps S26 and S30 in FIG. On the other hand, when the short circuit abnormality occurs in the discharge switching elements Pdd1 and Pdd2, the potentials nd1 and nd2 are changed to the discharge switching elements Pdd1 and Pdd2 and the resistors Rd1 and Rd2 at the time of steps S26 and S30 in FIG. Thus, the voltage Vom is divided.

  The lower limit voltage VthL is set to a value larger than zero, and the upper limit voltage VthH is set to a voltage lower than the voltage Vom.

  If an affirmative determination is made in step S72, it is determined that a short-circuit abnormality has occurred in step S74, and if a negative determination is made, an open abnormality is determined in step S76.

  When the type of abnormality is specified in this way, fail-safe processing shown in FIG. 7 is performed according to the abnormality.

  That is, when it is diagnosed that the switching elements Pdc1 and Pdc2 for charging and the switching elements Pdd1 and Pdd2 for discharging are short-circuited abnormally, it is determined that the motor generator 10 cannot be driven normally and the driving of the inverter INV and the converter CNV is stopped. . This is executed by the control device 18 by outputting a failure signal FL from the abnormality diagnosis unit 32 to the control device 18.

  In addition, when the charging switching element Pdc1 and the resistor Rc1 are open abnormally, the switching element S ¥ # is switched to the ON state using only the charging switching element Pdc2. At this time, by operating converter CNV, at least one of a pair of processes of a process of limiting input voltage VH of inverter INV and a process of limiting torque Trq of motor generator 10 is performed. This is to prevent the voltage applied to the switching element S ¥ # from becoming excessively large.

  That is, in the normal state, the increase rate of the collector current is limited by the resistor Rd1 until the increase rate of the collector current becomes substantially zero. The rate of increase in current tends to increase. On the other hand, if the input voltage VH of the inverter INV is limited, it is possible to compensate for the surge voltage increase due to the increase in the collector current increasing speed, and thus the voltage applied to the switching element S ¥ #. Can be limited. That is, the voltage applied transiently with the switching of the switching element S ¥ # to the off state is the voltage applied when the off state continues (the input voltage VH of the inverter INV) and the surge voltage. Become sum. Therefore, by limiting input voltage VH by operating converter CNV, it is possible to avoid a situation in which the voltage applied to switching element S ¥ # n becomes excessively large. Further, if the torque Trq is limited, the current flowing through the switching element S ¥ # becomes small. Therefore, the increase rate of the collector current can be limited, and the surge voltage can be suppressed.

  Further, when the charging switching element Pdc2 or the resistor Rc2 is abnormally opened, the switching process of the switching element S ¥ # to the on state is performed using only the charging switching element Pdc1. In this case, since the switching loss of the switching element S ¥ # is larger than that at the normal time, the temperature of the switching element S ¥ # may be excessively increased. Therefore, it is desirable that the abnormality diagnosis unit 32 outputs the fail signal FL to the control device 18 when the temperature Tj detected by the temperature sensitive diode SD is equal to or higher than the threshold temperature.

  On the other hand, when the discharge switching element Pdd1 or the resistor Rd1 is abnormally opened, the switching element S ¥ # is switched to the OFF state using only the discharge switching element Pdd2. At this time, by operating converter CNV, at least one of a pair of processes of a process of limiting input voltage VH of inverter INV and a process of limiting torque Trq of motor generator 10 is performed.

  Further, when the discharge switching element Pdd2 or the resistor Rd2 is abnormally opened, the switching process of the switching element S ¥ # to the off state is performed using only the discharge switching element Pdd1. In this case, since the switching loss of the switching element S ¥ # is larger than that at the normal time, the temperature of the switching element S ¥ # may be excessively increased. Therefore, it is desirable that the abnormality diagnosis unit 32 outputs the fail signal FL to the control device 18 when the temperature Tj detected by the temperature sensitive diode SD is equal to or higher than the threshold temperature.

  Several effects that can be achieved by the present embodiment described above will be described below.

  (1) In the situation where switching of the switching state of the pre-drive switching elements (Pdc1, Pdc2, Pdd1, Pdd2) is commanded, a diagnosis is made that there is an abnormality when switching is not performed within a certain time (threshold time Tth). (FIG. 4; S14, S22, FIG. 5; S44, S48). Thereby, it is possible to diagnose an abnormality in which the time required for actual switching is excessively long with respect to the switching command.

  (2) The potential fixing resistors 24, 26, 28, and 30 are provided. Thus, the potentials nc1, nc2, nd1, and nd2 can be fixed when the resistors Rc1, Rc2, Rd1, and Rd2 are abnormally opened, thereby improving the accuracy of diagnosis (S28, S32, S62, and S66). it can.

  (3) A process of identifying a short circuit abnormality of the pre-drive switching elements (Pdc1, Pdc2, Pdd1, Pdd2) and an open abnormality of the resistors (Rc1, Rc2, Rd1, Rd2) was performed (FIG. 6). As a result, it is possible to distinguish between an abnormality that can continue the driving of the switching element S ¥ # and an abnormality that cannot be continued, and as a result, the switching element S ¥ # can be driven as much as possible.

(4) Pre-drive switching elements (Pdc1, Pdd1) and resistors (Rc1, Rd1) constituting the first charging path, and pre-drive switching elements (Pdc2, Pdd2) and resistors constituting the second charging path Which of (Rc2, Rd2) is abnormal is identified. Thereby, a fail safe process can be performed appropriately (FIG. 7).
<Second Embodiment>
Hereinafter, the second embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  FIG. 8 shows a configuration of the drive unit DU according to the present embodiment. In FIG. 8, components corresponding to those shown in FIG. 2 are given the same reference numerals for convenience. Further, FIG. 8 shows only the diagnosis process for the presence / absence of abnormality of the charge charging path (positive charge discharging path) that turns off the switching element S ¥ #.

  As shown in the figure, the present embodiment includes a differential amplifier circuit 47 that differentially amplifies the potential difference between the potentials nd1 and nd2. The output signal (difference signal Δnd) of the differential amplifier circuit 47 is taken into the comparators 50 to 56. The comparators 50 to 56 compare different reference voltages Vref1, Vref2, Vref3, Vref4 and the difference signal Δnd. Here, “Vref1 <Vref2 <0” and “Vref2 <Vref3 <Vref4”. Further, the reference voltage Vref3 is set to be a value larger than the difference signal Δnd when both the discharge switching elements Pdd1 and Pdd2 are in the ON state. Incidentally, when both the discharge switching elements Pdd1 and Pdd2 are in the on state, the on-resistance of the discharge switching element Pdd2 is larger than the on-resistance of the discharge switching element Pdd1. For this reason, the potential nd2 becomes higher than the potential nd1, and the difference signal Δnd becomes positive. The comparison signals CM1 to CM4 of the comparators 50 to 56 are taken into the abnormality diagnosis unit 32.

  FIG. 9 shows a processing procedure of the abnormality diagnosis unit 32 according to the present embodiment.

  In this series of processing, first, in step S80, it is determined whether or not an ON operation command for both of the discharge switching elements Pdd1 and Pdd2 has been issued. This process can be performed, for example, by acquiring a signal related to the operating state of the drive control unit 22. If an affirmative determination is made in step S80, it is determined in step S82 whether the comparison signal CM1 is logic H and the comparison signal CM2 is logic L. This process is for diagnosing whether there is a short circuit abnormality of the resistor Rd1 or an open abnormality of the discharge switching element Pdd1. That is, when the resistor Rd1 is short-circuited or an open abnormality of the discharge switching element Pdd1 occurs, the potential nd1 is raised to about the gate voltage Vge, so that the potential nd1 becomes higher than the potential nd2 and the difference signal Δnd is Become negative. By setting the reference voltage Vref2 so that this phenomenon can be captured, an abnormality that the resistor Rd1 is short-circuited or that the discharge switching element Pdd1 is open is based on the fact that the comparison signal CM2 becomes logic L. A diagnosis can be made (step S84).

  On the other hand, in step S86, it is determined whether or not both comparison signals CM1 and CM2 are logic L. This process is for determining whether there is an open abnormality of the resistor Rd2 or a short-circuit abnormality of the discharge switching element Pdd2. That is, when an open abnormality of the resistor Rd2 occurs or a short-circuit abnormality of the discharge switching element Pdd2 occurs, the potential nd2 is lowered to around 0 V, so that the potential nd1 becomes higher than the potential nd2 and the difference signal Δnd is Become negative. In particular, the absolute value of the difference signal Δnd at this time is larger than that in the case of a short circuit abnormality of the resistor Rd1 or an open abnormality of the discharge switching element Pdd1. By setting the reference voltage Vref1 so that this phenomenon can be captured, an open abnormality of the resistor Rd2 and a short abnormality of the discharge switching element Pdd2 occur based on the comparison signal CM1 becoming logic L. Can be diagnosed (step S88).

  In step S90, it is determined whether the comparison signal CM3 is logic H and the comparison signal CM4 is logic L. This process is for diagnosing whether there is an open abnormality of the resistor Rd1 or a short-circuit abnormality of the discharge switching element Pdd1. That is, when an open abnormality of the resistor Rd1 or a short-circuit abnormality of the discharge switching element Pdd1 occurs, the potential nd1 is lowered to about zero V, and thus the degree that the potential nd2 exceeds the potential nd1 becomes larger than normal. By setting the reference voltage Vref3 so that this phenomenon can be captured, the open circuit of the resistor Rd1 or the short circuit abnormality of the discharge switching element Pdd1 is caused based on the fact that the comparison signal CM3 becomes logic H. This can be diagnosed (step S92).

  In step S94, it is determined whether or not both comparison signals CM3 and CM4 are logic H. This process is for diagnosing whether there is a short circuit abnormality of the resistor Rd2 or an open abnormality of the discharge switching element Pdd2. That is, when the resistor Rd2 is short-circuited or an open abnormality of the discharge switching element Pdd2 occurs, the potential nd2 is raised to about the gate voltage Vge, and thus the degree that the potential nd2 exceeds the potential nd1 is larger than normal. Become. In particular, the difference signal Δnd at this time is larger in a period in which the decrease in the gate voltage Vge is smaller than when an open abnormality of the resistor Rd1 or a short abnormality of the discharge switching element Pdd1 occurs. By setting the reference voltage Vref4 so that this phenomenon can be captured, the comparison signal CM4 becomes logic H, and therefore, the short circuit abnormality of the resistor Rd2 or the open abnormality of the discharge switching element Pdd2 is caused. This can be diagnosed (step S96).

In the case where the diagnosis in steps S88 and S92 is made, it is only necessary to identify whether or not there is a short circuit abnormality as described in the first embodiment.
<Third Embodiment>
Hereinafter, the third embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  In the present embodiment, the period for performing the diagnosis processing for the presence / absence of abnormality is limited in the manner shown in FIG. The process shown in FIG. 10 is executed in the drive IC 20.

  In this series of processes, first, in step S100, it is determined whether or not the travel permission switch of the vehicle has been turned on. Here, the travel permission switch is a switch that is turned on when the user displays an intention to permit travel of the vehicle. The travel permission switch is not limited to one that is mechanically operated by the user, and may be a wireless communication device that is carried by the user and turned on when approaching the vehicle. Whether or not the travel permission switch is turned on may be notified from the control device 18 to the drive unit DU.

  If a positive determination is made in step S100, a diagnostic process is executed in step S102. When the diagnostic process is completed, in step S104, the relay SMR is switched to the closed state in order to connect the high voltage battery 12 to the converter CNV. As a result, power can be supplied from the high-voltage battery 12 to the motor generator 10, and the motor generator 10 can be started.

  When the process of step S104 is completed or when a negative determination is made in step S100, this series of processes is temporarily terminated.

Thus, in this embodiment, since the presence or absence of abnormality can be diagnosed before starting the motor generator 10, it is possible to start the motor generator 10 after confirming that it is normal.
<Fourth Embodiment>
Hereinafter, the fourth embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  In the present embodiment, the active gate control is stopped when the torque command value Trq * for the motor generator 10 is low or when the input voltage VH of the inverter INV is low. Here, the condition regarding the torque is that when the torque command value Trq * is small, the current flowing through the switching element S ¥ # is small, so that even if the switching speed of the switching state is high, the surge voltage does not increase excessively. It is a thing. The condition regarding the input voltage VH is that the withstand voltage applied to the switching element S ¥ # is not excessively increased when the input voltage VH is low. When active gate control is not performed, when switching element S ¥ # is turned on, both charging switching elements Pdc1 and Pdc2 are turned on, and when switching element is turned off, discharge switching elements Pdd1 and Pdd2 are turned on. Both are turned on.

  When such a setting is assumed, there is a possibility that the diagnosis shown in FIGS. 4 and 5 cannot be performed within a predetermined period from the start of the motor generator 10. Therefore, in the present embodiment, active gate control is performed for a predetermined period immediately after the travel permission switch is switched to the ON state regardless of the value of the torque command value Trq * or the input voltage VH.

  FIG. 11 shows a processing procedure indicating whether or not the active gate control according to the present embodiment is executed. This process is repeatedly executed by the control device 18 at a predetermined cycle, for example.

  In this series of processing, first, in step S110, is the logical sum of whether the travel permission switch is turned on and within a predetermined period and whether the torque command value Trq * is greater than or equal to the threshold value Trqth? Judge whether or not. This process is for determining whether or not an execution condition for active gate control is satisfied. Here, the threshold value Trqth is set to a smaller value as the input voltage VH is higher. This is in view of the fact that the higher the input voltage VH, the lower the surge voltage that is allowed when the withstand voltage of the switching element S ¥ # is less than or equal to the allowable upper limit.

  If an affirmative determination is made in step S110, active gate control is executed (step S112). If a negative determination is made, active gate control is stopped (step S114). The presence / absence of execution of the active gate control may be transmitted as a command signal from the control device 18 to the drive unit DU.

According to the present embodiment described above, when the motor generator 10 is started, the active gate control is forcibly executed, so that the presence / absence of abnormality can be diagnosed early and reliably.
<Fifth Embodiment>
Hereinafter, a fifth embodiment will be described with reference to the drawings, focusing on differences from the first embodiment.

  FIG. 12 shows a configuration of the drive unit DU according to the present embodiment. In FIG. 12, the same reference numerals are assigned for convenience to those corresponding to the members shown in FIG. Further, FIG. 12 shows only the diagnosis process for the presence / absence of abnormality in the charge charging path (positive charge discharging path) that turns off the switching element S ¥ #.

  In the present embodiment, a direct comparison means (comparator 58) that directly compares the potential nd1 and the potential nd2 is compared, and an offset comparison means (comparator) that compares the potential nd1 with the specified voltage and the potential nd2. 60). Here, in the offset correction, when both the discharge switching elements Pdd1 and Pdd2 are turned on, the magnitude relationship between the offset-corrected potential and the potential nd2 is reversed from the magnitude relationship between the potentials nd1 and nd2. Is for.

  FIG. 13 shows a processing procedure of the abnormality diagnosis unit 32 according to the present embodiment.

  In this series of processes, first, in step S120, it is determined whether or not an ON operation command for both of the discharge switching elements Pdd1 and Pdd2 has been issued. If yes, in step S122, it is determined whether or not both of the comparison signals CM1 and CM2 are logic L. This process is for determining whether any one of the opening abnormality of the resistor Rd2, the shorting abnormality of the discharging switching element Pdd2, the shorting abnormality of the resistor Rd1, and the opening abnormality of the discharging switching element Pdd1 has occurred. (Step S124).

  That is, in a normal state, since the current flowing through the discharge switching element Pdd1 is smaller than the current flowing through the discharge switching element Pdd2, the potential nd1 is lower than the potential nd2. Therefore, the comparison signal CM1 should be logic H and the comparison signal CM2 should be logic L. On the other hand, if the comparison signal CM1 is logic L, it is considered that an abnormality in which the potential nd2 becomes low or an abnormality in which the potential nd1 becomes high has occurred. Here, at the time of open abnormality of the resistor Rd2, the potential nd2 is lowered to the emitter potential of the switching element S ¥ #. Further, when the discharge switching element Pdd2 is short-circuited abnormally, the potential nd2 is lowered to about the emitter potential of the switching element S ¥ #. When the resistor Rd1 is short-circuited abnormally, the potential nd1 is raised to about the gate voltage Vge. In addition, when the discharge switching element Pdd1 is abnormally opened, the potential nd1 is raised to the gate voltage Vge.

  On the other hand, if a negative determination is made in step S122, it is determined in step S126 whether or not both comparison signals CM1 and CM2 are logic H. This process is for determining whether any one of the short-circuit abnormality of the resistor Rd2, the open abnormality of the discharge switching element Pdd2, the open abnormality of the resistor Rd1, and the short-circuit abnormality of the discharge switching element Pdd1 occurs. (Step S128).

  As described above, in a normal state, the comparison signal CM1 should be logic H and the comparison signal CM2 should be logic L. On the other hand, if the comparison signal CM2 is logic H, it is considered that an abnormality in which the potential nd2 becomes high or an abnormality in which the potential nd1 becomes low has occurred. Here, when the resistor Rd2 is short-circuited abnormally, the potential nd2 is raised to about the gate voltage Vge. Further, when the discharge switching element Pdd2 is abnormally opened, the potential nd2 is raised to the gate voltage Vge. When the resistor Rd1 is abnormally opened, the potential nd1 is lowered to the emitter potential of the switching element S ¥ #. Further, when the discharge switching element Pdd1 is short-circuited abnormally, the potential nd1 is lowered to about the emitter potential of the switching element S ¥ #.

Depending on the diagnosis results of steps S124 and S128, the information is insufficient to perform the fail-safe process of FIG. For this reason, in the present embodiment, when the abnormality is diagnosed, the drive of the inverter INV and the converter CNV is stopped. Even when the vehicle is running, such measures can be taken if the vehicle is a hybrid vehicle that can run only by the internal combustion engine.
<Sixth Embodiment>
Hereinafter, the sixth embodiment will be described with reference to the drawings with a focus on differences from the fifth embodiment.

  FIG. 14 shows a configuration of the drive unit DU according to the present embodiment. In FIG. 14, the same reference numerals are assigned to the members corresponding to those shown in FIG. Further, FIG. 14 shows only the diagnostic process for the presence / absence of abnormality in the charge charging path (positive charge discharging path) that turns off the switching element S ¥ #.

  In the present embodiment, only direct comparison means (comparator 58) for directly comparing the magnitudes of the potential nd1 and the potential nd2 is provided.

In this case, the comparison signal CM1 becomes logic H in the normal state under the situation where both ON operation commands of the discharge switching elements Pdd1 and Pdd2 are issued. On the other hand, if the comparison signal CM1 is logic L, there is an abnormality that increases the potential nd1 or an abnormality that decreases the potential nd2. These occur when the target abnormality occurs in steps S124 and S128 of FIG.
<Other embodiments>
Each of the above embodiments may be modified as follows.

"Charging path"
For example, a resistor Rd1 may be provided between the discharge switching element Pdd1 and the emitter of the switching element S ¥ #. Even in this case, the presence or absence of abnormality of the discharge switching element Pdd1 or the resistor Rd1 can be diagnosed based on the potential at the connection point between the discharge switching element Pdd1 and the resistor Rd1. Even in this case, it is effective to connect the potential fixing resistor 28 in parallel to the discharge switching element Pdd1.

  In addition, the charging path is not limited to a pair consisting of a first charging path and a second charging path, but may be one charging path or three or more charging paths.

  For example, the gate voltage of the charging switching element Pdc1 is manipulated to control the voltage drop amount of the resistor Rc1 to a constant value, and the gate voltage of the charging switching element Pdc2 is controlled to control the voltage drop amount of the resistor Rc2 to a constant value. May be operated. According to such an operation, the current flowing through the first charging path and the second charging path can be controlled to a constant value until the gate voltage Vge approaches the voltage Vom.

"Change means"
For example, in the first embodiment (FIG. 3), after the discharge switching element Pdd2 is turned on, the discharge switching element Pdd2 is turned off, and then the discharge switching element Pdd1 is turned on. .

"About input means"
Input means using the potentials (potentials nc1, nc2, nd1, nd2) of the connection points of the pre-drive switching element and the resistor as input signals are not limited to the comparators 40 to 46, 58, 60 and the differential amplifier circuit 47. . For example, when the functions of the comparators 40 to 46, 58, 60 and the differential amplifier circuit 47 are realized by software processing means, the input means may be an analog-digital converter or the like to which the potentials nc1, nc2, nd1, nd2 are input. Good.

“Recognizing switching instructions for switching states of pre-drive switching elements”
In the first embodiment (FIG. 4) and the like, the switching command is recognized based on the switching of the command of the operation signal g ¥ #, the execution determination signal (step S18) of the active gate control, but the present invention is not limited to this. . For example, the switching command may be recognized based on the gate voltage of the pre-drive switching element.

About identification means
1. Identification of Charging Path In the second embodiment (FIG. 8), for example, diagnosis may be performed based on the difference signal Δnd during a period in which only the discharge switching element Pdd1 is turned on. Even in this case, by setting a plurality of thresholds, the short circuit abnormality of the discharge switching element Pdd2 or the open abnormality of the resistor Rd2, the short abnormality of the discharge switching element Pdd1 or the open abnormality of the resistor Rd1, and the discharge The open abnormality of the switching element Pdd2 or the short-circuit abnormality of the resistor Rd1 can be identified.

It is not restricted to what was illustrated to the said 1st Embodiment (FIG. 2) and the said 2nd Embodiment (FIG. 8). For example, as illustrated in the sixth embodiment (FIG. 14), direct comparison means (comparator 48) may be used. Even in this case, for example, when only the discharge switching element Pdd1 is turned on and the comparison signal CM1 of the comparator 48 becomes logic L, the short circuit abnormality of the discharge switching element Pdd2 or the open abnormality of the resistor Rd2 Can be diagnosed. Further, as illustrated in the fifth embodiment (FIG. 12), direct comparison means (comparator 48) and offset comparison means (comparator 50) may be used. Even in this case, for example, depending on the setting of the offset correction value, when the comparison signal CM2 of the comparator 50 becomes logic H during the period when only the discharge switching element Pdd1 is turned on, the short circuit abnormality of the discharge switching element Pdd1. Alternatively, it can be diagnosed as an open abnormality of the resistor Rd1.
2. Discrimination between pre-drive switching element and resistor The present invention is not limited to the premise of the configuration of the first embodiment (FIG. 2). For example, in the second embodiment (FIG. 8), the short circuit abnormality of the discharge switching element Pdd1 is determined based on the gate voltage Vge when both the predrive switching elements (discharge switching elements Pdd1, Pdd2) are turned off. You may identify with the open abnormality of resistor Rd1.

“Regarding resistors for fixing potential”
In the second embodiment (FIG. 8), even if the potential fixing resistors 24, 26, 28, 30 are deleted, the diagnosis of the second embodiment can be safely performed.

"Diagnosis process based on difference signal"
In the second embodiment (FIG. 8), all of the comparison signals CM1 to CM4 are set to logic “L” at the time of abnormality, and their logical product signals are input to the abnormality diagnosis unit 32. Also good. Even in this case, the abnormality diagnosing unit 32 can diagnose the presence or absence of abnormality based on the logical product signal.

  Note that the processing for identifying an abnormal location is not limited to that exemplified in the second embodiment, as described in the section “Identifying means”.

"Offset correction method"
In the fifth embodiment (FIG. 12), the potential nd1 is offset-corrected with a positive voltage, but the present invention is not limited to this. For example, the potential nd2 may be offset corrected with a negative voltage. This also allows the direct comparison means (comparator 48) and the offset comparison means (comparator 50) to differ in normal size comparison results.

"About fail-safe measures"
In the first embodiment (FIG. 7), when an abnormality occurs in the second charging path (charging switching element Pdc2 and resistor Rc2, discharging switching element Pdd2 and resistor Rd2), torque limitation or voltage limitation is performed. However, it is not limited to this. For example, when the resistance value r1 of the resistor Rc1 and the resistance value r2 of the resistor Rc2 are the same, or the resistance value r3 of the resistor Rd1 and the resistance value r4 of the resistor Rd2 are the same, the first charging path There is no difference in resistance between the second charging path and the second charging path. For this reason, the above restriction is also unnecessary.

  The fact that it is not essential to change the fail-safe process according to the abnormal part is as illustrated in the fifth embodiment. However, when an abnormality is detected, it is desirable to perform processing for prohibiting driving of motor generator 10 and notifying that there is an abnormality.

"About stopping means"
The fact that it is not limited to those that are applied only at the time of a short circuit abnormality is as described in the column “About fail-safe means”.

“Stop conditions for active gate control (predetermined conditions)”
In the fourth embodiment (FIG. 11), active gate control is executed on the condition that the torque command value Trq * is equal to or greater than the threshold value Trqth, and the threshold value Trqth is variably set according to the voltage VH. Absent. For example, threshold value Trqth may be a fixed value, and active gate control may be prohibited when voltage VH is less than a specified value, for example.

"About power supply switching means"
The relay SMR may be provided only on one of the positive electrode side and the negative electrode side of the high voltage battery 12.

"About storage means"
It is not limited to the high voltage battery 12. For example, a fuel cell may be used.

"About switching elements to be driven"
For example, an N-channel MOS field effect transistor may be used instead of the IGBT. However, the present invention is not limited to this. For example, a P-channel MOS field effect transistor may be used. However, in this case, since the potential difference of the open / close control terminal (gate) with respect to one end (source) of the flow path to be opened / closed is set to a negative value, the gate is positively charged during the off operation. Will be charged.

"Power conversion circuit"
The converter CNV may not be provided, and only a DC / AC conversion circuit (inverter INV) may be provided. Further, the inverter INV is not limited to the inverter connected to the rotating machine as the in-vehicle main machine, and may be connected to the rotating machine incorporated in the compressor of the in-vehicle air conditioner, for example. Further, the inverter is not limited to the one provided with the inverter INV, and for example, a step-down converter that steps down the voltage of the high voltage battery 12 and outputs it to the low voltage battery 16 may be provided.

  DESCRIPTION OF SYMBOLS 10 ... Motor generator (one Embodiment of a rotary machine), 12 ... High voltage battery (One embodiment of a storage means), Pdd1, Pdd2 ... Switching element for discharge, Rd1, Rd2 ... Resistor.

Claims (15)

The voltage-controlled switching element is a drive target switching element (S ¥ #: ¥ = u, v, w, c, # = p, n), and the drive target switching element is turned on from either the on state or the off state. A charge path that is used when charging the switching control terminal of the switching element to be driven with the charge for switching to the other to be switched to the other and connected to the switching control terminal;
The charging path is a series connection body of pre-drive switching elements (Pdc1, Pdc2, Pdd1, Pdd2) and resistors (Rc1, Rc2, Rd1, Rd2),
Input means (40, 42, 44, 46, 47, 58, 60) for inputting the potential at the connection point of the pre-drive switching element and the resistor as an input signal;
Diagnostic means (32) for diagnosing the presence or absence of abnormality related to driving of the drive target switching element based on the input signal;
A drive device for a drive target switching element. The charging path includes a first charging path (Pdc1, Pdd1) and a second charging path (Pdc2, Pdd2) different from the first charging path,
Each of the first charging path and the second charging path is a series connection body of a pre-drive switching element and a resistor,
The pre-drive switching element for changing one of the first charging path and the second charging path that is in a closed state after at least a part of the charging path is closed when switching to the other state. With a change means to operate
The input means inputs the potential as an input signal for the connection points of the switching element for predrive and the resistor constituting each of the first charging path and the second charging path,
2. The driving device for a drive target switching element according to claim 1, wherein the diagnosis unit diagnoses the presence or absence of the abnormality based on the input signals of the first charging path and the second charging path.   The diagnosis means includes identification means for identifying which of the first charging path and the second charging path is abnormal based on the input signals of the first charging path and the second charging path. The drive device for a drive target switching element according to claim 2. The diagnostic means comprises a function of diagnosing whether there is an abnormality in the charging path based on the input signal when the one state is commanded,
The drive according to any one of claims 1 to 3, further comprising a potential fixing resistor (24, 26, 28, 30) which is a resistor connected in parallel to the pre-drive switching element. Drive device for target switching element. The drive target switching element is turned on / off according to a potential difference (Vge) between one end of a flow path to be opened and closed and the open / close control terminal.
The diagnostic means includes identification means for identifying which of the resistor and the pre-drive switching element is abnormal based on a detected value of the potential difference in addition to the input signal. Item 5. The drive device for the drive target switching element according to any one of Items 1 to 4.   3. The driving object according to claim 2, wherein the diagnosis unit performs the diagnosis based on a difference signal (Δnd) between the input signal related to the first charging path and the input signal related to the second charging path. Switching device drive device.   7. The drive device for a drive target switching element according to claim 6, wherein the diagnosis unit performs the diagnosis based on a comparison between the difference signal and a threshold value.   The diagnostic means includes direct comparison means (58) for performing a magnitude comparison between the input signal relating to the first charging path and the input signal relating to the second charging path, and based on the comparison result of the direct comparison means, The drive device for a drive target switching element according to claim 2, wherein diagnosis is performed. The resistance value in the closed state of the first charging path is different from the resistance value in the closed state of the second charging path,
The diagnostic means compares the size of the input signal related to the first charging path and the input signal related to the second charging path, which is offset corrected for one of them and the other. An offset comparison means (60) for performing,
9. The drive device for a drive target switching element according to claim 8, wherein the diagnosis is performed based on a comparison result of the direct comparison unit and the offset comparison unit. The resistance value in the closed state of the first charging path is larger than the resistance value in the closed state of the second charging path,
When the diagnosis means diagnoses that there is an open abnormality of the pre-drive switching element constituting the first charging path, or an abnormality of the resistor constituting the first charging path, the current flows through the driving target switching element. Limiting process for limiting at least one of the amount of current and the voltage applied to both ends of the flow path when the driving target switching element is kept off, and the other state using the second charging path The drive device for a drive target switching element according to claim 2, further comprising fail-safe means for performing a switching process to the drive target. The resistance value in the closed state of the first charging path is larger than the resistance value in the closed state of the second charging path,
When the diagnostic means diagnoses that there is an open abnormality of the pre-drive switching element constituting the second charging path or an abnormality of the resistor constituting the second charging path, the first charging path is used. The drive device for a drive target switching element according to claim 2, further comprising fail-safe means for performing switching processing to the other state.   When the diagnostic means diagnoses that at least one of the pre-drive switching element constituting the first charging path and the pre-drive switching element constituting the second charging path has a short circuit abnormality, the driving object switching 12. The drive device for a drive target switching element according to claim 2, further comprising stop means for stopping driving of the element. The drive target switching element is a power conversion circuit (INV, CNV) provided between a rotating machine (10) as an in-vehicle main machine and a storage means (12) for storing electric energy to be supplied to the rotating machine. Which constitutes
The change by the changing means is to be stopped when a predetermined condition is satisfied under a situation where the driving target switching element is turned on / off to drive the rotating machine,
The diagnostic means performs the diagnosis while performing the changing process by the changing means, regardless of whether or not the predetermined condition is satisfied, at the start of driving of the power conversion circuit. , 3, 6 to 12. A drive device for a drive target switching element according to any one of claims 1 to 3. The drive target switching element constitutes a power conversion circuit provided between a rotating machine as a vehicle-mounted main machine and a storage means for storing electric energy to be supplied to the rotating machine,
Between the storage means and the power conversion circuit, a power supply switching means (SMR) for electrically opening and closing between them is provided,
14. The drive device for a drive target switching element according to claim 1, wherein the diagnosis unit performs the diagnosis before the power supply opening / closing unit is closed.   The diagnostic means diagnoses that there is an abnormality related to driving of the drive target switching element when switching is not performed within a predetermined time under a situation where switching of the switching state of the pre-drive switching element is instructed. The drive device of the drive object switching element of any one of Claims 1-14.

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