JP2013132112A - Switching power supply unit and control method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a switching power supply unit and control method therefor, capable of individually setting the optimum on-off timing of a switching element on the basis of converter load, I/O power information and transformer current information, using a DC-DC converter device.SOLUTION: A switching power supply unit 1 includes a switching circuit 2 that applies an AC voltage to the primary side of a transformer T with a DC input voltage Vin input; a rectification circuit 3 that rectification-smooths a secondary voltage of the transformer T to generate a DC output voltage Vout and supply electric power to a load; and a control circuit 4 that feeds back a DC output voltage Vout to supply a desired pulse signal to the switching circuit 2 and the rectification circuit 3. The control circuit 4 includes pulse control means 9 that has a function for further controlling a pulse signal at arbitrary timing.

Description

  The present invention relates to a switching power supply device, and more particularly to a switching power supply device that obtains a desired DC output voltage from a DC input voltage and a control method thereof.

  The DC-DC converter is generally composed of a switching circuit, an output circuit, and a control circuit. The DC-input voltage is converted into a rectangular wave-shaped AC voltage by the switching circuit, and after passing through the transformer, the AC is output by the output circuit. Is a device that rectifies and smoothes the current to DC. In other words, the power converter is capable of generating a DC output having a voltage different from the input DC voltage.

  This DC output is stabilized by the time ratio control of the switching circuit in the control circuit and the switching elements of all the output circuits. As a result, a stable operating voltage is supplied to the load. In addition, power conversion efficiency is improved.

  For example, in Patent Document 1, copper loss and iron loss due to leakage inductance at light load is suppressed to improve efficiency in the switching power supply device. In Patent Document 2, the operation timing of the synchronous rectifier switch on the secondary side of the transformer is changed without complicating the circuit of the power unit, thereby improving the efficiency at light load.

Japanese Patent Laid-Open No. 2004-260928 JP 2010-213430 A

  Many conventional converter control circuits generate a gate drive pulse synchronized with a built-in oscillator by pulse width modulation (PWM) control, and perform switching operation of the converter. The on / off timing of the gate drive pulse is determined by the internal carrier signal and the conveyor value. However, when the load of the converter changes, the power loss of the switching element may increase in the above on / off timing operation. This increase in power loss causes heat generation of the power source, and thus cooling is required, which causes problems such as an increase in the size and cost of the power source.

  As described above, the problem with the prior art is that the switching element can be turned on / off only at the timing when the power loss increases with respect to the converter state and (load) change because the operation timing of the switching element is fixed. caused by. As a means for solving this problem, for example, a control method that arbitrarily varies the on / off timing of each switching element in accordance with the state of the converter is effective. However, such variable control is difficult with the conventional control method.

  In order to solve the above-described problems, the present invention is based on input / output power information and transformer current information. By introducing a timing arithmetic algorithm using a digital signal processor (DSP) and a program, each switching is performed. It incorporates a control system that can individually set the operation of the element and reduce the power loss caused by the on / off timing operation of the switching element as much as possible. That is, a switching power supply according to the present invention includes a switching circuit that inputs a DC voltage and supplies power to the primary side of the transformer, and a rectifying and smoothing circuit that generates a DC output voltage from the secondary side of the transformer and supplies power to the load. A switching power supply device including a control circuit that feeds back the DC output voltage and supplies a desired pulse signal to the switching circuit and the rectifying / smoothing circuit, wherein the control circuit further outputs the pulse signal at an arbitrary timing. It has the pulse control means which has the function to perform.

  With this configuration in which such a pulse control means is provided in the control circuit, the above problem can be solved.

  In the switching power supply according to the present invention, the pulse control means of the control circuit has a function of controlling the arbitrary timing to each switching element of the switching circuit based on input / output power information and transformer current information. One pulse control means and a second pulse control means having a function of controlling the arbitrary timing to each switching element of the rectifying and smoothing circuit are provided.

  In the switching power supply according to the present invention, the first pulse control means and the second pulse control means may use a DSP and a program to realize the arbitrary timing waveform generation to the respective switching elements. An arithmetic algorithm may be introduced.

  Also, in the switching power supply device according to the present invention, the control circuit includes an error amplification function for amplifying a difference between the DC output voltage and a reference voltage that is a target value, and a carrier signal for converting the error into a pulse width. A pulse width modulation (PWM) function for inputting a signal output from the error amplifier and generating a desired pulse signal by changing the time ratio of the pulse waveform is provided in this order, and the pulse width modulation (PWM) ) The first pulse control means may be connected between the circuit and the switching circuit, and the second pulse control means may be connected between the PWM circuit and the rectifying / smoothing circuit.

  Further, in the switching power supply device according to the present invention, the control circuit has an error amplifying function for amplifying a difference between the DC output voltage and a reference voltage that is a target value, and changes the error to a pulse waveform time ratio to obtain a desired Connect to one input terminal of the first comparator of the PWM circuit that generates the pulse signal, and input the carrier signal to the other input terminal of the first comparator, and on the connection path between the filter and the first comparator A first control circuit for connecting a pulse first control means; and an output side of the filter is connected to one input terminal of a second comparator of the PWM circuit, and the carrier signal is connected to the other input terminal of the second comparator. And a second control circuit that connects the pulse second control means on the connection path between the filter and the second comparator. Form, and the rectifier circuit and the output side of the first comparator output and the switching circuit and the second comparator may be connected.

  In the switching power supply according to the present invention, the control circuit may include an error amplifying function for amplifying a difference between the DC output voltage and a reference voltage as a target value, and changing the error to a pulse waveform time ratio. And connecting a carrier signal to the other input terminal of the first comparator, and a connection path between the carrier signal and the first comparator. A first control circuit for connecting a pulse first control means and an output side of the filter connected to one input terminal of a second comparator of the PWM circuit, and the carrier connected to the other input terminal of the second comparator; A second control unit that inputs a signal and connects a pulse second control unit on a connection path between the carrier signal and the second comparator. Constituted by a circuit, the output side of the first comparator the switching circuit and the output side of the second comparator and the smoothing circuit may be connected, respectively.

  The switching power supply device control method according to the present invention includes a switching circuit that inputs a DC voltage and converts it into an AC voltage once on the primary side of the transformer, and a desired rectifying and smoothing of the AC voltage on the secondary side of the transformer. A control method in a switching power supply comprising: a rectifying / smoothing circuit that converts a DC output voltage and supplies power to a load; and a control circuit that feeds back the DC output voltage and supplies a desired pulse signal to the switching circuit and the rectifying circuit In this case, the control circuit may control the pulse signal at an arbitrary timing based on the power information and the transformer current information.

  In the switching power supply control method according to the present invention, the pulse first control means controls the arbitrary timing to each switching element of the switching circuit based on the input / output power information and the transformer current information, and the pulse second control means However, the arbitrary timing to each switching element of the rectifying / smoothing circuit may be controlled.

  The switching power supply device control method according to the present invention includes a DSP and a program for the pulse first control means and the pulse second control means in order to realize the waveform generation at the arbitrary timing for the switching elements. It may be used to introduce a timing calculation algorithm.

  The switching power supply device of the present invention can minimize the power loss caused by turning on / off all the switches constituting the circuit, and can improve the power efficiency. In addition, the amount of heat generated by the circuit can be reduced, and as a result, the apparatus can be made compact and light.

It is a block diagram which shows the structure of the switching power supply device by the 1st Embodiment of this invention. It is a partial implementation circuit example figure of the switching power supply by 1st Embodiment. It is a figure which shows the operation timing by 1st Embodiment. It is each part operation waveform by control of the conventional synchronous rectification switch. It is each part operation | movement waveform by control of the synchronous rectification switch of 1st Embodiment. It is an operation waveform of each part of a full bridge circuit at the time of using pulse control of a 1st embodiment. It is a figure which shows the improvement effect of the power conversion efficiency of 1st Embodiment. It is a block diagram which shows the structure of the switching power supply device by the 2nd Embodiment of this invention. It is a block diagram which shows the structure of the switching power supply device by the 3rd Embodiment of this invention.

  A switching power supply apparatus according to a mode for carrying out the invention (hereinafter, abbreviated as an embodiment) is a novel control that does not use a fixed timing pulse signal output from a pulse width modulation (PWM) circuit in the control of a converter. Control by circuit. The new control circuit has a pulse first control means (pulse timing controller 1) that outputs a pulse signal at an optimal timing for the switching circuit and controls the switching circuit, and outputs a pulse signal at an optimal timing for the rectifying and smoothing circuit. And a pulse second control means (pulse timing controller 2) for controlling the rectifying and smoothing circuit, and two pulse control means. Such a novel pulse control means having the pulse first control means and the pulse second control means can be applied to various circuit configurations of conventionally known converters. Therefore, the switching power supply of the embodiment can implement converter circuits of various connection modes by adopting such a novel pulse control means. And, in any connection mode converter circuit, a pulse signal can be output at an optimal timing for the switching circuit and a pulse signal can be output at an optimal timing for the rectifying and smoothing circuit. it can. In the case of using a digital signal processor, it is possible to flexibly design an arithmetic algorithm for calculating a pulse signal optimal for a switching circuit and a pulse signal having an optimal timing for a rectifying / smoothing circuit. Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing a basic configuration of a switching power supply device according to a first embodiment of the present invention. The switching power supply device 1 includes a switching circuit 2, a rectifier circuit (rectifier smoothing circuit) 3, and a control circuit 4. A DC input voltage Vin is input to the switching circuit 2. An AC voltage is generated using this DC input voltage Vin, and this AC voltage is applied to the primary side of the transformer T. A DC input current Iin flows from the input terminal of the switching circuit 2. On the primary side of the transformer T, a transformer primary current Itrs is generated. The rectifier circuit 3 converts the AC voltage transformed on the secondary side of the transformer T into a desired DC output voltage Vout by rectifying and smoothing. The difference between the DC output voltage Vout and the reference voltage Vref is compared by the error detector VR in the control circuit 4. An error voltage, which is the difference between the DC output voltage Vout and the reference voltage Vref, is amplified by the amplifier circuit of the error detector VR. The error voltage amplified by this amplifier circuit is input to the filter 5 for optimizing the characteristics of the control system. The compare value 6 is an error voltage output from the filter 5. The compare value 6 is input to the PWM circuit 8 together with the carrier signal 7. The PWM circuit 8 converts the carrier signal 7 into a pulse signal having a pulse width corresponding to the compare value 6. The pulse signal generated by the PWM circuit 8 is input to the pulse first control means 10 and the pulse second control means 11 of the pulse control means 9 as a control signal for stabilizing the DC output voltage Vout. The first pulse control means 10 is supplied with at least one of a DC input voltage Vin, a DC input current Iin, and a transformer current Itrs generated in the transformer T as switching circuit information 12 input to the switching circuit 2.

  The pulse second control means is supplied with at least one of the DC output voltage Vout output from the rectifier circuit 3, the DC output current Iout, and the transformer primary current Itrs generated in the transformer T as the rectifier circuit information 13. The

  The pulse first control means 10 outputs the pulse signal generated by the PWM circuit 8 to the switching circuit 2 at an optimal timing based on the switching circuit information 12. On the other hand, the pulse second control means 11 outputs the pulse signal generated by the PWM circuit 8 to the rectifier circuit 3 at an optimal timing based on the rectifier circuit information 13. The first pulse control means 10 and the second pulse control means 11 optimize the on / off operation timing of each switching element of the switching element of the switching circuit 2 and the switching element of the rectifier circuit 3.

  FIG. 2 is an implementation circuit example of the switching power supply device 1 according to the first embodiment of the present invention. More specifically, an implementation circuit portion of the switching circuit 2 and the rectifier circuit 3 excluding the control circuit 4 is shown. The switching circuit 2 composed of a full bridge circuit AC drives the primary side coil N1 of the transformer T, and the rectifier circuit 3 synchronously rectifies the AC voltage induced in the secondary side coil N2 of the transformer T and outputs a direct current. The voltage is converted to Vout.

  The switching circuit 2 is, for example, a full bridge in which switching elements A, B, C, and D connected in series between an input terminal to which a DC voltage of 400 V is applied and a primary side reference potential (ground potential) are connected in parallel. Consists of a circuit. Diodes D3 to D6 and capacitors C3 to C6 connected in parallel to the switching elements A, B, C, and D are body diodes and output capacitances that are parasitic on the switching elements.

  In the rectifier circuit 3 connected via the transformer T, each of the switching element SRA functioning as a synchronous rectification switch and the switching element SRB functioning as a synchronous rectification switch are connected to respective winding ends on the secondary side of the transformer T. Has been. Diodes D7 and D8 connected in parallel to each of the switching element SRA and the switching element SRB are body diodes parasitic on each switching element. One end of the choke coil L1 is connected to one end of the switching element SRA, and one end of the choke coil L2 is connected to one end of the switching element SRB. The other end of the switching element SRA and the other end of the switching element SRB are grounded. The resistor r1 has an equivalent series resistance of L1, and the resistor r2 has an equivalent series resistance of L2. An output capacitor Co is connected between the connection point of the resistors r1 and r2 and the secondary reference potential point, and a DC output voltage Vout is obtained from both ends of the output capacitor Co. The rectifier circuit 3 forms a current doubler rectifier circuit.

  FIG. 3 is a diagram illustrating operation timings in the first embodiment. The on / off operation timings of the switches of the switching elements A to D of the switching circuit 2 and the switching elements SRA and SRB of the rectifier circuit 3 are shown. The period from time T1 to T11 corresponds to one cycle of the operation timing, and the rising timing of the switching element SRB is expressed as the start of one cycle.

  The switching elements A and B are alternately turned on and off alternately, and in order to prevent a short circuit of the input power supply due to the simultaneous turning on of both switches, the switching elements A and B are both turned off for a short time (hereinafter referred to as “dead time”). ). Further, the switching elements C and D are both turned on / off alternately by providing a dead time for turning off. Here, the dead time provided at the operation timing of the switching elements A and B and the switching elements C and D is defined as a dead time Td_ab and a dead time Td_cd. The switching elements A and B and the switching elements C and D are operated with a certain time difference (hereinafter referred to as “phase difference”), and the DC output voltage is controlled by varying the phase difference. Further, the timing when the switching elements SRA and SRB are turned on is synchronized with the timing when the switching elements A and B are turned off. The timing at which the switching elements SRA and SRB are turned off is delayed by a slight period ΔTzcs from the timing at which the switching elements B and A are turned off.

  Between T1 and T3 and between T6 and T8 are periods ΔTzcs for soft-switching the switching element SRA and the switching element SRB, respectively. Further, a phase difference is shown between T2 and T5.

  By the way, in the control method of the synchronous rectification switch in the conventional rectifier circuit 3, the switching elements SRA and SRB generate a body diode loss. This is due to the fact that the ON / OFF operation timing of the switching element is fixed. As a result, there is a timing at which the power loss increases depending on the state change of the converter, and this has been a factor in reducing efficiency. In order to improve this, it is effective to make the ON / OFF timing of each switch variable according to the state of the converter. That is, if an optimum on / off operation timing can be set over the entire load current, a reduction in efficiency can be prevented. Such variable control is difficult with the conventional control method.

  In the present embodiment, the control circuit 4 is provided with pulse control means 9 in order to solve the above-described problems. The pulse control means 9 is introduced with a system comprising a timing calculation algorithm using a DSP and a program. As described above, the pulse control means 9 has a characteristic configuration of the pulse first control means 10 and the pulse second control means 11. In the first pulse control means 10, in addition to the pulse signal output from the PWM circuit 8, the DC input voltage Vin, the DC input current Iin, and the switching circuit information 12 of the transformer primary current Itrs generated in the transformer T At least one of these or a combination of two or more thereof is used for control. In addition, in the pulse second control means 11, in addition to the pulse signal output from the PWM circuit 8, at least of the rectifier circuit information 13 of the DC output voltage Vout, the DC output current Iout, and the transformer primary current Itrs, Any one or a combination of two or more thereof is used for control. How these pieces of information are specifically used for control will be described later. By appropriately using these pieces of information and performing arithmetic processing in the DSP, it is possible to individually set the on / off timing operation of each switching element under optimum conditions. The operation timing of the switching element SRA and the switching element SRB in FIG. 3 is an operation timing set under such a system having the pulse first control means 10 and the pulse second control means 11.

  Simulation waveforms obtained by operating the circuit of FIG. 2 are shown in FIGS. FIG. 4 shows a current waveform of the switching element SRA when the conventional control method is used, and FIG. 5 shows a current waveform of the switch when the control method of the present invention is used.

(Simulation results of conventional synchronous rectification switch control method)
4A shows the current waveform of the switching element SRA when the output current is 15A, FIG. 4B is the output current 30A, and FIG. 4C is the output current 60A.

  In the conventional control method, the on / off operation of the switching element SRA is synchronized with the switching element A. When the switching element SRA is turned off, the current flowing through the switching element SRA is forcibly cut off from substantially the same value as the output current. Therefore, after the switch is turned off, the current flowing through the switch is commutated to the body diode that is parasitic on the switch, and power loss due to the diode occurs. Further, power loss occurs in the switching element SRB for the same reason. In the conventional control method, the above-mentioned loss is inevitably generated on the principle of operation, and there is a reason why it is not easy to reduce the power loss.

(Realization of ZCS (Zero Current Switching) operation in timing control of this embodiment)
In the present embodiment, the rectifier circuit 3 optimizes the switching timing. This will be described below. 5A shows the current waveform of the switching element SRA when the output current is 15A, FIG. 5B is the output current 30A, and FIG. 5C is the output current 60A. In the figure, it can be seen that even if the output current increases, the switch current decreases to 0 A before the switching element SRA is turned off.

(Control method simulation result of synchronous rectification switch in this embodiment)
In FIG. 5, the OFF timing of the switching element SRA that functions as a synchronous rectification switch is delayed from the OFF timing of the switching element A by a period ΔTzcs. Such a time-series switching relationship coincides (signs) with FIG. The current of the switching element SRA in the period ΔTzcs gradually decreases immediately after the switching element A is turned off, and becomes 0 A when the period ΔTzcs elapses. ZCS is realized by turning off the switching element SRA at this timing. At the same time as the switching element A is turned off, the switching element SRA is turned off, which is in sharp contrast with the conventional control method in which the body diode current of the switching element SRA flows greatly. That is, according to the control method of the present embodiment, it is possible in principle to remove the loss of the body diode parasitic on the switching element SRA by setting the period ΔTzcs.

  When the output current is increased, the switching current SRA when the switching element SRA is turned off can be reduced to 0 A by increasing the period ΔTzcs. Therefore, when the output power of the circuit of FIG. 2 changes, the power loss can be reduced by changing the period ΔTzcs.

  Specifically, the control is performed as follows. The pulse timing controller 2 (pulse second control means 11) detects output power in the circuit shown in FIG. 2 from the DC output voltage Vout and the DC output current Iout. Then, the period ΔTzcs obtained in advance, in which the power loss corresponding to the output power is minimized, is read from the ROM (ROM) table. That is, in the ROM (ROM) table, a period ΔTzcs obtained in an experiment in which the power loss corresponding to various output powers is minimized is stored in advance. Furthermore, it is also possible to obtain the period ΔTzcs with higher accuracy by referring to the information on the transformer primary current Itrs flowing on the primary side of the transformer to increase the amount of information. As another method, when the voltage on the secondary side is constant, the period ΔTzcs in which the power loss is minimized can be obtained based only on the information on the transformer primary current Itrs.

  The period ΔTzcs is directly related to the ON / OFF timing of the switching element and greatly affects the power loss. Therefore, the setting of the period ΔTzcs is a very important parameter in the present invention. In order to realize this ZCS (soft switching) operation, the pulse second control means introduces a timing calculation algorithm using a DSP and a program, and sets an optimum timing. Note that this control can be realized by digital control by software using a microcomputer, ASIC, or the like without using a DSP. Further, the entire control circuit 4 may be configured by hardware.

(Full bridge circuit on / off timing control)
In the present embodiment, the switching timing of the switching circuit 2 is also optimized. This will be described below. In the operation of this circuit, the dead time Td_ab and dead time Td_cd provided at the operation timing of the switching elements A and B and the switching elements C and D, and the drain-source voltage waveforms of the switching elements B and D at that time are shown in FIG. Shown in Here, FIG. 6A shows the waveforms at the operation timing when the power loss increases, and FIG. 6B shows the waveforms at the timing when the optimal operation (the power loss is minimized).

(Realization of ZVS operation by optimizing dead time of full bridge circuit)
FIG. 6 shows drain-source voltage waveforms of the switching element B and the switching element D at the two dead times Td_ab and Td_cd. Further, the drain-source voltages of the switching elements A and C shown in FIG.

ここで、Lrはトランスの漏洩インダクタンス、C_DS１はスイッチング素子Ａ、Ｂのドレインソース間寄生容量の和、I_T１はスイッチング素子Ａ、Ｂがスイッチングする時のトランス１次側電流値を表す。 FIG. 6A shows drain-source voltage waveforms of the switching elements B and D when the dead times Td_ab and Td_cd are not the optimum dead time depending on the load condition. As can be seen from the figure, the drain-source voltage of the switching element B resonates with the leakage inductance of the transformer and the drain-source parasitic capacitance of the switching element, and the voltage reaches a voltage value other than the maximum or minimum value point. The switching element is on / off. Realization of ZVS is indispensable for minimizing the power loss, and the optimum value of the dead time Td_ab for that is given by the following equation.

Here, Lr the transformer leakage inductance, C _DS1 is the sum of the switching element A, the drain-source parasitic capacitance of B, I _T1 represents the primary side of the transformer current when the switching element A, B is switched.

ここで、C_DS２はスイッチング素子C,Dのドレインソース間寄生容量の和、I_T２はスイッチング素子C,Dがスイッチングする時のトランス１次側電流値を表す。 The drain-source voltage of the switching element D changes linearly, and the drain-source voltage reaches the maximum value or the minimum value before the dead time Td_cd elapses. In that case, power loss occurs due to current flowing through the body diodes parasitic to the switching elements D and C. Further, depending on the circuit element parameters of FIG. 2, the switching element is turned on / off before the drain-source voltage of the switching element reaches the maximum value or the minimum value, resulting in an output capacitance parasitic to the switching elements D and C. Since the remaining charge is consumed, it is lost. Therefore, the dead time Td_cd has an optimum time as well as the dead time Td_ab, and the value is shown in the following equation.

Here, C _DS2 is the sum of the drain-source parasitic capacitance of the switching elements C, D, I _T2 represents the primary side of the transformer current when the switching elements C, D is switched.

(Individual dead time control of full bridge switch according to this embodiment)
In the conventional control, it is difficult to individually control the dead time according to the above two expressions to an optimum value. However, in the present invention, the dead times Td_ab and Td_cd can be individually optimized using a timing controller. FIG. 6B shows drain-source voltage waveforms of the switching elements B and D to which the present invention is applied and the dead times Td_ab and Td_cd are optimized. From the figure, it is clear that the switching element voltage is turned on / off simultaneously with the maximum or minimum value. Therefore, the power loss can be minimized by individually optimizing the dead time of the full bridge circuit and achieving ZVS.

  Specifically, the control is performed as follows. Although not shown in FIG. 1, the drain-source voltage waveform of the switching element B is input to the pulse timing controller 1 (pulse second control means 11) shown in FIG. The pulse timing controller 1 calculates the first and second derivatives of the drain-source voltage waveform of the switching element B, and detects the time when the drain-source voltage waveform of the switching element B reaches the maximum value. At this time, the switching element A is controlled to be turned on. Although not shown in FIG. 1, the drain-source voltage waveform of the switching element B is input to the pulse timing controller 1 (pulse second control means 11) shown in FIG. The pulse timing controller 1 calculates the first and second derivatives of the drain-source voltage waveform of the switching element B, and detects the time when the drain-source voltage waveform of the switching element B reaches the minimum value. At this time, the switching element B is controlled to be turned on.

  As another method, the following control is performed. After switching element B is turned OFF using an oscilloscope, a dead time Td_ab that maximizes the drain-source voltage waveform is obtained. Then, a dead time interval Td_ab that maximizes the drain-source voltage waveform corresponding to various output powers is obtained in advance. Then, the dead time Td_ab for various output powers is stored in ROM. The output power is calculated using the DC input voltage Vin and the DC input voltage Vin, and the dead time Td_ab is set with reference to ROM. Furthermore, in order to increase the accuracy, the output power is calculated using the transformer primary current Itrs flowing in the transformer primary current, and the dead time Td_ab is set with reference to the ROM.

  In general, the dead time Td_ab at which the drain-source voltage waveform of the switching element B is maximized coincides with the dead time Td_ab at which the drain-source voltage waveform of the switching element B is minimized. However, if they do not match, the dead time Td_ab at which the drain-source voltage waveform is maximized and the dead time Td_ab at which the drain-source voltage waveform is minimized may be set to different times.

  The dead time Td_cd can also be set using the same means as the means for setting the dead time Td_ab described above.

  FIG. 7 shows the result of the power conversion efficiency obtained when the circuit of FIG. 2 is prototyped and verified based on a certain specification. Here, the vertical axis represents power conversion efficiency η [%], and the horizontal axis represents output power [W].

  In FIG. 7, ηa is the power conversion efficiency according to the prior art, ηb is the power conversion efficiency due to the application effect of the pulse first control means 10 of the present invention, and ηc is the power conversion efficiency due to the effect of the pulse second control means 11 according to the present invention. Where ηd is a power conversion efficiency showing a synergistic effect due to the application of these first pulse control means 10 and second pulse control means 11 steps.

  By applying the pulse first control means 10, the switching loss, which is the main loss component from light load to medium load, can be reduced, so the efficiency is improved mainly in the light load region. However, in the heavy load (maximum output) region, the resistance of the switching element and the conduction loss due to the body diode occupy a large proportion, so that the efficiency improvement effect by applying the pulse first control means 10 is small.

  On the other hand, since the body diode loss of the switching element is reduced by applying the pulse second control means 11, an efficiency improvement effect mainly in the heavy load (maximum output) region can be obtained. However, since the current is small in the light load region, it is difficult to obtain a loss improvement effect. As described above, by using the pulse first control means 10 and the pulse second control means 11 according to the present invention in combination, an efficiency improvement effect was obtained in the entire range of output power.

  As shown in FIG. 7, the power conversion efficiency ηd according to the application of the present embodiment exceeds the power conversion efficiency according to the conventional technique in all regions of the output power. There are many conventional techniques aimed at improving efficiency with respect to light loads, but in the present invention, it has been verified by experiments that power conversion efficiency can be improved regardless of light loads and rated loads. .

  As described above, in this embodiment, ZVS of all the switches is realized even when the switching elements A and B, and the switching elements C and D have different dead time optimum values. Also, zero current switching of the switching elements SRA and SRB was achieved.

  FIG. 8 is a circuit block diagram of a switching power supply apparatus 1A according to the second embodiment of the present invention. In this embodiment, the positions of the pulse first control means 10 and the pulse second control means 11 in the first embodiment of the present invention on the circuit are changed. That is, the pulse first control means 10 and the pulse second control means 11 are arranged in front of the PWM circuit 8. The control circuit 4 feeds back the DC output voltage Vout, compares it with the reference voltage Vref of the target value, amplifies the error, and converts the output signal of the error detector VR into a pulse width modulation signal. Connected to one input terminal of the first comparator 14 of the PWM circuit 8 for generating a desired pulse signal, the carrier signal 7 is input to the other input terminal of the first comparator 14, and the error detector VR and the first comparator A first control circuit for connecting the pulse first control means 10 on the connection path between the first output circuit 14 and the output side of the error detector VR is connected to one input terminal of the second comparator 15 of the PWM circuit 8; The carrier signal 7 is input to the other input terminal 15 and the pulse second control means 11 is provided on the connection path between the error detector VR and the second comparator 15. Constituted by a second control circuit for connection constitute the output side of the output side and the switching circuit 2 and the second comparator 15 of the first comparator 14 and the rectifying circuit 3 so as to be connected respectively.

  That is, the control circuit 4 of the switching power supply device 1A of the second embodiment feeds back the DC output voltage Vout and compares it with the reference voltage of the target value Vref, and an error detector VR that functions as an error amplifier that amplifies the error. The first adder 18 that adds the signal output from the pulse timing controller 10 functioning as the pulse first control means and the error to obtain a first addition signal, and the first adder corresponding to the first addition signal The signal output from the first comparator 14 functioning as the first PWM circuit for generating the pulse signal and the pulse timing controller 11 functioning as the pulse second control means is added to the error to obtain the second addition signal. A second adder 19 to be obtained, and a second comparator 1 that functions as a second PWM circuit that generates a second pulse signal according to the second addition signal And, equipped with a. The PWM circuit 8 includes a first PWM circuit and a second PWM circuit. The on / off timing of each switching element of the switching circuit 2 is controlled by the first pulse signal, and the on / off timing of each switching element of the rectifying / smoothing circuit 3 is controlled by the second pulse signal. .

  Here, when the control circuit 4 is configured by hardware, in the first embodiment, the pulse first control unit and the pulse second control unit process the PWM signal. On the other hand, in the second embodiment, the pulse first control means and the pulse second control means process analog signals. However, when the control means including the control circuit 4 is formed by a digital signal processor, both the pulse first control means and the pulse second control means are realized by digital processing.

  The reason for this circuit configuration is to adjust the compare value 6 output from the error detector VR before being subjected to pulse conversion in the PWM circuit 8. However, the switching power supply device according to the first embodiment of the present invention is provided as the switching power supply device 1 in which the desired pulse signal intended by the embodiment is individually set to each switching element of the circuit at the optimum switch timing. Same as 1. Moreover, it is the same functionally and enables flexible design of the arithmetic algorithm.

  FIG. 9 is a circuit block diagram of a switching power supply device 1B according to the third embodiment of the present invention. In this embodiment, the control circuit 4 feeds back the DC output voltage Vout, compares it with the reference voltage Vref of the target value, amplifies the error, and outputs the error detector VR output signal to the pulse width. This is connected to one input terminal of the first comparator 14 of the PWM circuit 8 that converts to a modulation signal and generates a desired pulse signal, and the carrier signal 7 is input to the other input terminal of the first comparator 14. The first control circuit for connecting the pulse first control means 10 on the connection path between the first comparator 14 and the output side of the error detector VR is connected to one input terminal of the second comparator 15 of the PWM circuit 8. The carrier signal 7 is input to the other input terminal of the second comparator 15 and a pulse is generated on the connection path between the carrier signal 7 and the second comparator 15. The second control circuit is connected to the second control means 11, and the output side of the first comparator 14 and the switching circuit 2 and the output side of the second comparator 15 and the rectifier circuit 3 are connected to each other. .

  That is, the control circuit 4 of the switching power supply 1B of the third embodiment feeds back the DC output voltage Vout, compares it with the reference voltage of the target value Vref, and an error detector VR that functions as an error amplifier that amplifies the error. The first adder 18 that adds the signal output from the pulse timing controller 10 functioning as the pulse first control means and the carrier signal 7 to obtain the first addition signal, and the first addition signal and the error The first comparator 14 that functions as a first PWM circuit that generates a first pulse signal in response, the signal output from the pulse timing controller 11 that functions as a pulse second control means, and the carrier signal 7 are added. A second adder 19 for obtaining a second addition signal, and a second PWM circuit for generating a second pulse signal corresponding to the second addition signal and an error It includes a second comparator 15 which functions in the. The PWM circuit 8 includes a first PWM circuit and a second PWM circuit. The on / off timing of each switching element of the switching circuit 2 is controlled by the first pulse signal, and the on / off timing of each switching element of the rectifying / smoothing circuit 3 is controlled by the second pulse signal. .

  Here, when the control circuit 4 is configured by hardware, in the third embodiment, the pulse first control unit and the pulse second control unit process an analog signal. However, when the control means including the control circuit 4 is formed by a digital signal processor, both the pulse first control means and the pulse second control means are realized by digital processing.

  The second embodiment is positioned in relation to the compare value 6 output from the error detector VR, whereas the third embodiment is positioned in relation to the carrier signal 7. That is, each switching is performed by inputting the control signal of the pulse first control means 10 or the control signal of the pulse second control means 11 to the carrier signal 7 of a constant value, introducing a timing calculation algorithm using a DSP and a program, etc. Provides optimal switch timing for the device. This embodiment is also the same as that of Embodiment 1 or 2 in that the desired pulse signal targeted by the present invention is provided as a switching power supply device 1 that individually sets each switching element of the circuit at the optimum switch timing. is there. Moreover, it is the same functionally and enables flexible design of the arithmetic algorithm.

  In short, the switching power supply device of the embodiment includes a switching circuit that inputs a DC voltage and supplies power to the primary side of the transformer, a rectifying and smoothing circuit that generates a DC output voltage from the secondary side of the transformer and supplies power to the load, A switching power supply device including a control circuit that feeds back a DC output voltage and supplies a desired pulse signal to a switching circuit and a rectifying / smoothing circuit, the control circuit based on input power information or transformer current information. Pulse first control means for controlling the on / off timing of each switching element and pulse second control means for controlling the on / off timing of each switching element of the rectifying and smoothing circuit are provided.

  In addition, the circuit, parts, etc. used for the circuit block diagram of the switching power supply device 1 according to the second embodiment and the third embodiment of the present invention are functionally corresponding circuits in the first embodiment of the present invention, Since they are the same as parts, the same reference numerals as those used in the first embodiment are displayed.

1, 1A, 1B: Switching power supply
2: Switching circuit
3: Rectifier circuit (rectifier smoothing circuit)
4: Control circuit
5: Filter
6: Compare value
7: Carrier signal
8: PWM circuit
9: Pulse control means
10: Pulse first control means
11: Pulse second control means 12: Switching circuit information (DC input voltage, DC input voltage, transformer primary side information)
13: Rectifier circuit information (DC output voltage, DC output current, transformer primary current information)
14: First comparator 15: Second comparator
VR: Error detector
Vref: Reference voltage
Itrs: Transformer primary side current
T: Transformer
Vin: DC input voltage Vout: DC output voltage

Claims (7)

A switching circuit that inputs a DC voltage and supplies power to the primary side of the transformer; a rectifying and smoothing circuit that generates a DC output voltage from the secondary side of the transformer and supplies power to the load; and feedback the DC output voltage to A switching power supply device comprising a switching circuit and a control circuit for supplying a desired pulse signal to the rectifying and smoothing circuit,
The control circuit includes:
Based on input power information or transformer current information,
Pulse first control means for controlling the on and off timing of each switching element of the switching circuit;
A switching power supply comprising: pulse second control means for controlling on and off timings of the switching elements of the rectifying and smoothing circuit. The control circuit includes:
2. The switching power supply device according to claim 1, wherein the switching power supply device is formed with a digital signal processor. The control circuit includes:
An error amplifier for amplifying an error by feeding back the DC output voltage and comparing it with a reference voltage of a target value;
A pulse width modulation circuit that inputs a carrier signal and an output signal from the error amplifier to generate a pulse signal, and
The first pulse control means is connected between the pulse width modulation circuit and the switching circuit,
2. The switching power supply device according to claim 1, wherein the second pulse control means is connected between the pulse width modulation circuit and the rectifying / smoothing circuit. The control circuit includes:
An error amplifier that amplifies an error by feeding back the DC output voltage and comparing it with a reference voltage of a target value;
A first adder that adds the error and the signal output from the pulse first control means to obtain a first addition signal;
A first pulse width modulation circuit for generating a first pulse signal according to the first addition signal;
A second adder that adds the error and the signal output from the pulse second control means to obtain a second addition signal;
A second pulse width modulation circuit that generates a second pulse signal according to the second addition signal,
By controlling the on and off timing of each switching element of the switching circuit by the first pulse signal,
2. The switching power supply device according to claim 1, wherein on / off timing of each switching element of the rectifying and smoothing circuit is controlled by the second pulse signal. The control circuit includes:
An error amplifier that amplifies an error by feeding back the DC output voltage and comparing it with a reference voltage of a target value;
A first adder that adds a carrier signal and a signal output from the first pulse control means to obtain a first addition signal;
A first pulse width modulation circuit for generating a first pulse signal corresponding to the first addition signal and the error;
A second adder that adds the carrier signal and the signal output from the pulse second control means to obtain a second addition signal;
A second pulse width modulation circuit that generates a second pulse signal according to the second addition signal and the error,
By controlling the on and off timing of each switching element of the switching circuit by the first pulse signal,
2. The switching power supply device according to claim 1, wherein on / off timing of each switching element of the rectifying and smoothing circuit is controlled by the second pulse signal. The switching circuit is
A first switching element and a second switching element connected in series between input terminals to which a DC voltage is applied; a third switching element and a fourth switching element connected in series between the input terminals; , Connect in parallel
Controlling the on / off phase difference between the first switching element and the second switching element which are alternately turned on / off and the third switching element and the fourth switching element which are alternately turned on / off. Thus, it is formed with a full bridge circuit that applies an alternating voltage to the transformer primary side,
The rectifying and smoothing circuit is
A fifth switching element and a sixth switching element connected to each of the transformer secondary side terminals and turned on / off in synchronization with the transformer secondary side voltage;
A first choke choke coil connected between an output terminal and a connection point at which one end of the transformer secondary terminal and the fifth switching element are connected;
A second choke choke coil connected between an output terminal and a connection point where the other end of the transformer secondary terminal and the sixth switching element are connected;
Forming a current doubler rectifier circuit having a connection point between the first choke choke coil and the second choke choke coil and an output capacitor connected between the secondary reference potential points;
The switching power supply device according to claim 1. A switching circuit that inputs a DC voltage and converts it into an AC voltage once on the primary side of the transformer, and a rectifier that rectifies and smoothes the AC voltage on the secondary side of the transformer to generate a desired DC output voltage and supplies power to the load. A control method in a switching power supply device comprising a smoothing circuit and a control circuit that feeds back the DC output voltage and supplies a desired pulse signal to the switching circuit and the rectifying and smoothing circuit,
A control method for a switching power supply, wherein the pulse signal is controlled at an arbitrary timing based on the power information and transformer current information.

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