JP2013121160A - Fully-differential feedback amplifier circuit and electrical equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a fully-differential feedback amplifier circuit capable of improving a common mode removal ratio and a fluctuation removal ratio.SOLUTION: A fully-differential feedback amplifier circuit has: an amplifier circuit 10 amplifying differential input signals inputted to an inverted input terminal 13 and a non-inverted input terminal 14 and outputting those to an inverted output terminal 16 and a non-inverted output terminal 15; a first feedback circuit 20a and a second feedback circuit 20b feeding back the outputs of the amplifier circuit to the inverted input terminal or the non-inverted input terminal; a pair of a first feedback resistor Rf1 and a second feedback resistor Rf2 included in the first and second feedback circuits; a pair of a first input resistor Ri1 and a second input resistor Ri2 respectively connected in series to the inverted input terminal and the non-inverted input terminal; and switching means (switching elements S1-S6) switching at least one pair of the pair of the first feedback resistor Rf1 and the second feedback resistor Rf2 and the pair of the first input resistor Ri1 and the second input resistor Ri2 at a predetermined timing.

Description

  The present invention relates to a fully differential feedback amplifier circuit and an electrical device, and more particularly to a fully differential feedback amplifier circuit and an electrical device that can improve the common-mode signal rejection ratio and the fluctuation rejection ratio with respect to the bias voltage.

  The differential amplifier circuit includes a single output type that performs single-phase output with a differential input and a fully differential type that performs differential output with a differential input. The fully differential type has a characteristic that a complex transfer function can be realized relatively easily and is resistant to noise.

  In an integrated circuit such as an LSI, in principle, an analog signal is differentially transmitted (a signal having a phase difference of 180 degrees is transmitted in pairs). That is, differential transmission has advantages in that the data transmission speed can be increased as much as the signal amplitude can be reduced and that it is resistant to common mode noise (common mode noise) compared to single transmission. Therefore, in various integrated circuits, a fully differential amplifier circuit (fully differential operational amplifier) having a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal adapted to differential transmission is used. .

  According to this fully differential operational amplifier, the DC error such as the common-mode error and the temporal variation of the DC voltage can be canceled by the subtraction function. That is, the noise can be canceled by taking the difference between the input signals.

  In a fully differential operational amplifier, a common mode voltage is controlled by feeding back an in-phase signal from an output to an input via a feedback path.

  Various techniques relating to a fully differential operational amplifier have been proposed (see, for example, Patent Document 1).

JP 2007-195189 A

  The common-mode rejection ratio (CMRR) of the fully differential operational amplifier is proportional to the resistance matching error between the two feedback paths.

  Here, resistance matching refers to matching output resistance and input resistance. CMRR refers to a measure of a tendency to remove an input signal common to two inputs in a fully differential operational amplifier or the like.

  For example, when the resistance matching error is 0.1%, CMRR is 60 dB. Therefore, in order to improve CMRR, it is necessary to reduce the resistance matching error.

  However, for example, in an LSI, in order to reduce the resistance matching error, it is necessary to increase the chip area in order to reduce the shift component of the resistance element, which is contrary to the demand for miniaturization of the LSI.

  There is also a problem that variations of several dB to several tens of dB occur due to the matching error of the resistive element samples in each LSI.

  The fluctuation removal ratio (PSRR: Power Supply Rejection Ratio) with respect to the bias voltage has the same problem as the CMRR. PSRR refers to a value representing the rate at which the output offset voltage increases or decreases due to changes in the power supply voltage.

  An object of the present invention is to provide a fully-differential feedback amplifier circuit and an electric device that can improve the common-mode signal rejection ratio and the fluctuation rejection ratio with respect to the bias voltage.

  According to one aspect of the present invention for achieving the above object, an amplifier circuit that amplifies a differential input signal input to an inverting input terminal and a non-inverting input terminal and outputs the amplified signal to the inverting output terminal and the non-inverting output terminal; , A first feedback circuit and a second feedback circuit for feeding back an output of the amplifier circuit to the inverting input terminal or the non-inverting input terminal, a first feedback resistor provided in the first feedback circuit and the second feedback circuit, and a second feedback circuit. A pair of two feedback resistors, a pair of first and second input resistors connected in series to the inverting input terminal and the non-inverting input terminal, respectively, and a pair of the first feedback resistor and the second feedback resistor And a switching means for switching at least one of the pair of the first input resistor and the second input resistor at a predetermined timing.

  According to another aspect of the present invention, there is provided an electric device equipped with a fully differential feedback amplifier circuit.

  According to the present invention, it is possible to provide a fully-differential feedback amplifier circuit capable of improving the common-mode signal rejection ratio and the fluctuation rejection ratio with respect to the bias voltage, and an electric device equipped with the circuit.

(A) A circuit diagram showing a schematic configuration of a fully differential feedback amplifier circuit according to the first embodiment, (b) a circuit showing a modification of the fully differential feedback amplifier circuit according to the first embodiment. Figure. FIG. 4 is a waveform related to the fully differential feedback amplifier circuit according to the first embodiment, where (a) is a waveform of a triangular wave signal, (b) is an output PWM waveform, and (c) is a clock signal waveform. FIG. The circuit diagram which shows schematic structure of the fully differential type feedback amplifier circuit which concerns on a comparative example. An output signal (A) when the fully differential feedback amplifier circuit according to the first embodiment or the second embodiment is applied, and a case where the fully differential feedback amplifier circuit according to the comparative example is applied. The graph which shows an output signal (B). The graph which shows the output signal at the time of applying a bridge connection load in the case where the fully differential feedback amplifier circuit concerning a comparative example is applied. It is an example of the measurement result at the time of applying a bridge connection load in the case of applying the fully differential feedback amplifier circuit according to the comparative example, and (a) corresponds to the input wave input to the non-inverting input terminal. The waveform obtained by demodulating the output PWM with the low-pass filter, (b) is the waveform obtained by demodulating the output PWM corresponding to the input wave input to the inverting input terminal with the low-pass filter, and (c) is input to the non-inverting input terminal. The waveform of the input wave, (d) is a graph showing the waveform of the input wave input to the inverting input terminal. The graph which shows the output signal at the time of applying a bridge | bridging connection load in the case where the fully differential feedback amplifier circuit which concerns on 1st Embodiment or 2nd Embodiment is applied. It is an example of the measurement result at the time of applying a bridge connection load in the case where the fully differential feedback amplifier circuit according to the first embodiment or the second embodiment is applied, and FIG. The waveform obtained by demodulating the output PWM corresponding to the input wave input to the input terminal with the low-pass filter, (b) is the waveform obtained by demodulating the output PWM corresponding to the input wave input to the inverting input terminal with the low-pass filter, (c ) Is the waveform of the input wave input to the non-inverting input terminal, and (d) is a graph showing the waveform of the input wave input to the inverting input terminal. (A) A circuit diagram showing a schematic configuration of a fully differential feedback amplifier circuit according to the second embodiment, (b) a circuit showing a modification of the fully differential feedback amplifier circuit according to the second embodiment. Figure. (A) A circuit diagram showing a schematic configuration of a fully differential feedback amplifier circuit according to the third embodiment, (b) a circuit showing a modification of the fully differential feedback amplifier circuit according to the third embodiment. Figure. (A) A circuit diagram showing a schematic configuration of a fully differential feedback amplifier circuit according to the fourth embodiment, (b) a circuit showing a modification of the fully differential feedback amplifier circuit according to the fourth embodiment. Figure.

  Next, embodiments will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

  Further, the embodiments described below exemplify apparatuses and methods for embodying the technical idea of the present invention, and the embodiments of the present invention include the material, shape, structure, The layout is not specified as follows. Various modifications can be made to the embodiment of the present invention within the scope of the claims.

[Embodiment]
(First embodiment)
With reference to the circuit diagram shown in FIG. 1A, a schematic configuration of the fully-differential feedback amplifier circuit 1 according to the first embodiment will be described.

  The fully differential feedback amplifier circuit 1 according to the first embodiment includes an inverting input terminal 13 and a non-inverting input terminal 14 to which a differential input signal such as an audio signal is input, and a non-inverting output that outputs an output signal. The differential input signals (Vi (−) and Vi (+)) input to the terminal 15 and the inverting output terminal 16, and the inverting input terminal 13 and the non-inverting input terminal 14 are amplified to generate the non-inverting output terminal 15 and the inverting output. An amplifier circuit (operational amplifier) 10 that outputs to the terminal 16, a first feedback circuit 20a and a second feedback circuit 20b that feed back the output of the amplifier circuit 10 to the inverting input terminal 13 or the non-inverting input terminal 14, and a first feedback circuit 20a. And a pair of the first feedback resistor Rf1 and the second feedback resistor Rf2 provided in the second feedback circuit 20b, and the inverting input terminal 13 and the non-inverting input terminal 14 in series. At least one of a pair of the first input resistor Ri1 and the second input resistor Ri2, a pair of the first feedback resistor Rf1 and the second feedback resistor Rf2, and a pair of the first input resistor Ri1 and the second input resistor Ri2 And switching means for switching between at a predetermined timing.

  The switching means includes switching elements S1 to S6 that are turned on / off based on a predetermined switching frequency.

  Although it does not specifically limit as a switching element, It can comprise in any of a transistor (MOSFET etc.), IGBT, thyristor, a triac.

  As shown in FIG. 1A, one end of each of the specific switching elements S1 to S6 in the fully differential feedback amplifier circuit 1 is connected to the first node N1 on the inverting input terminal 13 side of the first feedback circuit 20a. The other end of the amplifier circuit 10 is connected to the second node N2 on the inverting input terminal 13 side, and the other end is connected to the first node N1 on the inverting input terminal 13 side of the first feedback circuit 20a. The second switching element S2 having the other end connected to the third node N3 on the non-inverting input terminal 14 side of the amplifier circuit 10, and the non-inverting output terminal 15 side of the amplifier circuit 10 and the first feedback circuit 20a. One end is connected to the third switching element S3 to be connected and the fourth node N4 on the non-inverting input terminal 14 side of the second feedback circuit 20b, and the other is connected to the fifth node N5 on the non-inverting input terminal 14 side of the amplifier circuit 10. End connected One end is connected to the fourth switching element S4 and the fourth node N4 on the non-inverting input terminal 14 side of the second feedback circuit 20b, and the other end is connected to the sixth node N6 on the inverting input terminal 13 side of the amplifier circuit 10. A fifth switching element S5 and a sixth switching element S6 connected between the inverting output terminal 16 side of the amplifier circuit 10 and the second feedback circuit 20b.

  The first switching element S1 and the third switching element S3, and the fourth switching element S4 and the sixth switching element S6 are controlled so as to be in the on / off state simultaneously.

  Further, as shown in FIG. 1A, the non-inverting output terminal 15 side and the inverting output terminal 16 side of the amplifier circuit 10 are provided with comparators 11 and 12 to which a triangular wave signal having a predetermined frequency is input. The comparators 11 and 12 turn on and off the third switching element S3 and the sixth switching element S6.

  The input signal Vi (−) is input to the inverting input terminal 13, the input signal Vi (+) is input to the non-inverting input terminal 14, and the output signal Vo (+) is inverted from the non-inverting output terminal 15. An output signal Vo (−) is output from the terminal 16.

  2A shows a waveform example of a triangular wave signal (TRI) input to the comparators 11 and 12, and FIG. 2B shows a pulse width modulated PWM output from the non-inverting output terminal 15 and the inverting output terminal 16. An example of an output waveform of (Pulse Width Modulation) is shown in FIG. 2C. An example of a waveform of a clock signal (CLK) serving as a reference of timing at which the third switching element S3 and the sixth switching element S6 are turned on / off is shown in FIG. Show.

  The PWM rectangular waveform is obtained, for example, by a pulse width modulation method in which an audio signal as an input signal is cut out by a triangular wave signal (TRI).

  As shown in FIG. 2, the clock signal (CLK) has a frequency half that of the triangular wave signal (TRI). That is, the clock signal (CLK) has a waveform that rises and falls at timings t1, t2, t3, t4... At which the triangular wave signal (TRI) becomes high (H). For example, when a triangular wave signal (TRI) having a frequency of 300 kHz is generated by a predetermined triangular wave oscillation circuit, the clock signal (CLK) is a pulse signal having a frequency of 150 kHz. Note that the clock signal (CLK) is not limited to 1/2 of the triangular wave signal (TRI), and may be 1/2 or less.

  Then, the third switching element S3 and the sixth switching element S6 are turned on / off based on the rising edge or the falling edge of the pulse signals from the comparators 11 and 12.

  The first switching element S1 and the fourth switching element S4 are turned on / off at the same timing as the third switching element S3 and the sixth switching element S6, and the second switching element S2 and the fifth switching element S5 are, for example, On / off operation is performed at the reverse timing.

  Accordingly, the first feedback resistor Rf1 and the second feedback resistor Rf2 are switched at a predetermined timing, and the voltage gains of the first feedback circuit 20a and the second feedback circuit 20b can be averaged with respect to the common-mode signal. The influence of the resistance matching error between the first feedback resistor Rf1 and the second feedback resistor Rf2 on the characteristics of the fully differential feedback amplifier circuit 1 can be greatly reduced.

  That is, by averaging the gains between the respective inputs and outputs, the voltage gain for the common-mode signal is such that the resistances of the switching elements S1 to S6 can be ignored, and the first feedback resistor Rf1 of the first feedback circuit 20a. Even if there is an error in resistance matching with the second feedback resistor Rf2 of the second feedback circuit 20b, it can be regarded as −∞. Therefore, it is substantially not affected by the resistance matching error, and the common-mode signal rejection ratio (CMRR) can be improved.

  Further, the fluctuation rejection ratio (PSRR) with respect to the bias voltage can be improved similarly because the signal gain with respect to the bias voltage can be regarded as −∞.

  Thereby, when the fully-differential feedback amplifier circuit 1 according to the first embodiment is applied to a class D amplifier, it is possible to reduce noise of sound output from the speaker.

(Modification of the first embodiment)
With reference to the circuit diagram shown in FIG. 1B, a schematic configuration of a modification of the fully differential feedback amplifier circuit 1 according to the first embodiment will be described. In addition, about the structure similar to the circuit diagram shown to Fig.1 (a), the same code | symbol is attached | subjected and the overlapping description is abbreviate | omitted.

  In the circuit diagram shown in FIG. 1B, the non-inverting output terminal 15 side of the comparator 11 and the first feedback circuit instead of the third switching element S3 and the sixth switching element S6 in the circuit diagram shown in FIG. Switching element S3a between 20a, switching element S3b between inverting output terminal 16 of comparator 12 and first feedback circuit 20a, switching element S6a between inverting output terminal 16 of comparator 12 and second feedback circuit 20b A switching element S6b is provided between the non-inverting output terminal 15 side of the comparator 11 and the second feedback circuit 20b.

  The amplifier circuit 10 includes a pair of phase compensation capacitors C20 and C21.

  The switching elements S3a and S3b and the switching elements S6a and S6b are alternately turned on / off by a clock signal (CLK).

  The effect similar to that of the circuit diagram shown in FIG. 1A can be obtained by the circuit diagram shown in FIG.

  That is, by averaging the gain between each input and output, the voltage gain for the in-phase signal is the first feedback if the resistances of the switching elements S1 to S5, S3a, S3b, S6a, and S6b can be ignored. Even if there is an error in resistance matching between the first feedback resistor Rf1 of the circuit 20a and the second feedback resistor Rf2 of the second feedback circuit 20b, it can be regarded as −∞. Therefore, it is substantially not affected by the resistance matching error, and the common-mode signal rejection ratio (CMRR) can be improved.

  Further, the fluctuation rejection ratio (PSRR) with respect to the bias voltage can be improved similarly because the signal gain with respect to the bias voltage can be regarded as −∞.

  As a result, even when the fully differential feedback amplifier circuit 1 shown in FIG. 1B is applied to a class D amplifier, the noise of the sound output from the speaker can be reduced.

(Comparative example)
Here, a fully differential feedback amplifier circuit 1a according to a comparative example will be described with reference to FIG.

  As shown in FIG. 3, the fully differential feedback amplifier circuit 1a according to the comparative example includes an inverting input terminal 100 and a non-inverting input terminal 101 to which a differential input signal such as an audio signal is input, and a non-inverting input terminal that outputs an output signal. The differential input signals (Vi (−) and Vi (+)) input to the inverting output terminal 102, the inverting output terminal 103, the inverting input terminal 100, and the non-inverting input terminal 101 are amplified to invert the non-inverting output terminal 102 and the inverting output terminal 102. An amplifier circuit (op-amp) 200 that outputs to the output terminal 103, and two systems of the first feedback circuit 201a and the second feedback circuit 201b that feed back the output of the amplifier circuit 200 to the inverting input terminal 100 side or the non-inverting input terminal 101 side, Is provided.

  A first input resistor Ri1 is provided between the inverting input terminal 100 and the amplifier circuit 200, and a second input resistor Ri2 is provided between the non-inverting input terminal 101 and the amplifier circuit 200.

  The first feedback circuit 201a is provided with a first feedback resistor Rf1, and the second feedback circuit 201b is provided with a second feedback resistor Rf2.

  Note that Vcom shown in the amplifier circuit 200 is a common-mode voltage (common voltage) corresponding to a potential difference between the non-inverting output terminal 102 and zero volts.

  In the fully differential feedback amplifier circuit 1a according to the comparative example, the common-mode signal rejection ratio (CMRR) is the resistance of the first input resistor Ri1, the first feedback resistor Rf1, the second input resistor Ri2, and the second feedback resistor Rf2. Determined by matching error.

That is, CMRR = 20 log (1- (Ri1 / (Ri1 + Rf1)) / (Ri2 / (Ri2 + Rf2))
However, it is expressed as Ri1 + Rf1 <Ri2 + Rf2.

Also, PSRR = 20 log (1- (Ri1 / (Ri1 + Rf1)) / (Ri2 / (Ri2 + Rf2))
However, it is expressed as Ri1 + Rf1 <Ri2 + Rf2.

  In the fully-differential feedback amplifier circuit 1a according to the comparative example, for example, when the resistance matching error is 0.1%, the CMRR is 60 dB. Therefore, in order to improve CMRR, it is necessary to reduce the resistance matching error.

  Next, referring to the graphs of FIGS. 4 to 8, the output waveform of the fully differential feedback amplifier circuit 1 according to the first embodiment and the output waveform of the fully differential feedback amplifier circuit 1a according to the comparative example. The comparison with is described.

  The waveforms shown in FIGS. 4, 5 and 7 are the amplification circuit 10 in the fully differential feedback amplifier circuit 1 according to the first embodiment and the amplifier circuit 200 of the fully differential feedback amplifier circuit 1a according to the comparative example. It is the output waveform by simulation of the output signal Vo from No .. Here, the first feedback resistor Rf1 and the second feedback resistor Rf2 are each set to 160 kΩ, and 1 kΩ is inserted as a resistance matching error into either the first feedback resistor Rf1 or the second feedback resistor Rf2. The triangular wave frequency was 300 kHz, the clock frequency was 150 kHz, and the input signal frequency was 1 kHz.

  4 and 7, a waveform (A) shows an output waveform by the fully differential feedback amplifier circuit 1 according to the first embodiment.

  4 and 5, a waveform (B) shows an output waveform from the fully differential feedback amplifier circuit 1a according to the comparative example.

  FIG. 6 is a graph showing measurement results when a bridge connection load (BTL: Bridge Tied Load) is applied when the fully differential feedback amplifier circuit 1a according to the comparative example is applied. ) Shows a waveform obtained by demodulating the output PWM corresponding to the input wave inputted to the non-inverting input terminal 101 (see FIG. 3) shown in FIG. 6C with a low-pass filter, and FIG. The waveform which demodulated the output PWM corresponding to the input wave input into the inverting input terminal 100 (refer FIG. 3) shown to d) with the low-pass filter is shown.

  FIG. 8 is a graph showing the measurement results when a bridge connection load (BTL) is applied when the fully differential feedback amplifier circuit 1 according to the first embodiment is applied. ) Shows a waveform obtained by demodulating the output PWM corresponding to the input wave inputted to the inverting input terminal 13 (see FIG. 1) shown in FIG. 8C with a low-pass filter, and FIG. 8B shows the waveform shown in FIG. ) Shows a waveform obtained by demodulating the output PWM corresponding to the input wave input to the non-inverting input terminal 14 (see FIG. 1) with a low-pass filter.

  As can be seen from the waveforms (B) shown in FIGS. 4 and 7, an in-phase signal component appeared, the peak-to-peak voltage of the output signal Vo was 3.2 mV, and CMRR was 50 dB.

  On the other hand, the waveform (A) shown in FIG. 4 and FIG. 7 has a lot of straight line portions along substantially 0 V, though there is minute noise (switching noise), and the 1 kHz component is substantially eliminated.

  Further, as shown in FIG. 6, both the demodulated output when the fully differential feedback amplifier circuit 1a according to the comparative example is applied and the demodulated output when the fully differential feedback amplifier circuit 1 shown in FIG. It is about 1.8V.

  As described above, according to the fully differential feedback amplifier circuit 1 according to the first embodiment, the in-phase signal is canceled and the CMRR becomes infinitesimal, and the fully differential feedback as a comparison target. Compared with the case of using the amplifier circuit 1a, CMRR can be improved. Similarly, PSRR can be improved.

(Second Embodiment)
With reference to the circuit diagram shown in FIG. 9A, a schematic configuration of the fully-differential feedback amplifier circuit 1 according to the second embodiment will be described.

  The fully differential feedback amplifier circuit 1 according to the second embodiment includes an inverting input terminal 13 and a non-inverting input terminal 14 to which a differential input signal such as an audio signal is input, and a non-inverting output that outputs an output signal. The differential input signals (Vi (−) and Vi (+)) input to the terminal 15 and the inverting output terminal 16, and the inverting input terminal 13 and the non-inverting input terminal 14 are amplified to generate the non-inverting output terminal 15 and the inverting output. An amplifier circuit (operational amplifier) 10 that outputs to the terminal 16, a first feedback circuit 20a and a second feedback circuit 20b that feed back the output of the amplifier circuit 10 to the inverting input terminal 13 or the non-inverting input terminal 14, and a first feedback circuit 20a. And a pair of the first feedback resistor Rf1 and the second feedback resistor Rf2 provided in the second feedback circuit 20b, and the inverting input terminal 13 and the non-inverting input terminal 14 in series. At least one of a pair of the first input resistor Ri1 and the second input resistor Ri2, a pair of the first feedback resistor Rf1 and the second feedback resistor Rf2, and a pair of the first input resistor Ri1 and the second input resistor Ri2 And switching means for switching between at a predetermined timing.

  The switching means includes switching elements S1 to S4, S7, and S8 that are turned on / off based on a predetermined switching frequency.

  The amplifier circuit 10 includes a pair of phase compensation capacitors C20 and C21.

  As shown in FIG. 9A, specific switching elements S1 to S4, S7, and S8 in the fully differential feedback amplifier circuit 1 are connected to the first node N1 on the inverting input terminal 13 side of the first feedback circuit 20a. One end is connected to the first node N1 on the inverting input terminal 13 side of the first feedback circuit 20a and the first switching element S1 having the other end connected to the second node N2 on the inverting input terminal 13 side of the amplifier circuit 10. The second switching element S2 having one end connected and the other end connected to the third node N3 on the non-inverting input terminal 14 side of the amplifier circuit 10, the non-inverting output terminal 15 side of the amplifier circuit 10, and the second feedback circuit 20b. Are connected to the fourth switching node S7 connected to the fourth node N4 on the non-inverting input terminal 14 side of the second feedback circuit 20b, and the fifth switching element S7 is connected to the fifth node N4 on the non-inverting input terminal 14 side of the amplifier circuit 10. Node N5 One end is connected to the fourth switching element S4 to which the other end is connected and the fourth node N4 on the non-inverting input terminal 14 side of the second feedback circuit 20b, and the sixth node N6 on the inverting input terminal 13 side of the amplifier circuit 10 is connected. A fifth switching element S5 having the other end connected thereto, and an eighth switching element S8 connected between the inverting output terminal 16 side of the amplifier circuit 10 and the first feedback circuit 20a.

  The second switching element S2 and the seventh switching element S7, and the fifth switching element S5 and the eighth switching element S8 are controlled so as to be turned on / off simultaneously.

  Further, as shown in FIG. 9A, comparators 11 and 12 to which a triangular wave signal having a predetermined frequency is input are provided on the non-inverting output terminal 15 side and the inverting output terminal 16 side of the amplifier circuit 10. .

  The third switching element S3 and the sixth switching element S6 are turned on / off by a clock signal (CLK).

  The input signal Vi (−) is input to the inverting input terminal 13, the input signal Vi (+) is input to the non-inverting input terminal 14, and the output signal Vo (+) is inverted from the non-inverting output terminal 15. An output signal Vo (−) is output from the terminal 16.

  The control method using the triangular wave (TRI) for the comparators 11 and 12 is the same as that of the fully differential feedback amplifier circuit 1 according to the first embodiment (see FIG. 2 and the like).

  Also by the fully differential feedback amplifier circuit 1 according to the second embodiment, an effect equivalent to that of the fully differential feedback amplifier circuit 1 according to the first embodiment can be obtained. That is, the CMRR and PSRR can be improved as compared with the case of the fully differential feedback amplifier circuit 1a as the comparison target shown in FIG.

(Modification of the second embodiment)
With reference to the circuit diagram shown in FIG. 9B, a schematic configuration of a modification of the fully differential feedback amplifier circuit 1 according to the second embodiment will be described. In addition, about the structure similar to the circuit diagram shown to Fig.9 (a), the same code | symbol is attached | subjected and the overlapping description is abbreviate | omitted.

  In the circuit diagram shown in FIG. 9B, in place of the seventh switching element S7 and the eighth switching element S8 in the circuit diagram shown in FIG. 9A, the non-inverting output terminal 15 side of the comparator 11 and the first feedback circuit. Switching element S3a between 20a, switching element S3b between inverting output terminal 16 of comparator 12 and first feedback circuit 20a, switching element S6a between inverting output terminal 16 of comparator 12 and second feedback circuit 20b A switching element S6b is provided between the non-inverting output terminal 15 side of the comparator 11 and the second feedback circuit 20b.

  The switching elements S3a and S3b and the switching elements S6a and S6b are alternately turned on / off by a clock signal (CLK).

  The same effect as that of the circuit diagram shown in FIG. 9A can be obtained by the circuit diagram shown in FIG.

  That is, the CMRR and PSRR can be improved as compared with the fully differential feedback amplifier circuit 1a according to the comparative example shown in FIG.

(Third embodiment)
With reference to the circuit diagram shown in FIG. 10A, a schematic configuration of the fully-differential feedback amplifier circuit 1 according to the third embodiment will be described.

  The fully differential feedback amplifier circuit 1 according to the third embodiment includes an inverting input terminal 17 and a non-inverting input terminal 18 to which a differential input signal such as an audio signal is input, and a non-inverting output terminal that outputs an output signal. 15 and the inverting output terminal 16, the inverting input terminal 17, and the non-inverting input terminal 18, the differential input signals (Vi (−) and Vi (+)) are amplified to amplify the non-inverting output terminal 15 and the inverting output terminal 16. A first feedback circuit 20a and a second feedback circuit 20b for feeding back the output of the amplifier circuit 10 to the inverting input terminal 13 or the non-inverting input terminal 14, and the first feedback circuit 20a and the first feedback circuit 20a. A pair of the first feedback resistor Rf1 and the second feedback resistor Rf2 included in the two feedback circuit 20b, and the inverting input terminal 13 and the non-inverting input terminal 14 are connected in series. A pair of first input resistor Ri1 and second input resistor Ri2, a pair of first feedback resistor Rf1 and second feedback resistor Rf2, and a pair of first input resistor Ri1 and second input resistor Ri2. Switching means for switching at a predetermined timing.

  The switching means includes switching elements S9 to S14 that are turned on / off based on a predetermined switching frequency.

  As shown in FIG. 10A, specific switching elements S9 to S14 in the fully differential feedback amplifier circuit 1 are ninth switching elements connected between the inverting input terminal 17 and the first input resistor Ri1. S10, a tenth switching element S10 having one end connected to the seventh node N7 on the inverting input terminal 17 side of the first feedback circuit 20a and the other end connected to the inverting input terminal 17 side of the amplifier circuit 10, and an amplifier circuit And an eleventh switching element S11 connected between the non-inverting output terminal 15 side and the first feedback circuit 20a, and a twelfth switching element connected between the non-inverting input terminal 18 and the second input resistor Ri2. A thirteenth switched switch having one end connected to S12 and the eighth node N8 on the non-inverting input terminal 18 side of the second feedback circuit 20b and the other end connected to the non-inverting input terminal 18 side of the amplifier circuit 10 Comprising an element S13, and a fourteenth switching element S14 connected between the inverting output terminal 16 side of the amplifier circuit 10 and a second feedback circuit 20b.

  Further, as shown in FIG. 10A, the non-inverting output terminal 15 side and the inverting output terminal 16 side of the amplifier circuit 10 are provided with comparators 11 and 12 to which a triangular wave signal having a predetermined frequency is input. The eleventh switching element S11 and the fourteenth switching element S14 are turned on / off by the comparators 11 and 12.

  Note that the input signal Vi (−) is input to the inverting input terminal 17, the input signal Vi (+) is input to the non-inverting input terminal 18, and the output signal Vo (+) is inverted from the non-inverting output terminal 15. An output signal Vo (−) is output from the terminal 16.

  The control method using the triangular wave (TRI) for the comparators 11 and 12 is the same as that of the fully differential feedback amplifier circuit 1 according to the first embodiment (see FIG. 2 and the like).

  According to the fully differential feedback amplifier circuit 1 according to the third embodiment, an effect equal to or greater than that of the fully differential feedback amplifier circuit 1 according to the first embodiment can be obtained. That is, the CMRR and PSRR can be improved as compared with the case of the fully differential feedback amplifier circuit 1a as the comparison target shown in FIG.

(Modification of the third embodiment)
With reference to the circuit diagram shown in FIG. 10B, a schematic configuration of a modified example of the fully differential feedback amplifier circuit 1 according to the third embodiment will be described. In addition, about the structure similar to the circuit diagram shown to Fig.10 (a), the same code | symbol is attached | subjected and the overlapping description is abbreviate | omitted.

  In the circuit diagram shown in FIG. 10 (b), instead of the ninth switching element S9 and the twelfth switching element S12 in the circuit diagram shown in FIG. 10 (a), between the inverting input terminal 17 and the second input resistor Ri2. A switching element S22 is provided between the switching element S21, the non-inverting input terminal 18, and the first input resistor Ri1.

  Further, instead of the eleventh switching element S11 and the fourteenth switching element S14, the switching element S3a between the non-inverting output terminal 15 side of the comparator 11 and the first feedback circuit 20a, the inverting output terminal 16 of the comparator 12, and the first Switching element S3b between the feedback circuit 20a, switching element S6a between the inverting output terminal 16 of the comparator 12 and the second feedback circuit 20b, and between the non-inverting output terminal 15 side of the comparator 11 and the second feedback circuit 20b Switching element S6b is provided.

  The effect similar to that of the circuit diagram shown in FIG. 10A can be obtained by the circuit diagram shown in FIG.

  That is, the CMRR and PSRR can be improved as compared with the fully differential feedback amplifier circuit 1a according to the comparative example shown in FIG.

(Fourth embodiment)
With reference to the circuit diagram shown in FIG. 11A, a schematic configuration of the fully-differential feedback amplifier circuit 1 according to the fourth embodiment will be described.

  The fully differential feedback amplifier circuit 1 according to the fourth embodiment includes an inverting input terminal 17 and a non-inverting input terminal 18 to which a differential input signal such as an audio signal is input, and a non-inverting output terminal that outputs an output signal. 15 and the inverting output terminal 16, the inverting input terminal 17, and the non-inverting input terminal 18, the differential input signals (Vi (−) and Vi (+)) are amplified to amplify the non-inverting output terminal 15 and the inverting output terminal 16. A first feedback circuit 20a and a second feedback circuit 20b for feeding back the output of the amplifier circuit 10 to the inverting input terminal 13 or the non-inverting input terminal 14, and the first feedback circuit 20a and the first feedback circuit 20a. A pair of the first feedback resistor Rf1 and the second feedback resistor Rf2 included in the two feedback circuit 20b, and the inverting input terminal 13 and the non-inverting input terminal 14 are connected in series. A pair of first input resistor Ri1 and second input resistor Ri2, a pair of first feedback resistor Rf1 and second feedback resistor Rf2, and a pair of first input resistor Ri1 and second input resistor Ri2. Switching means for switching at a predetermined timing.

  The switching means includes switching elements S15 to S20 that are turned on / off based on a predetermined switching frequency.

  As shown in FIG. 11A, specific switching elements S15 to S20 in the fully differential feedback amplifier circuit 1 are fifteenth switching elements connected between the inverting input terminal 17 and the second input resistor Ri2. S15 and a sixteenth switching element S16 having one end connected to the ninth node N9 on the inverting input terminal 17 side of the first feedback circuit 20a and the other end connected to the non-inverting input terminal 18 side of the amplifier circuit 10, A seventeenth switching element S17 connected between the inverting output terminal 16 side of the circuit 10 and the second feedback circuit 20b, and an eighteenth switching element connected between the non-inverting input terminal 18 and the first input resistor Ri1. One end of S18 is connected to the tenth node N10 on the non-inverting input terminal 18 side of the second feedback circuit 20b, and the other end is connected to the inverting input terminal 17 side of the amplifier circuit 10. Comprising a switching element S19, and a second 20 switching element S20 connected between the non-inverting output terminal 15 side of the amplifier circuit 10 and the first feedback circuit 20a.

  Further, as shown in FIG. 11A, comparators 11 and 12 to which a triangular wave signal having a predetermined frequency is input are provided on the non-inverting output terminal 15 side and the inverting output terminal 16 side of the amplifier circuit 10. .

  The seventeenth switching element S17 and the twentieth switching element S20 are turned on / off by a clock signal (CLK).

  Note that the input signal Vi (−) is input to the inverting input terminal 17, the input signal Vi (+) is input to the non-inverting input terminal 18, and the output signal Vo (+) is inverted from the non-inverting output terminal 15. An output signal Vo (−) is output from the terminal 16.

  The control method using the triangular wave (TRI) for the comparators 11 and 12 is the same as that of the fully differential feedback amplifier circuit 1 according to the first embodiment (see FIG. 2 and the like).

  According to the fully differential feedback amplifier circuit 1 according to the fourth embodiment, an effect equal to or greater than that of the fully differential feedback amplifier circuit 1 according to the first embodiment can be obtained. That is, the CMRR and PSRR can be improved as compared with the case of the fully differential feedback amplifier circuit 1a as the comparison target shown in FIG.

(Modification of the fourth embodiment)
With reference to the circuit diagram shown in FIG. 11B, a schematic configuration of a modification of the fully-differential feedback amplifier circuit 1 according to the fourth embodiment will be described. In addition, about the structure similar to the circuit diagram shown to Fig.11 (a), the same code | symbol is attached | subjected and the overlapping description is abbreviate | omitted.

  In the circuit diagram shown in FIG. 11B, instead of the fifteenth switching element S15 and the sixteenth switching element S16 and the eighteenth switching element S18 and the nineteenth switching element S19 in the circuit diagram shown in FIG. The switching element S25 between the terminal 17 and the first input resistor Ri1, the switching element S26 between the non-inverting input terminal 18 and the second input resistor Ri2, the first input resistor Ri1 and the inverting input terminal 17 side of the amplifier circuit 10 And a switching element S28 between the second input resistor Ri2 and the non-inverting input terminal 18 side of the amplifier circuit 10.

  Further, instead of the eleventh switching element S11 and the fourteenth switching element S14, the switching element S3a between the non-inverting output terminal 15 side of the comparator 11 and the first feedback circuit 20a, the inverting output terminal 16 of the comparator 12, and the first Switching element S3b between the feedback circuit 20a, switching element S6a between the inverting output terminal 16 of the comparator 12 and the second feedback circuit 20b, and between the non-inverting output terminal 15 side of the comparator 11 and the second feedback circuit 20b Switching element S6b is provided.

  The switching elements S3a and S3b and the switching elements S6a and S6b are alternately turned on / off by a clock signal (CLK).

  The effect similar to that of the circuit diagram shown in FIG. 11A can be obtained by the circuit diagram shown in FIG.

  That is, the CMRR and PSRR can be improved as compared with the fully differential feedback amplifier circuit 1a according to the comparative example shown in FIG.

(Application examples)
The fully differential feedback amplifier circuit 1 according to the first to fourth embodiments can be used for audio amplifiers, speaker amplifiers, and various audio-related electrical devices.

[Other embodiments]
As described above, the embodiments have been described. However, it should be understood that the descriptions and drawings constituting a part of this disclosure are illustrative and do not limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

  As described above, the present invention includes various embodiments not described herein.

  For example, the first input resistor Ri1 and the second input resistor Ri2 may be switched at a predetermined timing by a switching element.

  The configuration of the present invention can also be applied to a switched capacitor.

  The fully differential feedback amplifier circuit of the present invention can be used in a class D amplifier, an audio amplifier equipped with the class D amplifier, a speaker amplifier, and various audio-related electrical devices.

DESCRIPTION OF SYMBOLS 1 ... Fully differential type feedback amplifier circuit C20, C21 ... Phase compensation capacitor | condenser N1-N10 ... Node Rf1 ... 1st feedback resistance Rf2 ... 2nd feedback resistance Ri1 ... 1st input resistance Ri2 ... 2nd input resistance S1-S26, S3a, S3b, S6a, S6b ... Switching element 10, 200 ... Amplifier circuit 11, 12 ... Comparator 13, 17 ... Inverting input terminal 14, 18, 100, 101 ... Non-inverting input terminal 15, 102 ... Non-inverting output terminal 16, 103 ... Inverting output terminals 20a, 201a ... First feedback circuit 20b, 201b ... Second feedback circuit

Claims (12)

An amplifier circuit that amplifies the differential input signal input to the inverting input terminal and the non-inverting input terminal and outputs the amplified signal to the inverting output terminal and the non-inverting output terminal;
A first feedback circuit and a second feedback circuit that feed back the output of the amplifier circuit to the inverting input terminal or the non-inverting input terminal;
A pair of a first feedback resistor and a second feedback resistor included in the first feedback circuit and the second feedback circuit;
A pair of a first input resistor and a second input resistor connected in series to the inverting input terminal and the non-inverting input terminal, respectively;
Switching means for switching at least one of the pair of the first feedback resistor and the second feedback resistor and at least one of the pair of the first input resistor and the second input resistor at a predetermined timing. Differential feedback amplifier circuit.   2. The fully differential feedback amplifier circuit according to claim 1, wherein the switching means is constituted by a switching element that is turned on / off based on a predetermined switching frequency. The switching means is
A first switching element having one end connected to the first node on the inverting input terminal side of the first feedback circuit and the other end connected to a second node on the inverting input terminal side of the amplifier circuit;
A second switching element having one end connected to the first node on the inverting input terminal side of the first feedback circuit and the other end connected to a third node on the non-inverting input terminal side of the amplifier circuit;
A third switching element connected between the non-inverting output terminal side of the amplifier circuit and the first feedback circuit;
A fourth switching element having one end connected to the fourth node on the non-inverting input terminal side of the second feedback circuit and the other end connected to a fifth node on the non-inverting input terminal side of the amplifier circuit;
A fifth switching element having one end connected to the fourth node on the non-inverting input terminal side of the second feedback circuit and the other end connected to a sixth node on the inverting input terminal side of the amplifier circuit;
A sixth switching element connected between the inverting output terminal side of the amplifier circuit and the second feedback circuit;
3. The fully differential feedback amplifier circuit according to claim 2, wherein the first switching element and the third switching element, and the fourth switching element and the sixth switching element are simultaneously turned on and off.   4. The fully differential feedback amplifier circuit according to claim 3, wherein the third switching element and the sixth switching element are turned on / off by a comparator to which a triangular wave signal having a predetermined frequency is input. The switching means is
A first switching element having one end connected to the first node on the inverting input terminal side of the first feedback circuit and the other end connected to a second node on the inverting input terminal side of the amplifier circuit;
A second switching element having one end connected to the first node on the inverting input terminal side of the first feedback circuit and the other end connected to a third node on the non-inverting input terminal side of the amplifier circuit;
A seventh switching element connected between the non-inverting output terminal side of the amplifier circuit and the second feedback circuit;
A fourth switching element having one end connected to the fourth node on the non-inverting input terminal side of the second feedback circuit and the other end connected to a fifth node on the non-inverting input terminal side of the amplifier circuit;
A fifth switching element having one end connected to the fourth node on the non-inverting input terminal side of the second feedback circuit and the other end connected to a sixth node on the inverting input terminal side of the amplifier circuit;
An eighth switching element connected between the inverting output terminal side of the amplifier circuit and the first feedback circuit;
3. The fully differential feedback amplifier circuit according to claim 2, wherein the second switching element and the seventh switching element, and the fifth switching element and the eighth switching element are simultaneously turned on and off.   6. The fully differential feedback amplifier circuit according to claim 5, wherein the seventh switching element and the eighth switching element are turned on / off by a comparator to which a triangular wave signal having a predetermined frequency is input. The switching means is
A ninth switching element connected between the inverting input terminal and the first input resistor;
A tenth switching element having one end connected to the seventh node on the inverting input terminal side of the first feedback circuit and the other end connected to the inverting input terminal side of the amplifier circuit;
An eleventh switching element connected between the non-inverting output terminal side of the amplifier circuit and the first feedback circuit;
A twelfth switching element connected between the non-inverting input terminal and the second input resistor;
A thirteenth switching element having one end connected to the eighth node on the non-inverting input terminal side of the second feedback circuit and the other end connected to the non-inverting input terminal side of the amplifier circuit;
The fully differential feedback amplifier circuit according to claim 2, further comprising: a fourteenth switching element connected between the inverting output terminal side of the amplifier circuit and the second feedback circuit.   8. The fully differential feedback amplifier circuit according to claim 7, wherein the eleventh switching element and the fourteenth switching element are turned on / off by a comparator to which a triangular wave signal having a predetermined frequency is input. The switching means is
A fifteenth switching element connected between the inverting input terminal and the second input resistor;
A sixteenth switching element having one end connected to the ninth node on the inverting input terminal side of the first feedback circuit and the other end connected to the non-inverting input terminal side of the amplifier circuit;
A seventeenth switching element connected between the inverting output terminal side of the amplifier circuit and the second feedback circuit;
An eighteenth switching element connected between the non-inverting input terminal and the first input resistor;
A nineteenth switching element having one end connected to the tenth node on the non-inverting input terminal side of the second feedback circuit and the other end connected to the inverting input terminal side of the amplifier circuit;
The fully differential feedback amplifier circuit according to claim 2, further comprising: a twentieth switching element connected between the non-inverting output terminal side of the amplifier circuit and the first feedback circuit.   10. The fully differential feedback amplifier circuit according to claim 9, wherein the seventeenth switching element and the twentieth switching element are turned on / off by a comparator to which a triangular wave signal having a predetermined frequency is input.   10. The fully differential feedback amplifier circuit according to claim 2, wherein the switching element includes any one of a transistor, an IGBT, a thyristor, and a triac. 10.   An electric device comprising the fully differential feedback amplifier circuit according to claim 1.

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