JP2013108180A - Substrate and method for producing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a substrate including an electroless plating layer, which solves a problem of abnormal precipitation due to decrease in stability of electroless palladium and excels in terms of cost more than ENIGAG; and a method for producing the same.SOLUTION: The method for producing a substrate includes a surface treatment plating layer-forming step which comprises: a first step of plating a gold (Au) layer 30 on a substrate provided with a circuit pattern 10; a second step of plating a palladium (Pd) layer 40 on the gold (Au) layer 30; and a third step of plating the gold (Au) layer 30 on the palladium (Pd) layer 40.

Description

  The present invention relates to a substrate and a manufacturing method thereof, and more particularly to a substrate including an electroless surface treatment plating layer and a manufacturing method thereof.

  Electroless plating is used in various fields because of its performance. In particular, noble metal electroless plating solutions are frequently used in the field of the most advanced electronic industries such as electronic parts and substrates due to their coating properties.

  In conventional electronic components and substrates, electroless nickel gold plating (ENIG), in which electroless nickel (Nickel) is applied on copper (Cu) wiring and gold (Au) plating is applied thereon, is known as Electroless Nickel Immersion Gold (ENIG). It is mainstream.

  Since this ENIG deposits gold on the nickel coating by substitution, there are many pin-holes in the gold coating, which causes corrosion of the nickel coating due to the substitution, resulting in poor solder connection and wire bonding connection. Often occurs.

  In order to compensate for such a defect, there is ENIGAG in which a thick gold plating film is formed on substitutional gold (Au). However, increasing the thickness of the gold leads to an increase in manufacturing cost, pinholes cannot be completely eliminated, and improvement in connection reliability compared to ENIG is not sufficient.

US Patent Application Publication No. 2009-0294962

  Further, there is ENEPIG in which autocatalytic electroless palladium (Palladium) is formed on electroless nickel and gold plating is performed thereon. This ENEPIG improves the connection reliability but uses self-catalyzed palladium, so the stability of the chemical itself is poor, and there is a risk of rough chemical precipitation, abnormal precipitation on non-conductive parts, and bath decomposition. There is.

  Furthermore, even if the additives are improved to increase the stability of the chemical, it is difficult to adjust the concentration of the stabilizer, and fluctuations in the concentration may cause unprecipitation or a decrease in the deposition rate. Advanced technology is required to secure it. Further, when a metal such as nickel or copper is immersed in an electroless palladium plating solution, a substitution reaction occurs between palladium ions of the metal, which causes poor adhesion.

  The present invention has been made in view of the above problems, and its purpose is to solve the problem of abnormal precipitation due to a decrease in the stability of electroless palladium, which is more advantageous in cost than ENIGAG. The object is to provide a substrate including an electroless plating layer.

  Another object of the present invention is to provide a method for manufacturing the substrate.

  In order to solve the above object, according to an embodiment of the present invention, a surface treatment comprising a gold (Au) layer / palladium (Pd) layer / gold (Au) layer on a substrate provided with a circuit pattern. A substrate comprising a plating layer is provided.

  According to an embodiment of the present invention, the circuit pattern is provided by copper (Cu) or silver (Ag).

  According to an embodiment of the present invention, the substrate includes an external connection terminal.

  The external connection terminal uses solder connection or wire bonding.

  According to an embodiment of the present invention, the surface treatment plating layer further includes a nickel (Ni) layer applied before forming a gold (Au) layer.

  According to an embodiment of the present invention, the thickness of the gold (Au) layer / palladium (Pd) layer / gold (Au) layer is 0.005 to 0.1 μm / 0.005 to 0.5 μm / 0. 0.005 to 0.2 μm.

  In order to solve the above object, according to another embodiment of the present invention, a first step of plating a gold (Au) layer on a substrate provided with a circuit pattern; A method for manufacturing a substrate, comprising: a second step of plating a palladium (Pd) layer; and a third step of plating a gold (Au) layer on the palladium (Pd) layer, and a surface treatment plating layer forming step. provide.

  According to an embodiment of the present invention, the gold (Au) layer is preferably formed by a displacement gold (Au) plating method.

  According to an embodiment of the present invention, the palladium (Pd) layer is preferably formed by an electroless plating method.

  According to an embodiment of the present invention, the plating of the palladium (Pd) layer is preferably performed under conditions of 0 to 100 ° C. and pH 2 to 14.

  According to an embodiment of the present invention, the plating of the palladium (Pd) layer is performed by coating with gold (Au) or an alloy of gold (Au), or an alloy of gold (Au) or gold (Au). It is desirable to use a product.

  The gold (Au) layer provided by the palladium (Pd) layer in the third step is preferably formed by a displacement-reduction plating method.

  According to an embodiment of the present invention, the method further includes forming a nickel (Ni) layer by plating before forming the gold (Au) layer by plating in the first step.

  The nickel (Ni) layer is formed by an electroless plating method.

  According to the present invention, in an independent wiring board having Cu or Ag wiring, displacement gold plating is performed directly on the wiring or after performing electroless nickel plating, and electroless palladium plating is formed thereon. Finally, by including the formation of a surface-treated plating layer that is a reduction type electroless gold plating, the problem of abnormal precipitation due to a decrease in the stability of conventional electroless palladium is solved, and at a lower cost than ENIGAG. There exists an effect that formation of a plating layer is possible.

It is sectional drawing which shows the structure of the surface treatment plating layer by one Embodiment of this invention. It is sectional drawing which shows the structure of the surface treatment plating layer by one Embodiment of this invention.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. Each embodiment shown below is given as an example so that the idea of the present invention can be sufficiently transmitted to those skilled in the art. Accordingly, the present invention is not limited to the embodiments described below, but can be embodied in other forms. In the drawings, the size and thickness of the device may be exaggerated for convenience. Like reference numerals refer to like elements throughout the specification.

  The terminology used herein is for the purpose of describing embodiments and is not intended to limit the invention. In this specification, the singular forms also include the plural unless specifically stated otherwise. As used herein, “includes” a stated component, step, action, and / or element does not exclude the presence or addition of one or more other components, steps, actions, and / or elements. I want you to understand.

  The present invention relates to a substrate including a surface treatment plating layer and a manufacturing method thereof.

  A substrate according to an embodiment of the present invention has a surface treatment plating layer structure including a gold (Au) layer / palladium (Pd) layer / gold (Au) layer on a substrate provided with a circuit pattern. is there.

  1 and 2 are cross-sectional views each showing a structure of a surface treatment plating layer according to an embodiment of the present invention. This embodiment will be described in detail with reference to these drawings.

  First, using an independent wiring board having a circuit pattern 10 of copper (Cu) or silver (Ag), the circuit pattern 10 was directly applied (FIG. 1) or electroless nickel plating 20 (FIG. 2). After that, substitution gold (Au) plating 30 is applied thereon, and electroless palladium (Pd) plating film 40 using a reducing agent with high catalytic properties is formed on the gold (Au), and finally substitution reduction gold (Au) 50 is deposited.

  Applications of the independent wiring board according to the present invention include, for example, a package substrate for mounting a semiconductor, an HDI substrate for mounting a component, a mother board such as a PC, etc., and also for external connection, component or semiconductor mounting All substrates having solder bumps and wire bonding terminals are included. As the final surface treatment of such a substrate, the plating layer of the present invention is used.

  According to an embodiment of the present invention, the circuit pattern 10 is formed of copper (Cu) or silver (Ag).

  According to an embodiment of the present invention, the substrate includes an external connection terminal (not shown) for connecting to an external component. The external connection terminal may use solder connection or wire bonding, but is not limited thereto.

  According to an embodiment of the present invention, as shown in FIG. 2, the surface treatment plating layer may further include a nickel (Ni) layer 20 applied before the gold (Au) layer 30 is formed.

  According to one embodiment of the present invention, the thickness of the gold (Au) layer 30 / palladium (Pd) layer 40 / gold (Au) layer 50 is 0.005-0.1 μm / 0.005-0.5 μm. /0.005-0.2 micrometer may be sufficient.

  The gold (Au) layer 30 is a substitution gold (Au) layer, and the thickness of the film is preferably between 0.005 and 0.1 μm. When the thickness is less than 0.005 μm, the deposition state of the substitutional gold (Au) layer 30 becomes discontinuous and becomes a film having defects, so that corrosion or unplated portions occur in the plating of the palladium (Pd) layer 40 in the subsequent process. Or cause poor adhesion. Further, if the thickness exceeds 0.1 μm, it is not preferable because large corrosion occurs on the surface of the copper surface 10 or the nickel layer 20 on the copper due to the substitutional gold (Au) layer 30, which causes poor adhesion or poor solder connection. .

  The palladium (Pd) layer 40 is preferably formed between 0.005 and 0.5 μm. When the thickness is less than 0.005 μm, the continuity of the film cannot be ensured. Therefore, in subsequent plating of the gold (Au) layer 50, local corrosion of the nickel layer 20 or the copper 10 or dissolution of the coating film of the palladium (Pd) layer 40 is not desirable. On the other hand, when the thickness exceeds 0.5 μm, an alloy layer that causes a decrease in strength is generated during solder bonding, so that the reliability of solder bonding is lowered and the cost is disadvantageous.

  Finally, a gold (Au) layer 50 is formed on the palladium (Pd) layer 40. A substitution gold plating solution may be used for the gold (Au) layer 50. The thickness of the gold (Au) layer 50 is preferably 0.005 to 0.2 μm. When the film thickness is less than 0.005 μm, it is difficult to ensure the continuity of the gold (Au) layer 50, which may cause wire bonding failure or solder wetting failure, and if it exceeds 0.2 μm There is no major problem in performance, but it is disadvantageous in terms of cost.

  Hereinafter, the manufacturing process of the substrate including the surface treatment plating layer forming step according to the present invention will be described in detail.

  The substrate manufacturing process of the present invention includes a first step of plating a gold (Au) layer on a substrate provided with a circuit pattern, and a second step of plating a palladium (Pd) layer on the gold (Au) layer. And a third step of plating the palladium (Pd) layer with a gold (Au) layer, and a surface treatment plating layer forming step.

  First, using substitution Au plating provided with a circuit pattern such as Cu or Ag, a film is formed directly or on a substrate subjected to electroless Ni plating. Cu or Ag wiring is manufactured using wiring manufactured by general electric Cu plating, wiring manufactured by etching, or a paste in which such metal is dispersed together with glass or binder resin. The wiring which was made is mentioned.

  In addition to general resins (glass, epoxy resin), the substrate according to the present invention uses a polymer film such as polyimide used for flexible substrates, or ceramics used in low temperature co-firing (LTCC). These may be selected and used appropriately.

  Substitution Au plating is performed directly on the wiring board or after electroless Ni is deposited, and this nickel (Ni) layer is formed by electroless plating. When implementing electroless Ni, you may use the electroless Ni for substrates generally used. The electroless Ni is not particularly limited, and can be formed with a film thickness or phosphorus content that is usually employed.

  The replacement Au plating may be a general replacement Au plating for Cu or Ni. Moreover, it is desirable that the film thickness of the replacement Au plating is 0.005 to 0.1 μm. Other conditions are good according to the use conditions of a commercially available replacement Au plating solution,

  In the second step, a palladium (Pd) layer is formed on the gold (Au) layer by plating. According to one embodiment of the present invention, the palladium (Pd) layer is desirably formed by an electroless plating method.

  The Pd plating solution used for the palladium (Pd) of the present invention is preferably not a conventional autocatalytic type, but a Pd plating solution using a reducing agent that reacts with a substrate exhibiting catalytic properties. This Pd plating solution contains a palladium salt, a complexing agent and a reducing agent.

  The concentration of the palladium salt used is also affected by the ratio with the complexing agent used, but it is usually desirable to use it in the range of 0.001 to 0.1 mol / L. If the concentration of the palladium salt is very low, the deposition rate decreases, and the film formation takes time. On the contrary, if it is very high, the loss due to Dragout is large, which is disadvantageous in terms of cost.

  In addition, the upper limit concentration of the complexing agent is not limited as to how much complex stability constant the complexing agent should have with respect to the palladium salt. The concentration is preferably 10 mol or more.

  Since the reducing agent has a high catalytic property with respect to the gold (Au) layer 30 as the underlayer, it is desirable to use a reducing agent with a low catalytic property with respect to palladium. Since the reducing agent according to the present invention has catalytic properties for Au, it emits electrons on Au. Therefore, the reduction reaction does not proceed without the gold (Au) layer 30.

  Therefore, according to an embodiment of the present invention, it is desirable to use an object to be plated coated with an alloy of gold (Au) or an alloy of gold (Au) for the plating of the palladium (Pd) layer. When the surface is other than the Au layer, the electron emission reaction of the reducing agent does not occur, or palladium and metal are replaced, causing various defects such as decomposition of the plating solution, decrease in the deposition rate, precipitation, or poor adhesion. It is.

  The concentration of the reducing agent is desirably 1 to 20 mol with respect to palladium ions. When the amount is less than 1 mol, the deposition rate of the plating is lowered, and the concentration change of the reducing agent is so severe that a stable plating thickness cannot be obtained. And when it exceeds 20 mol, stability falls by the raise of specific gravity, and it is disadvantageous also in cost.

  According to one embodiment of the present invention, the plating of the palladium (Pd) layer can be stably used as long as it does not freeze or boil at 0 to 100 ° C. Moreover, although it is desirable to implement on the conditions of pH 2-14, if it is less than pH 2, while the fall of complex stability and the potential increase of a reducing agent will arise, the depositability of plating will fall. On the other hand, when the pH exceeds 14, the reducing agent itself undergoes self-decomposition and the life of the liquid is shortened.

  In the present invention, a material that does not hinder the effect may be added to the plating solution. Examples of such materials include pH adjusters such as sodium hydroxide (NaOH) and sulfuric acid, pH buffers such as citric acid and glycine, surfactants, and indicator materials for analysis. Can be mentioned.

  Finally, a substituted reduced gold (Au) layer that is finally surface-treated is formed on the palladium (Pd) layer. This substitution reduction gold plating solution may use a commercially available chemical. However, the use of a “substitution gold plating solution” that is not a “substitution reduction gold plating solution” not only dissolves the underlying Pd film, but also corrodes the underlying Ni and Cu, so that the reliability of solder bonding can be improved. This is not desirable because it causes a decrease and poor adhesion.

In the present invention, the substrate can be pretreated before providing the surface treatment plating layer. As this pre-processing method, a conventional ordinary method may be used, but is not limited thereto. Similarly, the material of the substrate can be used with conventional lines, and there is no need to use special equipment.
<Example 1>

  After roughening the surface of the FR-4 double-sided substrate having a thickness of 0.2 mm, using a solder resist (SR), a solder pad of Φ0.5 mm, a wire bonding terminal of L / S = 50/30, and 20 × 20 mm A test substrate of a solder spread test pad was manufactured.

＜実施例２＞ The surface treatment plating layer of Au layer / Pd layer / Au layer was formed on the Cu wiring through the steps shown in Table 1 below. Each plating condition is as shown in Table 1 below.

<Example 2>

＜比較例１＞ A surface treatment plating layer of Ni layer / Au layer / Pd layer / Au layer was formed on the Cu wiring by the process shown in Table 2 below. Each plating condition is as shown in Table 2 below.

<Comparative Example 1>

＜比較例２＞ The surface treatment plating layer of the Au layer was formed on the Cu wiring by the process shown in Table 3 below. Each plating condition is as shown in Table 3 below.

<Comparative example 2>

＜実験例＞ The ENIG substrate manufactured by the process of Table 4 below was used as a comparative example. Each plating condition is as shown in Table 4 below.

<Experimental example>

  A wire bonding test (WBR) was performed after the surface-treated plating layer was formed according to the embodiment and the comparative example and after the heat treatment at 165 ° C. for 16 hours. Then, a 0.4 mm SAC305 solder ball was mounted on the solder ball pad and the solder spread test pad after flux application, and after reflow, the solder ball pull test (SIR) and the solder spread (wetting) diameter were measured. The results are shown in Table 5 below.

In the film thickness measurement, in the comparative example, measurement was performed immediately after plating using a fluorescent X-ray film thickness measurement system. Further, in the embodiment, a film thickness measurement substrate was prepared after each plating and measured with fluorescent X-rays.

  As can be seen from the results in Table 5 above, in the comparative example, it was recognized that the characteristics deteriorated when heat treatment was performed. In particular, in the case of Cu / Au (Comparative Example 1), 2nd bonding defects frequently occurred for WBR. Further, in ENIG of Comparative Example 2, it was recognized that wire bonding was difficult even after film formation (As plate).

  On the other hand, the surface-treated plated layer of the present invention has a characteristic that does not cause any problems not only after film formation (As plate) but also after heat treatment. Especially in solder wetting, ENEPIG More than twice the spread area was observed.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims, and is intended to include all modifications within the meaning and scope equivalent to the scope of claims.

DESCRIPTION OF SYMBOLS 10 Circuit pattern 20 Nickel (Ni) plating layer 30 Gold (Au) layer 40 Palladium (Pd) layer 50 Gold (Au) layer

Claims (14)

  A substrate comprising a surface treatment plating layer comprising a gold (Au) layer / palladium (Pd) layer / gold (Au) layer on a substrate provided with a circuit pattern.   The substrate according to claim 1, wherein the circuit pattern is formed of copper (Cu) or silver (Ag).   The board according to claim 1, wherein the board includes an external connection terminal.   The substrate according to claim 3, wherein the external connection terminal uses solder connection or wire bonding.   The substrate according to claim 1, wherein the surface treatment plating layer further includes a nickel (Ni) layer applied before forming a gold (Au) layer.   Each thickness of the gold (Au) layer / palladium (Pd) layer / gold (Au) layer is 0.005 to 0.1 μm / 0.005 to 0.5 μm / 0.005 to 0.2 μm. The substrate according to claim 1. A first step of plating a gold (Au) layer on a substrate provided with a circuit pattern;
A second step of plating a palladium (Pd) layer on the gold (Au) layer;
And a third step of plating a gold (Au) layer on the palladium (Pd) layer.   The substrate manufacturing method according to claim 7, wherein the gold (Au) layer is formed by a substitution gold (Au) plating method.   The substrate manufacturing method according to claim 7, wherein the palladium (Pd) layer is formed by an electroless plating method.   The substrate manufacturing method according to claim 7, wherein the plating of the palladium (Pd) layer is performed under conditions of 0 to 100 ° C. and pH 2 to 14.   The substrate manufacturing method according to claim 7, wherein plating of the palladium (Pd) layer uses an object to be plated coated with gold (Au) or an alloy of gold (Au).   The substrate manufacturing method according to claim 7, wherein the gold (Au) layer formed on the palladium (Pd) layer in the third step is formed by a displacement-reduction plating method.   The substrate manufacturing method according to claim 7, further comprising a step of plating a nickel (Ni) layer before forming the gold (Au) layer in the first step by plating.   The substrate manufacturing method according to claim 13, wherein the nickel (Ni) layer is formed by an electroless plating method.

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