KR20130056629A - Substrate and method for preparing the same - Google Patents

Abstract

PURPOSE: A substrate and a manufacturing method thereof are provided to improve stability of electroless palladium by including a surface plating layer which is plated with reduced electroless gold on wirings of the substrate. CONSTITUTION: A substrate includes a circuit pattern(10), a nickel layer(20), a gold layer(30), a palladium layer(40), and a surface gold plating layer(50). The circuit pattern is formed with copper or silver. The substrate includes a connection terminal to the outside. The connection terminal is formed by solder bonding or wire bonding.

Description

Substrate and method for preparing the same

The present invention relates to a substrate and a method for manufacturing the same, and more particularly, to a substrate including an electroless surface treatment plating layer and a method for manufacturing the same.

Electroless plating has been used in various fields for its performance. In particular, electroless plating solutions of noble metals are widely used in the high-tech electronic industry such as electronic components and substrates due to their film properties.

In conventional electronic components and boards, electroless nickel is applied on copper (Cu) wiring, and gold (Au) plating thereon is called electroless nickel immersion gold (ENIG). Is mainstream.

Since the ENIG precipitates gold by substitution on the nickel film, the gold film has many pin-holes, and corrosion of the nickel film due to substitution becomes a problem, and solder connection or wire bonding connection defects frequently occur. do.

In order to compensate for the drawback, there is ENIGAG, which has formed a thick gold plating on the substitutional gold (Au). However, since the thickening of gold leads to an increase in cost and pinholes cannot be completely eliminated, improvement in connection reliability is inferior to that of ENIG.

There is also ENEPIG, which forms a self-catalyzed electroless palladium on electroless nickel and gold-plats thereon. Although the connection reliability improves, since the self-catalytic palladium is used, the chemicals themselves have poor stability, and the chemicals are precipitated crudely, abnormally precipitated into non-conductive portions, and bath decomposition occurs.

And even if it adds the improvement to improve stability by an additive, it requires a considerable technique to stably use it by making it difficult to adjust a stabilizer concentration, a non-precipitation, a precipitation rate fall, etc. by concentration fluctuations. In addition, when immersing a metal such as nickel or copper in the electroless palladium plating solution, a substitution reaction occurs between the palladium ions of the metals, causing poor adhesion.

In the present invention to solve the problems of the prior art in forming the electroless plating layer when manufacturing the substrate as described above, the object of the present invention is to solve the problem of abnormal precipitation due to the stability of the electroless palladium, cost aspect than ENIGAG To provide a substrate comprising an electroless plating layer having an excellent effect.

Another object of the present invention is to provide a method for producing the substrate.

The present invention for achieving the above object provides a substrate including a surface treatment plating layer of a gold (Au) layer / palladium (Pd) layer / gold (Au) layer on a substrate on which a circuit pattern is formed.

According to an embodiment of the present invention, the circuit pattern may be formed of copper (Cu) or silver (Ag).

According to an embodiment of the present invention, the substrate may include an external connection terminal.

The external connection terminal may be one using solder connection or wire bonding.

According to an embodiment of the present invention, the surface treatment plating layer may further include a nickel (Ni) layer before the gold (Au) layer is formed.

According to one embodiment of the invention, the thickness of the gold (Au) layer / palladium (Pd) layer / gold (Au) layer may be 0.005 ~ 0.1㎛ / 0.005 ~ 0.5㎛ / 0.005 ~ 0.2㎛.

In order to achieve another object of the present invention, a first step of plating a gold (Au) layer on a substrate on which a circuit pattern is formed, a second step of plating a palladium (Pd) layer on the gold (Au) layer, and the palladium ( It provides a substrate manufacturing method comprising the step of forming a surface treatment plating layer of the third step of plating a gold (Au) layer on the Pd) layer.

According to one embodiment of the invention, the gold (Au) layer is preferably formed by a substitutional gold (Au) plating method.

According to one embodiment of the invention, the palladium (Pd) layer is preferably formed by an electroless plating method.

According to one embodiment of the invention, the plating of the palladium (Pd) layer is preferably carried out under the conditions of 0 ~ 100 ℃, pH 2 ~ 14.

According to an embodiment of the present invention, the plating of the palladium (Pd) layer using a plating material coated with an alloy of gold (Au) or gold (Au) or an alloy of gold (Au) or gold (Au). It is preferable.

The gold (Au) layer formed on the palladium (Pd) layer of the third step is preferably formed by a substitution-reduction plating method.

According to an embodiment of the present disclosure, the method may further include plating a nickel (Ni) layer before plating the gold (Au) layer of the first step.

The nickel (Ni) layer may be formed by an electroless plating method.

According to the present invention, in an independent wiring board having Cu or Ag wiring, after performing direct or electroless nickel plating on the wiring, substitution gold plating is carried out, and electroless palladium plating is formed thereon, and finally the reduction type. The substrate including the electroless gold plated surface treatment plating layer solves the problem of abnormal precipitation due to the deterioration of stability of the electroless palladium, which is a conventional problem, and has the effect of forming the plating layer even at a lower cost than ENIGAG.

1 and 2 are structures of a surface treatment plating layer according to an embodiment of the present invention.

Hereinafter, the present invention will be described in more detail.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a,""an," and "the" include singular forms unless the context clearly dictates otherwise. Also, as used herein, "comprise" and / or "comprising" specifies the presence of the mentioned shapes, numbers, steps, actions, members, elements and / or groups of these. It is not intended to exclude the presence or the addition of one or more other shapes, numbers, acts, members, elements and / or groups.

The present invention relates to a substrate comprising a surface treatment plating layer and a method of manufacturing the same.

A substrate according to an embodiment of the present invention is characterized by having a surface treatment plating layer structure of a gold (Au) layer, a palladium (Pd) layer, and a gold (Au) layer on a substrate on which a circuit pattern is formed.

1 and 2 show the structure of the surface treatment plating layer according to an embodiment of the present invention, which will be described in detail with reference to this.

First, an independent wiring board having a copper (10, Cu) or silver (Ag) circuit pattern is used to directly (FIG. 1) or electroless nickel plating (FIGS. 2, 20) on the circuit pattern, and then thereon. Substituted gold (Au) plating 30 is carried out, and an electroless palladium (Pd) plating film 40 is formed by using a reducing agent having a high catalytic property on the gold (Au), and finally, substituted reduced gold (Au) It has a structure of forming 50 into a film.

The use of the independent wiring board according to the present invention is a package board for mounting a semiconductor, an HDI board for mounting a component, a mother board such as a PC, and the like, and solder bumps or wire bonding (for external connection, components, or semiconductor mounting) All boards with wire bonding) terminals are included. As the final surface treatment of such a substrate, the plating layer of the present invention is used.

According to an embodiment of the present invention, the circuit pattern 10 may be formed of copper (Cu) or silver (Ag).

According to an embodiment of the present invention, the substrate may include an external connection terminal (not illustrated separately in the drawing) for connection with an external component. The external connection terminal may be to use a solder connection or wire bonding, the kind is not particularly limited.

According to one embodiment of the present invention, as shown in FIG. 2, the surface treatment plating layer may further include a nickel (Ni) layer 20 before the gold (Au) layer 30 is formed.

According to one embodiment of the present invention, the thickness of the gold (Au) layer 30 / palladium (Pd) layer 40 / gold (Au) layer 50 is 0.005 ~ 0.1㎛ / 0.005 ~ 0.5㎛ / 0.005 ˜0.2 μm.

The gold (Au) layer 30 is a substituted gold (Au) layer, and the thickness of the film is preferably formed between 0.005 and 0.1 µm. If the thickness of the substituted gold (Au) layer is less than 0.005 µm, the film formation state of the substitutional gold (Au) layer becomes discontinuous and has a significant defect. Therefore, corrosion or unplating occurs in the plating of the palladium (Pd) layer 40 in the next step, or adhesion It may cause a defect. When the thickness exceeds 0.1 µm, large corrosion occurs on the surface of the copper surface 10 or the surface of the nickel layer 20 on the copper by the substitutional gold (Au) layer 30, which is a cause of poor adhesion or poor solder connection. Can not do it.

In addition, the palladium (Pd) layer 40 is preferably formed between 0.005 ~ 0.5㎛. If the thickness is less than 0.005 μm, the continuity of the film cannot be ensured, and the local corrosion of the nickel layer 20 or copper 10 or the palladium (Pd) layer 40 film in the next gold (Au) layer 50 plating is performed. Dissolution may occur, which is undesirable. Moreover, when exceeding 0.5 micrometer, since the alloy layer which becomes a cause of a strength fall at the time of solder joining arises, solder joint reliability falls and it is disadvantageous also in cost.

Finally, an Au layer 50 is formed on the palladium (Pd) layer 40. The gold (Au) layer 50 may use a substituted gold plating solution, and the thickness of the gold (Au) layer 50 is preferably 0.005 to 0.2 μm. If the film thickness is less than 0.005 μm, it is difficult to secure the continuity of the Au layer 50, and it may cause wire bonding defects or solder wetting defects. Is not costly.

Hereinafter, the manufacturing process of the substrate including the surface treatment plating layer forming step according to the present invention will be described in detail.

The substrate manufacturing process of the present invention is a first step of plating a gold (Au) layer on a substrate on which a circuit pattern is formed, a second step of plating a palladium (Pd) layer on the gold (Au) layer, and the palladium (Pd) And forming a surface treatment plating layer of a third step of plating the gold (Au) layer on the layer.

First, a film is formed on a substrate directly or electroless Ni plated using a substrate-substituted Au plating on which a circuit pattern such as Cu or Ag is formed. Cu and Ag wirings are wirings made by general electric Cu plating, wirings made by etching, or the like, or wirings made by using a paste in which these metals are dispersed together with glass or binder resin.

In addition to the general resin (glass, epoxy resin), the substrate according to the present invention may be a polymer film such as polyimide used for a flexible substrate, or a ceramic used in low temperature co-firing (LTCC). Can be.

After depositing electroless Ni directly or on the wiring board, substituted Au plating is performed, and the nickel (Ni) layer may be formed by an electroless plating method. When electroless Ni is performed, the electroless Ni for board | substrates generally used can be used. Although there is no big restriction | limiting about this electroless Ni, it forms into a film by the film thickness and phosphorus content rate conventionally employ | adopted.

As the substituted Au plating to be used, commercially available substituted Au plating for Cu or Ni can be used. Moreover, it is preferable that the film thickness of substituted Au plating is 0.005-0.1 micrometer. Other conditions may follow the conditions of use of a commercially available substituted Au plating solution.

In the second step, the gold (Au) layer is plated with a palladium (Pd) layer. According to an embodiment of the present invention, the palladium (Pd) layer is preferably formed by an electroless plating method.

The Pd plating solution used for the palladium (Pd) of the present invention is preferably a Pd plating solution using a reducing agent that reacts with a substrate exhibiting catalytic properties, rather than a conventional autocatalytic type. The Pd plating solution may include a palladium salt, a complexing agent, and a reducing agent.

The concentration of the palladium salt to be used is also influenced by the ratio with the complexing agent to be described, but is preferably used in the range of 0.001 to 0.1 mol / L. If the concentration of the palladium salt is too low, the precipitation rate is lowered and the film formation takes time. Conversely, if it is too high, the loss due to drag out is large and it is disadvantageous for cost.

In addition, the complexing agent should have some degree of complex stability constant for the palladium salt. Although the upper limit concentration of the said complexing agent is not fixed, it is preferable to set it as the density | concentration of 10 mol or more with respect to palladium ion.

Since the reducing agent has high catalytic property with respect to the gold (Au) layer 30 which is an underlayer, it is preferable to use a thing with low catalytic property with respect to palladium. The reducing agent according to the invention releases electrons on Au because of the catalytic properties to Au. Therefore, the reduction reaction does not proceed without the gold (Au) layer 30.

Therefore, according to one embodiment of the present invention, the plating of the palladium (Pd) layer is gold (Au) or an alloy of gold (Au), or a coating material coated with an alloy of gold (Au) or gold (Au) It is preferable to use. When the surface is other than the Au layer, electron emission reaction of the reducing agent does not occur, or palladium and metal are substituted to cause various defects such as decomposition of the plating solution, lowering of the deposition rate, precipitation and poor adhesion.

The concentration of the reducing agent is preferably used in 1 to 20 mol relative to the palladium ions. If it is less than 1 mole, the deposition rate of the plating decreases, and the concentration change of the reducing agent is severe, and a stable plating thickness cannot be obtained. And when it exceeds 20 mol, stability will fall by specific gravity increase, and it is also disadvantageous for cost.

According to one embodiment of the present invention, the plating of the palladium (Pd) layer can be used stably, as long as it does not freeze or boil under the conditions of 0 ~ 100 ℃. Moreover, although it is preferable to carry out on the conditions of pH 2-14, below 2, the precipitation stability of plating falls with the fall of a complex stability and the raise of the potential of a reducing agent. If it exceeds 14, the reducing agent itself causes self-decomposition, and the life of the liquid is shortened.

In addition, in this invention, you may add the substance which does not disturb the effect separately to a plating liquid. For example, pH adjusters, such as sodium hydroxide (NaOH) and sulfuric acid, pH buffers, such as citric acid and glycine, surfactant, analytical indicator substance, etc. are mentioned.

Finally, forming a substituted reduction gold (Au) layer on the palladium (Pd) layer is the final surface treatment. The substituted reduced gold plating solution may use a commercially available chemical. However, the use of a substitution gold plating solution other than the substitution reduction gold plating solution is not preferable because it not only dissolves the underlying Pd film but also corrodes the underlying layer Ni and Cu, resulting in a decrease in solder joint reliability and poor adhesion.

In this invention, a board | substrate can be preprocessed before forming the said surface treatment plating layer, The pretreatment method can use a conventional method conventionally, It does not specifically limit. In addition, since the material of the board | substrate is the same, a facility etc. are fully compatible with a conventional line, and it does not need to use a special facility etc., for example.

Hereinafter, preferred embodiments of the present invention will be described in detail. The following examples are intended to illustrate the present invention, but the scope of the present invention should not be construed as being limited by these examples. In the following examples, specific compounds are exemplified. However, it is apparent to those skilled in the art that equivalents of these compounds can be used in similar amounts.

Example  One

After adjusting the surface of the FR-4 double-sided board having a thickness of 0.2 mm, the solder pad (SR) uses a solder resist (SR) of φ0.5 mm, a wire bonding terminal of L / S = 50/30, and a solder spread test pad of 20 × 20 mm. Test substrate was prepared.

A surface treatment plating layer of Au layer / Pd layer / Au layer was formed on the Cu wiring through the process as shown in Table 1 below. Each plating condition is described in Table 1 below.

fair Temperature (℃) Processing time (minutes) Film thickness (占 퐉) Degreasing 45 5 - Soft-etching 25 One - Substituted Au Plating 85 3 0.05 Electroless Pd Plating 30 10 0.05 Substitution Reduction Au Plating 80 20 0.1

Example  2

The surface treatment plating layer of Ni layer / Au layer / Pd layer / Au layer was formed on Cu wiring using the process of following Table 2. Each plating condition is described in Table 2 below.

fair Temperature (℃) Processing time (minutes) Film thickness (占 퐉) Degreasing 45 5 - Soft-etching 25 One - Catalyzing 40 3 - Electroless Ni Plating 80 20 5.0 Substituted Au Plating 85 10 0.05 Electroless Pd Plating 60 10 0.2 Substitution Reduction Au Plating 80 20 0.1

Comparative example  One

The surface treatment plating layer of the Au layer was formed on the Cu wiring by the following Table 3 process. Each plating condition is described in Table 3 below.

fair Temperature (℃) Processing time (minutes) Film thickness (占 퐉) Degreasing 45 5 - Soft-etching 25 One - Substitution Reduction Au Plating 85 25 0.2

Comparative example  2

The ENIG substrate prepared using the following Table 4 process was used as a comparative example. Each plating condition is described in Table 4 below.

fair Temperature (℃) Processing time (minutes) Film thickness (占 퐉) Degreasing 45 5 - Soft-etching 25 One - Catalyst 40 3 - Electroless Ni Plating 80 20 5.0 Substitution Reduction Au Plating 85 10 0.05

Experimental Example

According to the said Example and the comparative example, the wire bonding test (WBR) was done after film-forming a surface treatment plating layer and after heat processing for 16 hours at 165 degreeC. The 0.4 mm SAC 305 solder ball was mounted on the solder ball pad and the solder spread test pad after flux application, and after reflow, the solder ball pull test (SJR) and the solder spread diameter were measured. The results are shown in Table 5 below.

In the film thickness measurement, the comparative example was measured immediately after plating using a fluorescent X-ray film thickness meter, and the Example prepared the film thickness measuring substrate after each plating, and measured it by fluorescent X-ray.

After deposition (As plate) After heat treatment Wetting WBR SJR Wetting WBR SJR Example 1 Good Good Good Good Good Good Example 2 Good Good Good Good Good Good Comparative Example 1 (Cu / Au) Good Good Good Good Bad Bad Comparative Example 2 (ENIG) Good Bad Good Bad Bad Bad

As in the results of Table 5, the comparative example was observed to deteriorate characteristics when subjected to heat treatment. In particular, in case of Cu / Au (Comparative Example 1), 2nd bonding defects were frequently caused with respect to WBR. In addition, in ENIG of Comparative Example 2, it was found that wire bonding was difficult even after the film formation (As plate).

In contrast, the surface-treated plating layer of the present invention has a problem-free characteristic after film formation (As plate) and even after heat treatment, and in particular, in solder wetting, a spread area of twice or more of ENPIG has been observed.

10: circuit pattern
20: nickel (Ni) plating layer
30: Au layer
40: palladium (Pd) layer
50: Au layer

Claims (14)

A substrate comprising a surface treatment plating layer of a gold (Au) layer, a palladium (Pd) layer, and a gold (Au) layer on a substrate on which a circuit pattern is formed.
The method of claim 1,
The circuit pattern is formed of copper (Cu) or silver (Ag).
The method of claim 1,
And the substrate includes an external connection terminal.
The method of claim 3,
Wherein the external connection terminal uses solder connection or wire bonding.
The method of claim 1,
The surface treatment plating layer further comprises a nickel (Ni) layer before forming a gold (Au) layer.
The method of claim 1,
The thickness of the gold (Au) layer / palladium (Pd) layer / gold (Au) layer is 0.005 ~ 0.1㎛ / 0.005 ~ 0.5㎛ / 0.005 ~ 0.2㎛.
A first step of plating a gold layer on a substrate on which a circuit pattern is formed,
A second step of plating a palladium (Pd) layer on the gold (Au) layer, and
And forming a surface treatment plating layer of a third step of plating a gold (Au) layer on the palladium (Pd) layer.
The method of claim 7, wherein
The gold (Au) layer is a substrate manufacturing method that is formed by a substitutional gold (Au) plating method.
The method of claim 7, wherein
The palladium (Pd) layer is formed by an electroless plating method. The method of claim 7, wherein
Plating of the palladium (Pd) layer is a method of producing a substrate that is carried out under the conditions of 0 ~ 100 ℃, pH 2 ~ 14.
The method of claim 7, wherein
The plating of the palladium (Pd) layer is a method of manufacturing a substrate using a plated material coated with gold (Au) or an alloy of gold (Au), or gold (Au) or an alloy of gold (Au).
The method of claim 7, wherein
The gold (Au) layer formed on the palladium (Pd) layer of the third step is formed by a substitution-reduction plating method.
The method of claim 7, wherein
And plating a nickel (Ni) layer before plating the gold (Au) layer of the first step.
The method of claim 13,
The nickel (Ni) layer is a substrate manufacturing method that is formed by the electroless plating method.

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