JP2013097093A - Electro-optical device and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electro-optical device capable of easily and reliably inspecting in which storage capacitor a defect occurs even when a plurality of storage capacitors electrically connected in parallel to one another is laminated, and further to provide an electronic apparatus provided with the electro-optical device.SOLUTION: In an electro-optical device 100, a storage capacitor 70 is formed by a first storage capacitor 70a and a second storage capacitor 70b electrically connected in parallel to each other, and the first storage capacitor 70a and the second storage capacitor 70b constitute a laminated structure. Further, between an end of an element substrate 10 and an image display region, a first capacitor inspection terminal pair electrically connected to a first inspection capacitor and a second capacitor inspection terminal pair electrically connected to a second inspection capacitor are provided while the first inspection capacitor provided with the same layer structure as that of the first storage capacitor 70a and the second inspection capacitor provided with the same layer structure as that of the second storage capacitor 70b are being formed.

Description

  The present invention relates to an electro-optical device such as a liquid crystal device, and an electronic apparatus including the electro-optical device.

  Among various electro-optical devices, for example, a liquid crystal device includes a pixel electrode that drives an electro-optical material layer with a common electrode, and a pixel that includes a pixel transistor provided corresponding to the pixel electrode. . In a liquid crystal device, a storage capacitor is provided for a pixel electrode, and the potential of the pixel electrode is held by the storage capacitor, thereby improving contrast and reducing flicker in a display image.

  In addition, a technique has been proposed in which a plurality of storage capacitors are stacked and the storage capacitors are electrically connected in parallel to increase the capacity (see Patent Documents 1 and 2).

  Specifically, as shown in FIG. 9, the first storage capacitor 70 a is formed by the first electrode 71 and the second electrode 72 that overlaps the first electrode 71 on the lower layer side via the first dielectric layer 75. The second storage capacitor 70b is formed by the first electrode 71 and the third electrode 73 overlapping the first electrode 71 on the upper layer side via the second dielectric layer 76, and the second electrode 72 and the second electrode A structure in which the three electrodes 73 are electrically connected has been proposed.

JP 2000-284722 A JP 2002-123192 A

  However, when a structure in which a plurality of electrodes are stacked via a thin dielectric layer as in the configuration shown in FIG. 9 is adopted, problems such as short circuits and a decrease in withstand voltage are likely to occur. In the configuration, since the second electrode 72 and the third electrode 73 are conductive, there is a problem between the first electrode 71 and the second electrode 72 or between the first electrode 71 and the third electrode 73. There is a problem that it is not possible to inspect whether or not it has occurred.

  In view of the above problems, an object of the present invention is to easily and reliably inspect which holding capacitor has a defect even when a plurality of holding capacitors electrically connected in parallel are stacked. It is an object of the present invention to provide an electro-optical device that can be used and an electronic apparatus including the electro-optical device.

  In order to solve the above problems, the present invention provides an image of a pixel electrode provided on one side of a substrate, a storage capacitor for holding the potential of the pixel electrode, and a switching element provided corresponding to the pixel electrode. An electro-optical device having a display area, wherein the storage capacitor includes a first electrode and a second electrode that overlaps the first electrode on the substrate side through a first dielectric layer. A holding capacitor, a second holding composed of the first electrode, and a third electrode overlapping the second electrode on the opposite side of the substrate with respect to the first electrode and conducting with the second electrode A first capacitor for inspection having the same layer structure as the first storage capacitor, and the same as the second storage capacitor between the edge of the substrate and the image display area A second capacitor for inspection having a layer structure, and a power source connected to the first capacitor for inspection. And having with the first capacitor inspection terminal pair for connecting to a second capacitor terminals for inspection pair electrically connected to the second capacitor the test, the.

  In the present invention, the storage capacitor is formed by the first storage capacitor and the second storage capacitor electrically connected in parallel, and the first storage capacitor and the second storage capacitor are stacked. . For this reason, the storage capacitor has a large capacitance even when the occupied area is small. Here, between the edge of the substrate and the image display area, the first capacitor for inspection having the same layer structure as the first storage capacitor and the inspection having the same layer structure as the second storage capacitor A first capacitance inspection terminal pair electrically connected to the first inspection capacitor and a second capacitance inspection terminal pair electrically connected to the second inspection capacitor are formed while the second capacitance is formed. Is provided. For this reason, if the first capacitor inspection terminal pair is used, the inspection first capacitor can be inspected. According to the inspection result, the first storage capacitor is not affected by the second storage capacitor. Characteristics such as short circuit and withstand voltage can be grasped. In addition, if the second capacitor inspection terminal pair is used, the inspection second capacitor can be inspected. According to the inspection result, the second storage capacitor is short-circuited without being affected by the first storage capacitor. And characteristics such as withstand voltage. Therefore, when a problem such as a short circuit or a decrease in withstand voltage occurs in the storage capacitor, it is possible to easily and reliably inspect which one of the first storage capacitor and the second storage capacitor has occurred. Therefore, since the inspection result can be appropriately fed back to the manufacturing process or the like, it is possible to appropriately take measures against the malfunction.

  In the present invention, between the image display area of the substrate and the edge of the substrate, the first electrode for first capacitance inspection located in the same layer as the first electrode, and the same as the second electrode A first capacitor inspection second electrode that constitutes the inspection first capacitor over the first dielectric layer via the first dielectric layer, and is identical to the third electrode A first electrode for capacitance inspection that overlaps the first electrode for capacitance inspection via the second dielectric layer, and a second capacitance inspection first electrode located in the same layer as the first electrode. A second electrode for capacitance inspection that overlaps the first electrode for capacitance inspection via the first dielectric layer in the same layer as the second electrode, and the same layer as the third electrode And a second capacitance test for constituting the second capacitance for inspection overlapping the first electrode for the second capacitance inspection via the second dielectric layer. 3 electrodes, and the first capacitance inspection terminal pair is connected to the first capacitance inspection first terminal electrically connected to the first capacitance inspection first electrode and the first capacitance inspection second electrode. A second terminal for capacitance inspection, and the second pair of capacitance inspection terminals are connected to the second electrode for second capacitance inspection, and the second terminal for capacitance inspection. It is preferable to include a second terminal for capacitance inspection that is electrically connected to the first electrode for capacitance inspection. With this configuration, both the first capacitor for inspection and the second capacitor for inspection have a structure in which a dielectric layer is interposed between each of the three electrodes, as in the case of the storage capacitor. When a failure occurs in the first holding capacitor of the capacitor, a failure is likely to occur in the first capacitor for inspection, and when a failure occurs in the second holding capacitor of the holding capacitor, a failure is likely to occur in the second capacitor for inspection. . Therefore, it is possible to reliably grasp the cause of the defect in the storage capacitor by the inspection of the first inspection capacitor and the second inspection capacitor.

  In this case, the first capacitor inspection first terminal is electrically connected to the first capacitor inspection first electrode and the first capacitor inspection third electrode, and the second capacitor inspection second terminal is connected to the first capacitor inspection first terminal. It is preferable that the first electrode for two-capacity inspection and the second electrode for second-capacity inspection are electrically connected. With this configuration, when the first capacitor for inspection is inspected, the first electrode for first capacitor inspection and the third electrode for first capacitor inspection are at the same potential, so the inspection of the first capacitor for inspection is performed. The electrical influence of the third electrode for first capacitance inspection does not affect the result. In addition, since the second capacitor inspection first electrode and the second capacitor inspection second electrode are at the same potential when the inspection second capacitor is inspected, the second inspection result of the inspection second capacitor is second. The electrical influence of the second electrode for capacity inspection is not exerted.

  In the present invention, between the image display area of the substrate and the edge of the substrate, the first electrode for inspection located in the same layer as the first electrode and the same layer as the second electrode are provided. A second electrode for inspection constituting the first capacitor for inspection overlapping the first electrode for inspection via the first dielectric layer, and the second dielectric layer formed of the same layer as the third electrode. A third electrode for inspection that constitutes the second capacitor for inspection overlapping with the first electrode for inspection, a first terminal for inspection conducted to the first electrode for inspection, and a second electrode for inspection A second terminal for inspection that conducts and a third terminal for inspection that conducts to the third electrode for inspection, and the first capacitance inspection terminal pair includes the first electrode for inspection and the second inspection terminal. And the second capacitance inspection terminal pair includes a first electrode for inspection and a third electrode for inspection. It is preferred that are configured me. With this configuration, both the first capacitor for inspection and the second capacitor for inspection are configured by a part of the three electrodes that are overlapped with each other via the dielectric layer, like the storage capacitor. Therefore, it is possible to reliably grasp the state of the malfunction in the storage capacitor by the inspection of the first capacity for inspection and the second capacity for inspection. Further, when the inspection first capacitor is inspected, if the inspection first electrode and the inspection third electrode are made to have the same potential via a probe or the like, the inspection third electrode is included in the inspection result of the inspection first capacitor. The electrical influence of is not affected. Further, when the inspection second capacitor is inspected, if the inspection first electrode and the inspection second electrode are set to the same potential through a probe or the like, the inspection second electrode is included in the inspection result of the inspection second capacitor. The electrical influence of is not affected.

  The electro-optical device according to the invention can also be defined as follows. In other words, the electro-optical device according to the present invention is provided corresponding to the pixel electrode provided in the image display region on one side of the substrate, the storage capacitor that holds the potential of the pixel electrode, and the pixel electrode. A switching element; a first inspection element provided between the end of the substrate and the image display region in plan view; and a switch between the end of the substrate and the image display region in plan view. A second inspection element, and the storage capacitor includes a first electrode, a first dielectric layer provided between the first electrode and the substrate, and the substrate on the substrate side of the first electrode. A first storage capacitor constituted by a second electrode provided via a first dielectric layer; the first electrode; a second dielectric layer provided on the opposite side of the substrate of the first electrode; A third electrode provided on the opposite side of the first electrode from the substrate via the second dielectric layer The first storage element is formed in the same layer as the first dielectric layer and the fourth electrode formed in the same layer as the first electrode. A third dielectric layer formed on the same layer as the second electrode, the fifth electrode formed on the substrate side of the fourth electrode via the third dielectric layer, and the second electrode A fourth dielectric layer formed in the same layer as the dielectric layer, and formed in the same layer as the third electrode, and on the opposite side of the fourth electrode from the substrate via the fourth dielectric layer A sixth terminal formed; a first terminal electrically connected to the fourth electrode; and a second terminal electrically connected to the fifth electrode, wherein the fourth electrode, A first capacitor is constituted by three dielectric layers and the fifth electrode, and the second inspection element is a seventh electrode formed in the same layer as the first electrode. A fifth dielectric layer formed on the same layer as the first dielectric layer, and a fifth dielectric layer formed on the same layer as the second electrode, wherein the fifth dielectric layer is disposed on the substrate side of the seventh electrode. An eighth electrode formed on the substrate, a sixth dielectric layer formed on the same layer as the second dielectric layer, and the substrate of the seventh electrode formed on the same layer as the third electrode. A ninth electrode formed on the opposite side through the sixth dielectric layer, a third terminal electrically connected to the seventh electrode, and a fourth electrode electrically connected to the ninth electrode A second capacitor is formed by the seventh electrode, the sixth dielectric layer, and the ninth electrode.

  In the present invention, the storage capacitor is formed by the first storage capacitor and the second storage capacitor, and the first storage capacitor and the second storage capacitor are stacked. For this reason, the storage capacitor has a large capacitance even when the occupied area is small. Here, between the edge of the substrate and the image display region, the first inspection element having the first capacitor having the same layer structure as the first storage capacitor, and the same layer as the second storage capacitor A second inspection element having a second capacitor having a structure is formed. Therefore, if the first inspection element is used, the first capacitor can be inspected. According to the inspection result, the first storage capacitor is short-circuited or withstand voltage without being affected by the second storage capacitor. Etc. can be grasped. Further, if the second inspection element is used, the second capacitor can be inspected. According to the inspection result, the second storage capacitor is short-circuited, withstand voltage, etc. without being affected by the first storage capacitor. The characteristics of Therefore, when a problem such as a short circuit or a decrease in withstand voltage occurs in the storage capacitor, it is possible to easily and reliably inspect which one of the first storage capacitor and the second storage capacitor has occurred. Therefore, since the inspection result can be appropriately fed back to the manufacturing process or the like, it is possible to appropriately take measures against the malfunction. Both the first capacitor and the second capacitor for inspection have a structure in which a dielectric layer is interposed between each of the three electrodes, similarly to the storage capacitor. When a problem occurs, a problem is likely to occur in the first capacity for inspection, and when a problem occurs in the second retention capacity of the retention capacity, a problem is likely to occur in the second capacity for inspection. Therefore, the cause of the defect in the storage capacitor can be surely grasped by the inspection of the first capacitor for inspection and the second capacitor for inspection.

  The present invention is effective when applied to the case where the first storage capacitor and the second storage capacitor overlap at least partly with the switching element on the side opposite to the substrate with respect to the switching element. In the case of such a configuration, if unevenness is generated on the upper layer side of the switching element due to the switching element, defects are likely to occur in the first dielectric layer and the second dielectric layer, and there is a problem such as a short circuit in the storage capacitor. However, even in such a case, according to the present invention, it is possible to surely grasp the place where the failure occurs. Therefore, since the inspection result can be appropriately fed back to the manufacturing process or the like, it is possible to appropriately take measures against the malfunction.

  In the present invention, each of the first dielectric layer and the second dielectric layer has a plurality of dielectric films, and the plurality of dielectrics constituting the first dielectric layer as viewed from the substrate side. The stacking order of the insulating films in the film and the plurality of dielectric films constituting the second dielectric layer is preferably the same. According to such a configuration, when the polarity of the potential applied to the pixel electrode is reversed, the polarity of the first electrode and the second electrode and the polarity of the first electrode and the third electrode are reversed. In any polarity, the arrangement of the insulating films is substantially the same. Therefore, problems such as a fixed potential shift hardly occur.

  In the present invention, the electro-optical device is, for example, a liquid crystal device. In this case, the liquid crystal device includes a counter substrate facing one side of the substrate, and a liquid crystal layer held between the substrate and the counter substrate. ,have.

  The electro-optical device according to the present invention can be used in electronic devices such as a mobile phone, a mobile computer, and a projection display device. Among these electronic devices, the projection display device includes a light source unit for supplying light to an electro-optical device (liquid crystal device) and a projection optical system that projects light modulated by the electro-optical device. ing.

1 is a block diagram showing an electrical configuration of an electro-optical device according to Embodiment 1 of the present invention. FIG. FIG. 3 is an explanatory diagram of a liquid crystal panel of the electro-optical device according to the first embodiment of the invention. 3 is an explanatory diagram illustrating a planar structure of a pixel of the electro-optical device according to the first embodiment of the invention. FIG. FIG. 3 is an explanatory diagram illustrating a cross-sectional structure of a pixel of the electro-optical device according to the first embodiment of the invention. FIG. 6 is an explanatory diagram of an inspection capacitor, an inspection terminal, and the like of the electro-optical device according to the first embodiment of the invention. FIG. 10 is an explanatory diagram of an inspection capacitor and an inspection terminal of the electro-optical device according to the second embodiment of the invention. FIG. 10 is an explanatory diagram illustrating a cross-sectional structure of a pixel of an electro-optical device according to a third embodiment of the invention. It is a schematic block diagram of the projection type display apparatus (electronic device) and optical unit to which this invention is applied. It is explanatory drawing for demonstrating the subject of this invention.

  As an embodiment of the present invention, an example in which the present invention is applied to an active matrix liquid crystal device among various electro-optical devices will be described. In the drawings to be referred to in the following description, the scales are different for each layer and each member so that each layer and each member have a size that can be recognized on the drawing. Further, when describing the layers formed on the element substrate, the upper layer side or the surface side means the side opposite to the side where the substrate body of the element substrate is located (the side on which the counter substrate is located), and the lower layer side means It means the side where the substrate body of the element substrate is located. In describing the layers formed on the counter substrate, the upper layer side or the surface side means the side opposite to the side where the substrate body of the counter substrate is located (the side where the element substrate is located), and the lower layer side is It means the side where the substrate body of the counter substrate is located.

[Embodiment 1]
(Configuration of electro-optical device)
(overall structure)
FIG. 1 is a block diagram showing an electrical configuration of an electro-optical device according to Embodiment 1 of the present invention. In FIG. 1, an electro-optical device 100 according to this embodiment is a liquid crystal device having a liquid crystal panel 100p in a TN (Twisted Nematic) mode or a VA (Vertical Alignment) mode, and the liquid crystal panel 100p includes a plurality of pixels in the central region. 100a includes an image display area 10a (pixel arrangement area / effective pixel area) arranged in a matrix. In the liquid crystal panel 100p, in an element substrate 10 (see FIG. 2 and the like) to be described later, a plurality of data lines 6a and a plurality of scanning lines 3a extend vertically and horizontally inside the image display region 10a. A pixel 100a is configured at a position corresponding to. In each of the plurality of pixels 100a, a pixel transistor 30 including a field effect transistor (switching element) and a pixel electrode 9a described later are formed. Of the source / drain regions of the pixel transistor 30, the data line 6 a is electrically connected to the data line side source / drain region, and the pixel electrode 9 a is electrically connected to the pixel electrode side source / drain region. A scanning line 3a is electrically connected to the gate. In this way, in the electro-optical device 100, the plurality of pixel electrodes 9a and the plurality of pixel transistors 30 are formed in each of the plurality of pixels 100a.

  In the element substrate 10, the scanning line driving circuit 104 and the data line driving circuit 101 shown in FIG. 2 are provided on the outer peripheral side from the image display region 10 a. The data line driving circuit 101 is electrically connected to each data line 6a, and sequentially supplies the image signals S1, S2,... Sn to each data line 6a. The scanning line driving circuit 104 is electrically connected to each scanning line 3a, and sequentially supplies scanning signals G1, G2,... Gm to each scanning line 3a.

  In each pixel 100a, the pixel electrode 9a is opposed to a common electrode formed on a counter substrate 20 (see FIG. 2 and the like), which will be described later, via a liquid crystal layer (electro-optic material layer) to form a liquid crystal capacitor 50a. Yes. Each pixel 100a is provided with a holding capacitor 70 in parallel with the liquid crystal capacitor 50a in order to prevent fluctuations in the image signal held in the liquid crystal capacitor 50a. In this embodiment, in order to form the storage capacitor 70, the element substrate 10 is formed with the capacitor line 7a extending across the plurality of pixels 100a, and the common potential Vcom is applied to the capacitor line 7a. ing.

  In this embodiment, as will be described later with reference to FIGS. 3 and 4, the storage capacitor 70 includes a first storage capacitor 70 a and a second storage capacitor 70 b, and the first storage capacitor 70 a. And the second storage capacitor 70b are electrically connected in parallel.

(Configuration of liquid crystal panel 100p and element substrate 10)
FIG. 2 is an explanatory diagram of the liquid crystal panel 100p of the electro-optical device 100 according to the first embodiment of the present invention. FIGS. 2A and 2B each show the liquid crystal panel 100p together with each component of the counter substrate. It is the top view seen from the side, and its HH 'sectional drawing.

  As shown in FIG. 2, in the liquid crystal panel 100 p, the element substrate 10 and the counter substrate 20 are bonded to each other with a seal material 152 through a predetermined gap, and the seal material 152 has a frame extending along the outer edge of the counter substrate 20. It is provided in the shape. The sealing material 152 is an adhesive made of a photocurable resin, a thermosetting resin, or the like, and is mixed with a gap material such as glass fiber or glass beads for setting the distance between the two substrates to a predetermined value. In the liquid crystal panel 100p, a liquid crystal layer 50 (electro-optical material layer) made of various liquid crystal materials (electro-optical materials) is formed in a region surrounded by the sealing material 152 between the element substrate 10 and the counter substrate 20. Is provided. In this embodiment, the sealing material 152 is formed with a discontinuous portion used as the liquid crystal injection port 152c. The liquid crystal injection port 152c is sealed with a sealing material 158 after the liquid crystal material is injected.

  In the liquid crystal panel 100p having such a configuration, the element substrate 10 and the counter substrate 20 are both square, and the image display area 10a described with reference to FIG. 1 is provided as a square area in the approximate center of the liquid crystal panel 100p. ing. Corresponding to this shape, the sealing material 152 is also provided in a substantially square shape, and the outer side of the image display area 10a is a rectangular frame-shaped outer peripheral area 10c.

  In the element substrate 10, the data line driving circuit 101 and the plurality of terminal electrodes 102 are formed along one side of the element substrate 10 in the outer peripheral region 10 c, and the scanning line driving circuit is formed along another side adjacent to the one side. 104 is formed. The terminal electrode 102 is connected to a flexible wiring board (not shown), and various potentials and various signals are input to the element substrate 10 through the flexible wiring board.

  As will be described in detail later with reference to FIGS. 3 and 4, the image display region 10 a has an image display area 10 a on the side of the one surface 10 s facing the counter substrate 20 out of the one surface 10 s and the other surface 10 t of the element substrate 10. The pixel transistor 30 described with reference to FIG. 1 and the pixel electrode 9a electrically connected to the pixel transistor 30 are formed in a matrix, and an alignment film 16 is formed on the upper side of the pixel electrode 9a. Yes.

  Further, on the one surface 10 s side of the element substrate 10, in the outer peripheral region 10 c outside the image display region 10 a, the rectangular frame-shaped peripheral region 10 b sandwiched between the image display region 10 a and the sealing material 152 includes pixels. A dummy pixel electrode 9b formed simultaneously with the electrode 9a is formed. In the dummy pixel electrode 9b, adjacent dummy pixel electrodes 9b are connected to each other by a narrow connecting portion (not shown). The dummy pixel electrode 9b is applied with the common potential Vcom, and prevents the disorder of the alignment of liquid crystal molecules at the outer peripheral side end of the image display region 10a. Further, the dummy pixel electrode 9b compresses the difference in height between the image display region 10a and the peripheral region 10b when the surface on which the alignment film 16 is formed in the element substrate 10 is flattened by polishing. This contributes to making the surface on which the film is formed flat. In some cases, no potential is applied to the dummy pixel electrode 9b, and the dummy pixel electrode 9b is potentialally floated. Even in this case, the dummy pixel electrode 9b has a height difference between the image display region 10a and the peripheral region 10b. This contributes to compressing the difference in position and making the surface on which the alignment film 16 is formed flat.

  A common electrode 21 is formed on the side of the one surface 20 s facing the element substrate 10 out of the one surface 20 s and the other surface 20 t of the counter substrate 20. The common electrode 21 is formed across the plurality of pixels 100a as substantially the entire surface of the counter substrate 20 or a plurality of strip electrodes. In this embodiment, the common electrode 21 is formed on substantially the entire surface of the counter substrate 20.

  A light shielding layer 29 is formed on the lower surface side of the common electrode 21 on the one surface 20 s side of the counter substrate 20, and an alignment film 22 is laminated on the surface of the common electrode 21. In this embodiment, the light shielding layer 29 is formed as a frame portion 29a extending along the outer periphery of the image display region 10a, and the image display region 10a is defined by the inner periphery of the frame portion 29a. In the present embodiment, the light shielding layer 29 is also formed as a black matrix portion 29b that overlaps the inter-pixel region 10f sandwiched between the adjacent pixel electrodes 9a. Here, the frame portion 29 a is formed at a position overlapping the dummy pixel electrode 9 b, and the outer peripheral edge of the frame portion 29 a is at a position with a gap between it and the inner peripheral edge of the seal material 152. Therefore, the frame portion 29a and the sealing material 152 do not overlap.

  In the liquid crystal panel 100p, the inter-substrate conduction electrodes 25 are formed on the four corners on the one surface 20s side of the counter substrate 20 outside the sealing material 152, and on the one surface 10s side of the element substrate 10. The inter-substrate conduction electrode 106 is formed at a position facing the four corners of the counter substrate 20 (inter-substrate conduction electrode 25). In this embodiment, the inter-substrate conduction electrode 25 is composed of a part of the common electrode 21. The inter-substrate conduction electrode 25 is electrically connected to the constant potential wiring to which the common potential Vcom is applied. An inter-substrate conducting material 109 containing conductive particles is disposed between the inter-substrate conducting electrode 106 and the inter-substrate conducting electrode 25, and the common electrode 21 of the counter substrate 20 is the inter-substrate conducting electrode 106. The element substrate 10 is electrically connected via the inter-substrate conductive material 109 and the inter-substrate conductive electrode 25. Therefore, the common potential Vcom is applied to the common electrode 21 from the element substrate 10 side. The sealing material 152 is provided along the outer peripheral edge of the counter substrate 20 with substantially the same width dimension. For this reason, the sealing material 152 is substantially rectangular. However, the sealing material 152 is provided so as to pass through the inside avoiding the inter-substrate conduction electrodes 25 and 106 in a region overlapping the corner portion of the counter substrate 20.

  Note that on the element substrate 10, in addition to the driving circuits such as the data line driving circuit 101 and the scanning line driving circuit 104, a sampling circuit for sampling the image signal on the image signal line and supplying the data signal to the data line, a plurality of data lines In addition, a precharge circuit for supplying a precharge signal having a predetermined voltage level in advance of the image signal, an inspection circuit for inspecting quality, defects, etc. of the electro-optical device 100 during manufacturing or at the time of shipment may be formed. Good.

  In the electro-optical device 100 having such a configuration, when the pixel electrode 9a and the common electrode 21 are formed of a light-transmitting conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide), a transmissive liquid crystal device is configured. be able to. In the case of such a transmissive electro-optical device 100, the light incident from one of the element substrate 10 and the counter substrate 20 is modulated while being transmitted through the other substrate and emitted to display an image. . In this embodiment, the light incident from the counter substrate 20 is modulated while being transmitted through the element substrate 10 and emitted to display an image. On the other hand, when the common electrode 21 is formed of a light-transmitting conductive film such as ITO or IZO and the pixel electrode 9a is formed of a reflective conductive film such as aluminum, a reflective liquid crystal device can be configured. When the electro-optical device 100 is a reflection type, light incident from the counter substrate 20 side is modulated while being reflected and emitted from the element substrate 10 side, and an image is displayed.

  At that time, in the liquid crystal layer 50, the orientation and order of the molecular assembly change depending on the applied voltage level, thereby modulating the light and enabling gradation display. For example, in the normally white mode, the transmittance for incident light decreases according to the voltage applied in units of each pixel, and in the normally black mode, it corresponds to the voltage applied in units of each pixel. As a result, the transmittance for incident light is increased, and light having a contrast corresponding to an image signal is emitted from the electro-optical device 100 as a whole. In performing gradation display, digital signals are used as the image signals S1, S2,... Sn, and light having a contrast corresponding to the image signal is selected depending on the number of pulses and the duty ratio of the pulses during the selection period of the pixel 100a. It may be emitted.

  The electro-optical device 100 can be used as a color display device of an electronic apparatus such as a mobile computer or a mobile phone. In this case, a color filter (not shown) is formed on the counter substrate 20 or the element substrate 10. The electro-optical device 100 can be used as electronic paper. Further, in the electro-optical device 100, a polarizing film, a retardation film, a polarizing plate, and the like are predetermined with respect to the liquid crystal panel 100p according to the type of the liquid crystal layer 50 to be used and the normally white mode / normally black mode. Arranged in the direction. Furthermore, the electro-optical device 100 can be used as a light valve for RGB in a projection display device (liquid crystal projector) described later. In this case, each of the RGB electro-optical devices 100 receives light of each color separated through RGB color separation dichroic mirrors as projection light, so that no color filter is formed. .

  In this embodiment, the case where the electro-optical device 100 is a transmissive liquid crystal device used as a light valve for RGB in a projection display device described later will be mainly described. In the present embodiment, the electro-optical device 100 will be described focusing on the case where the liquid crystal layer 50 includes a VA mode liquid crystal panel 100p using a nematic liquid crystal compound having a negative dielectric anisotropy.

  In the electro-optical device 100 of this embodiment, when driving the pixel electrode 9 a, the first period in which the potential of the pixel electrode 9 a is higher than the potential of the common electrode 21, and the potential of the pixel electrode 9 a is higher than the potential of the common electrode 21. A low second period is executed. In this embodiment, the polarity of the pixel electrode 9a when the potential of the common electrode 21 is used as a reference is reversed every frame. For example, while the potential of the common electrode 21 (common potential Vcom) is constant at + 7V, the potential of the pixel electrode 9a is switched between + 12V (first period) and + 2V (second period), and the common potential Vcom. Judgment is based on the polarity.

(Specific pixel configuration example)
FIG. 3 is an explanatory diagram illustrating a planar structure of the pixel 100a of the electro-optical device 100 according to Embodiment 1 of the present invention, and is a plan view of a plurality of adjacent pixels in the element substrate 10. FIG. 4A and 4B are explanatory views showing a cross-sectional structure of the pixel 100a of the electro-optical device 100 according to the first embodiment of the present invention. FIGS. 4A and 4B are taken along line FF ′ in FIG. FIG. 4 is a cross-sectional view when the element substrate is cut along, and an explanatory view showing a cross-sectional structure of the storage capacitor 70. In FIG. 3, each layer is divided into the following lines: scanning line 3a = thick two-dot chain line semiconductor layer 1a = thin and short dotted line gate electrode 3c and relay electrode 3d = thin solid line first electrode 71 = thick and short dotted line second electrode 72 (Drain electrode) = thin one-dot chain line third electrode 73 = thin two-dot chain line Data line 6a and relay electrode 6b, 6c = thick one-dot chain line Capacitance line 7a and relay electrode 7b = thin solid line Pixel electrode 9a = shown by thin and long broken line It is. Further, in FIG. 3, the positions of the end portions of the layers overlapping with each other are shifted so that the shape of the layer can be easily understood.

  As shown in FIG. 3, on one surface 10s of the element substrate 10, a pixel electrode 9a is formed in each of the plurality of pixels 100a, and data along an inter-pixel region 10f sandwiched between adjacent pixel electrodes 9a. Lines 6a and scanning lines 3a are formed. In this embodiment, the inter-pixel region 10f extends vertically and horizontally, and the scanning line 3a is linear along the first inter-pixel region 10g extending in the X direction (first direction) in the inter-pixel region 10f. The data line 6a extends linearly along the second inter-pixel region 10h extending in the Y direction (second direction). A pixel transistor 30 is formed corresponding to the intersection of the data line 6a and the scanning line 3a. In this embodiment, the pixel transistor 30 uses an intersection region of the data line 6a and the scanning line 3a or the like. Is formed. A capacitance line 7a is formed on the element substrate 10, and a common potential Vcom is applied to the capacitance line 7a. In this embodiment, the capacitor line 7a extends in a straight line and overlaps with the data line 6a, and has a portion protruding so as to overlap with the scanning line 3a. For this reason, the capacitor line 7a also functions as a light shielding layer.

  As shown in FIG. 4A, the element substrate 10 is a pixel electrode formed on the substrate surface side (one surface 10s side) of the light-transmitting substrate body 10w such as a quartz substrate or a glass substrate on the liquid crystal layer 50 side. 9a, the pixel transistor 30 for pixel switching, the alignment film 16 and the storage capacitor 70 are mainly configured.

  In the element substrate 10, a scanning line 3a made of a conductive polysilicon film, a metal silicide film, a metal film, a metal compound film, or the like is formed on the one surface 10s side of the substrate body 10w. When the light after passing through the electro-optical device 100 is reflected by another member, the reflected light also functions as a light shielding layer that enters the semiconductor layer 1a.

  A translucent insulating film 12 is formed on the upper layer side of the scanning line 3a, and a pixel transistor 30 including the semiconductor layer 1a is formed on the surface side of the insulating film 12. In this embodiment, the insulating film 12 is a silicon oxide film (including silicate glass) such as NSG (non-silicate glass), PSG (phosphorus silicate glass), BSG (boron silicate glass), BPSG (boron phosphorus silicate glass), or the like. And made of a silicon nitride film.

  The pixel transistor 30 includes a semiconductor layer 1a having a long side direction in the extending direction of the data line 6a, and a central portion in the length direction of the semiconductor layer 1a extending in a direction orthogonal to the length direction of the semiconductor layer 1a. In this embodiment, the gate electrode 3c is electrically connected to the scanning line 3a through contact holes 12a and 12b (see FIG. 3) penetrating the gate insulating layer 2 and the insulating film 12. ing. Note that the gate electrode 3c may be configured as a part of the scanning line. The pixel transistor 30 has a translucent gate insulating layer 2 between the semiconductor layer 1a and the gate electrode 3c. The semiconductor layer 1a includes a channel region 1g facing the gate electrode 3c via the gate insulating layer 2, and the data line side source / drain region 1h and the pixel electrode side source / drain region 1i on both sides of the channel region 1g. It has. In this embodiment, the pixel transistor 30 has an LDD structure. Therefore, each of the data line side source / drain region 1h and the pixel electrode side source / drain region 1i includes the low concentration regions 1b and 1c on both sides of the channel region 1g, and is opposite to the channel region 1g with respect to the low concentration regions 1b and 1c. High concentration regions 1d and 1e are provided in adjacent regions on the side. In this embodiment, the pixel transistor 30 is an n-type (first conductivity type) field effect transistor, and an n-type impurity is introduced into the data line side source / drain region 1h and the pixel electrode side source / drain region 1i. .

  The semiconductor layer 1a is composed of a polysilicon film (polycrystalline silicon film) or the like. The gate insulating layer 2 includes, for example, a gate insulating layer made of a silicon oxide film obtained by thermally oxidizing the semiconductor layer 1a and a gate insulating film made of a silicon oxide film formed by a low pressure CVD method under a high temperature condition of 700 to 900 ° C. It consists of a two-layer structure with layers. The gate electrode 3c is made of a conductive film such as a conductive polysilicon film, a metal silicide film, a metal film, or a metal compound film, and a relay electrode 3d formed simultaneously with the gate electrode 3c is formed on the upper layer of the gate insulating layer 2. Is formed.

  On the upper layer side of the gate electrode 3c and the relay electrode 3d, a translucent interlayer insulating film 41 made of a silicon oxide film such as NSG, PSG, BSG, or BPSG is formed. A first electrode 71, a second electrode 72, a third electrode 73, a first dielectric layer 75, and a second dielectric layer 76 are formed on the upper layer of the interlayer insulating film 41 so as to at least partially overlap the pixel transistor 30. Formed and held by such a plurality of electrodes (first electrode 71, second electrode 72, third electrode 73) and a plurality of dielectric layers (first dielectric layer 75, second dielectric layer 76). A capacitor 70 is formed. The configuration of the storage capacitor 70 will be described later with reference to FIG.

  Of the three electrodes constituting the storage capacitor 70, the second electrode 72 formed on the interlayer insulating film 41 is formed as a pixel electrode side source / drain electrode. The second electrode 72 is made of a conductive film such as a conductive polysilicon film, a metal silicide film, a metal film, or a metal compound film. The second electrode 72 is formed so as to partially overlap the pixel electrode side source / drain region 1 i of the semiconductor layer 1 a, and the pixel electrode side via the contact hole 41 a penetrating the interlayer insulating film 41 and the gate insulating layer 2. It is electrically connected to the source / drain region 1i. Further, the second electrode 72 is electrically connected to the relay electrode 3 d through a contact hole 41 b that penetrates the interlayer insulating film 41.

  A translucent interlayer insulating film 42 made of a silicon oxide film or the like is formed on the upper layer side of the storage capacitor 70, and the data line 6 a and the relay electrodes 6 b and 6 c are formed on the upper layer side of the interlayer insulating film 42. The same layer is formed of the same conductive film. The data line 6a and the relay electrodes 6b and 6c are made of a conductive film such as a conductive polysilicon film, a metal silicide film, a metal film, or a metal compound film. The data line 6a is connected to the data line side source / drain region 1h via a contact hole 42a penetrating the interlayer insulating film 42, the second dielectric layer 76, the first dielectric layer 75, the interlayer insulating film 41 and the gate insulating layer 2. Conducted.

  The relay electrode 6 c is electrically connected to the relay electrode 3 d through a contact hole 42 d that penetrates the interlayer insulating film 42, the second dielectric layer 76, the first dielectric layer 75, and the interlayer insulating film 41. Therefore, the relay electrode 6c is electrically connected to the pixel electrode side source / drain region 1i through the relay electrode 3d and the second electrode 72. The relay electrode 6 c is electrically connected to the third electrode 73 through a contact hole 42 c that penetrates the interlayer insulating film 42. Therefore, the third electrode 73 is electrically connected to the second electrode 72 via the relay electrodes 6c and 3d, and is electrically connected to the pixel electrode side source / drain region 1i via the second electrode 72. On the other hand, the relay electrode 6 b is electrically connected to the first electrode 71 through a contact hole 42 b that penetrates the interlayer insulating film 42 and the second dielectric layer 76.

  A light-transmitting interlayer insulating film 43 made of a silicon oxide film or the like is formed on the upper side of the data line 6a and the relay electrodes 6b and 6c. On the upper layer side of the interlayer insulating film 43, the capacitor line 7a and the relay are formed. The electrode 7b is formed of the same conductive film on the same layer. The capacitor line 7a and the relay electrode 7b are made of a conductive film such as a conductive polysilicon film, a metal silicide film, a metal film, or a metal compound film. The relay electrode 7 b is electrically connected to the relay electrode 6 c through a contact hole 43 b that penetrates the interlayer insulating film 43.

  The capacitor line 7a is electrically connected to the relay electrode 6b via a contact hole 43a penetrating the interlayer insulating film 43, and is electrically connected to the first electrode 71 via the relay electrode 6b. For this reason, the capacitive line 7a supplies the common potential Vcom to the first electrode 71 via the relay electrode 6b.

  A light-transmitting interlayer insulating film 44 made of a silicon oxide film or the like is formed on the upper side of the capacitor line 7a and the relay electrode 7b, and a light-transmitting layer such as an ITO film is formed on the upper layer side of the interlayer insulating film 44. A pixel electrode 9a made of a conductive film is formed. The interlayer insulating film 44 is formed with a contact hole 44a that reaches the relay electrode 7b through the interlayer insulating film 44. The pixel electrode 9a is electrically connected to the relay electrode 7b through the contact hole 44a. ing. As a result, the pixel electrode 9a is electrically connected to the second electrode 72 via the relay electrodes 7b, 6c, and 3d, and is electrically connected to the pixel electrode side source / drain region 1i via the second electrode 72.

An alignment film 16 made of polyimide or an inorganic alignment film is formed on the upper layer side of the pixel electrode 9a. In this embodiment, the alignment film 16 is an obliquely deposited film of SiO _x (x <2), SiO ₂ , TiO ₂ , MgO, Al ₂ O ₃ , In ₂ O ₃ , Sb ₂ O ₃ , Ta ₂ O ₅ or the like. (Inclined vertical alignment film / inorganic alignment film).

As shown in FIG. 2B, the counter substrate 20 is formed on a translucent substrate body 20w such as a quartz substrate or a glass substrate, and on the surface on the liquid crystal layer 50 side (one surface 20s facing the element substrate 10). The light shielding layer 29, the common electrode 21 made of a light-transmitting conductive film such as an ITO film, and the alignment film 22 are mainly configured. In this embodiment, the alignment film 22 is an obliquely deposited film such as SiO _x (x <2), SiO ₂ , TiO ₂ , MgO, Al ₂ O ₃ , In ₂ O ₃ , Sb ₂ O ₃ , Ta ₂ O _5. (Inclined vertical alignment film / inorganic alignment film).

(Configuration of holding capacity 70)
As shown in FIGS. 4A and 4B, in the storage capacitor 70, the second electrode 72, the first dielectric, from the lower layer side (substrate body 10w side) to the upper layer side (pixel electrode 9a side). The body layer 75, the first electrode 71, the second dielectric layer 76, and the third electrode 73 are laminated in this order. Therefore, the second storage capacitor 70 a is formed by the second electrode 72, the first dielectric layer 75 and the first electrode 71, and the second storage capacitor is formed by the first electrode 71, the second dielectric layer 76 and the third electrode 73. 70b is formed. The first electrode 71 is electrically connected to the capacitor line 7a side, while the second electrode 72 and the third electrode 73 are electrically connected to the pixel electrode 9a side (the pixel electrode side source / drain region 1i side). ing. Therefore, as shown in FIG. 4B, the first storage capacitor 70a and the second storage capacitor 70b are located between the capacitor line 7a and the pixel electrode 9a side (pixel electrode side source / drain region 1i side). They are electrically connected in parallel.

  Here, each of the first dielectric layer 75 and the second dielectric layer 76 is composed of a plurality of dielectric films. In this embodiment, the first dielectric layer 75 is viewed from the lower layer side (the substrate body 10w side). The stacking order of the insulating films in the plurality of dielectric films constituting the second dielectric layer 76 and the plurality of dielectric films constituting the second dielectric layer 76 is the same. More specifically, the first dielectric layer 75 has a structure in which a silicon oxide film 75a and a silicon nitride film 75b are laminated in this order when viewed from the lower layer side (the substrate body 10w side). The layer 76 has a structure in which a silicon oxide film 76a and a silicon nitride film 76b are laminated in this order when viewed from the lower layer side (substrate body 10w side).

(Configuration of inspection capacity, inspection terminals, etc.)
FIG. 5 is an explanatory diagram of an inspection capacitor, an inspection terminal, and the like of the electro-optical device 100 according to Embodiment 1 of the present invention. FIGS. 5 (a), 5 (b), 5 (c), and 5 (d) are diagrams. , A plan view showing a plane configuration of the first capacitor for inspection, etc., a cross-sectional view showing a sectional configuration of the first capacitor for inspection, etc., a plan view showing a plane configuration of the second capacitor for inspection, etc., a second capacitor for inspection, etc. It is sectional drawing which shows the cross-sectional structure of this. 5B and 5D, only the upper layer side than the interlayer insulating film 41 is shown.

  As described with reference to FIG. 4, in this embodiment, two storage capacitors (first storage capacitor 70 a and second storage capacitor 70 b) are stacked and electrically connected in parallel to form the storage capacitor 70. It is configured. For this reason, it is difficult to individually inspect the electrical characteristics of the first storage capacitor 70a and the second storage capacitor 70b. Therefore, as will be described below, in the electro-optical device 100 of the present embodiment, an inspection process in the process of manufacturing the element substrate 10 or after the element substrate 10 is manufactured and before the element substrate 10 and the counter substrate 20 are bonded together. An inspection capacitor and an inspection terminal for individually inspecting two storage capacitors (first storage capacitor 70a and second storage capacitor 70b) in the inspection process are configured.

  More specifically, in the present embodiment, as shown in FIG. 2A, one scanning line driving circuit 104 (outside area 10c) between the end of the element substrate 10 and the image display area 10a. 104a) and the end portion of the element substrate 10 include an inspection first capacitor 70e (first capacitor) having the same layer structure as the first storage capacitor 70a and an inspection first capacitor 70e. A first capacity inspection terminal pair 77 to be electrically connected is formed. In other words, in this embodiment, the first inspection element is configured by the inspection first capacitor 70e (first capacitor) and the first capacitor inspection terminal pair 77.

  Further, in the area between the end of the element substrate 10 and the image display area 10 (outer peripheral area 10 c), the area between the other scanning line driving circuit 104 (104 b) and the end of the element substrate 10 is The second inspection capacitor 70f (second capacitor) having the same layer structure as the second storage capacitor 70b and the second capacitor inspection terminal pair 78 electrically connected to the second inspection capacitor 70f are formed. Yes. That is, in the present embodiment, the second inspection element is configured by the inspection second capacitor 70f (second capacitor) and the second capacitor inspection terminal pair 78.

  Here, the first capacity inspection terminal pair 77 and the second capacity inspection terminal pair 78 are provided at positions overlapping the counter substrate 20, but the first capacity inspection terminal pair 77 and the second capacity inspection terminal. The pair 78 is in contact with the inspection electrode such as a probe in the inspection process in the middle of manufacturing the element substrate 10 or in the inspection process before the element substrate 10 and the counter substrate 20 are bonded after the element substrate 10 is manufactured. Even if the first capacitance inspection terminal pair 77 and the second capacitance inspection terminal pair 78 are provided at a position overlapping the substrate 20, there is no problem in the inspection.

(Specific configuration example of first inspection capacitor 70e and first capacitance inspection terminal pair 77)
In this embodiment, when the first capacitor for inspection 70e is configured, the first capacitor inspection first electrode 71s and the first dielectric layer 75 are used as shown in FIGS. 5A and 5B. A first capacitance inspection second electrode 72 s that forms the inspection first capacitance 70 e overlapping the first capacitance inspection first electrode 71 s and a first capacitance inspection first electrode 71 s via the second dielectric layer 76. An overlapping first capacitor inspection third electrode 73s is formed. Here, as can be seen by comparing FIG. 4A and FIG. 5B, the first capacitor inspection first electrode 71s, the first capacitance inspection second electrode 72s, and the first capacitance inspection third electrode. Each of the electrodes 73 s is made of a conductive film formed simultaneously with the first electrode 71, the second electrode 72, and the third electrode 73. Therefore, the first capacitance inspection first electrode 71s is located in the same layer as the first electrode 71, the first capacitance inspection second electrode 72s is located in the same layer as the second electrode 72, and the first capacitance The third inspection electrode 73 s is located in the same layer as the third electrode 73.

  On the interlayer insulating film 44, a first terminal for capacitance inspection 79a and a second terminal for capacitance inspection 79b made of a conductive film formed simultaneously with the pixel electrode 9a are formed. A first capacity inspection terminal pair 77 electrically connected to the inspection first capacitor 70e is formed by the capacity inspection first terminal 79a and the first capacity inspection second terminal 79b. In the present embodiment, the first capacitor for inspection 70e extends along the end portion of the element substrate 10, and the first capacitor inspection first terminal 79a is located at a position sandwiching the first capacitor for inspection 70e on both sides in the extending direction. In addition, a second terminal 79b for first capacitance inspection is formed.

  On the interlayer insulating film 42, relay electrodes 6f and 6g made of a conductive film formed simultaneously with the data line 6a and the relay electrode 6b are formed. On the interlayer insulating film 43, the capacitor line 7a and the relay electrode are formed. Relay electrodes 7c and 7d made of a conductive film formed simultaneously with the electrode 7b are formed. The first terminal for capacitance inspection 79 a is electrically connected to the relay electrode 7 c via a contact hole 44 c that penetrates the interlayer insulating film 44, and the relay electrode 7 c is relayed via a contact hole 43 c that penetrates the interlayer insulating film 43. The relay electrode 6f is electrically connected to the electrode 6f, and the relay electrode 6f is electrically connected to the first capacitor inspection first electrode 71s via a contact hole 42h penetrating the interlayer insulating film 42 and the second dielectric layer 76. Therefore, the first capacitor inspection first terminal 79a is electrically connected to the first capacitor inspection first electrode 71s.

  The relay electrode 6f is electrically connected to the first capacitor inspection third electrode 73s through a contact hole 42i penetrating the interlayer insulating film 42, and the first capacitor inspection first terminal 79a is connected to the first capacitor inspection. The first electrode 71s and the third capacitor inspection third electrode 73s are electrically connected.

  On the other hand, the second terminal 79b for first capacitance inspection is conducted to the relay electrode 7d through the contact hole 44d penetrating the interlayer insulating film 44, and the relay electrode 7d is connected via the contact hole 43d penetrating the interlayer insulating film 43. The relay electrode 6g is electrically connected to the second electrode 72s for first capacitance inspection through a contact hole 42j that penetrates the interlayer insulating film 42, the second dielectric layer 76, and the first dielectric layer 75. Conducted. Therefore, the first capacitor inspection second terminal 79b is electrically connected to the first capacitor inspection second electrode 72s.

  In this manner, in the present embodiment, the first inspection element is configured by the inspection first capacitor 70e (first capacitor) and the first capacitor inspection terminal pair 77.

  Therefore, the probe is brought into contact with each of the first capacity inspection terminal pair 77 (the first capacity inspection first terminal 79a and the first capacity inspection second terminal 79b), and the first capacity inspection terminal pair 77 If the presence / absence of short circuit, withstand voltage, capacitance, etc. are inspected, the presence / absence of short circuit in the first capacitor for inspection 70e, withstand voltage, capacitance, etc. are not affected by the second capacitor for inspection 70f. Can be inspected. Therefore, according to the inspection result of the first inspection capacitor 70e, the presence or absence of a short circuit in the first storage capacitor 70a, the withstand voltage, the capacitance, etc. are not affected by the second storage capacitor 70b of the storage capacitor 70. Can be inspected. At this time, since the first terminal for capacitance inspection 79a is electrically connected to the first electrode for capacitance inspection 71s and the third electrode for capacitance inspection 73s, the first electrode for capacitance inspection 71s and The third capacitor inspection third electrode 73s has the same potential. Therefore, it is possible to inspect the presence / absence of a short circuit, the withstand voltage, and the capacitance of the first capacitor for inspection 70e without being affected by the potential of the third electrode for first capacitor inspection 73s.

(Configuration of Inspection Second Capacitor 70f and Second Capacitance Inspection Terminal Pair 78)
In this embodiment, as shown in FIGS. 5C and 5D, when the second capacitor for inspection 70f is configured, the second capacitor inspection first electrode 71t and the first dielectric layer 75 are used to form the second capacitor 70f. A second capacitance inspection second electrode 72t that overlaps the second capacitance inspection first electrode 71t and a second capacitance inspection first capacitor 70f that overlaps the second capacitance inspection first electrode 71t via the second dielectric layer 76 are configured. A second capacitance inspection third electrode 73t is formed. As can be seen by comparing FIG. 4 (a) and FIG. 5 (d), the first electrode for second capacitance inspection 71t, the second electrode for second capacitance inspection 72t, and the third electrode for second capacitance inspection 73t are Each is made of a conductive film formed simultaneously with the first electrode 71, the second electrode 72, and the third electrode 73. Therefore, the second capacitance inspection first electrode 71t is located in the same layer as the first electrode 71, the second capacitance inspection second electrode 72t is located in the same layer as the second electrode 72, and the second capacitance The third inspection electrode 73 t is located in the same layer as the third electrode 73.

  On the interlayer insulating film 44, a second capacitor inspection first terminal 79c and a second capacitor inspection second terminal 79d are formed of a conductive film formed simultaneously with the pixel electrode 9a. The first capacitor inspection terminal 79c and the second capacitor inspection second terminal 79d form a second capacitor inspection terminal pair 78 electrically connected to the inspection second capacitor 70f. In the present embodiment, the second inspection capacitor 70f extends along the end portion of the element substrate 10, and the second first inspection terminal 79c is provided at a position sandwiching the second inspection capacitor 70f on both sides in the extending direction. In addition, a second terminal 79d for capacitance inspection is formed.

  On the interlayer insulating film 42, relay electrodes 6h and 6i made of a conductive film formed simultaneously with the data line 6a and the relay electrode 6c are formed. On the interlayer insulating film 43, the capacitor line 7a and the relay electrode are formed. Relay electrodes 7e and 7f made of a conductive film formed simultaneously with the electrode 7b are formed. The first terminal 79 c for second capacitance inspection is electrically connected to the relay electrode 7 e through the contact hole 44 e that penetrates the interlayer insulating film 44, and the relay electrode 7 e is relayed via the contact hole 43 e that penetrates the interlayer insulating film 43. The relay electrode 6h is electrically connected to the electrode 6h, and the relay electrode 6h is electrically connected to the second capacitor inspection third electrode 73t through a contact hole 42k penetrating the interlayer insulating film 42. For this reason, the first terminal 79c for second capacity inspection is electrically connected to the third electrode 73t for second capacity inspection.

  On the other hand, the second terminal 79d for capacitance inspection is electrically connected to the relay electrode 7f through the contact hole 44f that penetrates the interlayer insulating film 44, and the relay electrode 7f is connected to the relay electrode 7f through the contact hole 43f that penetrates the interlayer insulating film 43. The relay electrode 6i is electrically connected to the first electrode 71t for second capacitance inspection through a contact hole 42l that penetrates the interlayer insulating film 42 and the second dielectric layer 76. For this reason, the second terminal 79d for capacitance inspection is electrically connected to the first electrode 71t for second capacitance inspection. The relay electrode 6i is electrically connected to the second electrode for second capacitance inspection 72t through a contact hole 42m that penetrates the interlayer insulating film 42, the second dielectric layer 76, and the first dielectric layer 75, The second capacitor inspection second terminal 79d is electrically connected to the second capacitor inspection first electrode 71t and the second capacitor inspection second electrode 72t.

  In this manner, in the present embodiment, the second inspection element is configured by the inspection second capacitor 70f (second capacitor) and the second capacitor inspection terminal pair 78.

  Accordingly, the probe is brought into contact with each of the second capacity inspection terminal pair 78 (the second capacity inspection first terminal 79c and the second capacity inspection second terminal 79d), so that the second capacity inspection terminal pair 78 If the presence or absence of a short circuit, the withstand voltage, the capacitance, etc. are inspected, the presence or absence of a short circuit, the withstand voltage, the capacitance, etc. of the second capacitor for inspection 70f is not affected by the first capacitor for inspection 70e. Can be inspected. Therefore, according to the inspection result of the second inspection capacitor 70f, the presence / absence of a short circuit in the second storage capacitor 70b, withstand voltage, capacitance, etc. are not affected by the first storage capacitor 70a of the storage capacitor 70. Can be inspected. At this time, since the second terminal for capacitance inspection 79d is electrically connected to the second electrode for capacitance inspection 71t and the second electrode for capacitance inspection 72t, the second electrode for capacitance inspection 71t and The second electrode for second capacitance inspection 72t has the same potential. Therefore, the presence / absence of a short circuit, the withstand voltage, and the capacitance of the second capacitor for inspection 70f can be inspected without being affected by the potential of the second electrode for second capacity inspection 72t.

(Each component for inspection)
In the above configuration, when each component for inspection is represented by a serial number from the components constituting the storage capacitor 70, the following relationship is shown: first electrode 71s for first capacitance inspection = fourth electrode first capacitance inspection Second electrode 72s = fifth electrode third electrode for first capacitance inspection 73s = sixth electrode first electrode for second capacitance inspection 71t = seventh electrode second electrode for second capacitance inspection 72t = eighth electrode second Third electrode for capacity inspection 73t = 9th electrode First terminal for capacity inspection 79a = first terminal Second terminal for capacity inspection 79b = second terminal Second terminal for capacity inspection 79d = third terminal Second terminal for capacitance inspection 79c = fourth terminal First dielectric layer 75 = third dielectric layer, fifth dielectric layer Second dielectric layer 76 = fourth dielectric layer, sixth dielectric layer Correspond.

(Main effects of this form)
As described above, in the electro-optical device 100 of this embodiment, the storage capacitor 70 is formed by the first storage capacitor 70a and the second storage capacitor 70b that are electrically connected in parallel, and the first storage capacitor 70a. The second storage capacitor 70b has a stacked structure. For this reason, the storage capacitor 70 has a large capacitance even if the area occupied is small. Here, between the end of the element substrate 10 and the image display region 10a, the first capacitor for inspection 70e having the same layer structure as the first storage capacitor 70a and the same layer as the second storage capacitor 70b are provided. A second inspection capacitor 70f having a structure is formed, and a first capacitor inspection terminal pair 77 that is electrically connected to the first inspection capacitor 70e, and is electrically connected to the second inspection capacitor 70f. A second capacitance inspection terminal pair 78 is provided. For this reason, if the first capacitor inspection terminal pair 77 is used, the inspection first capacitor 70e can be inspected, and according to the inspection result, the first capacitance is not affected by the second holding capacitor 70b. It is possible to grasp characteristics such as a short circuit and withstand voltage of the storage capacitor 70a. Further, by using the second capacitor inspection terminal pair 78, the inspection second capacitor 70f can be inspected. According to the inspection result, the second holding capacitor 70a is not affected by the first holding capacitor 70a. It is possible to grasp characteristics such as a short circuit and withstand voltage of the capacitor 70b. Therefore, when a problem such as a short circuit or a decrease in withstand voltage occurs in the storage capacitor 70, it is possible to easily and reliably inspect which of the first storage capacitor 70a and the second storage capacitor 70b has occurred. Therefore, since the inspection result can be appropriately fed back to the manufacturing process or the like, it is possible to appropriately take measures against the malfunction.

  In the present embodiment, the first capacitor for inspection 70e includes a first capacitor inspection first capacitor 70e that is the same layer as the third electrode 73 and overlaps the first capacitor inspection first electrode 71s via the second dielectric layer 76. The third electrode 73s is provided, and the second capacitor for inspection 70f is the same layer as the second electrode 72 and overlaps the second electrode for first capacitance 71t via the first dielectric layer 75 via the first dielectric layer 75. A second electrode 72t is provided. For this reason, since both the first capacitor for inspection 70e and the second capacitor for inspection 70f have a structure in which a dielectric layer is interposed between each of the three electrodes, like the storage capacitor 70, the storage capacitor When a failure occurs in the first holding capacitor 70a of 70, a failure is likely to occur in the first capacitor 70e for inspection, and when a failure occurs in the second holding capacitor 70b of the holding capacitor 70, the second capacitor 70f for inspection Problems are likely to occur. Therefore, the cause of the malfunction of the storage capacitor 70 can be reliably grasped by the inspection of the first inspection capacitor 70e and the second inspection capacitor 70f.

  Of the first capacitance inspection first terminal 79a and the first capacitance inspection second terminal 79b constituting the first capacitance inspection terminal pair 77, the first capacitance inspection first terminal 79a is the first capacitance inspection. The first electrode 71s and the third capacitor inspection third electrode 73s are electrically connected. Therefore, when inspecting the first capacitor for inspection 70e, the first capacitor inspection first electrode 71s and the first capacitor inspection third electrode 73s have the same potential, and therefore the first capacitor inspection third electrode 73s. The first capacitor for inspection 70e can be inspected without being affected by the potential of. Of the second capacitance inspection first terminal 79c and the second capacitance inspection second terminal 79d constituting the second capacitance inspection terminal pair 78, the second capacitance inspection second terminal 79d is the second capacitance inspection second terminal 79d. The first electrode 71t and the second capacitor inspection second electrode 72t are electrically connected. For this reason, when inspecting the inspection second capacitor 70f, the second capacitor inspection first electrode 71t and the second capacitor inspection second electrode 72t are at the same potential, so the second capacitor inspection second electrode 73t. The second inspection capacitor 70f can be inspected without being affected by the potential of the second capacitor 70f.

  Further, in this embodiment, as described with reference to FIG. 4B, each of the first dielectric layer 75 and the second dielectric layer 76 is composed of a plurality of dielectric films, and the lower layer side (substrate As viewed from the side of the main body 10w, the stacking order of the insulating films in the plurality of dielectric films constituting the first dielectric layer 75 and the plurality of dielectric films constituting the second dielectric layer 76 is the same. Therefore, when the polarity of the potential applied to the pixel electrode 9a is inverted with respect to the common potential Vcom, the polarity of the first electrode 71 and the second electrode 72 and the first electrode 71 and the third electrode 73 The polarity is inverted, but the arrangement of the insulating films is substantially the same regardless of the polarity. That is, when the pixel electrode 9a is positive, the silicon nitride film 75b of the first storage capacitor 70a and the silicon oxide film 76a of the second storage capacitor 70b are positive, while when the pixel electrode 9a is negative, the first storage The silicon oxide film 75a of the capacitor 70a and the silicon nitride film 76b of the second storage capacitor 70b are positive. Since the polarity of the insulating film is symmetrical between the positive period and the negative period of the pixel electrode 9a, problems such as a fixed potential shift hardly occur.

[Variation 1 of Embodiment 1]
In the first embodiment, the first capacitor inspection first terminal 79a is electrically connected to both the first capacitor inspection first electrode 71s and the first capacitor inspection third electrode 73s, and the second capacitor inspection second terminal. The terminal 79d is electrically connected to both the first electrode for second capacitance inspection 71t and the second electrode for second capacitance inspection 72t. However, in the configuration shown in FIG. 5, the first capacitor inspection first terminal 79a is not connected to the first capacitor inspection third electrode 73s but is connected to the first capacitor inspection first electrode 71s, and the second capacitor A structure may be employed in which the second inspection terminal 79d is electrically connected to the second capacitance inspection first electrode 71t without being electrically connected to the second capacitance inspection second electrode 72t.

[Modification 2 of Embodiment 1]
In the first embodiment, the first capacitor inspection 70e is the same layer as the third electrode 73 and overlaps the first capacitor inspection first electrode 71s via the second dielectric layer 76. The third capacitor 73s is provided, and the second capacitor for inspection 70f is a second capacitor that is the same layer as the second electrode 72 and overlaps the second capacitor inspection first electrode 71t via the first dielectric layer 75. The inspection second electrode 72t was provided. However, in the configuration described in the first embodiment or the first modification of the first embodiment, a structure in which the first capacitance inspection third electrode 73s and the second capacitance inspection second electrode 72t are not provided is adopted. Also good.

[Embodiment 2]
6A and 6B are explanatory diagrams of the inspection capacitor and the inspection terminal of the electro-optical device 100 according to the second embodiment of the present invention. FIGS. 6A and 6B are plan configurations of the inspection capacitor and the like. FIG. 2 is a plan view showing a cross-sectional structure of the inspection capacitor and the like. Since the basic configuration of this embodiment is the same as that of Embodiment 1, common portions are denoted by the same reference numerals and description thereof is omitted. In FIG. 6B, only the upper layer side than the interlayer insulating film 41 is shown.

  In the first embodiment, the first inspection capacitor 70e and the second inspection capacitor 70f are formed in different regions on the element substrate 10. However, as described below with reference to FIG. 6, the first inspection capacitor A structure in which 70e and the second capacitor for inspection 70f are stacked may be employed. Specifically, in the outer peripheral region 10 c of the element substrate 10, the first capacitor for inspection 70 e overlaps with the first electrode for inspection 71 u and the first electrode for inspection 71 u via the first dielectric layer 75 on the lower layer side. An inspection second capacitor 70f (second capacitor) is formed by overlapping the inspection second electrode 72u constituting the (first capacitor) and the inspection first electrode 71u via the second dielectric layer 76 on the upper layer side. The inspection third electrode 73u is formed. Here, as can be seen from a comparison between FIG. 4A and FIG. 6B, the first electrode for inspection 71u, the second electrode for inspection 72u, and the third electrode for inspection 73u are each the first electrode 71. The conductive film is formed simultaneously with the second electrode 72 and the third electrode 73. Therefore, the first inspection electrode 71u is located in the same layer as the first electrode 71, the second inspection electrode 72u is located in the same layer as the second electrode 72, and the third inspection electrode 73u is the third layer. Located in the same layer as the electrode 73.

  On the interlayer insulating film 44, a first terminal 79e for inspection, a second terminal 79f for inspection, and a third terminal 79g for inspection are formed of a conductive film formed simultaneously with the pixel electrode 9a. The first terminal 79e and the second inspection terminal 79f constitute a first capacitance inspection terminal pair 77 that is electrically connected to the first inspection capacitor 70e. The first inspection terminal 79e and the third inspection terminal 79g constitute a second capacitance inspection terminal pair 78 that is electrically connected to the inspection second capacitor 70f. In this embodiment, the first inspection capacitor 70e and the second inspection capacitor 70f extend along the end portion of the element substrate 10, and the first inspection capacitor 70e and the second inspection capacitor 70f extend in the extending direction. A first inspection terminal 79e and a second inspection terminal 79f are formed at positions sandwiched between both sides. The third inspection terminal 79g is formed between the first inspection terminal 79e and the second inspection terminal 79f at a position overlapping the first inspection capacitor 70e and the second inspection capacitor 70f.

  On the interlayer insulating film 42, relay electrodes 6j, 6k, 6l made of a conductive film formed simultaneously with the data line 6a are formed. On the interlayer insulating film 43, formed simultaneously with the capacitor line 7a. Relay electrodes 7g, 7h, and 7i made of the conductive film are formed. The first inspection terminal 79e is electrically connected to the relay electrode 7g through a contact hole 44g that penetrates the interlayer insulating film 44, and the relay electrode 7g is connected to the relay electrode 6j through a contact hole 43g that penetrates the interlayer insulating film 43. The relay electrode 6j is electrically connected to the first electrode 71u for capacitance inspection through a contact hole 42n penetrating the interlayer insulating film 42 and the second dielectric layer 76. Therefore, the first inspection terminal 79e is electrically connected to the first electrode 71u for capacity inspection.

  The second inspection terminal 79f is electrically connected to the relay electrode 7h via a contact hole 44h penetrating the interlayer insulating film 44, and the relay electrode 7h is connected to the relay electrode 6k via a contact hole 43h penetrating the interlayer insulating film 43. The relay electrode 6k is electrically connected to the inspection second electrode 72u through a contact hole 42o penetrating the interlayer insulating film 42, the second dielectric layer 76, and the first dielectric layer 75. For this reason, the second inspection terminal 79f is electrically connected to the second inspection electrode 72u.

  The third inspection terminal 79g is electrically connected to the relay electrode 7i through a contact hole 44i that penetrates the interlayer insulating film 44, and the relay electrode 7i is connected to the relay electrode 6l via a contact hole 43i that penetrates the interlayer insulating film 43. The relay electrode 61 is electrically connected to the inspection third electrode 73u through a contact hole 42p penetrating the interlayer insulating film 42. Therefore, the third inspection terminal 79g is electrically connected to the third inspection electrode 73u.

  In this manner, in the present embodiment, the first inspection element is configured by the inspection first capacitor 70e (first capacitor) and the first capacitor inspection terminal pair 77, and the inspection second capacitor 70f (second capacitor). The second capacitance inspection terminal pair 78 constitutes a second inspection element.

  Accordingly, the probe is brought into contact with each of the first capacity inspection terminal pair 77 (the first terminal for inspection 79e and the second terminal for inspection 79f), and whether or not there is a short circuit between the first capacity inspection terminal pair 77, If the withstand voltage, capacitance, etc. are inspected, the presence / absence of a short circuit, withstand voltage, capacitance, etc. in the first inspection capacitor 70e can be inspected without being affected by the second inspection capacitor 70f. . Therefore, according to the inspection result of the first inspection capacitor 70e, the presence or absence of a short circuit in the first storage capacitor 70a, the withstand voltage, the capacitance, etc. are not affected by the second storage capacitor 70b of the storage capacitor 70. Can be inspected. At this time, if the probe brought into contact with the first inspection terminal 79e is also brought into contact with the third inspection terminal 79g, the first inspection electrode 71u and the third inspection electrode 73u have the same potential. Therefore, the presence / absence of a short circuit, the withstand voltage, and the capacitance of the first capacitor for inspection 70e can be inspected without being affected by the potential of the third electrode for inspection 73u.

  Further, a probe is brought into contact with each of the second capacitance inspection terminal pair 78 (the first inspection terminal 79e and the third inspection terminal 79g), and whether or not there is a short circuit between the second capacitance inspection terminal pair 78, If the withstand voltage, capacitance, etc. are inspected, it is possible to inspect the presence / absence of a short circuit, withstand voltage, capacitance, etc. in the second inspection capacitor 70f without being affected by the first inspection capacitor 70e. . Therefore, according to the inspection result of the second inspection capacitor 70f, the presence / absence of a short circuit in the second storage capacitor 70b, withstand voltage, capacitance, etc. are not affected by the first storage capacitor 70a of the storage capacitor 70. Can be inspected. At this time, if the probe brought into contact with the first inspection terminal 79e is also brought into contact with the second inspection terminal 79f, the first inspection electrode 71u and the second inspection electrode 72u have the same potential. Therefore, it is possible to inspect the presence / absence of a short circuit, the withstand voltage, and the capacitance of the second capacitor for inspection 70f without being affected by the potential of the second electrode for inspection 72u.

In the above configuration, when each component for inspection is represented by a serial number from the components constituting the storage capacitor 70, the following relational inspection first electrode 71u = fourth electrode, seventh electrode 2 electrode 72u = 5th electrode, 8th electrode 3rd electrode for inspection 73u = 6th electrode, 9th electrode 1st terminal for inspection 79e = 1st terminal, 3rd terminal 2nd terminal for inspection 79f = 2nd terminal Inspection Third terminal 79g = fourth terminal First dielectric layer 75 = third dielectric layer, fifth dielectric layer Second dielectric layer 76 = corresponding to the fourth dielectric layer, the sixth dielectric layer.

[Modification of Embodiment 2]
In the second embodiment, a probe is brought into contact with each of the first capacitance inspection terminal pair 77 (the inspection first terminal 79e and the inspection second terminal 79f) to inspect the inspection first capacitor 70e. The probe brought into contact with the first inspection terminal 79e is also brought into contact with the third inspection terminal 79g, but the probe brought into contact with the first inspection terminal 79e is brought into contact with the third inspection terminal 79g. You may employ | adopt the method not to let it be. In the second embodiment, a probe is brought into contact with each of the second capacitance inspection terminal pair 78 (the first inspection terminal 79e and the third inspection terminal 79g) to inspect the inspection second capacitor 70f. When performing, the probe brought into contact with the first test terminal 79e was also brought into contact with the second test terminal 79f, but the probe brought into contact with the first test terminal 79e was used as the second test terminal 79f. You may employ | adopt the method which does not contact | abut.

[Embodiment 3]
7A and 7B are explanatory views showing a cross-sectional structure of the pixel 100a of the electro-optical device 100 according to Embodiment 3 of the present invention. FIGS. 7A and 7B are cross-sectional views when the element substrate 10 is cut. FIG. 4 is an explanatory diagram showing a cross-sectional structure of the storage capacitor 70.

  In the first and second embodiments, the first electrode 71 of the storage capacitor 70 is electrically connected to the capacitor line 7a, and the second electrode 72 and the third electrode 73 are electrically connected to the pixel electrode 9a side. 7A and 7B, the first electrode 71 of the storage capacitor 70 is conducted to the pixel electrode 9a side, and the second electrode 72 and the third electrode 73 are conducted to the capacitor line 7a. A structure may be adopted.

  More specifically, as shown in FIG. 7A, the relay electrode 6b that conducts to the capacitor line 7a is a contact hole that penetrates the interlayer insulating film 42, the second dielectric layer 76, and the first dielectric layer 75. It is electrically connected to the second electrode 72 via 42r and electrically connected to the third electrode 73 via a contact hole 42s penetrating the interlayer insulating film 42. In addition, the relay electrode 6 c that conducts to the pixel electrode 9 a is conducted to the first electrode 71 through a contact hole 42 t that penetrates the interlayer insulating film 42 and the second dielectric layer 76. The first electrode 71 is electrically connected to the pixel electrode side source / drain region 1i through a contact hole 41c penetrating the first dielectric layer 75, the interlayer insulating film 41 and the gate insulating layer 2.

  In the electro-optical device 100 having such a configuration, as in the first embodiment, as shown in FIG. 7B, each of the first dielectric layer 75 and the second dielectric layer 76 is composed of a plurality of dielectric films. As seen from the lower layer side (substrate body 10 w side), the stacking order of the insulating films in the plurality of dielectric films constituting the first dielectric layer 75 and the plurality of dielectric films constituting the second dielectric layer 76 is Are the same. More specifically, the first dielectric layer 75 has a structure in which a silicon oxide film 75a and a silicon nitride film 75b are laminated in this order when viewed from the lower layer side (the substrate body 10w side). The layer 76 has a structure in which a silicon oxide film 76a and a silicon nitride film 76b are laminated in this order when viewed from the lower layer side (substrate body 10w side).

[Other embodiments]
In the above embodiment, a transmissive liquid crystal device is exemplified as the electro-optical device, but the present invention may be applied to a reflective liquid crystal device. In the above embodiment, the storage capacitor 70 is provided in a region overlapping the scanning line 3a. However, when the storage capacitor 70 is provided in a region overlapping the data line 6a, the storage capacitor 70 is provided in the scanning line 3a and the data line 6a. The present invention may be applied to the case where it is provided in a region that overlaps both.

[Other electro-optical devices]
In the above-described embodiment, the liquid crystal device has been described as an example of the electro-optical device, but the present invention is not limited to this, and an organic electroluminescence display device, a plasma display, an FED (Field Emission Display), an SED (Surface-) The present invention may be applied to electro-optical devices such as a Conduction Electron-Emitter Display (LED), an LED (light emitting diode) display device, and an electrophoretic display device.

[Example of mounting on electronic devices]
(Configuration example of projection display device and optical unit)
FIG. 8 is a schematic configuration diagram of a projection display device (electronic device) and an optical unit to which the present invention is applied, and FIGS. 8A and 8B each show a projection display using a transmissive liquid crystal device. It is explanatory drawing of an apparatus and explanatory drawing of the projection type display apparatus using a reflection type liquid crystal device.

  8A is an example in which a transmissive liquid crystal panel is used as a liquid crystal panel, whereas the projection display apparatus 1000 shown in FIG. 8B is a liquid crystal panel. This is an example using a reflective liquid crystal panel. However, as will be described below, each of the projection display devices 110 and 1000 includes a light source unit 130 and 1021, and a plurality of electro-optical devices 100 to which light in different wavelength ranges is supplied from the light source units 130 and 1021. Cross dichroic prisms 119 and 1027 (light combining optical system) that combine and output the light emitted from the plurality of electro-optical devices 100, and projection optical systems 118 and 1029 that project the light combined by the light combining optical system. Have. In the projection display devices 110 and 1000, an optical unit 200 including the electro-optical device 100 and cross dichroic prisms 119 and 1027 (light combining optical system) is used.

(First example of projection display device)
A projection display device 110 shown in FIG. 8A is a so-called projection type projection display device that irradiates light onto a screen 111 provided on the viewer side and observes the light reflected by the screen 111. . The projection display device 110 includes a light source unit 130 including a light source 112, dichroic mirrors 113 and 114, liquid crystal light valves 115 to 117, a projection optical system 118, a cross dichroic prism 119 (combining optical system), and a relay. System 120.

  The light source 112 is composed of an ultrahigh pressure mercury lamp that supplies light including red light R, green light G, and blue light B. The dichroic mirror 113 is configured to transmit the red light R from the light source 112 and reflect the green light G and the blue light B. The dichroic mirror 114 is configured to transmit the blue light B and reflect the green light G out of the green light G and the blue light B reflected by the dichroic mirror 113. Thus, the dichroic mirrors 113 and 114 constitute a color separation optical system that separates the light emitted from the light source 112 into red light R, green light G, and blue light B.

  Here, between the dichroic mirror 113 and the light source 112, an integrator 121 and a polarization conversion element 122 are arranged in order from the light source 112. The integrator 121 is configured to uniformize the illuminance distribution of the light emitted from the light source 112. Further, the polarization conversion element 122 is configured to change the light from the light source 112 into polarized light having a specific vibration direction such as s-polarized light.

  The liquid crystal light valve 115 is a transmissive liquid crystal device that modulates red light transmitted through the dichroic mirror 113 and reflected by the reflection mirror 123 in accordance with an image signal. The liquid crystal light valve 115 includes a λ / 2 phase difference plate 115a, a first polarizing plate 115b, an electro-optical device 100 (red liquid crystal panel 100R), and a second polarizing plate 115d. Here, the red light R incident on the liquid crystal light valve 115 remains as s-polarized light because the polarization of the light does not change even if it passes through the dichroic mirror 113.

  The λ / 2 phase difference plate 115a is an optical element that converts s-polarized light incident on the liquid crystal light valve 115 into p-polarized light. The first polarizing plate 115b is a polarizing plate that blocks s-polarized light and transmits p-polarized light. The electro-optical device 100 (the red liquid crystal panel 100R) is configured to convert p-polarized light into s-polarized light (circularly polarized light or elliptically polarized light in the case of halftone) by modulation according to an image signal. Furthermore, the second polarizing plate 115d is a polarizing plate that blocks p-polarized light and transmits s-polarized light. Therefore, the liquid crystal light valve 115 is configured to modulate the red light R according to the image signal and emit the modulated red light R toward the cross dichroic prism 119.

  Note that the λ / 2 phase difference plate 115a and the first polarizing plate 115b are disposed in contact with a light-transmitting glass plate 115e that does not convert the polarization, and the λ / 2 phase difference plate 115a and the first polarization plate 115b are arranged in contact with each other. It is possible to avoid the polarizing plate 115b from being distorted by heat generation.

  The liquid crystal light valve 116 is a transmissive liquid crystal device that modulates green light G reflected by the dichroic mirror 114 after being reflected by the dichroic mirror 113 in accordance with an image signal. Similar to the liquid crystal light valve 115, the liquid crystal light valve 116 includes a first polarizing plate 116b, an electro-optical device 100 (green liquid crystal panel 100G), and a second polarizing plate 116d. Green light G incident on the liquid crystal light valve 116 is s-polarized light that is reflected by the dichroic mirrors 113 and 114 and then incident. The first polarizing plate 116b is a polarizing plate that blocks p-polarized light and transmits s-polarized light. The electro-optical device 100 (green liquid crystal panel 100G) is configured to convert s-polarized light into p-polarized light (circularly polarized light or elliptically polarized light in the case of halftone) by modulation according to an image signal. The second polarizing plate 116d is a polarizing plate that blocks s-polarized light and transmits p-polarized light. Therefore, the liquid crystal light valve 116 is configured to modulate the green light G in accordance with the image signal and emit the modulated green light G toward the cross dichroic prism 119.

  The liquid crystal light valve 117 is a transmissive liquid crystal device that modulates the blue light B reflected by the dichroic mirror 113, transmitted through the dichroic mirror 114, and then passed through the relay system 120 in accordance with an image signal. Like the liquid crystal light valves 115 and 116, the liquid crystal light valve 117 includes a λ / 2 phase difference plate 117a, a first polarizing plate 117b, an electro-optical device 100 (blue liquid crystal panel 100B), and a second polarizing plate 117d. I have. Here, the blue light B incident on the liquid crystal light valve 117 is reflected by two reflecting mirrors 125a and 125b (to be described later) of the relay system 120 after being reflected by the dichroic mirror 113 and transmitted through the dichroic mirror 114. It has become.

  The λ / 2 phase difference plate 117a is an optical element that converts s-polarized light incident on the liquid crystal light valve 117 into p-polarized light. The first polarizing plate 117b is a polarizing plate that blocks s-polarized light and transmits p-polarized light. The electro-optical device 100 (blue liquid crystal panel 100B) is configured to convert p-polarized light to s-polarized light (circularly polarized light or elliptically polarized light if it is a halftone) by modulation according to an image signal. Furthermore, the second polarizing plate 117d is a polarizing plate that blocks p-polarized light and transmits s-polarized light. Therefore, the liquid crystal light valve 117 is configured to modulate the blue light B according to the image signal and emit the modulated blue light B toward the cross dichroic prism 119. The λ / 2 phase difference plate 117a and the first polarizing plate 117b are arranged in contact with the glass plate 117e.

  The relay system 120 includes relay lenses 124a and 124b and reflection mirrors 125a and 125b. The relay lenses 124a and 124b are provided to prevent light loss due to the long optical path of the blue light B. Here, the relay lens 124a is disposed between the dichroic mirror 114 and the reflection mirror 125a. The relay lens 124b is disposed between the reflection mirrors 125a and 125b. The reflection mirror 125a is disposed so as to reflect the blue light B transmitted through the dichroic mirror 114 and emitted from the relay lens 124a toward the relay lens 124b. The reflection mirror 125b is disposed so as to reflect the blue light B emitted from the relay lens 124b toward the liquid crystal light valve 117.

  The cross dichroic prism 119 is a color combining optical system in which two dichroic films 119a and 119b are arranged orthogonally in an X shape. The dichroic film 119a is a film that reflects blue light B and transmits green light G, and the dichroic film 119b is a film that reflects red light R and transmits green light G. Therefore, the cross dichroic prism 119 is configured to combine the red light R, the green light G, and the blue light B modulated by each of the liquid crystal light valves 115 to 117 and emit the resultant light toward the projection optical system 118. Yes.

  Note that light incident on the cross dichroic prism 119 from the liquid crystal light valves 115 and 117 is s-polarized light, and light incident on the cross dichroic prism 119 from the liquid crystal light valve 116 is p-polarized light. Thus, by making the light incident on the cross dichroic prism 119 into different types of polarized light, the light incident from the liquid crystal light valves 115 to 117 in the cross dichroic prism 119 can be synthesized. Here, in general, the dichroic films 119a and 119b are excellent in s-polarized reflection transistor characteristics. For this reason, red light R and blue light B reflected by the dichroic films 119a and 119b are s-polarized light, and green light G transmitted through the dichroic films 119a and 119b is p-polarized light. The projection optical system 118 has a projection lens (not shown) and is configured to project the light combined by the cross dichroic prism 119 onto the screen 111.

(Second example of projection display device)
A projection display device 1000 shown in FIG. 8B has a light source unit 1021 that generates light source light, and light source light emitted from the light source unit 1021 in three colors of red light R, green light G, and blue light B. It has a color separation light guide optical system 1023 that separates into color light, and a light modulator 1025 that is illuminated by the light source light of each color emitted from the color separation light guide optical system 1023. Further, the projection display apparatus 1000 uses a cross dichroic prism 1027 (combining optical system) that synthesizes the image light of each color emitted from the light modulation unit 1025 and the image light that has passed through the cross dichroic prism 1027 on a screen (not shown). A projection optical system 1029 for projecting.

  In the projection display apparatus 1000, the light source unit 1021 includes a light source 1021a, a pair of fly-eye optical systems 1021d and 1021e, a polarization conversion member 1021g, and a superimposing lens 1021i. In the present embodiment, the light source unit 1021 includes a reflector 1021f having a paraboloid and emits parallel light. The fly-eye optical systems 1021d and 1021e are composed of a plurality of element lenses arranged in a matrix in a plane orthogonal to the system optical axis, and the light source light is divided and condensed and diverged individually by these element lenses. The polarization conversion member 1021g converts the light source light emitted from the fly-eye optical system 1021e into, for example, only a p-polarized component parallel to the drawing, and supplies it to the optical path downstream optical system. The superimposing lens 1021i allows the plurality of electro-optical devices 100 provided in the light modulation unit 1025 to be uniformly superimposed and illuminated by appropriately converging the light source light that has passed through the polarization conversion member 1021g as a whole.

  The color separation light guide optical system 1023 includes a cross dichroic mirror 1023a, a dichroic mirror 1023b, and reflection mirrors 1023j and 1023k. In the color separation light guide optical system 1023, the substantially white light source light from the light source unit 1021 enters the cross dichroic mirror 1023a. The red light R reflected by one of the first dichroic mirrors 1031a constituting the cross dichroic mirror 1023a is reflected by the reflecting mirror 1023j, passes through the dichroic mirror 1023b, and transmits the incident side polarizing plate 1037r and p-polarized light. The light enters the electro-optical device 100 (red liquid crystal panel 100R) as p-polarized light through the wire grid polarizer 1032r that reflects s-polarized light and the optical compensation plate 1039r.

  Further, the green light G reflected by the first dichroic mirror 1031a is reflected by the reflecting mirror 1023j and then also reflected by the dichroic mirror 1023b to transmit the incident side polarizing plate 1037g and p-polarized light while reflecting s-polarized light. The light is incident on the electro-optical device 100 (green liquid crystal panel 100G) as p-polarized light via the wire grid polarizing plate 1032g and the optical compensation plate 1039g.

  On the other hand, the blue light B reflected by the other second dichroic mirror 1031b constituting the cross dichroic mirror 1023a is reflected by the reflection mirror 1023k and transmits the incident-side polarizing plate 1037b, p-polarized light, while s The light enters the electro-optical device 100 (blue liquid crystal panel 100B) as p-polarized light through the wire grid polarizing plate 1032b that reflects the polarized light and the optical compensation plate 1039b. The optical compensation plates 1039r, 1039g, and 1039b optically compensate for the characteristics of the liquid crystal layer by adjusting the polarization state of the incident light and the emitted light to the electro-optical device 100.

  In the projection display apparatus 1000 configured as described above, the three colors of light incident through the optical compensation plates 1039r, 1039g, and 1039b are modulated by the electro-optical devices 100, respectively. At this time, of the modulated light emitted from the electro-optical device 100, the s-polarized component light is reflected by the wire grid polarizers 1032r, 1032g, and 1032b, and cross-dichroic via the exit-side polarizers 1038r, 1038g, and 1038b. Incident on the prism 1027. The cross dichroic prism 1027 is formed with a first dielectric multilayer film 1027a and a second dielectric multilayer film 1027b that intersect in an X shape, and the first dielectric multilayer film 1027a reflects the red light R. The other second dielectric multilayer film 1027b reflects the blue light B. Therefore, the three colors of light are combined by the cross dichroic prism 1027 and emitted to the projection optical system 1029. The projection optical system 1029 projects the color image light combined by the cross dichroic prism 1027 onto a screen (not shown) at a desired magnification.

(Other projection display devices)
In addition, about a projection type display apparatus, you may comprise the LED light source etc. which radiate | emit the light of each color as a light source part, and supply each color light radiate | emitted from this LED light source to another liquid crystal device. .

(Other electronic devices)
As for the electro-optical device 100 to which the present invention is applied, in addition to the electronic devices described above, mobile phones, personal digital assistants (PDAs), digital cameras, liquid crystal televisions, car navigation devices, video phones, POS terminals In addition, it may be used as a direct-view display device in an electronic device such as a device provided with a touch panel.

7a ... Capacitance line, 9a ... Pixel electrode, 10 ... Element substrate, 10a ... Image display area, 30 ... Pixel transistor, 50 ... Liquid crystal layer (electro-optic material layer), 70 ... Retention capacitance, 70a .. First holding capacitor, 70b .. Second holding capacitor, 70e .. First capacitor for inspection, 70f .. Second capacitor for inspection, 71 .. First electrode, 71s .. First for first capacitor inspection Electrode, 71t, first electrode for second capacitance inspection, 71u, first electrode for inspection, 72, second electrode, 72s, second electrode for first capacitance inspection, 72t, second capacitance inspection Second electrode, 72u, second electrode for inspection, 73, third electrode, 73s, third electrode for first capacitance inspection, 73t, third electrode for second capacitance inspection, 73u, second electrode for inspection 3 electrodes, 75 .. first dielectric layer, 76 .. second dielectric layer, 77 .. first capacitance inspection terminal pair, 8. Second capacitance inspection terminal pair, 79a, First capacitance inspection first terminal, 79b, First capacitance inspection second terminal, 79c, Second capacitance inspection first terminal, 79d, Second terminal for capacity inspection, 79e .. First terminal for capacity inspection, 79f .. Second terminal for capacity inspection, 79g .. Third terminal for capacity inspection, 100 .. Electro-optical device

Claims (9)

An electro-optical device having, in an image display area, a pixel electrode provided on one side of a substrate, a storage capacitor for holding the potential of the pixel electrode, and a switching element provided corresponding to the pixel electrode,
The holding capacity is
A first storage capacitor composed of a first electrode and a second electrode overlapping the first electrode on the substrate side via a first dielectric layer;
A second storage capacitor composed of the first electrode and a third electrode that overlaps the first electrode on a side opposite to the substrate via a second dielectric layer and is electrically connected to the second electrode;
With
An inspection first capacitor having the same layer structure as the first storage capacitor and an inspection having the same layer structure as the second storage capacitor between the edge of the substrate and the image display region A second capacitor for inspection, a first capacity inspection terminal pair electrically connected to the first inspection capacitor, and a second capacity inspection terminal pair electrically connected to the second inspection capacitor.
An electro-optical device comprising: Between the image display area of the substrate and the edge of the substrate,
A first electrode for first capacitance inspection located in the same layer as the first electrode;
A first capacitor inspection second electrode which is the same layer as the second electrode and overlaps the first capacitor inspection first electrode via the first dielectric layer;
A first electrode for capacitance inspection that overlaps the first electrode for capacitance inspection via the second dielectric layer in the same layer as the third electrode;
A first electrode for second capacitance inspection located in the same layer as the first electrode;
A second electrode for capacitance inspection that overlaps the first electrode for capacitance inspection via the first dielectric layer in the same layer as the second electrode;
A third electrode for second capacitance inspection that constitutes the second capacitance for inspection overlapping with the first electrode for second capacitance inspection via the second dielectric layer in the same layer as the third electrode;
Is provided,
The first capacitance inspection terminal pair includes a first capacitance inspection first terminal electrically connected to the first capacitance inspection first electrode and a first capacitance inspection second electrode electrically connected to the first capacitance inspection second electrode. Two terminals,
The second capacitance inspection terminal pair includes a second capacitance inspection first terminal electrically connected to the second capacitance inspection third electrode and a second capacitance inspection first electrode electrically connected to the second capacitance inspection first electrode. The electro-optical device according to claim 1, comprising two terminals. The first capacitor inspection first terminal is electrically connected to the first capacitor inspection first electrode and the first capacitor inspection third electrode;
3. The electro-optical device according to claim 2, wherein the second capacitance inspection second terminal is electrically connected to the second capacitance inspection first electrode and the second capacitance inspection second electrode. Between the image display region of the substrate and the edge of the substrate, the first dielectric for inspection is located in the same layer as the first electrode, and the first dielectric is formed in the same layer as the second electrode. A second electrode for inspection constituting the first capacitor for inspection overlapping the first electrode for inspection via a body layer, and the inspection through the second dielectric layer in the same layer as the third electrode A third electrode for inspection that constitutes the second capacitor for inspection overlapping the first electrode for inspection, a first terminal for inspection that conducts to the first electrode for inspection, and for inspection that conducts to the second electrode for inspection A second terminal, and a third terminal for inspection conducted to the third electrode for inspection,
The first capacitance inspection terminal pair is constituted by the inspection first electrode and the inspection second electrode,
2. The electro-optical device according to claim 1, wherein the second capacitance inspection terminal pair includes the first inspection electrode and the third inspection electrode. A pixel electrode provided in an image display region on one side of the substrate;
A storage capacitor for holding the potential of the pixel electrode;
Switching elements provided corresponding to the pixel electrodes;
A first inspection element provided between the edge of the substrate and the image display region in plan view;
A second inspection element provided between the edge of the substrate and the image display region in plan view;
Including
The holding capacity is
A first electrode, a first dielectric layer provided between the first electrode and the substrate, and a second electrode provided on the substrate side of the first electrode via the first dielectric layer A first holding capacity,
The first electrode, a second dielectric layer provided on the opposite side of the first electrode from the substrate, and a third dielectric layer provided on the opposite side of the first electrode from the substrate via the second dielectric layer. A second storage capacitor composed of electrodes;
With
The first inspection element is:
A fourth electrode formed in the same layer as the first electrode;
A third dielectric layer formed in the same layer as the first dielectric layer;
A fifth electrode formed in the same layer as the second electrode and formed on the substrate side of the fourth electrode via the third dielectric layer;
A fourth dielectric layer formed in the same layer as the second dielectric layer;
A sixth electrode formed in the same layer as the third electrode and formed on the opposite side of the substrate from the fourth electrode via the fourth dielectric layer;
A first terminal electrically connected to the fourth electrode;
A second terminal electrically connected to the fifth electrode;
With
The fourth electrode, the third dielectric layer, and the fifth electrode constitute a first capacitor,
The second inspection element is:
A seventh electrode formed in the same layer as the first electrode;
A fifth dielectric layer formed in the same layer as the first dielectric layer;
An eighth electrode formed in the same layer as the second electrode and formed on the substrate side of the seventh electrode via the fifth dielectric layer;
A sixth dielectric layer formed in the same layer as the second dielectric layer;
A ninth electrode formed in the same layer as the third electrode and formed on the opposite side of the seventh electrode from the substrate via the sixth dielectric layer;
A third terminal electrically connected to the seventh electrode;
A fourth terminal electrically connected to the ninth electrode;
With
An electro-optical device, wherein the seventh capacitor, the sixth dielectric layer, and the ninth electrode constitute a second capacitor.   6. The device according to claim 1, wherein at least a part of the first storage capacitor and the second storage capacitor overlaps the switching element on a side opposite to the substrate with respect to the switching element. The electro-optical device according to one item. Each of the first dielectric layer and the second dielectric layer has a plurality of dielectric films;
When viewed from the substrate side, the stacking order of the insulating films in the plurality of dielectric films constituting the first dielectric layer and the plurality of dielectric films constituting the second dielectric layer is the same. The electro-optical device according to any one of claims 1 to 6. A counter substrate facing one side of the substrate;
A liquid crystal layer held between the substrate and the counter substrate;
The electro-optical device according to claim 1, wherein the electro-optical device is provided.   An electronic apparatus comprising the electro-optical device according to claim 1.

Images