JP2013070017A - 半導体モジュール及びその製造方法 - Google Patents

半導体モジュール及びその製造方法 Download PDF

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Publication number
JP2013070017A
JP2013070017A JP2012061802A JP2012061802A JP2013070017A JP 2013070017 A JP2013070017 A JP 2013070017A JP 2012061802 A JP2012061802 A JP 2012061802A JP 2012061802 A JP2012061802 A JP 2012061802A JP 2013070017 A JP2013070017 A JP 2013070017A
Authority
JP
Japan
Prior art keywords
wiring
screw
semiconductor module
wiring board
radiator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2012061802A
Other languages
English (en)
Japanese (ja)
Inventor
Yasushi Takayama
泰史 高山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niterra Co Ltd
Original Assignee
NGK Spark Plug Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Spark Plug Co Ltd filed Critical NGK Spark Plug Co Ltd
Priority to JP2012061802A priority Critical patent/JP2013070017A/ja
Publication of JP2013070017A publication Critical patent/JP2013070017A/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/877—Bump connectors and die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Pressure Welding/Diffusion-Bonding (AREA)
  • Wire Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP2012061802A 2011-09-09 2012-03-19 半導体モジュール及びその製造方法 Pending JP2013070017A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2012061802A JP2013070017A (ja) 2011-09-09 2012-03-19 半導体モジュール及びその製造方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2011197069 2011-09-09
JP2011197069 2011-09-09
JP2012061802A JP2013070017A (ja) 2011-09-09 2012-03-19 半導体モジュール及びその製造方法

Publications (1)

Publication Number Publication Date
JP2013070017A true JP2013070017A (ja) 2013-04-18

Family

ID=48475309

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2012061802A Pending JP2013070017A (ja) 2011-09-09 2012-03-19 半導体モジュール及びその製造方法
JP2012061826A Withdrawn JP2013070018A (ja) 2011-09-09 2012-03-19 半導体モジュール及びその製造方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2012061826A Withdrawn JP2013070018A (ja) 2011-09-09 2012-03-19 半導体モジュール及びその製造方法

Country Status (1)

Country Link
JP (2) JP2013070017A (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7121027B2 (ja) * 2017-09-28 2022-08-17 京セラ株式会社 電子素子搭載用基板および電子装置
DE112023005535T5 (de) * 2023-01-11 2025-11-20 Mitsubishi Electric Corporation Leistungsmodul

Also Published As

Publication number Publication date
JP2013070018A (ja) 2013-04-18

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