JP2013033803A - Circuit board, semiconductor power module and manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the thermal diffusion property from a semiconductor device to a multilayer substrate and the bond strength between the multilayer substrate and the semiconductor device.SOLUTION: A semiconductor power module 30 comprises: a ceramic multilayer substrate 300; a junction layer 310; and a semiconductor device 330. The junction layer 310 is a thin layer in which a surface at the ceramic multilayer substrate 100 is formed in a planar shape. An insulation junction part 312 of the junction layer 310 is formed in a tapered shape from an edge of the semiconductor device 330 side toward an edge of the ceramic multilayer substrate 300 side. When the semiconductor device 330 is mounted, a projection part 335 of the semiconductor device 330 is received in a dent part 316, and is electrically connected to a conductive junction part 311 of the junction layer 310. Thereby a junction area between the semiconductor device 330 and the junction layer can be enlarged, the thermal diffusion property from the semiconductor device to the multilayer substrate can be improved while the bond strength and insulation performance between the multilayer substrate and the semiconductor device are ensured.

Description

  The present invention relates to a circuit board constituted by a ceramic multilayer substrate, a semiconductor power module in which a semiconductor element is mounted on the circuit board, and a manufacturing method thereof.

  In recent years, power module packages have become smaller, low-profile, and high-density, and in order to achieve this, a mounting method in which semiconductor elements are flip-chip connected using a ceramic multilayer substrate is used instead of the conventional wire bonding mounting method. A semiconductor module used has been proposed. Flip chip connection is a bonding method in which conductive protrusions called bumps are placed on a semiconductor element, and the bumps are aligned to the position where the semiconductor element is mounted on the ceramic multilayer board, and directly bonded to the ceramic multilayer board. The area required for mounting the semiconductor element can be reduced by about 20 to 30%, which can contribute to high-density mounting.

  In the semiconductor module using such a flip chip mounting method, an inorganic material is used in addition to a conventional organic material used as a sealing material in the gap between the bumps between the ceramic multilayer substrate and the semiconductor element. (For example, Patent Document 1).

JP 2004-253579 A JP 2006-066582 A JP 2010-287869 A JP 2009-170930 A

  In semiconductor element power modules, which are becoming more densely mounted by flip chip mounting, the bonding between the semiconductor element and the ceramic multilayer substrate is mainly an electric bonding part bonded by flip chip, and stress is applied to the bonding part. Will concentrate. For this reason, in the conventional semiconductor element power module, a space is generated between the ceramic multilayer substrate and the semiconductor element due to the occurrence of cracks in the joint due to stress concentration at the joint, and the ceramic multilayer substrate and the semiconductor element are There is a risk of reducing the bonding strength. In addition, air may enter the space, and the heat dissipation performance of the semiconductor element may be reduced due to the deterioration of the heat diffusion performance from the semiconductor element to the ceramic multilayer substrate. As described above, in the conventional semiconductor element power module, there is a possibility that the reliability characteristics are remarkably deteriorated.

  The present invention has been made in view of the above-described problems, and an object thereof is to improve the bonding strength between a ceramic multilayer substrate and a semiconductor element and to improve the thermal diffusion performance from the semiconductor element to the ceramic multilayer substrate. Furthermore, the present invention provides a module structure and a manufacturing process that are unlikely to cause deterioration in reliability such as poor electrical connection due to manufacturing variations of components caused by minute warping of a ceramic multilayer substrate.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

[Application Example 1]
A circuit board,
A multilayer substrate with vias and wiring patterns formed thereon;
A bonding layer disposed on a first surface of the multilayer substrate and bonding a semiconductor element having a conductive protrusion to the multilayer substrate;
With
The bonding layer is
An insulating joint made of an inorganic material, having an opening at a portion corresponding to the via, and insulating the multilayer substrate from the semiconductor element;
A conductive junction that is disposed in the opening and is used to conduct the wiring pattern to the semiconductor element, the conductive junction being thinner than the insulating junction;
Before fitting the projecting portion into the opening, d1 representing the thickness of the conductive joint portion, d2 representing the thickness of the insulating joint portion, and d3 representing the thickness of the projecting portion are d3> satisfies d2-d1.
Circuit board.

  According to the circuit board of Application Example 1, in the fitting of the projecting portion into the opening, the conductive joint portion and the insulating joint portion have the thickness of the conductive joint portion d1 and the thickness of the insulating joint portion d2. When d3 is expressed as d3, it is formed so as to satisfy d3> d2-d1. Therefore, when the semiconductor element is disposed in the recess, the electrical connection between the protruding portion and the conductive joint can be reliably ensured.

[Application Example 2]
A circuit board according to Application Example 1,
The insulating bonding portion is formed in a tapered shape from an end portion where the semiconductor element is bonded to an end portion where the multilayer substrate is bonded.
Circuit board.

  According to the circuit board of Application Example 2, the insulating bonding portion is formed in a shape that becomes narrower from the semiconductor element side toward the multilayer substrate side. Therefore, the contact area between the insulating junction and the semiconductor element can be made wider than the contact area between the insulating junction and the semiconductor element when the insulating junction is formed in a substantially columnar shape. Therefore, the thermal diffusion performance from the semiconductor element to the multilayer substrate can be improved while ensuring the bonding strength and insulation performance between the multilayer substrate and the semiconductor element.

[Application Example 3]
A circuit board according to Application Example 1 or Application Example 2,
The insulating joint is formed in a tapered shape,
Circuit board.

  According to the circuit board of Application Example 3, the insulating joint is formed in a tapered shape. Therefore, the insulating junction can be easily formed in a shape that narrows from the semiconductor element side toward the multilayer substrate side.

[Application Example 4]
A semiconductor power module,
A multilayer substrate with vias and wiring patterns formed thereon;
A semiconductor element disposed on a first surface side of the multilayer substrate;
A bonding layer disposed on the first surface of the multilayer substrate and bonding the multilayer substrate and the semiconductor element;
The bonding layer is
An insulating joint made of an inorganic material, having an opening at a portion corresponding to the via, and insulating the multilayer substrate and the semiconductor element from the end where the semiconductor element is joined An insulating joint formed in a tapered shape toward the end to which the multilayer substrate is joined;
A conductive junction disposed in the opening and conducting the wiring pattern and the semiconductor element;
A semiconductor power module.

  According to the semiconductor power module of Application Example 4, the insulating bonding portion is formed in a shape that narrows from the side where the semiconductor element is bonded toward the multilayer substrate side. Therefore, the contact area between the insulating junction and the semiconductor element can be made wider than the contact area between the insulating junction and the semiconductor element when the insulating junction is formed in a substantially columnar shape. Therefore, the thermal diffusion performance from the semiconductor element to the multilayer substrate can be improved while ensuring the bonding strength and insulation performance between the multilayer substrate and the semiconductor element.

[Application Example 5]
A semiconductor power module according to Application Example 4,
The insulating joint is formed in a tapered shape,
Semiconductor power module.

  According to the semiconductor power module of Application Example 5, the insulating junction is formed in a tapered shape. Therefore, the insulating junction can be easily formed in a shape that narrows from the semiconductor element side toward the multilayer substrate side.

[Application Example 6]
Fabricate a multilayer board with vias and wiring patterns,
A bonding layer for bonding the multilayer substrate and the semiconductor element is disposed on the first surface of the multilayer substrate,
The semiconductor element is disposed on the bonding layer;
The multilayer substrate, the bonding layer, and the semiconductor element are thermocompression bonded.
A method for manufacturing a semiconductor power module, comprising:
The arrangement of the bonding layer is as follows:
An insulating junction made of an inorganic material that insulates the multilayer substrate and the semiconductor element is disposed on the first surface,
Forming an opening in a portion corresponding to the via in the insulating junction;
Arranging a conductive joint thinner than the insulating joint in the opening;
The arrangement of the semiconductor elements is as follows:
The semiconductor element is disposed on the bonding layer by fitting the protrusion into the opening so that the protrusion formed on the semiconductor element can be electrically connected to the conductive joint. Including steps,
For the insulating joint and the conductive joint, d1 representing the thickness of the conductive joint, d2 representing the thickness of the insulating joint, and d3 representing the height of the protrusion are d3> d2−. satisfies d1,
Manufacturing method of semiconductor power module.

  According to the manufacturing method of the semiconductor power module of Application Example 6, the conductive joint portion and the insulating joint portion represent the thickness of the conductive joint portion as d1, the thickness of the insulating joint portion as d2, and the thickness of the protruding portion as d3. At this time, it is formed so as to satisfy d3> d2-d1. Therefore, the semiconductor element can be disposed in the recessed portion in a state in which the electrical connection between the protruding portion and the conductive joint portion is ensured. In addition, when the semiconductor element is arranged on the bonding layer, the semiconductor element floats from the surface of the bonding layer. However, the protrusion is melted by the heating at the time of bonding, and the semiconductor element is pressurized in the molten state. The element and the bonding layer are bonded to each other without a gap.

[Application Example 7]
Fabricate a multilayer board with vias and wiring patterns,
A bonding layer for bonding the multilayer substrate and the semiconductor element is disposed on the first surface of the multilayer substrate,
The semiconductor element is disposed on the bonding layer;
The multilayer substrate, the bonding layer, and the semiconductor element are thermocompression bonded.
A method for manufacturing a semiconductor power module, comprising:
The arrangement of the bonding layer is as follows:
An insulating junction made of an inorganic material that insulates the multilayer substrate and the semiconductor element is disposed on the first surface,
Forming an opening in a portion corresponding to the via in the insulating bonding portion so as to have a tapered shape from an end portion to which the semiconductor element is bonded toward an end portion to which the multilayer substrate is bonded;
Arranging a conductive joint thinner than the insulating joint in the opening;
The arrangement of the semiconductor elements is as follows:
The protruding portion is fitted into the opening so that the conductive protruding portion formed on the semiconductor element and the conductive bonding portion can conduct, and the semiconductor element is bonded to the bonding layer. Including placing on
Manufacturing method of semiconductor power module.

  According to the manufacturing method of the semiconductor power module of Application Example 7, the conductive joint portion can be formed in a shape that narrows from the side to which the semiconductor element is joined toward the multilayer substrate side. Accordingly, the contact area between the insulating junction and the semiconductor element can be made wider than the contact area between the insulating junction and the semiconductor element when the insulating junction is formed in a substantially columnar shape. Therefore, it is possible to manufacture a semiconductor power module with improved thermal diffusion performance from the semiconductor element to the multilayer substrate while ensuring insulation performance between the multilayer substrate and the semiconductor element.

[Application Example 8]
Fabricate a multilayer board with vias and wiring patterns,
A bonding layer for bonding a semiconductor element to the multilayer substrate is disposed on the first surface of the multilayer substrate;
Bonding the multilayer substrate and the bonding layer by the adhesive force of the organic component contained in the bonding layer,
A method of manufacturing a circuit board used for mounting a semiconductor element,
The arrangement of the bonding layer is as follows:
An insulating junction made of an inorganic material for insulating the multilayer substrate and the semiconductor element is disposed on the first surface,
Forming an opening in a portion of the insulating joint corresponding to the via;
Arranging a conductive joint thinner than the insulating joint in the opening;
The insulating bonding portion and the conductive bonding portion are expressed as d1 indicating the thickness of the conductive bonding portion, d2 indicating the thickness of the insulating bonding portion, and the height of the protruding portion formed in the semiconductor element. d3 satisfies d3> d2-d1.
A method of manufacturing a circuit board.

  According to the circuit board manufacturing method of Application Example 8, when the conductive joint portion and the insulating joint portion are represented by the thickness of the conductive joint portion as d1, the thickness of the insulating joint portion as d2, and the thickness of the protruding portion as d3. And d3> d2-d1. Therefore, the semiconductor element can be disposed in the recessed portion while ensuring the electrical connection between the protruding portion and the conductive joint portion. In addition, when the semiconductor element is arranged on the bonding layer, the semiconductor element floats from the surface of the bonding layer. However, the protrusion is melted by the heating at the time of bonding, and the semiconductor element is pressurized in the molten state. The element and the bonding layer are bonded to each other without a gap.

  In the present invention, the various aspects described above can be applied by appropriately combining or omitting some of them.

Sectional drawing which shows schematic structure of the semiconductor power module 10 in 1st Example. Explanatory drawing explaining the semiconductor power module 10 in 1st Example. Process drawing explaining the manufacturing method of the semiconductor power module 10 in 1st Example. Explanatory drawing explaining the arrangement | positioning process of the insulation junction part 112 in step S12. Explanatory drawing explaining the formation process of the opening part 115 in step S14. Explanatory drawing explaining the arrangement | positioning process of the conductive junction part 111 in step S16. Explanatory drawing explaining the joining process of the semiconductor power module 10 in 1st Example. Sectional drawing explaining the structure of the semiconductor power module 30 in 2nd Example. Sectional drawing explaining the structure of the semiconductor power module 30 in 2nd Example. Explanatory drawing which shows schematic structure of the semiconductor power module 40 in the modification 1. FIG. Explanatory drawing explaining the arrangement | positioning process of the joining layer 410 in the modification 1. FIG. The top view which shows the semiconductor power module 50 in the modification 2. FIG. Sectional drawing which shows the semiconductor power module 50 in the modification 2. FIG.

A. First embodiment:
A1. General configuration of the semiconductor power module:
FIG. 1 is a cross-sectional view showing a schematic configuration of a semiconductor power module 10 in the first embodiment. FIG. 2 is an explanatory diagram for explaining the semiconductor power module 10 according to the first embodiment. The semiconductor power module 10 includes a ceramic multilayer substrate 100, a bonding layer 110, and a semiconductor element 130.

The ceramic multilayer substrate 100 is formed of a ceramic material. As the ceramic material, for example, alumina oxide (Al ₂ O ₃ ), aluminum nitride (AlN), silicon nitride (Si ₃ N ₄ ), or the like is used. The ceramic multilayer substrate 100 is formed between a first surface 105 on which a semiconductor element is mounted and the other second surface 106 facing the surface 105 and on which other electronic components such as a control circuit and a capacitor can be mounted. An inner layer via hole 101 for electrical connection, a wiring pattern 109, and an electrode terminal 104 for external connection disposed on the second surface 106 are provided. The wiring pattern 109 is formed on the surface of the ceramic multilayer substrate 100 and the surface of the inner layer. In FIG. 1, the wiring pattern formed on the surface of the ceramic multilayer substrate 100 is omitted. Electrode lands (not shown) for mounting the semiconductor element 130 and other electronic components are formed on the first surface 105 and the second surface 106 of the ceramic multilayer substrate 100. The semiconductor element 130 is electrically connected to the electrode terminal 104 disposed on the second surface 106 via the inner layer via hole 101 and the wiring pattern 109.

  The bonding layer 110 is a thin film layer that is disposed on the first surface 105 of the ceramic multilayer substrate 100 and includes a conductive bonding portion 111, an insulating bonding portion 112, and a protruding portion 135 of a semiconductor element 130 described later. The bonding layer 110 has a smooth surface on the first surface 105 side. In the embodiment, a state in which the protruding portion 135 is not included will also be described as the bonding layer 110.

  The insulating joint 112 insulates the semiconductor element 130 and the ceramic multilayer substrate 100. As shown in FIG. 2, the insulating bonding portion 112 is disposed on the first surface 105 of the ceramic multilayer substrate 100, and an opening 115 is formed in a portion 107 (shown by a thick solid line) corresponding to the inner layer via hole 101. Has been. In other words, the insulating bonding portion 112 is disposed on the first surface 105 of the ceramic multilayer substrate 100 and on a portion 108 (shown by a thick broken line) excluding the portion 107 corresponding to the inner layer via hole 101. The insulating bonding portion 112 is formed of a glass composition containing an insulating inorganic material as a main component. For example, silicon oxide, zinc oxide, or the like may be used as the insulating inorganic material.

  The conductive joint 111 electrically connects the semiconductor element 130 and the ceramic multilayer substrate 100. As shown in FIG. 2, the conductive bonding portion 111 is disposed in the opening 115 and on the first surface 105 of the ceramic multilayer substrate 100. In other words, the conductive joint portion 111 is disposed on the portion 107 corresponding to the inner layer via hole 101. The conductive joint portion 111 is formed using a conductive metal as a main component. For example, copper, silver, aluminum metal, or the like may be used as the conductive metal. The conductive bonding portion 111 has at least a bonding surface with the first surface 105 formed in a planar shape.

  As shown in FIG. 1, the bonding layer 110 also has a recess 116 formed by a conductive bonding portion 111 and an insulating bonding portion 112. The recess 116 has a volume equal to or greater than the total volume of metal protrusions 135 formed in the semiconductor element 130 described later, and the thickness of the conductive junction 111 is d1 as shown in FIG. 1 and FIG. When the thickness of the insulating joint 112 is d2, the height of the protrusion 135 is d3, and the tolerance of the height variation of the protrusion 135 caused by the warp of the ceramic multilayer substrate 100 is d4, the protrusion 135 The height d3 is larger than the height obtained by adding d4 to the height (d2-d1) of the recess 116 formed by the insulating joint 112 and the conductive joint 111, that is, d3 ≧ ( It is designed to satisfy d2−d1) + d4.

Since the ceramic multilayer substrate 100 may be slightly warped at the time of manufacture, if the height in the thickness direction of the recessed portion 116 is equal to the height in the thickness direction of the protruding portion 135, the warp of the ceramic multilayer substrate 100 is small. As a result, a gap may be formed between the tip of the projecting portion 135 on the side of the depressed portion 116 and the opposed depressed portion 116. That is, the electrical connection between the protrusion 135 and the conductive joint 111 cannot be secured. Therefore, the height in the thickness direction of the recess portion 116 takes into account the height variation d4 in the thickness direction of the ceramic multilayer substrate 100, that is, satisfies d3> d2-d1, so that the semiconductor element 130 into the recess portion 116 is satisfied. In the arrangement, the electrical connection between the protrusion 135 and the conductive joint 111 can be reliably ensured. Even if a slight warp or the like occurs in the ceramic multilayer substrate 100, a variation in the height of the bonding surface of d3- (d2-d1) or less is allowed.

  For convenience of explanation, d1 and d2 are simply expressed as thicknesses in the above, but the thicknesses of the conductive joints 111 and the insulating joints 112 may not be completely uniform. Variations may occur. Further, the protruding portion 135 of the semiconductor element 130 is not only formed in a planar shape as shown in the first embodiment, but may be formed in a spherical shape, for example. Therefore, d1 to d3 may be defined as follows. That is, d1 represents the maximum value of the distance from the first surface 105 of the ceramic multilayer substrate 100 to the surface on the semiconductor element 130 side of the conductive junction 111 in the conductive junction 111, and d2 represents the ceramic multilayer substrate 100. Represents the maximum value of the distance from the first surface 105 to the surface of the insulating junction 112 on the semiconductor element 130 side, and d3 is a protruding portion from the junction surface of the semiconductor element 130 with the bonding layer 110. 135 is the maximum height in the stacking direction.

  The semiconductor element 130 includes an electrode pad 131 and a protruding portion 135 made of a metal bump 133. The electrode pad 131 is made of, for example, gold (Au) as a main component. The bump 133 is formed in a protruding shape on the electrode pad 131. The bump 133 may be formed by previously arranging a metal column processed into a bump shape at a desired position, or a paste mainly containing a metal species such as aluminum metal or silver oxide is used as the electrode pad 131. Further, it may be formed by a transfer method using a photolithographic pattern or a printing method using screen printing.

  The semiconductor element 130 is disposed on the bonding layer 110 such that the protruding portion 135 is accommodated in the recessed portion 116. When the semiconductor element 130 is integrally bonded to the ceramic multilayer substrate 100 and the bonding layer 110 by heating and pressurization, the ceramic multilayer substrate 100 and the semiconductor element 130 are connected to the conductive bonding portion 111, the protruding portion 135, that is, the bump. 133 and the electrode pads 131 are electrically connected. For convenience of explanation, in each drawing, the bump 133 and the conductive joint 111 are described without change in shape before and after the bonding, but the bump 133 and the conductive joint 111 are indented 116 due to heat deformation at the time of joining. Inside, the space portion is deformed so as to be filled, and the interface between the insulating bonding portion 112 and the semiconductor element 130 is formed in a planar shape. The difference between the volume of the recess 116 shown in FIG. 1 and the volume of the protrusion 135 is smaller than the volume of the recess 116 before integration with the semiconductor element 130. The bonding strength between the semiconductor element 130 and the ceramic multilayer substrate 100 is exhibited by the insulating bonding portion 112 in addition to the protruding portion 135 and the conductive bonding portion 111, and is caused by the difference in thermal expansion of each member due to the heat generated when the semiconductor element 130 is driven. The resulting stress is distributed to the conductive joint 111 and the insulating joint 112. As a result, the durability reliability of the semiconductor module is improved. Heat generated during operation of the semiconductor element 130 is diffused to the ceramic multilayer substrate 100 through the protrusions 135 and the conductive joints 111 and is diffused to the ceramic multilayer substrate 100 through the insulating joints 112. As a result, the temperature rise of the semiconductor element is suppressed.

  The protrusion 135 and the recess 116 are preferably formed so that the volume of the protrusion 135 and the volume of the recess 116 are equal. However, if the electrical connection is secured, the recess The volume of 116> the volume of the protrusion 135 may be sufficient.

A2. Production method:
A method for manufacturing the semiconductor power module 10 will be described with reference to FIGS. FIG. 3 is a process diagram for explaining a method of manufacturing the semiconductor power module 10 in the first embodiment.

  The ceramic multilayer substrate 100 on which the inner layer via hole 101 and the wiring pattern 109 are formed is manufactured (step S10). Fabrication of the ceramic multilayer substrate 100 includes forming a thin-film electrode land for mounting the semiconductor element 130 and other electronic components on the surface of the ceramic multilayer substrate 100. The electrode land is formed by a printing method using a conductive paste, physical vapor deposition (PVD) or chemical vapor deposition (CVD).

  On the first surface 105 of the produced ceramic multilayer substrate 100, the insulating bonding portion 112 is disposed (step S12). An arrangement process of the insulating bonding portion 112 will be described with reference to FIG.

  FIG. 4 is an explanatory diagram for explaining the arrangement process of the insulating bonding portion 112 in step S12. A glass powder paste 118 is produced by kneading powder glass, which is a main component of the insulating joint 112, and a thermally decomposable organic binder using a solvent such as an organic solvent or water, as shown in FIG. Then, it is applied onto the first surface 105 of the ceramic multilayer substrate 100.

  An opening 115 is formed in the insulating bonding portion 112 formed on the ceramic multilayer substrate 100 (step S14). The step of forming the opening 115 will be described with reference to FIG.

  FIG. 5 is an explanatory diagram for explaining the step of forming the opening 115 in step S14. The ceramic multilayer substrate 100 coated with the glass powder paste (insulating joint 112) is heated at a temperature at which the resist is thermally decomposed (for example, 300 ° C. or higher) and below the softening point of the glass powder (for example, 600 ° C. or lower). The opening 115 is formed in the part 107 corresponding to the inner layer via hole 101 by processing.

  The recess 116 having a volume larger than the volume of the conductive protrusion 135 formed in the semiconductor element 130 is thinner than the insulating junction 112 so as to be formed in the opening 115 of the insulating junction 112. The conductive junction 111 is disposed in the opening 115 (step S16). Specifically, a part of the opening 115 is filled with a paste whose main component is a metal species that is melted by a heating process in step S22 described later. At this time, the paste is printed so that the recess 116 is formed by the conductive joint 111 and the insulating joint 112.

  FIG. 6 is an explanatory diagram for explaining the arrangement process of the conductive bonding portion 111 in step S16. The screen printing machine 200 includes a screen 202, a squeegee 203, and a squeegee holder 204. The screen 202 has a through hole only in a portion 107 corresponding to the inner layer via hole 101, that is, a portion corresponding to the opening 115 formed in the insulating bonding portion 112. A paste 250 containing metal as a main component is placed on the screen 202, and the squeegee 203 is slid from the screen 202. By doing so, the paste 250 passes through the through-hole of the screen and is transferred onto the first surface 105 of the ceramic multilayer substrate 100 in the opening 115 of the insulating bonding portion 112. When the conductive joint 111 is disposed in the opening 115, the inner peripheral surface 115a of the opening 115 of the insulating joint 112 and the surface 111a of the conductive joint 111 opposite to the surface on the ceramic multilayer substrate 100 side. A recess 116 is formed.

  The ceramic multilayer substrate 100, the conductive bonding portion 111, and the insulating bonding portion 112 are temporarily laminated (bonded) by the bonding force of the organic binder contained in the printing paste in advance to constitute the circuit board 20.

  A bump 133 is formed on the electrode pad 131 of the semiconductor element 130 (step S18). The bump 133 is formed so that the total volume of the electrode pad 131 and the bump 133 is equal to or less than the volume of the recess 116. Specifically, a metal bump formed of a metal species that melts in the heating process of step S20 described later, such as aluminum metal, silver oxide, copper, nano gold warehouse, or solder alloy, is disposed on the electrode pad 131. To do. The bump may be formed by a ball mounting method in which a metal formed in a ball shape is disposed at a desired position and is formed into a columnar shape by heat treatment, or a metal that becomes a bump at a position corresponding to the semiconductor element 130 in advance. Alternatively, the above-described method may be used. Alternatively, a paste containing the above-described metal species as a main component may be printed by screen printing, or a metal bump may be formed at a desired position by plating using a photolithography pattern and plating.

  The semiconductor element 130 is disposed on the bonding layer 110 such that the protruding portion 135 of the semiconductor element 130 is disposed in the recess 116 of the bonding layer 110 (step S20), and the ceramic multilayer substrate 100, the bonding layer 110, and the semiconductor are disposed. The element 130 is thermocompression bonded to manufacture a semiconductor power module (step S22).

FIG. 7 is an explanatory diagram for explaining a bonding process of the semiconductor power module 10 in the first embodiment. As shown in FIG. 7, the ceramic multilayer substrate 100, the bonding layer 110, and the semiconductor element 130 are pressurized and heated to a temperature at which the conductive bonding portion 111, the insulating bonding portion 112, and the bump 133 are thermally fused. By doing so, the conductive bonding portion 111, the insulating bonding portion 112, and the first surface 105 of the ceramic multilayer substrate 100 are melted, and between the ceramic multilayer substrate 100 and the bonding layer 110, and between the bonding layer 110 and the semiconductor element 130. The gaps are diffusion-bonded on a uniform plane without voids. The temperature at which the conductive bonding portion 111 and the insulating bonding portion 112 are thermally fused is, for example, aluminum metal having a melting point of 660 ° C. as the material of the conductive bonding portion 111 and the bump 133 and the softening point 640 as the material of the insulating bonding portion 112. In the case of using ZnO—B ₂ O ₃ —SiO ₂ glass at ℃, the material is heated to a temperature of 670 ° C. at which both materials are thermally fused, and the ceramic multilayer substrate including the bonding layer 110 and the semiconductor element 130 are pressurized to about 100 kPa. Pressure bonding.

  Due to the pressurization and heating, diffusion of atoms occurs at the bonding surface between the ceramic multilayer substrate 100 and the bonding layer 110, and the ceramic multilayer substrate 100 and the bonding layer 110 are bonded. Also, the bumps 133 and the conductive joints 111 of the semiconductor element 130 are also melted and joined by heating.

  A cut surface cut in a direction perpendicular to the ceramic multilayer substrate 100, the bonding layer 110, and the semiconductor element 130 (a stacking direction of the ceramic multilayer substrate 100, the bonding layer 110, and the semiconductor element 130) is composed of a compound semiconductor and a protective layer on the surface thereof. The interface between the semiconductor element 130 and the bonding layer 110 and the interface between the bonding layer 110 and the surface of the ceramic multilayer substrate 100 made of a ceramic component (alumina, silicon nitride, aluminum nitride, etc.) are indicated by thick solid lines in FIG. These are arranged in a substantially straight line, and do not include minute defects such as bubbles. Inevitable voids on the order of microns are not included in the defects in the embodiments. In the embodiment, the size of the bubble determined as a defect may be, for example, 100 μm or more.

According to the semiconductor power module 10 of the first embodiment described above, when the protrusion 135 is fitted into the opening 115, the thickness d1 of the conductive joint 111, the thickness d2 of the insulating joint 112, and the protrusion The thickness d3 of the portion 135 in the stacking direction is formed so as to satisfy d3> d2-d1. Therefore, when the semiconductor element 130 is disposed in the recess 116, the electrical connection between the protruding portion 135 and the conductive joint 111 can be reliably ensured.

  In addition, according to the semiconductor power module 10 of the first embodiment, the bonding layer 110 has the recess 116 having a volume equal to or larger than the volume of the protruding portion 135 formed in the semiconductor element 130. When the semiconductor element 130 is mounted on the substrate 20, the protruding portion 135 of the semiconductor element is accommodated in the recess 116, and the bonding surface between the bonding layer 110 and the semiconductor element 130 is substantially flat. The ceramic multilayer substrate 100 and the bonding layer 110 are bonded in a plane. Accordingly, it is possible to suppress the generation of voids in the bonding surface between the ceramic multilayer substrate 100 and the bonding layer 110 and the bonding surface between the bonding layer 110 and the semiconductor element 130. Therefore, it is possible to improve the bonding strength between the ceramic multilayer substrate 100 and the bonding layer 110 and the thermal diffusion performance from the semiconductor element to the ceramic multilayer substrate 100.

B. Second embodiment:
B1. General configuration of the semiconductor power module:
8 and 9 are cross-sectional views illustrating the configuration of the semiconductor power module 30 in the second embodiment. As shown in FIGS. 8 and 9, the semiconductor power module 30 of the second embodiment includes a ceramic multilayer substrate 300, a bonding layer 310, and a semiconductor element 330. In the second embodiment, the ceramic multilayer substrate 300 and the semiconductor element 330 have the same configurations as the ceramic multilayer substrate 100 and the semiconductor element 130 of the first embodiment, respectively.

  The semiconductor power module 30 differs from the semiconductor power module 10 of the first embodiment in the configuration of the bonding layer 310. The bonding layer 310 includes a conductive bonding portion 311, an insulating bonding portion 312, and a recess 316 formed by the conductive bonding portion 311 and the insulating bonding portion 312. The bonding surface of the bonding layer 310 and the ceramic multilayer substrate 300 is formed in a flat shape.

  An opening 315 is formed in the insulating bonding portion 312 at a portion corresponding to the inner layer via hole 301 of the ceramic multilayer substrate 300. The insulating bonding portion 312 is formed on the semiconductor element 330 side as shown by a circle A in FIG. The taper is tapered from the end toward the end on the ceramic multilayer substrate 300 side.

  The recess 316 is formed by disposing the conductive joint 311 in the opening 315. The recessed portion 316 has a volume that is equal to or greater than the volume of the protruding portion 335 including the electrode pad 331 and the bump 333 of the semiconductor element 330.

  The semiconductor power module 30 may be manufactured by the same method as the semiconductor power module 10 of the first embodiment. When the insulating bonding portion 312 is arranged by screen printing, a screen having a through hole having a thin taper shape from the semiconductor element 330 side to the ceramic multilayer substrate 300 side is used, and a paste of glass powder that is a material of the insulating bonding portion 312 To print. By doing so, an insulating junction 312 having a tapered opening 315 can be formed at a portion corresponding to the inner layer via hole 301.

  Next, using a screen having a through hole in a portion corresponding to the conductive joint 311, a metal species as a material of the conductive joint 311 is a main component so as to cover the inner layer via hole 301 in the opening 315. Print the paste. At this time, the paste is filled in part of the opening 315. By doing so, a recess 316 is formed by the conductive joint 311 and the insulating joint 312.

  Metal bumps 333 are formed on the electrode pads 331 of the semiconductor element 330. The bump 333 is formed such that the total volume of the electrode pad 331 and the bump 333 is equal to or less than the volume of the recess 316. The semiconductor element 330 is disposed on the bonding layer 310 so that the protruding portion 335 is disposed in the recess 316, and the ceramic multilayer substrate 300, the bonding layer 310, and the semiconductor element 330 are bonded by heating and pressurizing (FIG. 3 corresponding to step S20).

  According to the semiconductor power module 30 of the second embodiment, the insulating bonding portion 312 of the bonding layer 310 is formed in a thin taper shape from the semiconductor element 430 side toward the ceramic multilayer substrate 100 side. Compared with the insulating junction 112, the contact area between the insulating junction 312 and the semiconductor element 330 is increased. Accordingly, the thermal diffusion performance from the semiconductor element 330 to the bonding layer 310 is higher than that of the semiconductor power module 10 of the first embodiment. Therefore, while ensuring the insulation performance between the ceramic multilayer substrate 400 and the semiconductor element 430, the heat diffusion performance can be improved, and the heat radiation of the semiconductor element 430 can be promoted.

Further, by forming the insulating bonding portion 312 so as to increase the area of the surface directly bonded to the semiconductor element 330, the semiconductor element is bonded to the ceramic multilayer substrate 300 on which the bonding layer 310 is formed. The bonding area of 330 and the insulating bonding portion 312 is sufficiently compensated regardless of the degree of filling due to the deformation of the bump 333. As a result, the bonding strength between the semiconductor element 330 and the ceramic multilayer substrate 300 is ensured to be stable without variation due to the production lot.

C. Variations:
C1. Modification 1:
FIG. 10 is an explanatory diagram showing a schematic configuration of the semiconductor power module 40 in the first modification. The semiconductor power module 40 includes a circuit board 45 and a semiconductor element 430. The circuit board 45 includes a ceramic multilayer substrate 400, a bonding layer 410, and a diffusion layer 420. The bonding layer 410 includes a conductive bonding portion 411 and an insulating bonding portion 412. In the first modification, the ceramic multilayer substrate 400, the bonding layer 410, the conductive bonding portion 411, and the semiconductor element 430 have the same configurations as the ceramic multilayer substrate 100, the bonding layer 110, the conductive bonding portion 111, and the semiconductor element 130 of the first embodiment. Is provided.

  The insulating joint 412 desirably includes a filler 415 made of a metal material or an inorganic material to the extent that the insulating performance does not deteriorate. By including the metal filler or the inorganic filler 415, the heat transfer performance of the insulating joint 412 is improved. The insulating joint 412 has the same configuration as the insulating joint 112 of the first embodiment except that the filler 415 is contained.

  The diffusion layer 420 is a layer formed by diffusion bonding between the ceramic multilayer substrate 400 and the bonding layer 410. The diffusion layer 420 includes a conductive diffusion part 421 and an insulating diffusion part 422. The conductive diffusion portion 421 is formed by diffusion bonding between the ceramic multilayer substrate 400 and the conductive bonding portion 411 of the bonding layer 410. The insulating diffusion portion 422 is formed by diffusion bonding between the ceramic multilayer substrate 400 and the insulating bonding portion 412 of the bonding layer 410. The insulating diffusion portion 422 may contain a filler 415 similarly to the insulating bonding portion 412. In FIG. 10, for convenience of explanation, the boundary between the conductive diffusion portion 421 and the insulating diffusion portion 422 is clearly described, but the boundary between the conductive diffusion portion 421 and the insulating diffusion portion 422 may be ambiguous.

  FIG. 11 is an explanatory diagram for explaining the arrangement process of the bonding layer 410 in the first modification. This arrangement process is a process following step S10 of FIG. 3 of the first embodiment.

  On the first surface 405 of the ceramic multilayer substrate 400, the conductive bonding portion 411 is disposed at a portion 407 corresponding to the inner layer via hole 401. Specifically, a paste mainly composed of a metal species that is melted by the heating process in step S20 of FIG. 3 is formed on the portion 407 of the first surface 405 of the ceramic multilayer substrate 400 by screen printing. Instead of screen printing, a transfer method using a photolithographic pattern may be used.

  On the first surface 405 of the ceramic multilayer substrate 400 on which the conductive joint portion 411 is disposed, the insulating joint portion 412 is disposed on a portion 408 different from the portion 407.

  Specifically, powder glass and a thermally decomposable organic binder are kneaded using a solvent such as an organic solvent or water to produce a glass powder paste. The portion 408 is printed by screen printing so as to fill the gap of the conductive joint portion 411 on the first surface 405. At this time, the glass powder paste constituting the insulating bonding portion 412 is printed so as to be thicker than the conductive bonding portion 411.

  By disposing the conductive joint portion 411 and the insulating joint portion 412 as described above, the recess portion 416 (FIG. 10) is formed.

  According to the semiconductor power module 40 of Modification 1, the diffusion layer 420 is formed between the ceramic multilayer substrate 400 and the bonding layer 410 during diffusion bonding of the ceramic multilayer substrate 400 and the bonding layer 410. Therefore, the bonding strength between the ceramic multilayer substrate 400 and the bonding layer 410 can be improved.

  Further, according to the semiconductor power module 40 of the first modification, since the filler 415 is included in the insulating bonding portion 412 of the bonding layer 410 and the insulating diffusion portion 422 of the diffusion layer 420, the heat from the semiconductor element 430 to the ceramic multilayer substrate 400. Diffusion performance can be improved.

C2. Modification 2:
FIG. 12 is a plan view showing a semiconductor power module 50 according to the second modification. FIG. 13 is a cross-sectional view showing a semiconductor power module 50 according to the second modification. FIG. 13 shows a cross section taken along the line BB in FIG.

  As shown in FIGS. 12 and 13, the semiconductor power module 50 of Modification 2 includes a ceramic multilayer substrate 500, a bonding layer 510, and a plurality (six in Modification 2) of semiconductor elements 530. The bonding layer 510 includes a conductive bonding portion 511 and an insulating bonding portion 512. The semiconductor element 530 includes a projecting portion 535 including an electrode pad 531 and a bump 533. In the second modification, the ceramic multilayer substrate 500, the bonding layer 510, the conductive bonding portion 511, the insulating bonding portion 512, and each semiconductor element 530 are respectively the ceramic multilayer substrate 100, the bonding layer 110, and the conductive bonding portion 111 of the first embodiment. The same structure as that of the insulating junction 112 and the semiconductor element 130 is provided.

  In general, in order to cope with the increase in heat generation tolerance of semiconductor elements by using compound semiconductor elements such as SiC from conventional Si-based semiconductor elements, high heat resistance to peripheral members of the semiconductor elements, while heat dissipation as a module High thermal diffusivity is required to meet the demand for smaller parts. In the semiconductor power module 50 of Modification 2, since the bonding layer 510 is formed in a planar shape, the semiconductor element 530 and the ceramic multilayer substrate 500 are not affected by an organic material having low heat resistance and thermal diffusivity, and have heat resistance characteristics. And a plane formed by an inorganic material having excellent thermal diffusivity. Therefore, since the thermal diffusion performance from the semiconductor element 530 to the ceramic multilayer substrate 500 is improved, the reliability of mounting a plurality of compound semiconductor elements (semiconductor elements 530) used in a high temperature range of about 300 ° C. or less at high density. The semiconductor power module 50 having a high level can be provided.

C3. Modification 3:
Instead of the manufacturing method (FIG. 3) of the semiconductor power module 10 in the first embodiment, the semiconductor power module 10 may be manufactured by the following method. Below, the process following step S10 is demonstrated. In addition, the code | symbol of 1st Example is used for the code | symbol of each member.

  Insulating junction 112 is formed. Specifically, powder glass and a thermally decomposable organic binder (for example, a butyral binder that softens at a temperature of about 80 ° C. and thermally decomposes at a temperature of about 250 ° C.) are mixed with a solvent such as an organic solvent or water. The slurry is kneaded to form a slurry, and the slurry is molded into a sheet shape by a technique such as sheet casting by the doctor blade method or extrusion molding. An opening 115 is formed in a portion of the sheet corresponding to the conductive joint 111 by machining such as laser or microcomputer punch. As described above, the insulating bonding portion 112 is manufactured as a glass sheet in which the opening 115 is formed.

  The ceramic multilayer substrate 100 is disposed so that the first surface 105 of the ceramic multilayer substrate 100 faces the desired surface of the insulating bonding portion 112, and both of them are softened by the softening temperature of the organic binder contained in the insulating bonding portion sheet. Temporary adhesion is performed by the bonding force of the organic binder contained in the insulating joint 112 formed in a sheet shape by heating and pressurizing as described above.

Next, the conductive junction 111 is formed. Specifically, a paste for forming the conductive joint portion 111 is partially filled by screen printing into the through hole of the manufactured insulating joint portion 112. The paste contains a metal as a main component. For example, a metal species such as aluminum metal, silver oxide, copper, nanometal, or solder alloy that melts in the heating process in step S22 in FIG. It is formed by kneading the adhesive with a solvent such as an organic solvent or water. The filling of the paste is not limited to screen printing, and for example, a method such as ejection by a dispenser may be used. The recess 116 is formed by disposing the conductive joint 111 in the opening 115.

  The semiconductor element 130 is disposed on the surface of the bonding layer 110 on which the recess 116 is formed, with the protruding portion 135 aligned with the recess 116. As compared with the ceramic multilayer substrate 100, the conductive bonding portion 111, and the insulating bonding portion 112 laminated as described above, the semiconductor element 130 is made of glass, which is a main component constituting the insulating bonding portion 112 and the conductive bonding portion 111, or higher than the melting point of the metal. After heating to temperature and pressure bonding, the organic binder component contained in the insulating bonding part 112 is removed by thermal decomposition, and then the semiconductor power module 10 is manufactured (step S22 in FIG. 3).

  The planar bonding layer 110 can also be manufactured by the manufacturing method described above. Therefore, the semiconductor element 130 and the bonding layer 110, and the bonding layer 110 and the ceramic multilayer substrate 100 can be bonded to each other, and the heat conduction performance from the semiconductor element 130 to the ceramic multilayer substrate 100, and the ceramic multilayer substrate 100 and the semiconductor can be bonded. The bonding strength with the element 130 can be improved.

C4. Modification 4:
In the first embodiment, the ceramic multilayer substrate 100, the conductive bonding portion 111, and the insulating bonding portion 112 are preliminarily laminated in advance by the bonding force of the organic binder, and then the semiconductor element 130 is stacked and bonded by pressing and heating. However, for example, a sheet formed by previously filling holes formed in the insulating bonding portion 112 formed in a sheet shape with the conductive bonding portion 111 is manufactured, and the ceramic multilayer substrate 100 and the semiconductor element 130 are used. The semiconductor power module 10 may be manufactured by heating and pressure bonding after being held. By doing so, it is possible to reduce the amount of the organic binder added to the bonding layer 110, and to prevent the bonding layer 110 from being deteriorated by organic residues.

C5. Modification 5:
The protrusion 135 may have a height that is greater than the depth of the recess 116 in the stacking direction. In this way, when the semiconductor element 130 is disposed in the recess 116, the electrical connection between the protrusion 135 and the conductive joint 111 can be reliably ensured. Note that in the case where the protruding portion 135 is formed to have a height greater than the depth of the depression portion 116 in the stacking direction, the semiconductor element 130 is bonded to the bonding layer when the semiconductor element 130 is disposed on the bonding layer 110. The bump 133 is melted by the heating at the time of bonding, and is pressed in the molten state, and the semiconductor element 130 and the bonding layer 110 are bonded to each other without a gap.

  As mentioned above, although the various Example of this invention was described, this invention is not limited to these Examples, A various structure can be taken in the range which does not deviate from the meaning.

DESCRIPTION OF SYMBOLS 10, 30, 40, 5 ... Semiconductor power module 20, 45 ... Ceramic circuit board 100 ... Ceramic multilayer substrate 101 ... Inner layer via hole 104 ... Electrode terminal 105 ... First surface 106 ... Second surface 109 ... Wiring pattern 110 ... Bonding Layer 111 ... Conductive joint 112 ... Insulating joint 115 ... Opening 116 ... Depression 130 ... Semiconductor element 131 ... Electrode pad 133 ... Bump 135 ... Protrusion 200 ... Screen printer 202 ... Screen 203 ... Squeegee 204 ... Squeegee holder DESCRIPTION OF SYMBOLS 250 ... Paste 300 ... Ceramic multilayer substrate 301 ... Inner layer via hole 310 ... Bonding layer 311 ... Conductive bonding part 312 ... Insulation bonding part 315 ... Opening part 316 ... Depression part 330 ... Semiconductor element 331 ... Electrode pad 333 ... Bump 335 ... Projection part 400 ... Ceramic Multilayer substrate 401 ... inner layer via hole 405 ... first surface 410 ... bonding layer 411 ... conductive bonding portion 412 ... insulating bonding portion 415 ... filler 416 ... depression portion 420 ... diffusion layer 421 ... conductive diffusion portion 422 ... insulating diffusion portion 430 ... semiconductor Element 500 ... Ceramic multilayer substrate 510 ... Bonding layer 511 ... Conductive joint 512 ... Insulating joint 530 ... Semiconductor element

Claims (8)

A circuit board,
A multilayer substrate with vias and wiring patterns formed thereon;
A bonding layer disposed on a first surface of the multilayer substrate and bonding a semiconductor element having a conductive protrusion to the multilayer substrate;
With
The bonding layer is
An insulating joint made of an inorganic material, having an opening at a portion corresponding to the via, and insulating the multilayer substrate from the semiconductor element;
A conductive junction that is disposed in the opening and is used to conduct the wiring pattern to the semiconductor element, the conductive junction being thinner than the insulating junction;
Before fitting the projecting portion into the opening, d1 representing the thickness of the conductive joint portion, d2 representing the thickness of the insulating joint portion, and d3 representing the thickness of the projecting portion are d3> satisfies d2-d1.
Circuit board. The circuit board according to claim 1,
The insulating bonding portion is formed in a tapered shape from an end portion where the semiconductor element is bonded to an end portion where the multilayer substrate is bonded.
Circuit board. The circuit board according to claim 1 or 2,
The insulating joint is formed in a tapered shape,
Circuit board. A semiconductor power module,
A multilayer substrate with vias and wiring patterns formed thereon;
A semiconductor element disposed on a first surface side of the multilayer substrate;
A bonding layer disposed on the first surface of the multilayer substrate and bonding the multilayer substrate and the semiconductor element;
The bonding layer is
An insulating joint made of an inorganic material, having an opening at a portion corresponding to the via, and insulating the multilayer substrate and the semiconductor element from the end where the semiconductor element is joined An insulating joint formed in a tapered shape toward the end to which the multilayer substrate is joined;
A conductive junction disposed in the opening and conducting the wiring pattern and the semiconductor element;
A semiconductor power module. The semiconductor power module according to claim 4,
The insulating joint is formed in a tapered shape,
Semiconductor power module. Fabricate a multilayer board with vias and wiring patterns,
A bonding layer for bonding the multilayer substrate and the semiconductor element is disposed on the first surface of the multilayer substrate,
The semiconductor element is disposed on the bonding layer;
The multilayer substrate, the bonding layer, and the semiconductor element are thermocompression bonded.
A method for manufacturing a semiconductor power module, comprising:
The arrangement of the bonding layer is as follows:
An insulating junction made of an inorganic material that insulates the multilayer substrate and the semiconductor element is disposed on the first surface,
Forming an opening in a portion corresponding to the via in the insulating junction;
Arranging a conductive joint thinner than the insulating joint in the opening;
The arrangement of the semiconductor elements is as follows:
The semiconductor element is disposed on the bonding layer by fitting the protrusion into the opening so that the protrusion formed on the semiconductor element can be electrically connected to the conductive joint. Including steps,
For the insulating joint and the conductive joint, d1 representing the thickness of the conductive joint, d2 representing the thickness of the insulating joint, and d3 representing the height of the protrusion are d3> d2−. satisfy d1;
Manufacturing method of semiconductor power module. Fabricate a multilayer board with vias and wiring patterns,
A bonding layer for bonding the multilayer substrate and the semiconductor element is disposed on the first surface of the multilayer substrate,
The semiconductor element is disposed on the bonding layer;
The multilayer substrate, the bonding layer, and the semiconductor element are thermocompression bonded.
A method for manufacturing a semiconductor power module, comprising:
The arrangement of the bonding layer is as follows:
An insulating junction made of an inorganic material that insulates the multilayer substrate and the semiconductor element is disposed on the first surface,
Forming an opening in a portion corresponding to the via in the insulating bonding portion so as to have a tapered shape from an end portion to which the semiconductor element is bonded toward an end portion to which the multilayer substrate is bonded;
Arranging a conductive joint thinner than the insulating joint in the opening;
The arrangement of the semiconductor elements is as follows:
The protruding portion is fitted into the opening so that the conductive protruding portion formed on the semiconductor element and the conductive bonding portion can conduct, and the semiconductor element is bonded to the bonding layer. Including placing on
Manufacturing method of semiconductor power module. Fabricate a multilayer board with vias and wiring patterns,
A bonding layer for bonding a semiconductor element to the multilayer substrate is disposed on the first surface of the multilayer substrate;
Bonding the multilayer substrate and the bonding layer by the adhesive force of the organic component contained in the bonding layer,
A method of manufacturing a circuit board used for mounting a semiconductor element,
The arrangement of the bonding layer is as follows:
An insulating junction made of an inorganic material for insulating the multilayer substrate and the semiconductor element is disposed on the first surface,
Forming an opening in a portion of the insulating joint corresponding to the via;
Arranging a conductive joint thinner than the insulating joint in the opening;
The insulating bonding portion and the conductive bonding portion are expressed as d1 indicating the thickness of the conductive bonding portion, d2 indicating the thickness of the insulating bonding portion, and the height of the protruding portion formed in the semiconductor element. d3 satisfies d3> d2-d1.
A method of manufacturing a circuit board.

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