JP2013051389A - Circuit board, semiconductor power module and manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve a thermal diffusion performance from a semiconductor element to a multilayer substrate, and improve a bond strength of the multilayer substrate and the semiconductor element.SOLUTION: A semiconductor power module 10 comprises a ceramic multilayer substrate 100, a junction layer 110, a diffusion layer 120 and a semiconductor element 130. The junction layer 110 is a planar thin film layer arranged on a first surface 105 of the ceramic multilayer substrate 100 and including a conductive junction part 111 electrically connecting the semiconductor element 130 and the ceramic multilayer substrate 100, and an insulating junction part 112 insulating the semiconductor element 130 and the ceramic multilayer substrate 100. This way, the semiconductor element 130 and the ceramic multilayer substrate 100 can be bonded while inhibiting an occurrence of void between the semiconductor element 130 and the ceramic multilayer substrate 100. A thermal diffusion performance from the semiconductor element 130 to the ceramic multilayer substrate 100 and a bond strength of the ceramic multilayer substrate 100 and the semiconductor element 130 can be improved.

Description

  The present invention relates to a circuit board constituted by a multilayer substrate, a semiconductor power module in which a semiconductor element is mounted on the circuit board, and a method for manufacturing the same.

  In recent years, power module packages have become smaller, low-profile, and high-density, and in order to achieve this, a mounting method in which semiconductor elements are flip-chip connected using a ceramic multilayer substrate is used instead of the conventional wire bonding mounting method. A semiconductor module used has been proposed. Flip chip connection is a bonding method in which conductive protrusions called bumps are placed on a semiconductor element, and the bumps are aligned to the position where the semiconductor element is mounted on the ceramic multilayer board, and directly bonded to the ceramic multilayer board. The area required for mounting the semiconductor element can be reduced by about 20 to 30%, which can contribute to high-density mounting.

  In the semiconductor module using such a flip chip mounting method, an inorganic material is used in addition to a conventional organic material used as a sealing material in the gap between the bumps between the ceramic multilayer substrate and the semiconductor element. (For example, Patent Document 1).

JP 2004-253579 A JP 2006-066582 A JP 2010-287869 A JP 2009-170930 A

  In semiconductor element power modules, where higher-density mounting is progressing due to flip chip mounting, the heat dissipation characteristics due to the size effect deteriorate due to the decrease in the heat dissipation area, so it is necessary to further improve the heat diffusion performance from the semiconductor element to the ceramic multilayer substrate It is. However, in the conventional semiconductor element power module, there is a space between the ceramic multilayer substrate and the semiconductor element due to generation of bubbles in the sealing material filling process or generation of cracks in the joint due to thermal stress during use. There is a problem such as air intrusion. Therefore, in the conventional semiconductor element power module, the heat dissipation performance of the semiconductor element is reduced due to the reduction of the thermal diffusion performance from the semiconductor element to the ceramic multilayer substrate, and the bonding strength between the ceramic multilayer substrate and the semiconductor element is reduced. There is a fear.

  The present invention has been made in view of the above-described problems, and an object thereof is to improve the thermal diffusion performance from a semiconductor element to a ceramic multilayer substrate and to improve the bonding strength between the ceramic multilayer substrate and the semiconductor element.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

[Application Example 1]
A semiconductor power module, the multilayer substrate having vias and wiring patterns formed thereon, the semiconductor element disposed on the first surface side of the multilayer substrate, and formed on the first surface of the multilayer substrate, A bonding layer that bonds the multilayer substrate and the semiconductor element, and the bonding layer is a planar conductive bonding portion disposed in a first portion corresponding to the via, and is formed in the semiconductor element A conductive joint comprising an electrode pad that is electrically connected, a conductive connecting portion that conducts the electrode pad and the multilayer substrate, and a second part different from the first part, and an inorganic material A semiconductor power module having a planar insulating junction as a main component.

  According to the semiconductor power module of Application Example 1, since the bonding layer is formed in a planar shape, generation of voids between the multilayer substrate and the semiconductor element can be suppressed when the multilayer substrate and the semiconductor element are bonded. Therefore, the thermal diffusion performance from the semiconductor element to the multilayer substrate and the bonding strength between the multilayer substrate and the semiconductor element can be improved.

[Application Example 2]
The semiconductor power module according to Application Example 1, wherein the multilayer substrate, the bonding layer, the semiconductor element, and the bonding layer are bonded by diffusion bonding, and the semiconductor power module is further bonded to the multilayer substrate. A semiconductor power module comprising a diffusion layer formed at the time of diffusion bonding between the layer and the semiconductor element and the bonding layer.

  According to the semiconductor power module of Application Example 2, when diffusion bonding is performed between the multilayer substrate and the bonding layer, and the bonding layer and the semiconductor element, the bonding surface between the multilayer substrate and the bonding layer, and the bonding surface between the bonding layer and the semiconductor element Diffusion layers are formed by the diffusion of atoms generated in Therefore, the bonding strength between the multilayer substrate and the bonding layer and between the bonding layer and the semiconductor element can be improved.

[Application Example 3]
The semiconductor power module according to Application Example 1, wherein the insulating joint includes a metal filler or an inorganic filler.

  According to the semiconductor power module of Application Example 1, since the metal filler or the inorganic filler is included in the insulating bonding portion, the thermal diffusion performance from the semiconductor element to the multilayer substrate can be improved.

[Application Example 4]
A semiconductor power module according to Application Example 2,
The insulating joint and the diffusion layer include a metal filler or an inorganic filler,
Semiconductor power module.

  According to the semiconductor power module of Application Example 4, since the metal filler or the inorganic filler is included in the insulating joint and the diffusion layer, the thermal diffusion performance from the semiconductor element to the multilayer substrate can be improved.

[Application Example 5]
5. The semiconductor power module according to any one of Application Example 1 to Application Example 4, wherein the first joining start temperature, which is the joining start temperature of the material constituting the conductive joint portion, is the joining of the material constituting the insulating joint portion. A semiconductor power module characterized by being lower than a second junction start temperature which is a start temperature.

  According to the semiconductor power module of Application Example 5, the conductive joint portion is joined before the insulating joint portion. Accordingly, the conductive connection portion and the electrode pad of the semiconductor element, and the conductive junction portion and the wiring substrate are joined, that is, between the conductive connection portion and the electrode pad of the semiconductor element, and between the conductive junction portion and the wiring substrate. In the state where there is no space between them, the softening deformation of the insulating bonding portion is started, and the insulating bonding portion and the semiconductor element, and the insulating bonding portion and the wiring substrate are bonded. Therefore, it is possible to suppress a decrease in the conductive performance of the conductive joint portion due to the material constituting the insulating joint portion entering between the conductive connection portion and the electrode pad and mixing into the conductive joint portion.

[Application Example 6]
In the semiconductor power module according to Application Example 5, the first joining start temperature is equal to or higher than a sintering start temperature at which the conductive joint starts a sintering reaction, and the second joining start temperature is the insulating joint. A semiconductor power module, wherein the part is at or above a sintering start temperature at which a sintering reaction starts.

  According to the semiconductor power module of Application Example 6, the first joining start temperature is set to be equal to or higher than a temperature at which at least a part of the material constituting the conductive joint starts a sintering reaction, and the second joining start temperature is At least a part of the material constituting the insulating joint is set to a temperature at which the sintering reaction starts. Therefore, each of the conductive joint and the insulating joint can be joined to another member without heating to the melting point. Further, the first joining start temperature may be the melting start temperature of the material constituting the conductive joining portion, and the second joining start temperature may be the melting start temperature of the material constituting the insulating joining portion. If it carries out like this, a conductive junction part and an insulation junction part can be fuse | melted reliably, and the joint strength of each of a conductive junction part and an insulation junction part and another member can be improved.

[Application Example 7]
A circuit board comprising a multilayer substrate having vias and wiring patterns formed thereon, and a bonding layer disposed on a first surface of the multilayer substrate and bonding a semiconductor element to the multilayer substrate, The bonding layer is disposed at a first portion corresponding to the via, is electrically connected to the wiring pattern and the semiconductor element, and has a conductive connection portion in which at least the first surface side is formed in a planar shape, and the first A circuit board having an insulating joint portion disposed in a second portion different from the first portion, having an inorganic material as a main component, and at least the first surface side being formed in a planar shape.

  According to the circuit board of Application Example 7, since the semiconductor element and the multilayer substrate are bonded together in a plane, generation of a gap between the multilayer substrate and the semiconductor element can be suppressed. Therefore, the thermal diffusion performance from the semiconductor element to the multilayer substrate and the bonding strength between the multilayer substrate and the semiconductor element can be improved.

[Application Example 8]
The circuit board according to Application Example 7, wherein the first junction start temperature, which is a temperature at which the material constituting the conductive junction starts to join the semiconductor element, is the material constituting the insulating junction is the multilayer A circuit board having a temperature lower than a second bonding start temperature, which is a temperature at which bonding with the substrate and the semiconductor element starts.

  According to the semiconductor power module of Application Example 8, the conductive joint portion is joined before the insulating joint portion. Therefore, the conductive junction and the electrode pad of the semiconductor element, and the conductive junction and the wiring board are joined, that is, between the conductive junction and the electrode pad of the semiconductor element, and between the conductive junction and the wiring board. In the state where there is no gap, softening deformation of the insulating bonding portion is started, and the insulating bonding portion and the semiconductor element, and the insulating bonding portion and the wiring substrate are bonded. Therefore, it is possible to suppress a decrease in the conductive performance of the conductive bonding portion due to the material constituting the insulating bonding portion entering between the conductive connecting portion and the electrode pad and mixing into the conductive bonding portion.

[Application Example 9]
In the circuit board according to Application Example 8, the first joining start temperature is equal to or higher than a sintering start temperature at which at least a part of a material constituting the conductive joint starts a sintering reaction, A circuit board characterized in that a joining start temperature is equal to or higher than a sintering start temperature at which at least a part of a material constituting the insulating joint starts a sintering reaction.

  According to the semiconductor power module of Application Example 9, the first joining start temperature is set to be equal to or higher than a temperature at which at least a part of the material constituting the conductive joint starts a sintering reaction, and the second joining start temperature is At least a part of the material constituting the insulating joint is set to a temperature at which the sintering reaction starts. Therefore, each of the conductive joint and the insulating joint can be joined to another member without heating to the melting point. Further, the first joining start temperature may be the melting start temperature of the material constituting the conductive joining portion, and the second joining start temperature may be the melting start temperature of the material constituting the insulating joining portion. If it carries out like this, a conductive junction part and an insulation junction part can be fuse | melted reliably, and the joint strength of each of a conductive junction part and an insulation junction part and another member can be improved.

[Application Example 10]
A semiconductor power module, a multilayer substrate on which vias and wiring patterns are formed, and
A semiconductor element disposed on a first surface side of the multilayer substrate; and a bonding layer formed on the first surface of the multilayer substrate and bonding the multilayer substrate and the semiconductor element; Is disposed at a first portion corresponding to the via, and includes a conductive joint portion including an electrode pad of the semiconductor element, and a conductive connection portion that conducts the electrode pad and the multilayer substrate, The semiconductor element is disposed in a second part different from the part, and has an insulating junction mainly composed of an inorganic material, and the semiconductor element is electrically connected to the electrode pad and the conductive connection part. The interface between the multilayer substrate and the bonding layer and the interface between the bonding layer and the semiconductor element in a state where the multilayer substrate, the bonding layer, and the semiconductor element are bonded to each other. The cross section in the stacking direction is formed in a substantially straight line And are, semiconductor power modules.

  According to the semiconductor power module of Application Example 10, the cross section in the stacking direction of the bonding interface between the multilayer substrate and the bonding layer and the bonding interface between the bonding layer and the semiconductor element is formed to be substantially linear. Yes. In this specification, the term “substantially linear” includes a state in which there is no void due to bubbles or the like at the bonding interface between the multilayer substrate and the bonding layer and the bonding interface between the bonding layer and the semiconductor element. Therefore, the thermal diffusion performance from the semiconductor element to the multilayer substrate and the bonding strength between the multilayer substrate and the semiconductor element can be improved.

[Application Example 11]
A circuit board, comprising: a multilayer substrate on which vias and wiring patterns are formed; and a bonding layer formed on a first surface of the multilayer substrate and bonding the multilayer substrate and a semiconductor element. The layer is disposed at a first portion corresponding to the via, and is disposed at a conductive connection portion for conducting the semiconductor element to the wiring pattern and a second portion different from the first portion, and is inorganic. A cross-section in the stacking direction of the interface between the multilayer substrate and the bonding layer in a state where the multilayer substrate and the bonding layer are bonded to each other. A circuit board that is shaped.

  According to the circuit board of Application Example 11, the bonding interface between the multilayer substrate and the bonding layer is formed so that the cross section in the stacking direction is substantially linear. Accordingly, the bonding strength between the multilayer substrate and the bonding layer can be improved, and the thermal diffusion performance from the semiconductor element to the multilayer substrate can be improved.

[Application Example 12]
A method for manufacturing a semiconductor power module, comprising: producing a multilayer substrate having vias and wiring patterns; and providing a planar conductive connecting portion for conducting the wiring pattern and the semiconductor element at a first portion corresponding to the vias. And having a junction part having a planar insulating junction part in a second part different from the first part on the first surface of the multilayer substrate, and on the junction part, the semiconductor element Are arranged so that the electrode pad formed in the semiconductor element and the conductive connection portion can conduct, and the multilayer substrate, the joint and the semiconductor element are thermocompression bonded, and the multilayer substrate and the A method for manufacturing a semiconductor power module, wherein the bonding layer and the bonding layer and the semiconductor element are diffusion bonded.

  According to the manufacturing method of the semiconductor power module of Application Example 12, a planar bonding layer for bonding the multilayer substrate and the semiconductor element is formed between the multilayer substrate and the semiconductor element by the bonding portion and the electrode pad. The Therefore, generation | occurrence | production of the space | gap between a multilayer substrate and a semiconductor element can be suppressed. Therefore, the heat diffusion performance from the semiconductor element to the multilayer substrate and the bonding strength between the multilayer substrate and the semiconductor element can be improved.

[Application Example 13]
The method of manufacturing a semiconductor power module according to Application Example 12, wherein in the diffusion bonding, a temperature at which a material constituting the conductive bonding portion starts bonding with the semiconductor element is a first bonding start temperature, and the insulating bonding The material constituting the portion is a temperature at which bonding with the multilayer substrate and the semiconductor element starts, and a temperature higher than the first bonding start temperature is defined as a second bonding start temperature, and the multilayer substrate and the bonding portion And the semiconductor element is thermocompression-bonded at the first joining start temperature to join the conductive joint and the electrode pad of the semiconductor element, and the conductive joint and the wiring board. After the bonding portion and the electrode pad of the semiconductor element are bonded, the multilayer substrate, the bonding portion, and the semiconductor element are subjected to thermocompression bonding at the second bonding start temperature. The method for manufacturing a semiconductor power module, wherein the multilayer substrate and the insulating joint portion, and the insulating joint portion and the semiconductor element are joined.

  According to the manufacturing method of the semiconductor power module of Application Example 13, the conductive joint is joined before the insulating joint. Therefore, the conductive junction and the electrode pad of the semiconductor element, and the conductive junction and the wiring board are joined, that is, between the conductive junction and the electrode pad of the semiconductor element, and between the conductive junction and the wiring board. In the state where there is no gap, softening deformation of the insulating bonding portion is started, and the insulating bonding portion and the semiconductor element, and the insulating bonding portion and the wiring substrate are bonded. Therefore, it is possible to suppress a decrease in the conductive performance of the conductive joint portion due to the material constituting the insulating joint portion entering between the conductive connection portion and the electrode pad and mixing into the conductive joint portion.

[Application Example 14]
In the method for manufacturing a semiconductor power module according to Application Example 13, the first joining start temperature is equal to or higher than a sintering start temperature at which at least a part of the material constituting the conductive connection portion starts a sintering reaction, The method of manufacturing a semiconductor power module, wherein the second joining start temperature is equal to or higher than a sintering start temperature at which at least a part of the material constituting the insulating connection portion starts a sintering reaction.

  According to the manufacturing method of the semiconductor power module of Application Example 14, the first joining start temperature is set to be equal to or higher than the temperature at which at least a part of the material constituting the conductive joint starts the sintering reaction, and the second joining start is performed. The temperature is set to be equal to or higher than a temperature at which at least a part of the material constituting the insulating joint starts a sintering reaction. Therefore, each of the conductive joint and the insulating joint can be joined to another member without heating to the melting point. Further, the first joining start temperature may be the melting start temperature of the material constituting the conductive joining portion, and the second joining start temperature may be the melting start temperature of the material constituting the insulating joining portion. If it carries out like this, a conductive junction part and an insulation junction part can be fuse | melted reliably, and the joint strength of each of a conductive junction part and an insulation junction part and another member can be improved.

[Application Example 15]
The method of manufacturing a semiconductor power module according to Application Example 12, wherein in the diffusion bonding, a temperature at which the material forming the conductive connection portion and the material forming the electrode pad start bonding is a first bonding start temperature. And the material constituting the insulating junction is a temperature at which bonding with the multilayer substrate and the semiconductor element starts, and a temperature higher than the first bonding start temperature is defined as a second bonding start temperature, and the first A method of manufacturing a semiconductor power module, wherein the heating is performed based on a temperature profile that is set so that the first junction start temperature is maintained for a predetermined time after the first junction start temperature is maintained for a predetermined time.

  According to the semiconductor power module manufacturing method of Application Example 15, the bonding portion, the wiring board, and the semiconductor element are bonded based on the temperature profile having a stepwise temperature change. Accordingly, diffusion bonding can be performed with a simple configuration while performing multi-stage temperature changes, and manufacturing efficiency can be improved.

[Application Example 16]
A method for manufacturing a circuit board, comprising: producing a multilayer board having vias and wiring patterns; and having a conductive connection portion for conducting the wiring pattern and the semiconductor element at a first portion corresponding to the vias, A bonding layer having an insulating bonding portion at a second portion different from the first portion and having at least the first surface formed in a planar shape is disposed on the first surface of the multilayer substrate. A method for manufacturing a circuit board, wherein the multilayer substrate and the bonding layer are bonded by an adhesive force of an organic component contained in the bonding layer.

  According to the method of manufacturing the circuit board of Application Example 16, the first surface side of the multilayer substrate is formed on the first surface side of the multilayer substrate. Formed on top. Therefore, generation | occurrence | production of the space | gap between a multilayer substrate and a joining layer can be suppressed. Therefore, the heat diffusion performance from the semiconductor element to the multilayer substrate and the bonding strength between the multilayer substrate and the semiconductor element can be improved.

  In the present invention, the various aspects described above can be applied by appropriately combining or omitting some of them.

Sectional drawing which shows schematic structure of the semiconductor power module 10 in 1st Example. Explanatory drawing explaining the circuit board 20 in 1st Example. Process drawing explaining the manufacturing method of the semiconductor power module 10 in 1st Example. Explanatory drawing explaining the arrangement | positioning process of the conductive connection part 111a in step S12. Explanatory drawing explaining the screen printing of the insulation junction part 112 in step S14. Explanatory drawing explaining the joining process of the semiconductor power module 10 in 1st Example. The top view which shows the semiconductor power module 30 in 2nd Example. Sectional drawing which shows the semiconductor power module 30 in 2nd Example. Sectional drawing which shows the semiconductor power module 40 in a modification.

A. First embodiment:
A1. General configuration of the semiconductor power module:
FIG. 1 is a cross-sectional view showing a schematic configuration of a semiconductor power module 10 in the first embodiment. FIG. 2 is an explanatory diagram for explaining the circuit board 20 in the first embodiment. The semiconductor power module 10 includes a circuit board 20 and a semiconductor element 130. The circuit board 20 includes a ceramic multilayer substrate 100, a bonding layer 110, and a diffusion layer 120.

The ceramic multilayer substrate 100 is formed of a ceramic material. As the ceramic material, for example, alumina oxide (Al ₂ O ₃ ), aluminum nitride (AlN), silicon nitride (Si ₃ N ₄ ), or the like is used. The ceramic multilayer substrate 100 is electrically connected between the first surface 105 on which the semiconductor element is mounted and the other second surface 106 facing the surface and on which other electronic components such as a control circuit and a capacitor can be mounted. An internal via hole 101 for connection, a wiring pattern 109, and an electrode terminal 104 for external connection disposed on the second surface 106. The wiring pattern 109 is formed on the surface of the ceramic multilayer substrate 100 and the surface of the inner layer. In FIG. 1, the wiring pattern formed on the surface of the ceramic multilayer substrate 100 is omitted. Electrode lands (not shown) for mounting the semiconductor element 130 and other electronic components are formed on the first surface 105 and the second surface 106 of the ceramic multilayer substrate 100. The semiconductor element 130 is electrically connected to the electrode terminal 104 disposed on the second surface 106 via the inner layer via hole 101 and the wiring pattern 109.

  The bonding layer 110 is a planar thin film layer that is disposed on the first surface 105 of the ceramic multilayer substrate 100 and includes a conductive bonding portion 111 and an insulating bonding portion 112.

  The conductive bonding portion 111 includes a conductive connection portion 111a and an electrode pad 131 of the semiconductor element 130, and electrically connects the semiconductor element 130 and the ceramic multilayer substrate 100. The conductive connection portion 111a is formed with a conductive metal as a main component, and is formed on the first surface 105 of the ceramic multilayer substrate 100 and corresponding to the inner layer via hole 101 as shown in FIG. Arranged on a portion 107 (indicated by a thick solid line). For example, copper, silver, aluminum metal, or the like may be used as the conductive metal. The conductive connecting portion 111a is formed thinner than an insulating bonding portion 112 described later, and a recess is formed by the insulating bonding portion 112 and the conductive connecting portion 111a. The conductive bonding portion 111 is formed by arranging the electrode pad 131 so as to fit in the recess.

The insulating joint 112 insulates the semiconductor element 130 and the ceramic multilayer substrate 100. As shown in FIG. 2, the insulating bonding portion 112 is disposed on the first surface 105 of the ceramic multilayer substrate 100 and in a second portion 108 (shown by a thick broken line) different from the first portion 107. ing. The main component is an insulating inorganic material, and it is formed of powdered glass that is softened by a heating process at the time of mounting a semiconductor element. The powder glass is formed as a mixed phase of silicon oxide, zinc oxide, boron oxide, bismuth oxide, etc., such as ZnO—B ₂ O ₃ —SiO ₂ .

In the first embodiment, the second portion 108 includes a portion excluding the portion where the conductive joint portion 111 that is the first portion 107 is disposed. The conductive bonding portion 111 and the insulating bonding portion 112 have substantially the same thickness so that the bonding layer 110 becomes a uniform plane. Further, the surface of the bonding layer 110 facing the semiconductor element 130 side is also formed to be a uniform plane.

In this embodiment, the uniform plane includes a slight curve or unevenness, and the bonding layer 110 has a uniform plane means that the bonding layer 110 has a first surface of the ceramic multilayer substrate. The surface facing the surface 105 is formed along the shape of the first surface 105, the conductive bonding portion 111 and the insulating bonding portion 112 are continuously formed flat, and the semiconductor of the bonding layer 110 The surface facing the element 130 side is formed along the shape of the surface facing the bonding layer 110 of the semiconductor element 130.

  It is desirable that the insulating joint 112 includes the filler 115 to such an extent that the insulating performance does not deteriorate. Here, the filler 115 includes a metal filler or an inorganic filler made of copper, aluminum powder, or the like. The inorganic filler is preferably a high heat dissipation characteristic filler such as ceramics made of boron oxide, alumina, silicon nitride, aluminum nitride or the like. By including the filler 115, the heat transfer performance of the insulating joint 112 is improved.

  The diffusion layer 120 is a layer formed by diffusion bonding between the ceramic multilayer substrate 100 and the bonding layer 110. The diffusion layer 120 includes a conductive diffusion part 121 and an insulating diffusion part 122. The conductive diffusion portion 121 is formed by diffusion bonding between the ceramic multilayer substrate 100 and the conductive connection portion 111 a of the bonding layer 110. The insulating diffusion portion 122 is formed by diffusion bonding between the ceramic multilayer substrate 100 and the insulating bonding portion 112 of the bonding layer 110. Insulating diffusion part 122 may contain filler 115, similarly to insulating joining part 112. In FIG. 1, for convenience of explanation, the boundary between the conductive diffusion portion 121 and the insulating diffusion portion 122 is clearly described, but the boundary between the conductive diffusion portion 121 and the insulating diffusion portion 122 may be ambiguous.

  The semiconductor element 130 includes an electrode pad 131. The electrode pad 131 is made of, for example, gold (Au) as a main component. The semiconductor element 130 is disposed on the bonding layer 110 such that the electrode pad 131 is in contact with the conductive connection portion 111 a of the bonding layer 110. The semiconductor element 130 is electrically connected to the ceramic multilayer substrate 100 via the electrode pad 131 and the conductive connection portion 111a (that is, the conductive joint portion 111).

A2. Production method:
A method for manufacturing the semiconductor power module 10 will be described with reference to FIGS. FIG. 3 is a process diagram for explaining a method of manufacturing the semiconductor power module 10 in the first embodiment.

  The ceramic multilayer substrate 100 on which the inner layer via hole 101 and the wiring pattern 109 are formed is manufactured (step S10). Fabrication of the ceramic multilayer substrate 100 includes forming a thin-film electrode land for mounting the semiconductor element 130 and other electronic components on the surface of the ceramic multilayer substrate 100. The electrode land is formed by a printing method using a conductive paste, physical vapor deposition (PVD) or chemical vapor deposition (CVD).

  On the first surface 105 of the ceramic multilayer substrate 100, the conductive connection portion 111a is disposed at the first portion corresponding to the inner layer via hole 101 (step S12). FIG. 3 is an explanatory diagram for explaining the step of arranging the conductive connection portion 111a in step S12. As shown in FIG. 3, a metal protrusion whose main component is a metal species that is melted by a heating process in step S18 to be described later is formed as a conductive connecting portion 111a. This metal protrusion is also called a bump. The bump may be formed by a ball mounting method in which a metal formed in a ball shape is disposed at a desired position and is formed into a columnar shape by heat treatment, or the first surface 105 of the ceramic multilayer substrate 100 may be formed. A method of transferring a metal to be a bump to a corresponding position in advance on the portion 107, a method of printing a paste mainly containing the metal species described above as a material of the conductive connection portion 111a by screen printing, The first portion 107 of the first surface 105 may be masked with a photolithographic pattern, and metal bumps may be formed at desired positions by plating.

  The insulating bonding portion 112 is disposed on a second portion different from the first portion on the first surface 105 of the ceramic multilayer substrate 100 on which the conductive connection portion 111a is disposed (step S14). Specifically, powder glass and a thermally decomposable organic binder are kneaded using a solvent such as an organic solvent or water to produce a glass powder paste. The first surface 105 is printed by screen printing so as to fill the gap of the conductive connection portion 111a.

  FIG. 5 is an explanatory diagram for explaining screen printing of the insulating bonding portion 112 in step S14. The screen printing machine 200 includes a screen 202, a squeegee 203, and a squeegee holder 204. In the screen 202, an opening is formed only in a portion excluding a portion corresponding to the conductive connection portion 111a, that is, a portion corresponding to the insulating bonding portion 112. The glass powder paste 250 is placed on the screen 202 and the squeegee 203 is slid from the screen 202. By doing so, the glass powder paste 250 passes through the opening, and the portion on the first surface 105 of the ceramic multilayer substrate 100 excluding the portion where the conductive connection portion 111a is disposed, that is, the insulating bonding portion 112. Is transferred to the site where the As a result, a joining portion 110a (FIG. 2) is formed, which includes the conductive connection portion 111a and the insulating joining portion 112, and the first surface 105 side of the ceramic multilayer substrate 100 is formed on a plane. Note that the order of steps S12 and S14 may be reversed. Note that an organic component (organic binder) used for binding of the bonding portion 110a is decomposed and removed in a heat treatment process described later.

  The semiconductor element 130 is disposed on the formed bonding part 110a (step S16). Specifically, the semiconductor element 130 is arranged so that the electrode pad 131 is fitted into a recess formed by the conductive connection portion 111 a and the insulating bonding portion 112. When the conductive connection portion 111a and the electrode pad 131 are in contact with each other, conduction between the semiconductor element 130 and the conductive connection portion 111a is ensured.

The ceramic multilayer substrate 100, the bonding layer 110, and the semiconductor element 130 are thermocompression bonded to manufacture a semiconductor power module (step S18). FIG. 6 is an explanatory diagram for explaining the bonding process of the semiconductor power module 10 in the first embodiment. As shown in FIG. 6, the ceramic multilayer substrate 100, the bonding layer 110, and the semiconductor element 130 are pressurized and heated to a temperature at which the conductive connection portion 111a and the insulating bonding portion 112 are thermally fused. By doing so, the conductive connecting portion 111a, the insulating bonding portion 112, the first surface 105 of the ceramic multilayer substrate 100, and the surface of the semiconductor element 130 made of the conductive bonding portion 111 and the insulating protective film are melted. Diffusion bonding is performed between the bonding layers 110 and between the bonding layers 110 and the semiconductor element 130 in a uniform plane without a void. The temperature at which the conductive connecting portion 111a and the insulating bonding portion 112 are thermally fused is, for example, using aluminum metal having a melting point of 660 ° C. as the material of the conductive connecting portion 111a and having a softening point of 640 ° C. as the material of the insulating connecting portion 112. When ZnO—B ₂ O ₃ —SiO ₂ glass is used, heating is performed at a temperature of 670 ° C. at which both materials are thermally fused.

  As described above, by applying pressure and heating based on a temperature profile that is set so that at least two stages of temperature changes are performed, atoms are bonded at the bonding surface between the ceramic multilayer substrate 100 and the bonding layer 110. The diffusion layer 120 is formed, and the ceramic multilayer substrate 100 and the bonding layer 110 are bonded.

  A cut surface cut in a direction perpendicular to the ceramic multilayer substrate 100, the bonding layer 110, and the semiconductor element 130 (a stacking direction of the ceramic multilayer substrate 100, the bonding layer 110, and the semiconductor element 130) is composed of a compound semiconductor and a protective layer on the surface thereof. The interface between the semiconductor element 130 and the bonding layer 110 and the interface between the bonding layer 110 and the surface of the ceramic multilayer substrate 100 made of a ceramic component (alumina, silicon nitride, aluminum nitride, etc.) are indicated by thick solid lines in FIG. These are arranged in a substantially straight line, and do not include minute defects such as bubbles. Inevitable voids on the order of microns are not included in the defects in the embodiments. In the embodiment, the size of the bubble determined as a defect may be, for example, 100 μm or more.

  Also, when viewed microscopically, each of the interfaces has a diffusion layer 120 formed by diffusing constituent components of the bonding layer 110 with respect to the semiconductor element 130 and the ceramic multilayer substrate 100. These layers are layers in which surface components of the semiconductor element 130 (components for forming a protective film such as Zr and Ti) and ceramic components (such as aluminum and nitrogen) of the ceramic multilayer substrate 100 are mixed by mapping analysis using EDS, EPMA, and the like. Is defined as the layer in which is formed.

  According to the semiconductor power module 10 of the first embodiment described above, the bonding layer 110 is formed in a planar shape, that is, the surface of the bonding layer 110 facing the ceramic multilayer substrate 100 is the second surface of the ceramic multilayer substrate 100. The surface facing the semiconductor element 130 of the bonding layer 110 is also formed flat along the surface shape of the semiconductor element 130 on the bonding layer 110 side. Has been. Therefore, when the ceramic multilayer substrate 100 and the semiconductor element 130 are bonded, the generation of voids between the ceramic multilayer substrate 100 and the bonding layer 110 and between the bonding layer 110 and the semiconductor element 130 can be suppressed. Therefore, the thermal diffusion performance from the semiconductor element 130 to the ceramic multilayer substrate 100 and the bonding strength between the ceramic multilayer substrate 100 and the semiconductor element 130 can be improved.

  Further, according to the ceramic multilayer substrate 100 of the first embodiment, the insulating bonding portion 112 of the bonding layer 110 is formed mainly of an inorganic material such as glass, which has a higher thermal conductivity than the organic material. Therefore, the thermal diffusion performance from the semiconductor element 130 to the ceramic multilayer substrate 100 can be improved.

  Each member is thermally expanded by heating at the time of bonding of the semiconductor power module 10 (step S18 in FIG. 3), and stress is generated between the ceramic multilayer substrate 100 and the bonding layer 110, and between the bonding layer 110 and the semiconductor element 130. To do. In the first embodiment, the linear thermal expansion coefficient of the glass component that is the main component of the insulating joint 112 is higher than that of the metal that is the main component of the conductive connection portion 111a. Close to the coefficient of linear thermal expansion. For this reason, the stress generated at the boundary between the conductive connecting portion 111 a and the ceramic multilayer substrate 100 and the semiconductor element 130 is larger than the stress generated at the boundary between the insulating joint 112 and the ceramic multilayer substrate 100 and the semiconductor element 130.

  According to the semiconductor power module 10 of the first embodiment, since the conductive connection portion 111a is disposed around the insulating joint portion 112, the deformation of the conductive connection portion 111a can be suppressed by the insulating joint portion 112. Therefore, the stress generated between the conductive connection portion 111a and the ceramic multilayer substrate 100 and the semiconductor element 130 can be distributed to the interface between the conductive connection portion 111a and the insulating bonding portion 112. Therefore, stress generated in a concentrated manner between the bonding layer 110 and the ceramic multilayer substrate 100 and the semiconductor element 130 can be dispersed, so that damage to the semiconductor power module 10 can be suppressed and the reliability of the semiconductor power module 10 can be improved.

  Further, according to the semiconductor power module 10 of the first embodiment, the diffusion layer 120 is formed between the ceramic multilayer substrate 100 and the bonding layer 110 when the ceramic multilayer substrate 100 and the bonding layer 110 are diffusion bonded. Accordingly, the bonding strength between the ceramic multilayer substrate 100 and the bonding layer 110 can be improved.

  In addition, according to the semiconductor power module 10 of the first embodiment, the insulating bonding portion 112 of the bonding layer 110 and the insulating diffusion portion 122 of the diffusion layer 120 include the filler 115 having heat transfer performance and heat dissipation performance. The thermal diffusion performance from the element 130 to the ceramic multilayer substrate 100 can be improved.

B. Second embodiment:
In the first embodiment, the semiconductor power module 10 on which only one semiconductor element 130 is mounted has been described. In the second embodiment, a semiconductor power module on which a plurality of semiconductor elements are mounted will be described with reference to FIGS.

B1. Semiconductor power module schematic configuration:
FIG. 7 is a plan view showing the semiconductor power module 30 in the second embodiment. FIG. 8 is a cross-sectional view showing a semiconductor power module 30 in the second embodiment. FIG. 8 shows a cross section taken along the line AA in FIG.

  As shown in FIGS. 7 and 8, the semiconductor power module 30 of the second embodiment includes a ceramic multilayer substrate 300, a bonding layer 310, a diffusion layer 320, and a plurality of (six in the second embodiment) semiconductor elements 330. Is provided. The bonding layer 310 includes a conductive bonding portion 311 including a conductive connection portion 311a and an electrode pad 331 of the semiconductor element 330, and an insulating bonding portion 312. The diffusion layer 320 includes a conductive diffusion portion 321 and an insulating diffusion portion 322. . In the second embodiment, the ceramic multilayer substrate 300, the bonding layer 310, the conductive bonding portion 311, the insulating bonding portion 312, the diffusion layer 320, the conductive diffusion portion 321, the insulating diffusion portion 322, and each semiconductor element 330 are each in the first embodiment. The ceramic multilayer substrate 100, the bonding layer 110, the conductive bonding portion 111, the insulating bonding portion 112, the diffusion layer 120, the conductive diffusion portion 121, the insulating diffusion portion 122, and the semiconductor element 130 of the example are provided.

  In general, in order to cope with the increase in heat generation tolerance of semiconductor elements by using compound semiconductor elements such as SiC from conventional Si-based semiconductor elements, high heat resistance to peripheral members of the semiconductor elements, while heat dissipation as a module High thermal diffusivity is required to meet the demand for smaller parts. In the semiconductor power module 30 of the second embodiment, since the bonding layer 310 is formed in a planar shape, the semiconductor element 330 and the ceramic multilayer substrate 300 do not involve an organic material having low heat resistance and thermal diffusibility, and are heat resistant. Bonding is performed on a plane formed mainly of an inorganic material having excellent characteristics and thermal diffusivity. Therefore, since the thermal diffusion performance from the semiconductor element 330 to the ceramic multilayer substrate 300 is improved, the reliability of mounting a plurality of compound semiconductor elements (semiconductor elements 330) used in a high temperature range of about 300 ° C. or less at high density. The semiconductor power module 30 having a high level can be provided.

C. Third embodiment:
In the third embodiment, the conductive bonding portion has a first bonding start temperature that is a temperature at which the conductive connection portion and the electrode pad of the semiconductor element start bonding, and the insulating bonding portion is connected to the wiring substrate or the semiconductor element. This is a temperature at which bonding is started, and has a second bonding start temperature that is higher than the first bonding start temperature. In the third embodiment, the conductive joint and the insulating joint constituting the joining layer have the same functions and functions as those of the first embodiment except for the joining start temperature. (Junction 110, conductive junction 111, conductive connection 111a, electrode pad 131, insulating junction 112) will be described.

C1. Bonding layer:
The conductive bonding portion 111 of the bonding layer 110 has a first bonding start temperature that is a temperature at which the conductive connection portion 111a and the electrode pad 131 start bonding. The first joining start temperature is a temperature equal to or higher than the sintering start temperature at which at least a part of the material constituting the conductive connection portion 111a or the electrode pad 131 starts the sintering reaction. The sintering start temperature is the start temperature of the sintering reaction due to the formation of a liquid phase by at least a part of the components constituting the conductive connection portion 111a or the electrode pad 131 or the reaction of the adhesion interface in the solid phase. The reason for setting the first joining start temperature to be equal to or higher than the sintering start temperature is as follows. In other words, even if the conductive joint portion 111 is not melted, sintering adherence proceeds due to the generation of a liquid phase of only a small amount of components, and joining between members is started.

In the third embodiment, since the conductive connecting portion 111a is formed of tin and the electrode pad 131 is formed of copper and tin, the conductive connecting portion 111a and the electrode pad 131 are melted and softened to perform diffusion bonding. The proceeding temperature, for example, 300 ° C. is set as the first joining start temperature.

The insulating bonding portion 112 is a temperature at which the insulating bonding portion 112, the ceramic multilayer substrate 100, and the semiconductor element 130 start bonding, and has a second bonding start temperature that is higher than the first bonding start temperature. The second joining start temperature is a temperature equal to or higher than the sintering start temperature at which at least a part of the material constituting the insulating joint 112 starts the sintering reaction. The temperature at which at least a part of the material constituting the insulating joint 112 starts a sintering reaction is the liquid phase formation by at least part of the components constituting the insulating joint 112 or the adhesion interface in the solid phase. This is the starting temperature of the sintering reaction. The reason for setting the second joining start temperature to be equal to or higher than the sintering start temperature is as follows. In other words, even if the insulating bonding portion 112 is not melted, sintering adherence proceeds due to the generation of a liquid phase of only a small amount of components, and bonding with other members is started.

In the third embodiment, since the insulating bonding portion 112 is formed of powder glass (softening point: 357 ° C.) made of Bi ₂ O ₃ and B ₂ O ₃ , the first bonding start temperature (300 ° C.). The temperature at which the insulating bonding portion 112 is softened and diffusion bonding sufficiently proceeds, for example, 450 ° C. is set as the second bonding start temperature.

C2. Manufacturing Process In the third embodiment, the ceramic multilayer substrate 100, the bonding layer 110, and the semiconductor element 130 are bonded by a diffusion bonding process having a stepwise bonding process using a temperature profile having multi-stage temperature changes. The outline of the manufacturing process of the semiconductor power module 10 is the same as that of FIG. 3 described in the first embodiment. However, the diffusion bonding process by thermocompression bonding in step S18 is different. The diffusion bonding process in step S18 will be described below.

  Also in the third embodiment, when the processing up to step S16 described in FIG. 3 is performed, the ceramic multilayer substrate 100, the bonding layer 110, and the semiconductor element 130 are heat-pressed and diffusion bonded to manufacture a semiconductor power module. (Step S18: FIG. 1). In the third embodiment, in the thermocompression treatment, the ceramic multilayer substrate 100, the bonding layer 110, and the semiconductor element 130 are pressurized, and the heating temperature at the time of diffusion bonding is set to be changed in multiple stages. A heat treatment is performed based on the profile. In the diffusion bonding process including the heat treatment performed based on the temperature profile, the heating temperature is held at the first bonding start temperature for a predetermined time (first bonding step), and then the heating temperature is held at the second bonding start temperature for a predetermined time. (Second bonding step). In the third embodiment, the semiconductor element 130 is pressed against the ceramic multilayer substrate 100 by a pressing jig having an area slightly smaller than the area of the back surface of the semiconductor element 130. Specifically, the first and second joining steps are as follows.

  First, in the first bonding step, heat treatment is performed while maintaining the first bonding start temperature (300 ° C.) for a predetermined time (for example, about 10 minutes), and occurs between the conductive connection portion 111a and the electrode pad 131. Diffusion bonding proceeds and a conductive bonding portion 111 is formed. Since the softening point (357 ° C.) of the insulating bonding portion 112 is higher than the first bonding start temperature, the insulating bonding portion 112 is not softened in the first bonding step. It does not penetrate between the conductive connecting portion 111a and the electrode pad 131, and the material constituting the insulating bonding portion 112 is mixed into the conductive bonding portion 111 formed by diffusion bonding of the conductive connecting portion 111a and the electrode pad 131. There is no.

When diffusion bonding between the conductive connection portion 111a and the electrode pad 131 has sufficiently progressed and integration of the conductive connection portion 111a and the electrode pad 131 is ensured, a second bonding step is performed. In the second bonding step, heat treatment is performed at the second bonding start temperature (450 ° C.). By the heat treatment, the surface of the semiconductor element 130 made of the insulating bonding portion 112, the first surface 105 of the ceramic multilayer substrate 100, and the insulating protective film is sufficiently melted and softened. The softened insulating bonding portion 112 has a gap existing between the semiconductor element 130 and the bonding layer 110 due to the pressing force of the pressing jig applied so that the semiconductor element 130 is in close contact with the ceramic multilayer substrate 100, and Diffusion bonding proceeds while being deformed so as to fill a gap existing between the bonding layer 110 and the ceramic multilayer substrate 100. As a result, diffusion bonding is performed between the ceramic multilayer substrate 100 and the insulating bonding portion 112 and between the insulating bonding portion 112 and the surface of the semiconductor element 130 in a uniform plane without a gap. As described above, the semiconductor power module 10 is manufactured.

  According to the semiconductor power module of the third embodiment described above, since the insulating bonding portion is heated at the first bonding start temperature lower than the temperature at which the sintering reaction starts when forming the conductive bonding portion, the insulating bonding is performed. The conductive joint portion is joined before the portion. Accordingly, the conductive connection portion 111a and the electrode pad 131 of the semiconductor element, and the conductive joint portion 111 and the ceramic multilayer substrate 100 are bonded, that is, between the conductive connection portion 111a and the electrode pad 131 of the semiconductor element, and the conductive state. Softening deformation of the insulating bonding portion 112 starts in a state where no gap exists between the bonding portion 111 and the ceramic multilayer substrate 100, and the insulating bonding portion 112 and the semiconductor element 130, and the insulating bonding portion 112 and the ceramic multilayer substrate 100 Are joined. Therefore, the deterioration of the conductive performance of the conductive joint portion 111 due to the material constituting the insulating joint portion 112 entering between the conductive connection portion 111a and the electrode pad 131 and entering the conductive joint portion 111 can be suppressed. .

  Further, according to the semiconductor power module of the third embodiment, the first junction start temperature is the melting start temperature of the material constituting the conductive junction, and the second junction start temperature constitutes the insulating junction. It is the melting start temperature of the material. Therefore, the conductive joint and the insulating joint can be reliably melted, and the joint strength between each of the conductive joint and the insulating joint and the other member can be improved.

D. Variations:
D1. Modification 1:
FIG. 9 is a cross-sectional view showing a semiconductor power module 40 in a modified example. As shown in FIG. 9, the semiconductor power module 40 of Modification 1 includes a ceramic multilayer substrate 400, a bonding layer 410, and a diffusion layer 420, similar to the semiconductor power module 10 of the first embodiment. The diffusion layer 420 includes a conductive diffusion part 421 and an insulating diffusion part 422. In Modification 1, the ceramic multilayer substrate 400, the diffusion layer 420, the conductive diffusion portion 421, the insulating diffusion portion 422, and the semiconductor element 430 are the ceramic multilayer substrate 100, the diffusion layer 120, the conductive diffusion portion 121, and the conductive diffusion portion 121 of the first embodiment, respectively. The insulating diffusion unit 122 and the semiconductor element 130 have the same configuration.

  The semiconductor power module 40 of Modification 1 is different from the semiconductor power module 10 of the first embodiment in the configuration of the bonding layer 410. The bonding layer 410 is a flat thin film, and includes a conductive connection portion 411 a, a conductive bonding portion 411 including an electrode pad 431 of the semiconductor element 430, and an insulating bonding portion 412. As shown by a circle B in FIG. 9, the insulating bonding portion 412 is formed in a tapered shape in which the area of the surface on the semiconductor element 430 side is larger than the area of the surface on the ceramic multilayer substrate 400 side. The conductive connection portion 411a is formed to have a shape corresponding to the tapered shape of the insulating joint portion 412. The insulating bonding portion 412 is not limited to the tapered shape, and may be any shape as long as the area of the surface on the semiconductor element 430 side is larger than the area of the surface on the ceramic multilayer substrate 400 side. For example, a staircase shape or a curved shape may be used.

  The semiconductor power module 40 can be manufactured by the same method as the semiconductor power module 10 of the first embodiment, except for the step of arranging the bonding layer 410 (corresponding to steps S12 and S14 in FIG. 3). For example, the bonding layer 410 may be disposed using the following method in the first modification.

  The insulating bonding portion 412 is disposed by screen printing before the conductive connection portion 411a. At this time, a glass powder paste, which is a material of the insulating bonding portion 412, is printed using a screen having an opening having a tapered shape with a large area on the semiconductor element 430 side.

  Next, the paste which has as a main component the metal seed | species used as the material of the conductive connection part 411a is printed using the screen which has an opening part in the site | part corresponding to the conductive connection part 411a. The viscosity of the paste used at this time is adjusted, and after the paste is applied to the semiconductor element 430, the paste is spread over a larger area on the semiconductor element 430 side than the surface of the opening due to the weight of the paste. By doing so, a joint portion including a tapered insulating joint portion 412 and a conductive connection portion 411a having a shape corresponding to the tapered shape of the insulating joint portion 412 is created. The planar bonding layer 410 is formed by disposing the semiconductor element 430 so that the electrode pad 431 of the semiconductor element 430 fits into a recess formed by the conductive connection portion 411a and the insulating bonding portion 412.

  According to the first modification, the insulating bonding portion 412 of the bonding layer 410 is formed in a tapered shape in which the area of the surface on the semiconductor element 430 side is wider than the area of the surface on the ceramic multilayer substrate 100 side. Compared to the insulating junction 112 of the example, the contact area between the insulating junction 412 and the semiconductor element 430 is large. Therefore, the thermal diffusion performance from the semiconductor element 430 to the bonding layer 410 is higher than that of the semiconductor power module 10 of the first embodiment. Therefore, while ensuring the insulation performance between the ceramic multilayer substrate 400 and the semiconductor element 430, the heat diffusion performance can be improved, and the heat radiation of the semiconductor element 430 can be promoted.

D2. Modification 2:
Instead of the manufacturing method (FIG. 3) of the semiconductor power module 10 in the first embodiment, the semiconductor power module 10 may be manufactured by the following method. Below, the process following step S10 is demonstrated. In addition, the code | symbol of 1st Example is used for the code | symbol of each member.

  Insulating junction 112 is formed. Specifically, powder glass and a thermally decomposable organic binder (for example, a butyral binder that softens at a temperature of about 80 ° C. and thermally decomposes at a temperature of about 250 ° C.) are mixed with a solvent such as an organic solvent or water. The slurry is kneaded to form a slurry, and the slurry is molded into a sheet shape by a technique such as sheet casting by the doctor blade method or extrusion molding. A through hole is formed in a portion of the sheet corresponding to the conductive joint 111 by machining such as laser or microcomputer punch. As described above, the insulating bonding portion 112 is manufactured as a glass sheet in which a through hole is formed.

  The ceramic multilayer substrate 100 is disposed so that the first surface 105 of the ceramic multilayer substrate 100 faces the desired surface of the insulating bonding portion 112, and both of them are softened by the softening temperature of the organic binder contained in the insulating bonding portion sheet. Temporary adhesion is performed by the bonding force of the organic binder contained in the insulating joint 112 formed in a sheet shape by heating and pressurizing as described above.

Next, the conductive connection part 111a is formed. Specifically, the paste for forming the conductive connection portion 111a is filled into the through hole of the manufactured insulating bonding portion 112 by screen printing. The paste contains metal as a main component. For example, a metal species such as aluminum metal, silver oxide, copper, nanometal, or solder alloy that melts in the heating process in step S18 in FIG. It is formed by kneading the adhesive with a solvent such as an organic solvent or water. The filling of the paste is not limited to screen printing, and for example, a method such as ejection by a dispenser may be used.

  For the ceramic multilayer substrate 100, the conductive connecting portion 111a, and the insulating bonding portion 112 laminated as described above, the semiconductor element 130 has a melting point of glass or metal that is a main component constituting the insulating bonding portion 112 and the conductive connecting portion 111a. After heating to temperature and pressure bonding, the organic binder component contained in the insulating bonding portion 112 is removed by thermal decomposition, and then the semiconductor power module 10 having the diffusion layer 120 formed thereon is manufactured (FIG. 1). Step S18).

  The planar bonding layer 110 can also be manufactured by the manufacturing method described above. Therefore, the semiconductor element 130 and the bonding layer 110, and the bonding layer 110 and the ceramic multilayer substrate 100 can be bonded to each other, and the heat conduction performance from the semiconductor element 130 to the ceramic multilayer substrate 100, and the ceramic multilayer substrate 100 and the semiconductor can be bonded. The bonding strength with the element 130 can be improved.

D3. Modification 3:
In the first embodiment, the ceramic multilayer substrate 100 and the bonding layer 110 are temporarily laminated in advance by the bonding force of the organic binder, and then the semiconductor element 130 is stacked and bonded by pressing and heating. Then, a sheet formed by filling holes formed in the insulating junction 112 formed in a sheet shape in advance with the conductive connection portion 111a is manufactured, and is sandwiched between the ceramic multilayer substrate 100 and the semiconductor element 130, and then heated. The semiconductor power module 10 may be manufactured by pressure bonding. By doing so, it is possible to reduce the amount of the organic binder added to the bonding layer 110, and to prevent the bonding layer 110 from being deteriorated by organic residues.

D4. Modification 4:
In the first embodiment, a temperature at which the material constituting the conductive junction 111 is sufficiently melted is used as the first joining start temperature, and the material constituting the insulating junction 112 is sufficiently used as the second joining start temperature. Although the softening temperature is used, it suffices that at least a part of the constituent materials is equal to or higher than the temperature at which the sintering reaction starts. In this way, each of the conductive bonding portion 111 and the insulating bonding portion 112 can be bonded to another member without heating to the melting point. Therefore, it is possible to reduce the temperature of the manufacturing process. For example, when the insulating bonding portion 112 is made of powder glass made of Na ₂ O ₃ , B ₂ O ₃ and SiO ₂ , the second bonding start temperature is the start temperature of the sintering reaction of the powder glass. It may be a certain 495 ° C. or higher.

  As mentioned above, although the various Example of this invention was described, this invention is not limited to these Examples, A various structure can be taken in the range which does not deviate from the meaning.

DESCRIPTION OF SYMBOLS 10, 30, 40 ... Semiconductor power module 100 ... Ceramic multilayer substrate 101 ... Inner layer via hole 104 ... Electrode terminal 109 ... Wiring pattern 110 ... Joining layer 110a ... Joining part 111 ... Conductive joining part 111a ... Conductive connecting part 112 ... Insulating joining part 120 DESCRIPTION OF SYMBOLS ... Diffusion layer 121 ... Conductive diffusion part 122 ... Insulation diffusion part 130 ... Semiconductor element 131 ... Electrode pad 202 ... Screen 203 ... Squeegee 204 ... Squeegee holder 250 ... Glass powder paste 300 ... Ceramic multilayer substrate 310 ... Bonding layer 320 ... Diffusion layer 330 ... Semiconductor element 400 ... Ceramic multilayer substrate 410 ... Bonding layer 411 ... Conductive bonding part 412 ... Insulating bonding part 420 ... Diffusion layer 430 ... Semiconductor element

Claims (16)

A semiconductor power module,
A multilayer substrate with vias and wiring patterns formed thereon;
A semiconductor element disposed on a first surface side of the multilayer substrate;
A bonding layer formed on the first surface of the multilayer substrate and bonding the multilayer substrate and the semiconductor element;
With
The bonding layer is
A planar conductive joint disposed in a first portion corresponding to the via, the electrode pad formed in the semiconductor element, and a conductive connection portion that conducts the electrode pad and the multilayer substrate A conductive joint comprising:
A planar insulating bonding portion, which is disposed in a second portion different from the first portion, and mainly comprises an inorganic material;
A semiconductor power module. The semiconductor power module according to claim 1,
The multilayer substrate and the bonding layer and the semiconductor element and the bonding layer are bonded by diffusion bonding,
The semiconductor power module further includes:
A diffusion layer formed during the diffusion bonding is provided between the multilayer substrate and the bonding layer and between the semiconductor element and the bonding layer.
Semiconductor power module. The semiconductor power module according to claim 1,
The insulating joint includes a metal filler or an inorganic filler,
Semiconductor power module. The semiconductor power module according to claim 2,
The insulating joint and the diffusion layer include a metal filler or an inorganic filler,
Semiconductor power module. A semiconductor power module according to any one of claims 1 to 4,
The first bonding start temperature, which is the bonding start temperature of the material forming the conductive bonding portion, is lower than the second bonding start temperature, which is the bonding start temperature of the material forming the insulating bonding portion. ,
Semiconductor power module. The semiconductor power module according to claim 5, wherein
The first joining start temperature is equal to or higher than a sintering start temperature that is a temperature at which at least a part of the material constituting the conductive joint starts a sintering reaction,
The second joining start temperature is equal to or higher than a sintering start temperature that is a temperature at which at least a part of the material constituting the insulating joint starts a sintering reaction,
Semiconductor power module. A circuit board,
A multilayer substrate with vias and wiring patterns formed thereon;
A bonding layer disposed on the first surface of the multilayer substrate and bonding a semiconductor element to the multilayer substrate;
With
The bonding layer is
A conductive connection portion disposed in a first portion corresponding to the via, electrically connected to the wiring pattern and the semiconductor element, and at least the first surface side being formed in a planar shape;
An insulating joint that is disposed in a second part different from the first part, mainly composed of an inorganic material, and at least the first surface side is formed in a planar shape;
A circuit board. The circuit board according to claim 7,
The first junction start temperature, which is the temperature at which the material constituting the conductive junction starts to join the semiconductor element, is the temperature at which the material constituting the insulating junction starts to join the multilayer substrate and the semiconductor element. It is characterized by being lower than the second joining start temperature which is
Circuit board. The circuit board according to claim 8, wherein
The first joining start temperature is equal to or higher than a sintering start temperature at which at least a part of the material constituting the conductive joint starts a sintering reaction,
The second joining start temperature is equal to or higher than a sintering start temperature at which at least a part of the material constituting the insulating joint starts a sintering reaction,
Circuit board. A semiconductor power module,
A multilayer substrate with vias and wiring patterns formed thereon;
A semiconductor element disposed on a first surface side of the multilayer substrate;
A bonding layer formed on the first surface of the multilayer substrate and bonding the multilayer substrate and the semiconductor element;
With
The bonding layer is
A conductive junction that is disposed in a first portion corresponding to the via and includes an electrode pad of the semiconductor element, and a conductive connection portion that conducts the electrode pad and the multilayer substrate;
An insulating joint that is disposed in a second part different from the first part and mainly comprises an inorganic material;
Have
The multilayer substrate is stacked on the bonding layer so that the electrode pad and the conductive connection portion can be electrically connected, and the multilayer substrate, the bonding layer, and the semiconductor element are bonded. And the cross section in the stacking direction of the interface between the bonding layer and the interface between the bonding layer and the semiconductor element is formed substantially linearly,
Semiconductor power module. A circuit board,
A multilayer substrate with vias and wiring patterns formed thereon;
A bonding layer formed on the first surface of the multilayer substrate and bonding the multilayer substrate and the semiconductor element;
With
The bonding layer is
A conductive connection portion disposed in a first portion corresponding to the via, and electrically connecting the semiconductor element to the wiring pattern;
An insulating joint that is disposed in a second part different from the first part and mainly comprises an inorganic material;
Have
In a state where the multilayer substrate and the bonding layer are bonded, a cross section in the stacking direction of the interface between the multilayer substrate and the bonding layer is substantially linear.
Circuit board. A method for manufacturing a semiconductor power module, comprising:
Fabricate a multilayer board with vias and wiring patterns,
A planar conductive connecting portion that conducts the wiring pattern and the semiconductor element is provided in a first part corresponding to the via, and a planar insulating junction is provided in a second part different from the first part. A joint having a portion is disposed on the first surface of the multilayer substrate;
On the junction, the semiconductor element is arranged so that the electrode pad formed in the semiconductor element and the conductive connection part can conduct,
The multilayer substrate, the bonding portion, and the semiconductor element are thermocompression bonded, and the multilayer substrate and the bonding layer, and the bonding portion and the semiconductor element are diffusion bonded.
Manufacturing method of semiconductor power module. A method of manufacturing a semiconductor power module according to claim 12,
In the diffusion bonding,
The temperature at which the material constituting the conductive bonding portion starts bonding with the semiconductor element is defined as a first bonding start temperature,
A temperature at which the material constituting the insulating bonding portion starts bonding with the multilayer substrate and the semiconductor element, and a temperature higher than the first bonding start temperature is defined as a second bonding start temperature;
Bonding the conductive bonding portion and the electrode pad of the semiconductor element by thermocompression bonding the multilayer substrate, the bonding portion, and the semiconductor element at the first bonding start temperature,
After joining the conductive joint and the electrode pad of the semiconductor element, the multilayer substrate, the joint, and the semiconductor element are thermocompression-bonded at the second joining start temperature to thereby join the multilayer substrate and the joint. Part, and the joining part and the semiconductor element are joined.
Manufacturing method of semiconductor power module. In the manufacturing method of the semiconductor power module according to claim 13,
The first joining start temperature is equal to or higher than a sintering start temperature at which at least a part of the material constituting the conductive joint starts a sintering reaction,
The second joining start temperature is equal to or higher than a sintering start temperature at which at least a part of the material constituting the insulating joint starts a sintering reaction,
Manufacturing method of semiconductor power module. A method of manufacturing a semiconductor power module according to claim 12,
In the diffusion bonding,
The temperature at which the material constituting the conductive bonding portion starts bonding with the semiconductor element is defined as a first bonding start temperature,
A temperature at which the material constituting the insulating bonding portion starts bonding with the multilayer substrate and the semiconductor element, and a temperature higher than the first bonding start temperature is defined as a second bonding start temperature;
After the first joining start temperature is maintained for a predetermined time, the heating is performed based on a temperature profile set so that the second joining start temperature is maintained for a predetermined time.
Manufacturing method of semiconductor power module. A circuit board manufacturing method comprising:
Fabricate a multilayer board with vias and wiring patterns,
The first part corresponding to the via has a conductive connection part for conducting the wiring pattern and the semiconductor element, and has an insulating joint part in a second part different from the first part, A bonding layer in which the first surface side is formed in a planar shape is disposed on the first surface of the multilayer substrate;
Bonding the multilayer substrate and the bonding layer by the adhesive force of the organic component contained in the bonding layer,
A method of manufacturing a circuit board.

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