JP2012235162A - Functional substrate and manufacturing method therefor - Google Patents

Functional substrate and manufacturing method therefor Download PDF

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JP2012235162A
JP2012235162A JP2012171676A JP2012171676A JP2012235162A JP 2012235162 A JP2012235162 A JP 2012235162A JP 2012171676 A JP2012171676 A JP 2012171676A JP 2012171676 A JP2012171676 A JP 2012171676A JP 2012235162 A JP2012235162 A JP 2012235162A
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substrate
layer
film
thin film
electronic circuit
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JP5578479B2 (en
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Kazuya Yoshioka
一也 吉岡
Toshiyuki Samejima
俊之 鮫島
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Tokyo University of Agriculture and Technology NUC
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Abstract

PROBLEM TO BE SOLVED: To minimize any damage to a thin film electronic circuit due to adhesion and peeling operations, and to use an adhesive having sufficient adhesive strength and proper hardness in the case of transferring a thin film electronic circuit.SOLUTION: As for a film structure constituted of a single layer or a plurality of layers necessary for manufacturing the thin film electronic circuit and a substrate at transfer destination, a transfer process is carried out with a functional substrate constituted of only the single layer of an epoxy-based or acryl-based adhesive layer characterized by setting a glass transfer temperature to 100°C or more but 150°C or less, a water absorption rate to 0.1% or less, tensile shearing strength to 10 N/mmor more, T type peeling adhesive strength to 1 N/mmor more, and a linear expansion coefficient to 1.0×10or less, or accompanied with an elastic layer constituted of silicon resin, acryl transformation silicon resin or epoxy transformation silicon resin materials on the epoxy-based or acryl-based adhesive layer.

Description

本発明は、半導体素子および回路を形成する方法に関するものである。   The present invention relates to methods for forming semiconductor devices and circuits.

単結晶シリコン表面に形成されるバイポーラ及びＭＯＳ型トランジスタは良好な特性を有し、広く電子デバイスを構成する素子として用いられている。さらに、現在では素子サイズの微細化に対応するため、シリコン表面に絶縁膜を介して作製された薄膜シリコン上にトランジスタが作製されている。   Bipolar and MOS transistors formed on the surface of single crystal silicon have good characteristics and are widely used as elements constituting electronic devices. Furthermore, at present, in order to cope with miniaturization of the element size, a transistor is fabricated on a thin film silicon fabricated through an insulating film on the silicon surface.

これらの素子形成は熱酸化法等１０００℃の高温の熱処理プロセス技術を基本としている。最近、レーザ結晶化、プラズマＣＶＤ等比較的低温で、多結晶シリコン薄膜トランジスタ（ｐｏｌｙ−Ｓｉ ＴＦＴ）又はアモルファスシリコン薄膜トランジスタ（ａ−Ｓｉ：Ｈ ＴＦＴ）が作製できるようになった。   The formation of these elements is based on a heat treatment process technology at a high temperature of 1000 ° C. such as a thermal oxidation method. Recently, a polycrystalline silicon thin film transistor (poly-Si TFT) or an amorphous silicon thin film transistor (a-Si: HTFT) can be produced at a relatively low temperature such as laser crystallization and plasma CVD.

上記薄膜トランジスタは、比較的低温とはいえ、依然として３００℃以上のプロセス中で作製されている。そのため、耐熱性のあるガラス基板上に作製されるのが一般的である。ガラス基板は一般的に高価で、重くて、割れやすい欠点を有している。したがって、軽量で、安価で、かつ多少の変形にも耐えられる基板の上にトランジスタを始めとする回路素子が形成される技術が望まれている。さらには、大画面直視型ディスプレイの駆動回路への薄膜トランジスタの応用が期待されており、大型基板処理技術の確立が必須となっている。   The thin film transistor is still manufactured in a process of 300 ° C. or higher, although at a relatively low temperature. Therefore, it is common to produce on a heat resistant glass substrate. Glass substrates are generally expensive, heavy and have the disadvantages of being easily broken. Therefore, there is a demand for a technique in which circuit elements such as transistors are formed on a substrate that is lightweight, inexpensive, and can withstand some deformation. Furthermore, the application of thin film transistors to the drive circuit of a large screen direct view display is expected, and establishment of a large substrate processing technology is essential.

上記を解決する手段として、石英基板上に薄膜トランジスタ等のデバイスを形成し、これを耐熱性の低い樹脂性の基板上に転写する技術が開発されている。   As means for solving the above, a technique has been developed in which a device such as a thin film transistor is formed on a quartz substrate and transferred onto a resinous substrate having low heat resistance.

例えば良好な特性の半導体素子およびその回路を簡単な工程で、低温かつ高精度に基体上に形成することを目的として、半導体回路を形成した膜構造を基体から剥離するための剥離層を形成する技術が知られている（特許文献１参照）。   For example, for the purpose of forming a semiconductor element having good characteristics and its circuit on a substrate at a low temperature and with high accuracy by a simple process, a peeling layer for peeling the film structure on which the semiconductor circuit is formed from the substrate is formed. A technique is known (see Patent Document 1).

また、大口径のＳｉ基板上に有機金属気相成長法（ＭＯＣＶＤ法）を用いて半導体結晶を形成するに際し、この半導体層とＳｉ基板との間に除去層を介在させ、素子作成を完了した後に、エッチング等により除去層を溶解させて、半導体層をＳｉ基板から剥離する技術が知られている（特許文献２参照）。   In addition, when a semiconductor crystal was formed on a large-diameter Si substrate using metal organic chemical vapor deposition (MOCVD), a removal layer was interposed between the semiconductor layer and the Si substrate to complete the device fabrication. A technique is known in which the removal layer is dissolved by etching or the like and the semiconductor layer is peeled off from the Si substrate (see Patent Document 2).

特開平１１−９７３５７号公報Japanese Patent Laid-Open No. 11-97357 特開平５−１３６１７１号公報JP-A-5-136171

しかしながら、従来の剥離、転写技術においては、除去層または剥離層をエッチング等によって除去するのにかなりの時間を必要とした。除去層または剥離層の厚みは大体１０００ｎｍ〜２００００ｎｍであるが、基板となるシリコン基盤の直径が６インチ、８インチとなるに従って、径中心部にまでエッチング液が含浸するのに時間がかかる。例えば、酸または純水によって、わずかな膜厚の断面を溶出しながら剥離を進行させるとすれば、８０℃の酸を用いる場合でも剥離速度は１μｍ／ｓ程度のため、直径が６インチサイズの
基板であっても完全剥離には１０時間以上要することになる。 However, in the conventional peeling and transfer techniques, a considerable time is required to remove the removal layer or the peeling layer by etching or the like. Although the thickness of the removal layer or the release layer is about 1000 nm to 20000 nm, as the diameter of the silicon substrate serving as the substrate becomes 6 inches or 8 inches, it takes time to impregnate the etching solution to the center of the diameter. For example, if peeling is allowed to proceed while eluting a cross section with a slight film thickness with acid or pure water, the peeling speed is about 1 μm / s even when an acid at 80 ° C. is used, so the diameter is 6 inches. Even a substrate requires 10 hours or more for complete peeling.

一方、剥離手法による転写技術について、転写元である第１の基体上に酸化ゲルマニウム又はこれを含む物質からなる剥離層を形成し、その上部に薄膜電子回路または電子回路素子あるいはそれらの作製に必要な単層又は複数の層からなる膜構造を形成し、転写先である第２の基体を当該膜構造上に接着し、しかる後に当該剥離層中の酸化ゲルマニウムを除去することで、膜構造を別の基体に転写する技術が存在する。   On the other hand, as for the transfer technique based on the peeling method, a peeling layer made of germanium oxide or a substance containing the same is formed on the first substrate as a transfer source, and is necessary for the thin film electronic circuit or the electronic circuit element or the production thereof on the upper layer. Forming a film structure composed of a single layer or a plurality of layers, adhering a second substrate as a transfer destination onto the film structure, and then removing germanium oxide in the release layer to form the film structure There are techniques for transferring to another substrate.

この転写プロセスでは、被転写層である薄膜電子回路あるいは電子回路素子あるいはそれらの作製に必要な単層又は複数の層からなる膜構造を第２の基体に接着するプロセスが含まれている。その際にどのような種類の接着剤を使用するかによって、転写プロセス中における被転写層へのダメージの度合いが異なり、ひいては転写プロセスによる被転写層の歩留まりにも影響を与えることになる。   This transfer process includes a process of adhering a thin film electronic circuit or electronic circuit element which is a layer to be transferred, or a film structure composed of a single layer or a plurality of layers necessary for production thereof to a second substrate. Depending on what kind of adhesive is used at that time, the degree of damage to the transfer layer during the transfer process differs, and this also affects the yield of the transfer layer by the transfer process.

本発明は、被転写層と転写先基板との接着力の向上を図り、純水または酸溶液中での転写プロセスにおいても十分な接着強度と適度な硬さを伴った接着剤を用いることによって、薄膜電子回路素子にダメージをあたえることなく剥離し、良好な特性をもつ薄膜電子回路を歩留まり良く、耐熱性のない基板上に転写することを目的としている。また、本発明は被転写層と転写先基板との剥離を従来にくらべ短時間で可能とすることを目的としている。   The present invention aims to improve the adhesive force between the transferred layer and the transfer destination substrate, and uses an adhesive having sufficient adhesive strength and appropriate hardness even in a transfer process in pure water or acid solution. The object is to peel the thin film electronic circuit element without damaging it, and to transfer a thin film electronic circuit having good characteristics onto a substrate having good yield and no heat resistance. Another object of the present invention is to enable the transfer layer and the transfer destination substrate to be peeled in a shorter time than in the past.

かかる課題を解決するために、本発明は、基体上に酸化ゲルマニウム膜の剥離層、その上に薄膜電子回路あるいは電子回路素子あるいはそれらの作製に必要な単層または複数の層からなる膜構造の少なくとも一つを有し、当該膜構造上に樹脂系接着剤を用いて第２の基体に接着した構造の機能性基体であることを特徴とする。   In order to solve such a problem, the present invention has a film structure comprising a release layer of a germanium oxide film on a substrate, and a thin film electronic circuit or electronic circuit element or a single layer or a plurality of layers necessary for producing them on the substrate. It is a functional substrate having at least one and having a structure in which the film substrate is bonded to the second substrate using a resin adhesive.

さらに本発明は、樹脂製接着剤として、ガラス転移温度が１００℃以上、１５０℃以下、吸水率が０．１％以下、引っ張りせん断強さ１０Ｎ／ｍｍ２以上、Ｔ型剥離接着強さ１Ｎ／ｍｍ２以上、線膨張率１．０×１０−４以下であるエポキシ系あるいはアクリル系接着剤であることとを特徴とする。 Further, the present invention provides a resin adhesive having a glass transition temperature of 100 ° C. or more and 150 ° C. or less, a water absorption of 0.1% or less, a tensile shear strength of 10 N / mm 2 or more, and a T-type peel adhesion strength of 1 N / mm 2 or more, and a width and is an epoxy or acrylic adhesive is a linear expansion coefficient 1.0 × 10 -4 or less.

さらには、本発明は、上記機能性基体において、エポキシ系あるいはアクリル系接着層と第２の基体の間にシリコーン樹脂、アクリル変成シリコーン樹脂あるいはエポキシ変成シリコーン樹脂の弾性層を挿入した構造をもつ機能性基体であることを特徴とする。   Furthermore, the present invention provides a functional substrate having a structure in which an elastic layer of silicone resin, acrylic modified silicone resin or epoxy modified silicone resin is inserted between the epoxy or acrylic adhesive layer and the second substrate. It is a characteristic substrate.

また本発明は、第一の基体上に酸化ゲルマニウム膜一層のみ、あるいはゲルマニウム膜と酸化ゲルマニウム膜の二層からなる剥離層を有し、その上に薄膜電子回路あるいは電子回路素子あるいはそれらの作製に必要な単層または複数の層からなる膜構造の少なくとも一つを有し、当該膜構造上に第一の基体と異なる熱膨張係数を持つ単層あるいは複数の層からなる接着層を有する機能性基体であることを特徴とする。   Further, the present invention has a peeling layer composed of only one germanium oxide film or two layers of a germanium film and a germanium oxide film on the first substrate, on which a thin film electronic circuit or an electronic circuit element or their production is prepared. Functionality having at least one of the required single-layer or multi-layer film structure, and having a single-layer or multi-layer adhesive layer having a different thermal expansion coefficient from the first substrate on the film structure It is a substrate.

さらに本発明は、第一の基体上に酸化ゲルマニウム膜一層のみ、あるいはゲルマニウム膜と酸化ゲルマニウム膜の二層からなる剥離層を有し、その上に薄膜電子回路あるいは電子回路素子あるいはそれらの作製に必要な単層または複数の層からなる膜構造の少なくとも一つを有し、当該膜構造上に第一の基体と異なる熱膨張係数を持つ単層あるいは複数の層からなる接着層とその接着層の上に第二の基体を有する機能性基体であることを特徴とする。   Furthermore, the present invention has a peeling layer composed of only one germanium oxide film or two layers of a germanium film and a germanium oxide film on a first substrate, on which a thin film electronic circuit or an electronic circuit element or their production is prepared. Adhesive layer comprising a single layer or a plurality of layers having at least one of a required single layer or a plurality of layers and having a different thermal expansion coefficient from that of the first substrate, and the adhesive layer A functional substrate having a second substrate thereon.

また本発明は、一定温度の酸または純水中またはそれらの蒸気中にて上記機能性基体を
保持する工程と、しかる後に上記機能性基体の温度を変化させることにより、第一の基体と上記膜構造上の接着層との間にせん断方向応力を発生させる工程を含むことを特徴とする、機能性基体から上記剥離層を除去する方法である。 The present invention also includes a step of holding the functional substrate in a constant temperature acid or pure water or a vapor thereof, and then changing the temperature of the functional substrate to thereby change the first substrate and the above-described substrate. It is a method for removing the release layer from a functional substrate, comprising the step of generating a shear direction stress between the adhesive layer on the film structure.

さらに本発明は、上記剥離層を除去する方法において、少なくとも４０℃以上の酸あるいは純水中またはそれらの蒸気中で上記機能性基体を保持する工程と、上記機能性基体を前記剥離液温度よりも少なくとも２０℃以上温度を下げて保持する工程を、一回または複数回繰り返すことを特徴とする剥離層を除去する方法である。   Furthermore, the present invention provides a method for removing the release layer, the step of holding the functional substrate in an acid of 40 ° C. or higher, pure water or their vapor, and the functional substrate from the temperature of the release solution. The method of removing the release layer is characterized in that the step of lowering the temperature by at least 20 ° C. and holding it is repeated once or a plurality of times.

さらに本発明は、上記剥離層を除去する方法において、上記接着層のうち、当該膜構造上に直接接する接着層はショアー硬度が７０以上、ガラス転移温度が１００℃以上、２００℃以下、吸水率が０．１％以下、引っ張りせん断強さ１０Ｎ／ｍｍ２以上、熱膨張係数１．０×１０−５以上であることを特徴とする剥離層を除去する方法である。 Furthermore, the present invention provides the method for removing the release layer, wherein the adhesive layer directly contacting the film structure among the adhesive layers has a Shore hardness of 70 or more, a glass transition temperature of 100 ° C. or more and 200 ° C. or less, a water absorption rate. Is 0.1% or less, tensile shear strength is 10 N / mm 2 or more, and thermal expansion coefficient is 1.0 × 10 −5 or more.

本発明による機能性基体、薄膜素子形成法及び剥離層を除去する方法によれば、良好な特性の半導体電子回路素子をさらに歩留まり良く、耐熱性の低い基体の上に形成することが可能となる。   According to the functional substrate, the thin film element forming method, and the peeling layer removing method according to the present invention, it is possible to form a semiconductor electronic circuit element with good characteristics on a substrate with low yield and high heat resistance. .

本発明において、第一の基体上１に剥離層２、カバー膜３、被転写層（薄膜電子回路素子）４、接着層５および第２の基体６の順に積層された機能性基体及び剥離プロセスを示した説明図である。In the present invention, a functional substrate in which a release layer 2, a cover film 3, a transfer layer (thin film electronic circuit element) 4, an adhesive layer 5 and a second substrate 6 are laminated in this order on the first substrate 1 and the release process It is explanatory drawing which showed. 本発明において、第一の基体１上にゲルマニウム層２１、剥離層２、カバー膜３、被転写層（薄膜電子回路素子）４、接着層５、第二の接着層５１および第２の基体６の順に積層された機能性基体及び剥離プロセスを示した説明図である。In the present invention, a germanium layer 21, a release layer 2, a cover film 3, a transferred layer (thin film electronic circuit element) 4, an adhesive layer 5, a second adhesive layer 51, and a second substrate 6 are formed on the first substrate 1. It is explanatory drawing which showed the functional base | substrate laminated | stacked in order of and the peeling process.

本発明の機能性基体は、薄膜電子回路素子の作製に必要な、単層又は複数の層からなる膜構造と、それらを支持する基体との間に酸化ゲルマニウムからなる剥離層を形成することによって達成される。さらに、当該膜構造を別の基体に接着することによって達成される。   The functional substrate of the present invention is formed by forming a release layer made of germanium oxide between a film structure consisting of a single layer or a plurality of layers and a substrate supporting them, which are necessary for the production of a thin film electronic circuit element. Achieved. Furthermore, it is achieved by adhering the membrane structure to another substrate.

本発明の機能性基体は、薄膜電子回路素子の作製に必要な、単層又は複数の層からなる膜構造を、それらを支持する基体から少なくとも一部を剥離することによって達成される。さらに、当該膜構造を別の基体に接着することによって達成される。   The functional substrate of the present invention is achieved by peeling at least a part of a film structure composed of a single layer or a plurality of layers necessary for production of a thin film electronic circuit element from a substrate supporting them. Furthermore, it is achieved by adhering the membrane structure to another substrate.

本発明の機能性基体は、薄膜電子回路素子の作製に必要な、単層又は複数の層からなる膜構造と、それらを支持する基体との間に酸化ゲルマニウム膜一層のみ、あるいはゲルマニウム膜と酸化ゲルマニウム膜の二層からなる剥離層を形成することによって達成される。またさらに、当該膜構造を別の基体に接着することによって達成される。   The functional substrate of the present invention is a single layer of a germanium oxide film or a germanium film and an oxide layer between a film structure composed of a single layer or a plurality of layers and a substrate supporting them, which are necessary for the production of a thin film electronic circuit element. This is accomplished by forming a release layer consisting of two layers of germanium film. Still further, it is achieved by adhering the membrane structure to another substrate.

本発明の実施の形態に関して、図面を参照しながら説明する。図１は、本発明の第一の実施の形態にかかる機能性基体（電子デバイス）の構造および製造方法を示す図である。   Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing a structure of a functional substrate (electronic device) and a manufacturing method according to the first embodiment of the present invention.

図１（ａ）に示すように、本発明の機能性基体は、第一の基体である石英またはガラス基板１の上に酸化ゲルマニウム膜２が形成されるとともに、更にカバー膜３が形成され、このカバー膜３の上に膜構造としての薄膜デバイス４が形成され、その薄膜デバイス４の上面にエポキシあるいはアクリル系接着樹脂５で第二の基体である転写先基板６を貼り付けた構造となっている。   As shown in FIG. 1 (a), in the functional substrate of the present invention, a germanium oxide film 2 is formed on a quartz or glass substrate 1 as a first substrate, and a cover film 3 is further formed. A thin film device 4 as a film structure is formed on the cover film 3, and a transfer destination substrate 6 as a second substrate is bonded to the upper surface of the thin film device 4 with an epoxy or acrylic adhesive resin 5. ing.

続いて図１（ｂ）に示すように、浴槽８に純水または酸溶液７を溜め、その中に図１（ａ）の機能性基体を入れる。このようにすれば、酸化ゲルマニウムが端部から純水または酸溶液によってエッチングが開始され、酸化ゲルマニウムの一部又は全部が溶解する。また、カバー膜３とエポキシ接着層５が薄膜デバイス４と強く接着されていることにより、薄膜デバイス４は酸溶液７のダメージに曝されることが無い。これにより、第一の基体である絶縁性基板１から薄膜デバイス４を容易に且つ歩留まり良く剥離できる。   Subsequently, as shown in FIG. 1 (b), pure water or an acid solution 7 is stored in the bathtub 8, and the functional substrate shown in FIG. 1 (a) is put therein. In this way, the etching of germanium oxide is started from the end by pure water or an acid solution, and a part or all of germanium oxide is dissolved. Further, since the cover film 3 and the epoxy adhesive layer 5 are strongly bonded to the thin film device 4, the thin film device 4 is not exposed to the damage of the acid solution 7. Thereby, the thin film device 4 can be easily peeled from the insulating substrate 1 as the first substrate with a good yield.

「実施例１」
図１（ａ）に示すように、６インチφの石英基板１の上に酸化ゲルマニウム膜２を厚さ１μｍ成膜し、更にカバー膜として酸化シリコン膜３を厚さ０．２μｍ成膜し、その上にポリシリコン膜からなる薄膜トランジスタアレイ４を形成し、その上部に加熱硬化型エポキシ接着剤５を薄く塗布してポリエチレンフィルム６を貼り付けた。 "Example 1"
As shown in FIG. 1A, a germanium oxide film 2 is formed to a thickness of 1 μm on a 6-inch φ quartz substrate 1, and a silicon oxide film 3 is further formed to a thickness of 0.2 μm as a cover film. A thin film transistor array 4 made of a polysilicon film was formed thereon, and a thermosetting epoxy adhesive 5 was thinly applied thereon and a polyethylene film 6 was attached.

ここで酸化ゲルマニウム２は、ゲルマニウムをターゲットとして、アルゴンと酸素の混合ガスを用いたスパッタリング法で成膜した。アルゴン流量４０ｓｃｃｍ、酸素流量２０ｓｃｃｍの条件にて成膜した。   Here, the germanium oxide 2 was formed by sputtering using a mixed gas of argon and oxygen with germanium as a target. The film was formed under the conditions of an argon flow rate of 40 sccm and an oxygen flow rate of 20 sccm.

また、薄膜トランジスタアレイ４は、熱ＣＶＤ法で成膜したアモルファスシリコンをエキシマレーザー照射で多結晶化したポリシリコン膜をベースとして作成した。続いて図１（ｂ）に示すように、浴槽８に純水７を溜め、この浴槽全体を温度８０℃を保つよう加熱した。実際の加熱には浴槽として耐熱ガラスでできたビーカーに純水を入れ、その中に図１（ａ）に示す機能性基体を浸漬させ、ビーカー全体を湯煎にかけて加熱した。この状態でおよそ４時間浸漬したところ、酸化ゲルマニウムはほぼ溶解して、石英基板からＰＥＴフィルム付き薄膜トランジスタアレイ４を剥離することができた。   The thin film transistor array 4 was formed based on a polysilicon film obtained by polycrystallizing amorphous silicon formed by thermal CVD using excimer laser irradiation. Subsequently, as shown in FIG. 1 (b), pure water 7 was stored in the bathtub 8, and the entire bathtub was heated to maintain a temperature of 80 ° C. For actual heating, pure water was put into a beaker made of heat-resistant glass as a bathtub, the functional substrate shown in FIG. When immersed in this state for about 4 hours, germanium oxide was almost dissolved, and the thin film transistor array 4 with a PET film could be peeled from the quartz substrate.

このようにして得られた、薄膜トランジスタアレイ４をＰＥＴフィルム基板上６へ転写した後のトランジスタ特性の電気的特性を、これらの処理をしないガラス基板上の初期のトランジスタ特性とを比較したところ、ほとんど差が無く、良好な特性を有する薄膜デバイスを得ることができた。   When the electrical characteristics of the transistor characteristics after the thin film transistor array 4 thus obtained was transferred onto the PET film substrate 6 were compared with the initial transistor characteristics on the glass substrate without these treatments, it was almost There was no difference and a thin film device having good characteristics could be obtained.

「実施例２」
実施例１と同様に、６インチφの石英基板１の上に酸化ゲルマニウム膜２を厚さ１μｍ成膜し、更にカバー膜として酸化シリコン膜３を厚さ０．２μｍ成膜し、その上にポリシリコン膜からなる薄膜トランジスタアレイ４を形成した。 "Example 2"
As in Example 1, a germanium oxide film 2 is formed to a thickness of 1 μm on a 6-inch φ quartz substrate 1, and a silicon oxide film 3 is formed to a thickness of 0.2 μm as a cover film. A thin film transistor array 4 made of a polysilicon film was formed.

図２（ａ）を参照して説明する。実施例１と異なる点は、薄膜トランジスタアレイ４の上部に熱硬化型エポキシ接着剤５をローラーで極薄に塗布して加熱硬化した後、さらにその上部に弾性接着剤５１を薄く塗り転写先基板となるＰＥＴフィルム６を貼り付けた点である。剥離層に用いた酸化ゲルマニウムおよび薄膜トランジスタについては実施例１で示したものとまったく同じ製法かつ同じ条件で作製した。   This will be described with reference to FIG. The difference from the first embodiment is that after the thermosetting epoxy adhesive 5 is applied to the upper portion of the thin film transistor array 4 with a roller and is heat-cured, an elastic adhesive 51 is thinly applied on the upper portion of the thin film transistor array 4 and the transfer destination substrate. It is the point which affixed PET film 6 which becomes. The germanium oxide and thin film transistor used for the release layer were manufactured under exactly the same manufacturing method and the same conditions as those shown in Example 1.

このようにして得られた機能性基体を、８０℃の純水中に浸漬させたところ、４時間後に酸化ゲルマニウムはほぼ溶解して、石英基板からＰＥＴフィルム付き薄膜トランジスタアレイ４を剥離することができた。   When the functional substrate thus obtained was immersed in pure water at 80 ° C., germanium oxide was almost dissolved after 4 hours, and the thin film transistor array 4 with PET film could be peeled from the quartz substrate. It was.

このようにして得られた薄膜トランジスタアレイ４をＰＥＴフィルム基板上６へ転写した後のトランジスタ特性の電気的特性を、これらの処理をしないガラス基板上の初期のトランジスタ特性とを比較したところ、ほとんど差が無く、良好な特性を有する薄膜デバイスを得ることができた。   When the electrical characteristics of the transistor characteristics after the thin film transistor array 4 thus obtained was transferred onto the PET film substrate 6 were compared with the initial transistor characteristics on the glass substrate without these treatments, there was little difference. Thus, a thin film device having good characteristics could be obtained.

「実施例３」
本発明の実施の形態に関して、さらに図面を参照しながら説明する。図２は、本発明の第三の実施の形態にかかる機能性基体および電子デバイスの製造方法を示す図である。 "Example 3"
The embodiment of the present invention will be further described with reference to the drawings. FIG. 2 is a diagram showing a method of manufacturing a functional substrate and an electronic device according to the third embodiment of the present invention.

図２（ａ）に示すように、石英またはガラス基板１の上に酸化ゲルマニウム膜２一層のみ、あるいはゲルマニウム膜２１と酸化ゲルマニウム膜２の二層からなる剥離層を形成し、更にカバー膜３を成膜し、その上に薄膜デバイス４を作製する。その後、薄膜デバイス４の上面にエポキシ接着剤５を、薄く塗布し硬化させる。さらにその上部にシリコーンなどの弾性接着剤５１を用いて第二の基体である転写先基板６に接着する。   As shown in FIG. 2 (a), only one germanium oxide film 2 or a peeling layer composed of two layers of a germanium film 21 and a germanium oxide film 2 is formed on a quartz or glass substrate 1, and a cover film 3 is further formed. A thin film device 4 is formed thereon. Thereafter, the epoxy adhesive 5 is thinly applied to the upper surface of the thin film device 4 and cured. Further, an elastic adhesive 51 such as silicone is used to adhere to the transfer destination substrate 6 as the second substrate.

続いて図２（ｂ）に示すように、エッチング浴槽８に純水または酸溶液７を溜め、その中に図２（ａ）に示す機能性基体を入れる。純水または酸溶液を４０℃以上に保ち１〜２時間浸漬すると、図２（ｂ）に示すように酸化ゲルマニウム膜２の外周部が数ミリ長にわたって溶出し、その部分の剥離が起こる。次に図２（ｃ）に示すように、浴槽から機能性基体を取り出すと、８０℃ から室温に温度が変化するので、エポキシ硬化層５と石英基板１の線膨張率の違いから石英基板１とエポキシ接着層５に挟まれた薄膜構造部に引っ張り応力が作用する。酸化ゲルマニウム膜２の溶出が進行しつつある箇所に、この力が作用すると溶出と剥離が急速に進行する。このとき、エポキシ接着層５は比較的硬く、薄膜デバイス４と強く接着されていることにより、剥離プロセス中に薄膜デバイス４がダメージを受けることなく高速で剥離できる。   Subsequently, as shown in FIG. 2 (b), pure water or an acid solution 7 is stored in the etching bath 8, and the functional substrate shown in FIG. 2 (a) is put therein. When pure water or an acid solution is kept at 40 ° C. or higher and immersed for 1 to 2 hours, the outer peripheral portion of the germanium oxide film 2 is eluted over several millimeters as shown in FIG. Next, as shown in FIG. 2 (c), when the functional substrate is taken out from the bathtub, the temperature changes from 80 ° C. to room temperature, so that the quartz substrate 1 is different from the difference in linear expansion coefficient between the epoxy cured layer 5 and the quartz substrate 1. A tensile stress acts on the thin film structure sandwiched between the epoxy adhesive layers 5. When this force is applied to the location where the elution of the germanium oxide film 2 is proceeding, the elution and peeling proceed rapidly. At this time, since the epoxy adhesive layer 5 is relatively hard and is strongly bonded to the thin film device 4, the thin film device 4 can be peeled at a high speed without being damaged during the peeling process.

「実施例４」
図２（ａ）に示すように、６インチφの石英基板１の上にゲルマニウム膜２１を厚さ２００ｎｍ、酸化ゲルマニウム膜２を厚さ１μｍ成膜し、更にカバー膜として酸化シリコン膜３を厚さ０．２μｍ成膜し、その上にポリシリコン膜からなる薄膜トランジスタアレイ４を形成した。その上部に加熱硬化型エポキシ接着剤５を薄く塗布してホットプレート上で１２０℃、０．５ｈで硬化させた。最後にシリコーン接着剤５１を用いて厚さ５００μｍのポリエチレンフィルム６を接着した。 Example 4
As shown in FIG. 2A, a germanium film 21 is formed on a 6-inch φ quartz substrate 1 with a thickness of 200 nm, a germanium oxide film 2 is formed with a thickness of 1 μm, and a silicon oxide film 3 is further formed as a cover film. A thin film transistor array 4 made of a polysilicon film was formed thereon. A thermosetting epoxy adhesive 5 was thinly applied to the upper portion and cured on a hot plate at 120 ° C. for 0.5 h. Finally, a polyethylene film 6 having a thickness of 500 μm was adhered using a silicone adhesive 51.

ゲルマニウム膜２１および酸化ゲルマニウム膜２は、ゲルマニウムをターゲットとしてスパッタリング法により成膜した。ゲルマニウム膜２１に対してはアルゴンガス（流量：４０ｓｃｃｍ）を、酸化ゲルマニウム膜２に対してはアルゴンと酸素の混合ガス（アルゴン流量：４０ｓｃｃｍ、酸素流量：２０ｓｃｃｍ）をスパッタガスとして用いた。また、薄膜トランジスタアレイ４は、熱ＣＶＤ法で成膜したアモルファスシリコンをエキシマレーザー照射で多結晶化したポリシリコン膜をベースとして作成した。   The germanium film 21 and the germanium oxide film 2 were formed by sputtering using germanium as a target. Argon gas (flow rate: 40 sccm) was used as the sputtering gas for the germanium film 21 and a mixed gas of argon and oxygen (argon flow rate: 40 sccm, oxygen flow rate: 20 sccm) was used as the sputtering gas for the germanium oxide film 2. The thin film transistor array 4 was formed based on a polysilicon film obtained by polycrystallizing amorphous silicon formed by thermal CVD using excimer laser irradiation.

続いて図２（ｂ）に示すように、温度の制御が可能なマグネット攪拌器の浴槽８に純水を溜め、温度８０℃を保つように置いた。その中に図２（ａ）の機能性基体を浸漬させた。５００ｒｐｍの回転で攪拌しながら１時間３０分浸漬したところ、基板外周部付近の酸化ゲルマニウムが溶解した。上記機能性基体を８０℃の純水中から取り出し２５℃の純水に浸漬したところ、酸化ゲルマニウム層２の溶出に加えて、下層のゲルマニウム膜２１もところどころ石英基板から剥がれ、きわめて短時間でダメージなくＰＥＴフィルム付き薄膜トランジスタアレイを剥離できた。   Subsequently, as shown in FIG. 2 (b), pure water was stored in the bathtub 8 of a magnetic stirrer capable of controlling the temperature, and was placed so as to keep the temperature at 80 ° C. The functional substrate shown in FIG. 2 (a) was immersed therein. When immersed for 1 hour and 30 minutes while stirring at a rotation of 500 rpm, germanium oxide in the vicinity of the outer periphery of the substrate was dissolved. When the functional substrate was taken out from pure water at 80 ° C. and immersed in pure water at 25 ° C., in addition to elution of the germanium oxide layer 2, the lower germanium film 21 was peeled off from the quartz substrate in some places and damaged in a very short time. The thin film transistor array with PET film could be peeled off.

石英基板上１の初期のトランジスタ特性と、石英基板から剥離したＰＥＴフィルム基板上へ転写した後のトランジスタ特性を比較したところ、ほとんど差が無く、良好な特性を有する薄膜デバイスを提供できた。   When the initial transistor characteristics on the quartz substrate 1 were compared with the transistor characteristics after being transferred onto the PET film substrate peeled from the quartz substrate, there was almost no difference, and a thin film device having good characteristics could be provided.

「実施例５」
実施例４とまったく同じ構造の６インチφの石英基板１をベースとした機能性基体を用意した。８０℃の純水中に機能性基体を２時間浸漬させて酸化ゲルマニウム膜２の外周部を数ミリ溶出した後、室温雰囲気中に当該積層物を取り出し放置しておいた。取り出し後、剥離が自発的に進み、２〜３分後にＰＥＴフィルム付き薄膜トランジスタアレイが完全に剥離した。 "Example 5"
A functional substrate based on a 6-inch φ quartz substrate 1 having exactly the same structure as in Example 4 was prepared. The functional substrate was immersed in pure water at 80 ° C. for 2 hours to elute the outer periphery of the germanium oxide film 2 by several millimeters, and then the laminate was taken out in a room temperature atmosphere and left to stand. After removal, the peeling progressed spontaneously, and after 2 to 3 minutes, the thin film transistor array with PET film was completely peeled off.

石英基板上の初期のトランジスタ特性と、石英基板から剥離したＰＥＴフィルム基板上へ転写した後のトランジスタ特性を比較したところ、ほとんど差が無く、良好な特性を有する薄膜デバイスを提供できた。   When the initial transistor characteristics on the quartz substrate were compared with the transistor characteristics after being transferred onto the PET film substrate peeled from the quartz substrate, there was almost no difference, and a thin film device having good characteristics could be provided.

「実施例６」
実施例３とまったく同じ構造の６インチφの石英基板１をベースとした機能性基体を８０℃の純水中に３０分浸漬させて酸化ゲルマニウム膜２の外周部が１ｍｍ前後溶出したのを確認後、２５℃の純水中に浸漬させて酸化ゲルマニウム膜２が大部分溶出したのを確認した。 "Example 6"
A functional substrate based on a 6-inch φ quartz substrate 1 having exactly the same structure as in Example 3 was immersed in pure water at 80 ° C. for 30 minutes to confirm that the outer periphery of the germanium oxide film 2 had eluted about 1 mm. Thereafter, it was immersed in pure water at 25 ° C., and it was confirmed that the germanium oxide film 2 was mostly eluted.

その後、再度８０℃の純水中に当該機能性基体をさらに３０分放置し、その後２５℃純水に浸漬したところＰＥＴフィルム付き薄膜トランジスタアレイが完全に剥離した。   Thereafter, the functional substrate was again left in pure water at 80 ° C. for another 30 minutes and then immersed in pure water at 25 ° C., whereby the thin film transistor array with PET film was completely peeled off.

石英基板上の初期のトランジスタ特性と、石英基板から剥離したＰＥＴフィルム基板上へ転写した後のトランジスタ特性とを比較したところ、ほとんど差が無く、良好な特性を有する薄膜デバイスを得ることができた。   When the initial transistor characteristics on the quartz substrate were compared with the transistor characteristics after being transferred onto the PET film substrate peeled off from the quartz substrate, there was almost no difference and a thin film device having good characteristics could be obtained. .

このように、本発明の機能性基体の構成とすることにより、優れた特性を持つ半導体素子、及びその回路が、種々の材料からなる基体上へ特性の劣化なしに転写することが可能となる。また、本発明の剥離方法を用いることにより、従来よりも半分以下の時間で、ダメージを与えることなく薄膜電子回路素子を石英基盤（基体１）から剥離することができる。   As described above, the configuration of the functional substrate of the present invention makes it possible to transfer a semiconductor element having excellent characteristics and its circuit onto a substrate made of various materials without deterioration of the characteristics. . In addition, by using the peeling method of the present invention, the thin film electronic circuit element can be peeled from the quartz substrate (base 1) in less than half the time of the conventional method without causing damage.

１ 第一の基体
２ 剥離層
３ カバー膜
４ 被転写層
５ 接着層
６ 第二の基体
７ 純水または酸溶液
８ エッチング浴槽（ビ−カー）
２１ ゲルマニウム層
５１ 第二の接着層 DESCRIPTION OF SYMBOLS 1 1st base | substrate 2 peeling layer 3 cover film 4 transferred layer 5 contact bonding layer 6 2nd base | substrate 7 pure water or acid solution 8 Etching bath (beaker)
21 Germanium layer 51 Second adhesive layer

Claims (4)

第一の基体上に酸化ゲルマニウム膜の剥離層、及び前記剥離層上に薄膜電子回路あるいは電子回路素子あるいはそれらの作製に必要な単層または複数の層からなる膜構造の少なくとも一つを有し、
前記膜構造上に、ガラス転移温度が１００℃以上２００℃以下、吸水率が０．１％以下、引っ張りせん断強さが１０Ｎ／ｍｍ２以上、Ｔ型剥離接着強さが１Ｎ／ｍｍ２以上、線膨張係数が１．０×１０−４以下である、エポキシ系あるいはアクリル系接着剤を用いて第二の基体を接着した構造を有することを特徴とする機能性基体。 A peeling layer of a germanium oxide film on the first substrate, and at least one of a thin film electronic circuit or an electronic circuit element or a film structure composed of a single layer or a plurality of layers necessary for the production thereof on the peeling layer; ,
On the film structure, the glass transition temperature is 100 ° C. or more and 200 ° C. or less, the water absorption is 0.1% or less, the tensile shear strength is 10 N / mm 2 or more, the T-type peel adhesion strength is 1 N / mm 2 or more, A functional substrate having a structure in which a second substrate is bonded using an epoxy or acrylic adhesive having a linear expansion coefficient of 1.0 × 10 −4 or less. 前記エポキシ系あるいはアクリル系接着剤からなる層と前記第二の基体との間に、シリコーン樹脂、アクリル変成シリコーン樹脂あるいはエポキシ変成シリコーン樹脂の弾性層を挿入した構造を有する、請求項１に記載の機能性基体。   2. The structure according to claim 1, wherein an elastic layer of a silicone resin, an acrylic modified silicone resin, or an epoxy modified silicone resin is inserted between the epoxy or acrylic adhesive layer and the second substrate. Functional substrate. 前記剥離層がゲルマニウム膜と酸化ゲルマニウム膜との二層からなる、請求項１または請求項２に記載の機能性基体。   The functional substrate according to claim 1, wherein the release layer includes two layers of a germanium film and a germanium oxide film. 第一の基体上に、酸化ゲルマニウム膜一層またはゲルマニウム膜と酸化ゲルマニウム膜との二層からなる剥離層を形成する工程と、
前記剥離層の上に薄膜電子回路あるいは電子回路素子あるいはそれらの作製に必要な単層または複数の層からなる膜構造の少なくとも一つを形成する工程と、
前記膜構造上に、ガラス転移温度が１００℃以上２００℃以下、吸水率が０．１％以下、引っ張りせん断強さが１０Ｎ／ｍｍ２以上、Ｔ型剥離接着強さが１Ｎ／ｍｍ２以上、線膨張係数が１．０×１０−４以下である、エポキシ系あるいはアクリル系接着剤を用いて第二の基体を接着する工程と、
を含む、機能性基体の製造方法。 On the first substrate, a step of forming a peeling layer composed of one layer of a germanium oxide film or two layers of a germanium film and a germanium oxide film;
Forming at least one of a thin film electronic circuit or an electronic circuit element or a film structure composed of a single layer or a plurality of layers necessary for the production thereof on the release layer;
On the film structure, the glass transition temperature is 100 ° C. or more and 200 ° C. or less, the water absorption is 0.1% or less, the tensile shear strength is 10 N / mm 2 or more, the T-type peel adhesion strength is 1 N / mm 2 or more, Bonding the second substrate with an epoxy or acrylic adhesive having a linear expansion coefficient of 1.0 × 10 −4 or less;
A method for producing a functional substrate, comprising:
JP2012171676A 2005-11-04 2012-08-02 Functional substrate and method for producing the same Expired - Fee Related JP5578479B2 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08213871A (en) * 1995-02-03 1996-08-20 Sumitomo Electric Ind Ltd Crystal vibrator and its manufacture
JP2002371132A (en) * 2001-06-15 2002-12-26 Nippon Steel Chem Co Ltd Epoxy group-containing polyimide copolymer and cured product thereof
JP2003318195A (en) * 2002-04-24 2003-11-07 Ricoh Co Ltd Thin-film device and its manufacturing method
JP2004327836A (en) * 2003-04-25 2004-11-18 Seiko Epson Corp Method for printing body to be printed, process for producing body to be printed, process for producing circuit substrate, electro-optical device, and electronic equipment

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08213871A (en) * 1995-02-03 1996-08-20 Sumitomo Electric Ind Ltd Crystal vibrator and its manufacture
JP2002371132A (en) * 2001-06-15 2002-12-26 Nippon Steel Chem Co Ltd Epoxy group-containing polyimide copolymer and cured product thereof
JP2003318195A (en) * 2002-04-24 2003-11-07 Ricoh Co Ltd Thin-film device and its manufacturing method
JP2004327836A (en) * 2003-04-25 2004-11-18 Seiko Epson Corp Method for printing body to be printed, process for producing body to be printed, process for producing circuit substrate, electro-optical device, and electronic equipment

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
JPN6013056254; 吉岡一也、鈴木正人、鮫島俊之、竹知和重: '酸化ゲルマニウム膜を用いた薄膜電子回路転写技術１-３' 第５２回応用物理学関係連合講演会講演予稿集 ２, 20050329, ９５５, 応用物理学会 *
JPN6013056255; 吉岡一也、山本倫久、鮫島俊之、竹知和重: '酸化ゲルマニウム膜を用いた薄膜電子回路転写技術　４' 第５３回応用物理学関係連合講演会講演予稿集 ２, 20060322, ８９６, 応用物理学会 *

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