JP2012195383A - Method of forming barrier film and ic chip package - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of forming a barrier film, along with an IC chip package, excellent in forming characteristic in a hole, barrier characteristic, and insulation characteristic at a low temperature, by utilizing a vapor deposition polymerization method.SOLUTION: A plurality of Si wafers in which IC chips are formed are stacked and joined together. By a TSV technology, a hole for electrical connection of the IC chips together is opened on the joined Si wafers. And then, monomers of two or more kinds are vaporized in vacuum before forming a conductor film in the hole. A barrier film comprising polyimide is formed in the hole by a vapor deposition polymerization method. In other words, a plurality of Si wafers, in each of it an IC chip is formed, are stacked and joined together to provide an Si wafer laminate. Then, a hole is opened by the TSV technology. In the hole, a barrier film is formed which comprises a polyimide provided by vapor deposition polymerization using monomers of two or more kinds, and a conductor film is formed on the barrier film.

Description

  The present invention relates to a method for forming a barrier film and an IC chip package, and more particularly to a method for forming a barrier film using a vapor deposition polymerization method and an IC chip package having the barrier film.

  Conventionally, in the field of semiconductor devices (IC chips), after a device is fabricated on a Si wafer, a wire bonding technique has been used to electrically connect the devices to each other. However, as the device is miniaturized, the pitch of the wires to be connected is narrowed, resulting in a problem that the connection process becomes difficult, and signal delay due to the wires has become a serious problem. At the same time, miniaturization of devices is approaching its limit, reaching the limit of large capacity and high speed operation.

  As one of the solutions, a technique is being developed in which devices are stacked and bonded, a hole is dug, and a connection is made with a wiring film made of Cu and Al embedded in the hole. For example, in the field of flash memory, large-capacity flash memories in which a large number of memories are stacked are partly commercialized. These technologies are collectively called TSV or three-dimensional packaging. In the memory system as described above, a combination of a plurality of the same devices to gain capacity, a combination of different types of devices such as memory and logic to shorten the wiring and aim at high speed operation, etc. Is freely selected according to the purpose.

  The TSV technology is broadly divided into a via first process in which holes are formed before bonding IC chips (or Si wafers) to fill a Cu film or the like as a wiring film, and a hole is formed after bonding to form a Cu film or the like. It is divided into the vialast process.

  In the via last process, since the hole including the adhesive is made and Cu is embedded, the maximum temperature of the process is determined by the heat resistance of the adhesive. Although it depends on the type of adhesive, generally 200 ° C. or lower is desirable.

  On the other hand, the shape of this hole is about φ2 to 20 μm and the depth is about 50 to 200 μm. Accordingly, the aspect ratio (A / R) reaches about 10 to 100. In order to form a uniform film in such A / R holes, it is impossible to use the sputtering method conventionally used, and it is necessary to use the CVD method.

Further, the barrier films that have been used in the semiconductor device manufacturing process so far are mainly Ti, TiN, Ta, and TaN films formed by the CVD method (see, for example, Patent Document 1), and the film forming temperature is high. It is as high as 300 ° C. or higher, and cannot be used in a process using TSV technology intended for implementation at a low temperature. That is, it is required to develop a new barrier film for a process using the TSV technology. Further, conventionally, since the wiring film is formed on the SiO ₂ film, the barrier film may be a conductor. However, in the process using the TSV technology, since the base is Si and a conductor (semiconductor), the barrier film also requires insulation. Therefore, new development is also necessary in terms of materials.

  On the barrier film, a Cu film is usually formed as a wiring film by a CVD method by a known method (for example, see Patent Document 2).

  As described above, in the prior art, a metal or metal nitride film is usually formed by a sputtering method or a CVD method as a barrier film of a wiring film such as Cu or Al. In particular, when A / R is high (for example, 5 or more), it is necessary to use the CVD method. Therefore, since an organic metal material or a metal chloride or fluoride is used as a barrier film material, the film forming temperature is generally 300 ° C. or higher. In the case of an organometallic material, thermal energy at a high temperature is required to decompose and remove organic matter. In the case of a metal chloride or fluoride, the reaction temperature is generally low, but a high temperature is required to remove chlorine and fluorine from the film. In the prior art, in order to prevent oxidation of the barrier film surface made of metal or the like, it is necessary to continuously form films of Al, Cu, etc. in vacuum after the barrier film is formed.

International Publication No. 2010/007991 Pamphlet JP 2009-081431 A

  An object of the present invention is to solve the above-mentioned problems of the prior art, in which two types of monomers are vapor-deposited simultaneously or separately in a vacuum, reacted on a substrate, and then heated as necessary. And a method of forming a barrier film having excellent insulation characteristics, barrier characteristics, and uniform film formation characteristics in holes by using a so-called vapor deposition polymerization method for obtaining a desired film by a polymerization reaction, and the barrier film. Another object is to provide an IC chip package.

  The invention of the first forming method according to the barrier film forming method of the present invention is to stack and bond a plurality of Si wafers on which IC chips are formed, and to connect the IC chips to the bonded Si wafers by TSV technology. A method for forming a barrier film in a hole after electrically forming a hole for electrically connecting a plurality of IC chips and before forming a conductor film in the hole, More than one kind of monomer is evaporated in a vacuum, and a barrier film made of polyimide is formed in the hole by vapor deposition polymerization.

  The invention of the first forming method is characterized in that the monomer is evaporated by simultaneous or separate evaporation.

  In the invention of the first formation method, the monomer is composed of an aromatic diamine and tetracarboxylic dianhydride.

  The invention of the second forming method according to the barrier film forming method of the present invention is to stack and bond a plurality of Si wafers on which IC chips are formed, and to connect the IC chips to the bonded Si wafers by TSV technology. A method for forming a barrier film in a hole after electrically forming a hole for electrically connecting a plurality of IC chips and before forming a conductor film in the hole, More than one kind of monomer is evaporated in a vacuum, and a barrier film made of a polymer is formed in the hole by vapor deposition polymerization.

  The invention of the second formation method is characterized in that the monomer is evaporated by simultaneous or separate evaporation.

  In the invention of the second formation method, the polymer is polyimide.

  In the invention of the second formation method, the monomer is composed of an aromatic diamine and tetracarboxylic dianhydride.

  The invention of the first IC chip package according to the IC chip package of the present invention is an IC having a Si wafer laminate in which the respective Si wafers of a plurality of Si wafers each formed with an IC chip are stacked and bonded. A chip package, wherein the Si wafer laminate is provided with a hole formed by TSV technology after bonding, and a barrier made of polyimide formed by vapor deposition polymerization using two or more types of monomers in the hole. A film is formed, and a conductor film is formed on the barrier film.

  In the first IC chip package invention, the monomer is composed of an aromatic diamine and tetracarboxylic dianhydride.

  The invention of the second IC chip package according to the IC chip package of the present invention is an IC having a Si wafer laminate in which the respective Si wafers of a plurality of Si wafers each formed with an IC chip are stacked and bonded. A chip package, wherein the Si wafer laminate is provided with a hole formed by TSV technology after bonding, and a barrier film made of a polymer obtained by vapor deposition polymerization is formed in the hole; and A conductive film is formed on the barrier film.

  In the invention of the second IC chip package, the polymer is polyimide.

  In the invention of the second IC chip package, the polymer is a vapor deposition polymer of an aromatic diamine and tetracarboxylic dianhydride.

  According to the present invention, it is possible to form a film at a temperature of 250 ° C. or less by a vapor deposition polymerization method in a hole opened by applying the TSV technology, and even if the A / R is 10 or more, sufficient coverage is obtained, which is sufficient as a barrier film. There is an effect that a usable barrier film can be formed.

  Further, according to the present invention, the IC chip package provided with the barrier film has the effects that there is no fear of signal delay and that large capacity and high speed operation are possible.

BRIEF DESCRIPTION OF THE DRAWINGS Schematic which shows typically the example of 1 structure of the film-forming apparatus for enforcing the barrier film formation method concerning this invention. Sectional drawing which shows one typical structural example of an IC chip package. The typical sectional view of the Si wafer for explaining the place which measures the film thickness of the polyimide obtained in Example 1. 3 is a graph showing the relationship between the film thickness (nm) of the polyimide film obtained in Example 1 and the current density (leakage current density (A / cm ² )) when a voltage is applied. It is a graph which shows the relationship with the production rate of the polyamic acid (polyamic acid) of a vapor deposition film evaluated based on the time-dependent change of the infrared absorption (IR) spectrum measured with respect to the vapor deposition polymerization film in Example 2, and a horizontal axis Indicates elapsed time (hr), and the vertical axis indicates amidation rate (%) and imidation rate (%).

  Hereinafter, an embodiment of a method for forming a barrier film and an embodiment of an IC chip package according to the present invention will be described, and thereafter each component will be described in detail.

  According to the embodiment of the barrier film forming method according to the present invention, this forming method is such that an IC chip is formed on a plurality of Si wafers on which IC chips (IC devices) are formed on the surface of the Si wafer. Stacked so that the back side of the non-Si wafer and the front side of another Si wafer on which the IC chip is formed are in contact with each other, for example, bonded using an adhesive selected from siloxane resin, epoxy resin, etc. Cu, Al, W, Ni, etc. which connect a plurality of IC chips after opening a hole for electrically connecting IC chips to this bonded Si wafer laminate by a mounting process (TSV technology / process) Before the conductor film made of is formed in or around the hole, a barrier film is formed in or around the hole, and two or more types of monomers, preferably aromatic diamine, are preferably used. Tetracarboxylic dianhydride is evaporated in a vacuum, for example, each monomer is evaporated at the same time or separately for different periods of time, and vapor deposition polymerization is performed in and around the hole, preferably a barrier film made of a polymer such as polyimide. Forming. In this specification, “inside the hole” includes the inside of the hole and the periphery thereof. In this case, the film formed around the hole is removed by etching according to the target device.

  Further, according to the embodiment of the IC chip package according to the present invention, the IC chip package includes a plurality of Si wafers each formed with an IC chip and each Si wafer having no IC chip formed thereon. The Si wafer laminate is stacked so that the back surface side of the substrate and the surface side of another Si wafer on which the IC chip is formed are in contact with each other, and bonded with an adhesive selected from, for example, a siloxane resin or an epoxy resin. This Si wafer laminate is provided with holes opened by TSV technology after bonding, and two or more types of monomers, preferably aromatic diamine and tetracarboxylic dianhydride, are formed in and around the holes. A barrier film made of a polymer such as polyimide is formed by vapor deposition polymerization using Cu, and Cu or A is formed on the barrier film. Conductive film made of, W or Ni, etc. consists of are formed.

  In the prior art, as described above, a metal or metal nitride is formed by a sputtering method or a CVD method as a barrier film of a wiring film. In particular, when A / R is high (for example, 5 or more), it is necessary to use the CVD method. Accordingly, the film formation temperature requires heat energy at a high temperature of 300 ° C. or higher, and high temperature is necessary for removing chlorine and fluorine derived from the raw material to be used from the film. Furthermore, in the prior art, in order to prevent oxidation of the barrier film surface containing metal, it is necessary to continuously form a wiring film in vacuum after the barrier film is formed.

  However, according to the present invention described above, since the barrier film is a polymer film made of an organic substance, the film forming temperature is low, and after the polymer film is formed, the obtained Si wafer is once taken out into the atmosphere. It is also possible to proceed with the next step.

  In the case of the present invention, if annealing is required, Al, Cu, etc. can be formed after annealing.

  Furthermore, in order to improve adhesion to barrier films such as Al and Cu films, the silane coupling agent described below is applied before or during polyimide film formation, and before film formation of Al or Cu (after annealing). In addition, a desired amount, for example, about 0.01 to 0.1 mol with respect to 1 mol of polyimide in the case of film formation, or a minute amount of about 10 molecular layers can be added before film formation. It is.

  Examples of the polymer constituting the barrier film that can be formed according to the present invention include polyimide, polyamide, polyazomethine, polyurea, or any mixture thereof, and preferably polyimide.

  Examples of the aromatic diamine which is one monomer capable of forming the polyimide include, for example, 4,4′diphenyl ether, 1,4-diaminobenzene, 1,3-diaminobenzene, 2,4-diaminotoluene, 4'-diaminodiphenylmethane, 3,4'-diaminodiphenyl ether, 3,3'-dimethyl-4,4'-diaminobiphenyl, 2,2'-dimethyl-4,4'-diaminobiphenyl, 2,2'-bis (Trifluoromethyl) -4,4′-diaminobiphenyl, 3,7-diamino-dimethyldibenzothiophene-5,5-dioxide, 4,4′-diaminobenzophene, 3 ′, 3′-diaminobenzophene, 4 , 4′-bis (4-aminophenyl) sulfide, 4,4′-diaminodiphenylsulfone, 4,4′-di Minobenzanilide, 1, n-bis (4-aminophenoxy) alkane, 1,3-bis (4-aminophenoxy) -2,2-dimethylpropane, 1,2-bis [2- (4-aminophenoxy) Ethoxy] ethane, 9,9-bis (4-aminophenyl) fluorene, 5 (6) -amino-1- (4-aminomethyl) -3,3,3-trimethylindane, 1,4-bis (4- Aminophenoxy) benzene, 1,3-bis (4-aminophenoxy) benzene, 1,3-bis (3-aminophenoxy) benzene, 4,4′-bis (4-aminophenoxy) biphenyl, 4,4′- Bis (3-aminophenoxy) biphenyl, 2,2-bis (4-aminophenoxyphenyl) propane, bis [4- (4-aminophenoxy) phenyl] sulfone, bis [ -(3-aminophenoxy) phenyl] sulfone, 2,2-bis [4- (4-aminophenoxy) phenyl] hexafluoropropane, 3,3'-dicarboxy-4,4'-diaminodiphenylmethane, 4,6- Dihydroxy-1,3-phenylenediamine, 3,3′-hydroxy-4,4′-diaminobiphenyl, 3,3 ′, 4,4′-tetraaminobiphenyl, 1-amino-3-aminomethyl-3,5 , 5-trimethylcyclohexane, 1,3-bis (3-aminopropyl) -1,1,3,3-tetramethyldisiloxane and the like can be used.

  Examples of the tetracarboxylic dianhydride that is the other monomer capable of forming polyimide include dianhydride pyromellitic acid, oxydiphthalic dianhydride, biphenyl-3,4,3 ′, 4′-tetra. Carboxylic dianhydride, benzophenone-3,4,3 ′, 4′-tetracarboxylic dianhydride, diphenylsulfone-3,4,3 ′, 4′tetracarboxylic dianhydride, 4,4 ′-( 2,2-hexafluoroisopropylidene) diphthalic dianhydride, m (p) -terphenyl-3,4,3 ′, 4′-tetracarboxylic dianhydride, cyclobutane 1,2,3,4-tetra At least one selected from carboxylic dianhydride and 1-carboxymethyl-2,3,5-cyclopentanetricarboxylic acid-2,6: 3,5-dianhydride can be used.

  In the case of the above-described vapor deposition polymerization in the present invention, a solution polymerization is carried out by a usual solution polymerization method (for example, using dimethylformamide or the like as a solvent) to obtain a polyamic acid (polyamic acid) solution, and then the solvent is removed and dehydration ring closure. In the same manner as in the method of obtaining a polyimide film, if it is appropriately selected from aromatic diamines and tetracarboxylic dianhydrides that can be usually used in the solution polymerization method exemplified above, a similarly vapor-polymerized polyimide is used. A membrane can be obtained.

  As the above-mentioned silane coupling agent, an organosilicon compound having a functional group that reacts with an organic material in a molecule and a functional group that reacts with an inorganic material at the same time and has a structure of the following formula is known. Yes.

Z—R—Si— (X) ₂
In the above formula, Z is a functional group that reacts with an organic material, such as a vinyl group, an epoxy group, an amino group, a methacryl group, or a mercapto group, and X is a functional group that reacts with an inorganic material or a halogen atom. For example, an alkoxy group selected from a methoxy group and an ethoxy group, an acetoxy group, a phenoxy group, or a chlorine atom.

  As described above, in order to improve the adhesion of the wiring film made of an Al film, a Cu film or the like to the barrier film, according to a known method, a silane coupling agent that may be added in a predetermined amount in a predetermined order is, for example, The following can be mentioned.

  For example, 3-aminopropyltrimethoxysilane, 3-aminopropyltriethoxysilane, 3- (2-aminoethyl) aminopropyltrimethoxysilane, 3- (2-aminoethyl) aminopropyltrimethoxysilane, 3-phenylamino Propyltrimethoxysilane, 1,2-ethanediamine, N- {3- (trimethoxysilyl) propyl}-, N-{(ethenylphenyl) methyl} derivative / hydrochloride 40% methanol solution, 3-glycidoxy Propyltrimethoxysilane, 3-glycidoxypropylmethyldimethoxysilane, 3-glycidoxypropylmethyldiethoxysilane, 2- (3,4-epoxycyclohexyl) ethyltrimethoxysilane, vinyltriacetoxysilane, vinyltrimethoxysilane , Vinyltriethoxysilane Allyltrimethoxysilane, 3-methacryloxypropyltrimethoxysilane, 3-methacryloxypropylmethyldimethoxysilane, 3-mercaptopropyltrimethoxysilane, 3-mercaptopropylmethyldimethoxysilane, 3-mercaptopropyltriethoxysilane, aminosilane ( In addition to methanol solution), aminosilane mixture, and aminosilane (IPA solution), as alkyl alkoxysilane, methyltrimethoxysilane, dimethyldimethoxysila, trimethylmethoxysilanemethoxy, methyltriethoxysilaneethoxy, methyltriphenoxysilane, ethyltrimethoxy Silane, n-propyltrimethoxysilane, diisopropyldimethoxysilane, isobutyltrimethoxysilane, diisobutyldimethoxy As run, isobutyltriethoxysilane, n-hexyltrimethoxysilane, n-hexyltriethoxysilane, cyclohexylmethyldimethoxysilane, n-octyltriethoxysilane, n-decyltrimethoxysilane, phenyltrimethoxysilane, alkylchlorosilane, Methyltrichlorosilane, dimethyldichlorosilane, trimethylchlorosilane, and n-octyldimethylchlorosilane, tetraethoxysilane and 1,1,1,3,3,3-hexamethyldisilazane, and oligomers such as methylmethoxysiloxane, methylmethoxysiloxane , Dimethyl-phenylmethoxysiloxane, diethyl-phenylmethoxysiloxane, and alkylalkoxysiloxane. That.

  The silane coupling agent is added in a desired amount by a known method (for example, Japanese Patent Application Laid-Open No. 2006-231134) before or during polyimide film formation, and before film formation of Al or Cu (after annealing). do it.

  Next, a film forming apparatus for carrying out the barrier film forming method according to the present invention will be described with reference to FIG. 1 showing a schematic configuration example.

  A film forming apparatus 1 shown in FIG. 1 includes a vacuum chamber 11 on which a substrate to be processed S can be placed. The vacuum chamber 11 includes an exhaust system 12 for reducing the pressure in the vacuum chamber. A tungsten boat 13a for the first raw material monomer (A) and a tungsten boat 13b for the second raw material monomer (B) are arranged in the vacuum chamber 11, and each of the tungsten boats 13a and 13b has a shutter 14a above it. And 14b are installed. The substrate S to be processed is placed on the tray 15, fixed, and installed above the vacuum chamber 11 so that the processing surface faces the first and second raw material monomers (A and B). . In addition, the tungsten boats 13a and 13b are provided with a heating means (not shown) for generating vapor of solid or liquid raw material monomer.

  In addition, when the first and second raw material monomers (A and B) are solid at room temperature, on the tungsten boats 13a and 13b, although not shown, a slit for adjusting the evaporation amount of the monomer in the same manner. It is preferable to mount each plate.

  When the barrier film is formed using the film forming apparatus 1 described above, for example, first, the surface side of the first Si wafer having the first semiconductor element region (IC chip) formed on the surface and the second surface on the surface. The back surface side of the second Si wafer on which the semiconductor element region (IC chip) is formed is bonded using an adhesive such as siloxane resin or epoxy resin. The Si wafer stack thus obtained is formed on the second semiconductor element region and the first Si wafer formed on the second Si wafer by TSV technology by dry etching under predetermined process conditions. A hole is formed to electrically connect the first semiconductor element region. The Si wafer laminate having the holes is used as the substrate S to be processed in the present invention.

  Etching by the TSV technique will be described with reference to FIG. 2 showing a schematic configuration example of an IC chip package made of a Si wafer laminate having a first Si wafer and a second Si wafer.

  The IC chip package 2 shown in FIG. 2 is obtained by laminating a front surface side of a first Si wafer 21 and a back surface side of a second Si wafer 22 via an adhesive layer 23 made of siloxane resin, epoxy resin, or the like. It is. A first semiconductor element region (IC chip) 21a is formed in a part of the surface layer of the first Si wafer 21 by a known method, and a part of the surface layer of the second Si wafer 22 is in the first layer. Two semiconductor element regions (IC chips) 22a are formed by a known method. An insulating layer 24 is provided between the first Si wafer 21 and the adhesive layer 23, and an insulating layer 25 is provided between the second Si wafer 22 and the adhesive layer 23. The second IC chip 22a formed on the second Si wafer 22 and the first Si wafer 21 formed on the second Si wafer 22 are subjected to the TSV technique under a predetermined dry etching condition. A hole is formed to electrically connect one IC chip 21a. A barrier made of a polymer such as polyimide by vapor deposition polymerization using two or more kinds of monomers, preferably aromatic diamine and tetracarboxylic dianhydride, as described above, in and around the hole thus obtained. A film 26 is formed. Thereafter, the bottom of the hole of the barrier film 26 is etched away, and then the conductor film 27 made of Cu, Al, W, Ni or the like is formed on the barrier film 26 and the exposed first semiconductor element region 21a. Form. Thus, the IC chip package 2 of the present invention is obtained.

  The dry etching is performed through, for example, a SiN hard mask (for example, 0.5 μm thick) provided on the second Si wafer 22. That is, the second IC chip 22a, the second Si wafer 22, the insulating layer 25, the adhesive layer 23, and the insulating layer 24 are sequentially etched, etched to the top of the first IC chip 21a, and the connection holes are formed. Open.

In the mask etching process, for example, the pressure in the vacuum chamber is set to 0.67 Pa, Ar / C ₄ F ₈ / O ₂ gas is allowed to flow at a flow rate of 180/20/10 sccm, and supplied from the high frequency power supply for the antenna This is performed by applying 1200 W as power and applying 400 W as power supplied from the bias high-frequency power source.

In the etching process of the second Si wafer 22 (for example, 10 μm thick), for example, the pressure in the vacuum chamber is set to 6.65 Pa, and SF ₆ / O ₂ / HBr gas is flowed at a flow rate of 150/55/0 sccm. And 1000 W is applied as power supplied from the antenna high-frequency power source, and 50 W is applied as power supplied from the bias high-frequency power source.

The etching process of the insulating layer made of SiO ₂ (for example, 0.5 μm thick) is performed, for example, by setting the pressure in the vacuum chamber to 2 Pa and Ar / C ₄ F ₈ / O ₂ gas at 180/20/10 sccm. Flowing at a flow rate, 1200 W is applied as power supplied from the antenna high-frequency power source, and 400 W is applied as power supplied from the bias high-frequency power source.

In the etching process of the adhesive layer 23, for example, the pressure in the vacuum chamber is set to 1.5 Pa, SF ₆ / O ₂ / N ₂ gas is allowed to flow at a flow rate of 30/200/85 sccm, and the high frequency power supply for the antenna is used. This is performed by applying 2000 W as the power supplied to the power source and applying 300 W as the power supplied from the high frequency power source for bias.

The insulating layer made of SiO ₂ may be formed, for example, using TEOS as a source gas and under known process conditions (see, for example, JP-A-2001-345315).

The substrate S to be processed thus obtained is placed on the tray 15 and fixed. Further, the first raw material monomer A (for example, tetracarboxylic dianhydride such as pyromellitic dianhydride) is respectively added to the evaporation tungsten boats 13a and 13b in the vacuum chamber 11 of the film forming apparatus 1 shown in FIG. The tray 15 filled with the second raw material monomer B (for example, aromatic diamine such as 4,4′-diphenyl ether) and on which the substrate S to be processed is placed and fixed is placed above the vacuum chamber 11. Next, after evacuating the inside of the vacuum chamber 11 to a predetermined pressure (for example, 1E-4 Pa), the tungsten boats 13a and 13b are heated to a predetermined temperature at which the vapors of the monomers A and B can be generated. Open the shutters 14a and 14b so that the vapors of the first raw material monomer and the second raw material monomer fly simultaneously in equimolar amounts, or alternately open the shutters 14a and 14b, and equimolar amounts of the respective vapors. The polyamic acid (polyamic acid) film having a predetermined film thickness is formed by vapor deposition polymerization on the substrate to be processed S so as to fly at different times. If both raw materials are solid at room temperature, the tungsten boats 13a and 13b are not shown on the tungsten boats 13a and 13b. It is preferable to do. Reaction occurs at the moment when the raw material monomers A and B are mixed in a molecular form on the substrate S to be processed to produce polyamic acid. Thereafter, annealing is performed at a predetermined temperature (for example, 250 ° C. or lower) for a predetermined time in an inert atmosphere such as an N ₂ atmosphere. As a result, the polyamic acid is imidized, and a barrier film made of the target polyimide film is obtained.

  The substrate to be processed S thus obtained is carried into another CVD apparatus, and a Cu film or Al film having a predetermined thickness as a wiring film under known process conditions (for example, JP 2009-130288 A). Etc., the IC chip package of the present invention is obtained. A barrier film excellent in insulation characteristics, barrier characteristics, and uniform film formation characteristics in a hole is formed at a film formation temperature of 250 ° C. or less.

An example in which a polyimide film is formed as a barrier film is shown. In this example, pyromellitic dianhydride and second raw material monomer (B) as the first raw material monomer (A) were respectively formed on the evaporation tungsten boats 13a and 13b using the film forming apparatus shown in FIG. The Si wafer S filled with 4,4′-diphenyl ether and fixed on the tray 15 is carried into the vacuum chamber 11, evacuated to 1E-4 Pa, and the tungsten boats 13a and 13b are heated to a predetermined temperature, The shutters 14a and 14b were opened, and a polyamic acid (polyamic acid) film having a thickness of 300 nm was formed so that vapors of pyromellitic dianhydride and 4,4′-diphenyl ether flew simultaneously in equimolar amounts. Since both raw materials are solid at room temperature, although not shown, a slit plate was mounted on the tungsten boats 13a and 13b in order to make the evaporation amount the same. On the Si wafer S, pyromellitic dianhydride and 4,4′-diphenyl ether react with each other at the moment when they are mixed in a molecular form to produce polyamic acid. Thereafter, annealing was performed in an N ₂ atmosphere at 150 ° C. for 6 hours. Thereby, it was found that 80% or more was imidized. This Si wafer S was carried into another Cu-CVD apparatus, and a 30 nm thick Cu film was formed under known process conditions. The Si wafer S on which the Cu film was formed was taken out and the cross section was observed with an SEM, and the film thickness at each location of the polyimide on the Si wafer S was measured. The Cu film is formed for confirming adhesion. Table 1 below shows the measured film thickness of the polyimide film at each location. The Si wafer S used in this example had a hole pattern with a hole diameter of 5 μm and a depth of 50 μm and 70 μm. As shown in FIG. 3, the film thickness measurement location on the Si wafer S is as follows: the upper surface A of the Si wafer S, the upper side wall B in the hole, the middle side wall C in the hole, the lower side wall D in the hole, Lower E.

  As is apparent from Table 1, it can be seen that a sufficiently uniform polyimide film is formed at a hole diameter of 5 μm and at a depth of 50 μm and 70 μm. Moreover, since there was no peeling of Cu film | membrane during the said observation, it turns out that adhesiveness is fully acquired.

Next, while changing the film thickness of the polyimide film, an Al film having a diameter of 0.5 mm is formed on the Si wafer where there is no hole pattern, and a voltage is applied between the Al film and the Si wafer. I characteristics were measured. FIG. 4 shows the relationship between the polyimide film thickness (nm) and the current density (leakage current density (A / cm ² )) when 3 V, which is a practical voltage, is applied.

As is apparent from FIG. 4, the leakage current decreases with an increase in the polyimide film thickness, but is high when the film thickness is thin. A high leakage current is an unpreferable characteristic for practical use, but values of 10 ⁻⁷ A / cm ² at a film thickness of 200 nm and 10 ⁻⁸ A / cm ² at a film thickness of 300 nm are obtained. If the film thickness is adjusted according to the above, it can be said that a sufficiently practical value is obtained.

  An infrared absorption (IR) spectrum was measured on a film formed by vapor deposition polymerization according to the method described in Example 1.

  Next, in order to determine the production rate of the polyamic acid and the polyimide in the deposited film, the time course of the IR spectrum was measured at 100 ° C. and 150 ° C. The result is shown in FIG.

In FIG. 5, the horizontal axis indicates elapsed time (hr), and the vertical axis indicates amidation rate (%) and imidation rate (%). ^Each, 1650 cm -1, was determined from the measurement of the depth of the absorption at each time the maximum value of absorption at 1380 cm ^-1 as 100%. As is clear from FIG. 5, the film immediately after vapor deposition at 100 ° C. is about 70% polyamic acid, and it can be seen that amidation proceeds by heating. It can be seen that when the temperature is raised to 150 ° C., the polyamic acid is dehydrated over time and changed to polyimide. After 6 hours, about 80% has changed to polyimide.

  A polyimide film was formed by vapor deposition polymerization according to the method described in Example 1. However, the opening and closing of the shutters 14a and 14b is adjusted so that the vapors of pyromellitic dianhydride and 4,4′-diphenyl ether fly separately in equal moles by shifting the time, so that a predetermined amount is formed on the Si wafer S. A polyimide film having a thickness was formed.

  As a result, even when the hole diameter was 5 μm and the depth was 50 μm and 70 μm, a uniform Cu film was formed in substantially the same manner as the result shown in Table 1, and there was no peeling of the Cu film. Further, when the VI characteristics were measured in the same manner as in Example 1, the relationship between the leakage current and the polyimide film thickness was the same as in FIG. 4, and it would be sufficient if the film thickness was adjusted according to the purpose. A practical value was obtained.

  According to the present invention, there is a method for forming a barrier film in a hole after opening a hole for electrically connecting IC chips to a bonded Si wafer by TSV technology. In the vacuum, the monomer can be evaporated in a vacuum, and a barrier film can be formed on the surface of the hole at a film forming temperature of 250 ° C. or lower by vapor deposition polymerization. Since a sufficiently usable barrier film and an IC chip package having this barrier film can be provided, it can be used in the field of semiconductor devices using the TSV process.

1 Deposition equipment S Substrate (wafer)
11 Vacuum tank 12 Exhaust system 13a, 13b (for evaporation) Tungsten boat 14a, 14b Shutter 15 Tray A First raw material monomer B Second raw material monomer 2 IC chip package 21 First Si wafer 21a First semiconductor element region (IC Chip)
22 Second Si wafer 22a Second semiconductor element region (IC chip)
23 Adhesive layer 24, 25 Insulating layer 26 Barrier film 27 Conductor film

Claims (12)

A plurality of Si wafers on which IC chips are formed are stacked and bonded together, and holes are formed in the bonded Si wafers to electrically connect the IC chips to each other by TSV technology. A method of forming a barrier film in the hole before forming the conductor film in the hole to be connected, in which two or more kinds of monomers are evaporated in a vacuum, and the hole is formed by vapor deposition polymerization. A barrier film forming method comprising forming a barrier film made of polyimide therein. 2. The method of forming a barrier film according to claim 1, wherein the monomer is evaporated by simultaneous or separate evaporation. 3. The method for forming a barrier film according to claim 1, wherein the monomer is composed of an aromatic diamine and tetracarboxylic dianhydride. A plurality of Si wafers on which IC chips are formed are stacked and bonded together, and holes are formed in the bonded Si wafers to electrically connect the IC chips to each other by TSV technology. A method of forming a barrier film in the hole before forming the conductor film in the hole to be connected, in which two or more kinds of monomers are evaporated in a vacuum, and the hole is formed by vapor deposition polymerization. A method for forming a barrier film comprising forming a barrier film made of a polymer therein. 5. The method of forming a barrier film according to claim 4, wherein the monomer is evaporated by simultaneous or separate evaporation. 6. The method of forming a barrier film according to claim 4, wherein the polymer is polyimide. The method for forming a barrier film according to any one of claims 4 to 6, wherein the monomer comprises an aromatic diamine and tetracarboxylic dianhydride. An IC chip package having a Si wafer stack in which the respective Si wafers of a plurality of Si wafers each formed with an IC chip are stacked and bonded together, and the Si wafer stack is bonded to the Si wafer stack by TSV technology. A hole is provided, and a barrier film made of polyimide formed by vapor deposition polymerization using two or more types of monomers is formed in the hole, and a conductor film is formed on the barrier film. An IC chip package characterized by being formed. 9. The IC chip package according to claim 8, wherein the monomer is composed of an aromatic diamine and tetracarboxylic dianhydride. An IC chip package having a Si wafer stack in which the respective Si wafers of a plurality of Si wafers each formed with an IC chip are stacked and bonded together, and the Si wafer stack is bonded to the Si wafer stack by TSV technology. A hole is provided, a barrier film made of a polymer obtained by vapor deposition polymerization is formed in the hole, and a conductor film is formed on the barrier film. IC chip package. The IC chip package according to claim 10, wherein the polymer is polyimide. 12. The IC chip package according to claim 10, wherein the polymer is a vapor deposition polymer of aromatic diamine and tetracarboxylic dianhydride.

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