JP2012119679A5 - - Google Patents
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- JP2012119679A5 JP2012119679A5 JP2011253306A JP2011253306A JP2012119679A5 JP 2012119679 A5 JP2012119679 A5 JP 2012119679A5 JP 2011253306 A JP2011253306 A JP 2011253306A JP 2011253306 A JP2011253306 A JP 2011253306A JP 2012119679 A5 JP2012119679 A5 JP 2012119679A5
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- JP
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- Prior art keywords
- dielectric
- silane group
- silsesquioxane
- silicon
- electronic device
- Prior art date
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Claims (3)
前記誘電性組成物を加熱してこの誘電性組成物を硬化させ、前記基板の上に誘電層を作成することとを含み、
前記誘電性材料は、シルセスキオキサン、かご型シルセスキオキサン(POSS)、ポリシルセスキオキサン、シラン基を有するポリアクリレート、シラン基を有するポリビニル、シラン基を有するポリイミドシラン基を有するポリエステル、シラン基を有するポリエーテル、シラン基を有するポリケトン、シラン基を有するポリスルホンから選択されるケイ素含有材料であり、
前記誘電性材料は、低k誘電性ポリマー及び高k誘電性ポリマーを含み、前記ケイ素含有材料は低k誘電性ポリマーであることを特徴とする電子機器を製造するプロセス。 Depositing a dielectric composition comprising a dielectric material, a cross-linking agent, and a thermal acid generator on the substrate;
The dielectric composition was heated by curing the dielectric composition, see containing and creating a dielectric layer on the substrate,
The dielectric material is silsesquioxane, cage silsesquioxane (POSS), polysilsesquioxane, polyacrylate having a silane group, polyvinyl having a silane group, polyester having a polyimide silane group having a silane group. A silicon-containing material selected from a polyether having a silane group, a polyketone having a silane group, and a polysulfone having a silane group,
A process for manufacturing an electronic device, wherein the dielectric material comprises a low-k dielectric polymer and a high-k dielectric polymer, and the silicon-containing material is a low-k dielectric polymer .
前記高k誘電性ポリマーは、ポリイミド、ポリエステル、ポリエーテル、ポリアクリレート、ポリビニル、ポリケトン、ポリスルホン、分子状ガラス化合物及びこれらの混合物から選択されることを特徴とする請求項1記載の電子機器を製造するプロセス。 The electronic device according to claim 1, wherein the high-k dielectric polymer is selected from polyimide, polyester, polyether, polyacrylate, polyvinyl, polyketone, polysulfone, molecular glass compound, and a mixture thereof. Process.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/957,445 | 2010-12-01 | ||
US12/957,445 US8623447B2 (en) | 2010-12-01 | 2010-12-01 | Method for coating dielectric composition for fabricating thin-film transistors |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2012119679A JP2012119679A (en) | 2012-06-21 |
JP2012119679A5 true JP2012119679A5 (en) | 2015-01-08 |
JP5775426B2 JP5775426B2 (en) | 2015-09-09 |
Family
ID=46083117
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011253306A Active JP5775426B2 (en) | 2010-12-01 | 2011-11-18 | Process for manufacturing electronic equipment |
Country Status (3)
Country | Link |
---|---|
US (2) | US8623447B2 (en) |
JP (1) | JP5775426B2 (en) |
DE (1) | DE102011087561B4 (en) |
Families Citing this family (5)
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CN103325943A (en) * | 2013-05-16 | 2013-09-25 | 京东方科技集团股份有限公司 | Organic thin-film transistor and preparation method thereof |
JP6245272B2 (en) | 2013-11-21 | 2017-12-13 | 株式会社ニコン | Wiring pattern manufacturing method and transistor manufacturing method |
KR101680433B1 (en) * | 2014-11-25 | 2016-11-29 | 순천대학교 산학협력단 | Manufacturing method of roll-to-roll gravure printed thin film transistor, thin film transistor backplane, backplane pressure sensor and smart sheet |
US10115785B1 (en) | 2017-06-01 | 2018-10-30 | Xerox Corporation | Memory cells and devices |
JP6926939B2 (en) * | 2017-10-23 | 2021-08-25 | 東京エレクトロン株式会社 | Manufacturing method of semiconductor devices |
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-
2010
- 2010-12-01 US US12/957,445 patent/US8623447B2/en active Active
-
2011
- 2011-11-18 JP JP2011253306A patent/JP5775426B2/en active Active
- 2011-12-01 DE DE102011087561.1A patent/DE102011087561B4/en active Active
-
2013
- 2013-12-27 US US14/142,035 patent/US9058981B2/en active Active
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