JP2012064817A - Package for mounting electronic component and module for communication - Google Patents

Package for mounting electronic component and module for communication Download PDF

Info

Publication number
JP2012064817A
JP2012064817A JP2010208613A JP2010208613A JP2012064817A JP 2012064817 A JP2012064817 A JP 2012064817A JP 2010208613 A JP2010208613 A JP 2010208613A JP 2010208613 A JP2010208613 A JP 2010208613A JP 2012064817 A JP2012064817 A JP 2012064817A
Authority
JP
Japan
Prior art keywords
electronic component
conductor
layer
component mounting
ground
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2010208613A
Other languages
Japanese (ja)
Other versions
JP5616178B2 (en
Inventor
Takayuki Shirasaki
隆行 白崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2010208613A priority Critical patent/JP5616178B2/en
Publication of JP2012064817A publication Critical patent/JP2012064817A/en
Application granted granted Critical
Publication of JP5616178B2 publication Critical patent/JP5616178B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Landscapes

  • Semiconductor Lasers (AREA)
  • Light Receiving Elements (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a package for mounting an electronic component and a module for communication in which high frequency characteristics are improved.SOLUTION: A package 10 for mounting an electronic component comprises: a substrate 1; a dielectric 2; a signal lead 3; a mounting substrate 4; a ground lead 7; and a lid 8. The substrate 1 consists of a metal disc-like member and has a through hole 1a penetrating in the thickness direction. The substrate 1 also consists of two portions, i.e. a thin layer portion 1c and a thick layer portion 1d, having different thicknesses with reference to the mounting surface 1b which is one main surface on which an electronic component 6 is mounted.

Description

本発明は、光通信分野等に用いられる光半導体素子等の電子部品を搭載して収納するための電子部品搭載用パッケージおよびそれを用いた通信用モジュールに関する。   The present invention relates to an electronic component mounting package for mounting and storing electronic components such as optical semiconductor elements used in the field of optical communication and the like, and a communication module using the same.

長距離伝送における高速通信に対する需要が急激に増加しており、高速大容量な情報伝送に関する研究開発が進められている。長距離伝送では、伝送による損失を抑えることが重要であり、伝送損失と伝送速度の観点から光信号による光通信が注目されている。光通信では、光信号を受発信する光通信装置を使用する。光通信の高速化は、光通信装置に用いられる半導体装置等の高速化によって実現される。光信号の高出力化と高速化によって、伝送容量を向上させることができる。   The demand for high-speed communication in long-distance transmission is increasing rapidly, and research and development on high-speed and large-capacity information transmission is underway. In long-distance transmission, it is important to suppress loss due to transmission, and optical communication using optical signals has attracted attention from the viewpoint of transmission loss and transmission speed. In optical communication, an optical communication device that receives and transmits optical signals is used. The speeding up of optical communication is realized by speeding up a semiconductor device or the like used in the optical communication device. Transmission capacity can be improved by increasing the output and speed of optical signals.

従来の半導体装置に代表される電子装置の光出力は0.2〜0.5mW程度であり、電子部品として用いられる半導体素子の駆動電力は5mW程度である。しかし、より高出力の半導体装置では、光出力が1mW程度まで高くなってきており、また、半導体素子の駆動電力も10mW以上が要求されている。さらに、従来の半導体装置による伝送容量は2.5〜10Gbps(Giga bit per second)程度であったが、近年では25〜40Gbps程度まで向上してきており、半導体装置をより高出力化させ、高速化させることが必要である。   The optical output of an electronic device typified by a conventional semiconductor device is about 0.2 to 0.5 mW, and the driving power of a semiconductor element used as an electronic component is about 5 mW. However, in a higher output semiconductor device, the optical output is increased to about 1 mW, and the driving power of the semiconductor element is required to be 10 mW or more. Further, the transmission capacity of the conventional semiconductor device was about 2.5 to 10 Gbps (Giga bit per second), but in recent years, the transmission capacity has been improved to about 25 to 40 Gbps. It is necessary to make it.

従来の光通信装置に用いられているLD(Laser Diode:レーザダイオード)、PD(
Photo Diode:フォトダイオ−ド)などの光半導体素子を含む電子部品を搭載する電子部品搭載用パッケージおよびこれを用いた電子装置は、たとえば特許文献1および特許文献2に記載されている。
LDs (Laser Diodes), PDs (PDs) used in conventional optical communication devices
For example, Patent Document 1 and Patent Document 2 describe an electronic component mounting package on which an electronic component including an optical semiconductor element such as Photo Diode is mounted and an electronic device using the same.

いずれもステムの搭載面に電子部品を搭載し、ステムを貫通する信号リードを基板に挿通して電子部品と基板配線とを接続している。   In either case, an electronic component is mounted on the mounting surface of the stem, and a signal lead penetrating the stem is inserted into the substrate to connect the electronic component and the substrate wiring.

特開2001−144366号公報JP 2001-144366 A 特開2005−228766号公報JP 2005-228766 A

ステムを備える電子部品搭載用パッケージを用いる場合、信号リードの基板に挿通している部分は、周囲が誘電体で囲まれるが、ステムから基板までは信号リードが露出した状態となるので、不要なインダクタンス成分が発生して高周波特性が劣化する。不要なインダクタンス成分を小さくするために、信号リードの露出部分を短くする、すなわち基板への挿通深さをより深くすると、ステムと基板との距離が短くなる。基板のパッケージ側表面に接地導体層が設けられている場合、ステムと接地導体層の距離が短くなることで共振が生じてしまい高周波特性が低下する。   When using an electronic component mounting package having a stem, the portion of the signal lead that is inserted into the substrate is surrounded by a dielectric, but the signal lead is exposed from the stem to the substrate. An inductance component is generated and high frequency characteristics are deteriorated. In order to reduce an unnecessary inductance component, if the exposed portion of the signal lead is shortened, that is, if the insertion depth into the substrate is deepened, the distance between the stem and the substrate is shortened. When the ground conductor layer is provided on the surface of the substrate on the package side, the distance between the stem and the ground conductor layer is shortened, thereby causing resonance and lowering the high frequency characteristics.

本発明の目的は、高周波特性が向上した電子部品搭載用パッケージおよび通信用モジュールを提供することである。   An object of the present invention is to provide an electronic component mounting package and a communication module with improved high frequency characteristics.

本実施形態の電子部品搭載用パッケージは、金属板状部材からなり、厚み方向に貫通する貫通孔が設けられた基体であって、一方主面に電子部品が搭載され、前記一方主面を基準とする厚みが他の部分に比べて薄い薄層部を有する基体と、
前記貫通孔の中心部に挿通され、前記基体の主面に対して直交する方向に延びる信号線路導体と、
前記信号線路導体と前記貫通孔の内周面との間に設けられる誘電体と、
前記基体の一方主面側に設けられ、前記電子部品と前記信号線路導体とを接続する接続導体と、
前記基体の他方主面側に設けられ、前記信号線路導体と平行に延びる接地導体と、を備えることを特徴とする電子部品搭載用パッケージである。
The electronic component mounting package of the present embodiment is a base body made of a metal plate-like member and provided with a through-hole penetrating in the thickness direction. The electronic component is mounted on one main surface, and the one main surface is used as a reference. A substrate having a thin layer part whose thickness is thinner than other parts;
A signal line conductor inserted in the center of the through hole and extending in a direction perpendicular to the main surface of the base body;
A dielectric provided between the signal line conductor and the inner peripheral surface of the through hole;
A connection conductor provided on one main surface side of the base, and connecting the electronic component and the signal line conductor;
An electronic component mounting package comprising: a ground conductor provided on the other main surface side of the base body and extending in parallel with the signal line conductor.

また本実施形態の通信用モジュールは、前記電子部品搭載用パッケージと、前記電子部品搭載用パッケージに搭載された電子部品と、回路基板とを有する通信用モジュールであって、
前記回路基板は、
誘電体層と、
前記誘電体層の一方面に設けられる接地導体層と、
前記誘電体層の一方面から他方面まで貫通し、前記電子部品搭載用パッケージの前記信号線路導体を挿通するための挿通孔が設けられた貫通導体と、
前記誘電体層の他方面に設けられ、前記貫通導体と接続される信号配線層とを有し、
前記信号線路導体が、前記貫通導体の前記挿通孔に挿通されて、前記電子部品搭載用パッケージが前記回路基板に実装された状態で、前記接地導体層は、前記基体の薄層部と前記誘電体層とが対向する領域に設けられ、
前記接地導体層と前記基体の薄層部との間隔が、前記信号線路導体を伝送する高周波信号の波長の1/8以上となるように、前記電子部品搭載用パッケージが前記回路基板に実装されることを特徴とする通信用モジュールである。
The communication module of the present embodiment is a communication module having the electronic component mounting package, the electronic component mounted on the electronic component mounting package, and a circuit board.
The circuit board is
A dielectric layer;
A grounding conductor layer provided on one surface of the dielectric layer;
A penetrating conductor that penetrates from one surface of the dielectric layer to the other surface and is provided with an insertion hole for inserting the signal line conductor of the electronic component mounting package;
A signal wiring layer provided on the other surface of the dielectric layer and connected to the through conductor;
In a state where the signal line conductor is inserted into the insertion hole of the through conductor and the electronic component mounting package is mounted on the circuit board, the ground conductor layer includes the thin layer portion of the base and the dielectric Provided in the region facing the body layer,
The electronic component mounting package is mounted on the circuit board so that an interval between the ground conductor layer and the thin layer portion of the base is 1/8 or more of a wavelength of a high-frequency signal transmitted through the signal line conductor. This is a communication module characterized by the above.

また本実施形態の通信用モジュールは、前記誘電体と前記貫通導体との間隔が、前記信号線路導体を伝送する高周波信号の波長の1/16以下となるように、前記電子部品搭載用パッケージが前記回路基板に実装されることを特徴とする。   Further, in the communication module according to the present embodiment, the electronic component mounting package is arranged so that the distance between the dielectric and the through conductor is 1/16 or less of the wavelength of the high-frequency signal transmitted through the signal line conductor. It is mounted on the circuit board.

また本実施形態の通信用モジュールは、前記電子部品搭載用パッケージは、1または複数の前記線路導体と1または複数の接地導体とを有し、
前記信号線路導体と前記接地導体とは、前記基体の主面に平行な方向に、一直線状に位置するように設けられ、
前記回路基板は、前記接地導体層が、前記信号線路導体および前記接地導体の配列方向に直交する方向に延びて設けられ、前記接地導体層の幅方向端部と前記接地導体の中心との距離が、前記信号線路導体を伝送する高周波信号の波長の1/4以下であることを特徴とする。
Further, in the communication module of the present embodiment, the electronic component mounting package has one or more line conductors and one or more ground conductors,
The signal line conductor and the ground conductor are provided so as to be positioned in a straight line in a direction parallel to the main surface of the base body,
The circuit board is provided with the ground conductor layer extending in a direction perpendicular to the arrangement direction of the signal line conductor and the ground conductor, and a distance between a width direction end of the ground conductor layer and the center of the ground conductor. Is not more than ¼ of the wavelength of the high-frequency signal transmitted through the signal line conductor.

本実施形態の電子部品搭載用パッケージによれば、いわゆるステムを備える電子部品搭載用パッケージにおいて、ステムである基体が、電子部品を搭載する一方主面を基準とする厚みが他の部分に比べて薄い薄層部を有する。   According to the electronic component mounting package of the present embodiment, in the electronic component mounting package including a so-called stem, the base that is the stem has a thickness with respect to one main surface on which the electronic component is mounted as compared to other portions. It has a thin thin layer.

基体が薄層部を有することにより、電子部品搭載用パッケージを回路基板に実装したときに回路基板と基体との間隔が、薄層部との間で広くなり、回路基板の接地導体層と基体との間隔が広くなる。間隔をこのように広げることで不要な共振の発生を抑制することができ、電子部品搭載用パッケージの高周波特性が向上する。   Since the base has the thin layer portion, when the electronic component mounting package is mounted on the circuit board, the distance between the circuit board and the base is widened between the thin layer portion, and the ground conductor layer and the base of the circuit board are widened. The interval between and becomes wider. By widening the interval in this way, unnecessary resonance can be suppressed, and the high frequency characteristics of the electronic component mounting package are improved.

本実施形態の通信用モジュールによれば、いわゆるステムを備える電子部品搭載用パッケージにおいて、薄層部を有し、前記接地導体層と前記基体の薄層部との間隔が、前記信号線路導体を伝送する高周波信号の波長の1/8以上となるように、前記電子部品搭載用パッケージが前記回路基板に実装される。   According to the communication module of the present embodiment, an electronic component mounting package having a so-called stem has a thin layer portion, and an interval between the ground conductor layer and the thin layer portion of the base is the signal line conductor. The electronic component mounting package is mounted on the circuit board so as to be 1/8 or more of the wavelength of the high-frequency signal to be transmitted.

この間隔を高周波信号の波長の1/8以上に広げることで不要な共振の発生を抑制することができ、通信モジュールの高周波特性が向上する。   By expanding this interval to 1/8 or more of the wavelength of the high frequency signal, unnecessary resonance can be suppressed, and the high frequency characteristics of the communication module are improved.

また本実施形態の通信用モジュールによれば、前記誘電体と前記貫通導体との間隔が、前記信号線路導体を伝送する高周波信号の波長の1/16以下となるように、前記電子部品搭載用パッケージが前記回路基板に実装される。   Further, according to the communication module of the present embodiment, the electronic component mounting device is configured such that the distance between the dielectric and the through conductor is 1/16 or less of the wavelength of the high-frequency signal transmitted through the signal line conductor. A package is mounted on the circuit board.

この間隔は、信号線路導体が露出している部分の長さに相当する。この間隔を高周波信号の波長の1/16以下とすることで、不要なインダクタンス成分を小さくすることができ、通信モジュールの高周波特性が向上する。   This interval corresponds to the length of the portion where the signal line conductor is exposed. By setting this interval to 1/16 or less of the wavelength of the high frequency signal, an unnecessary inductance component can be reduced, and the high frequency characteristics of the communication module are improved.

また本実施形態の通信用モジュールによれば、前記接地導体層が、前記信号線路導体および前記接地導体の配列方向に直交する方向に延びて設けられており、前記接地導体層の幅方向端部と前記接地導体の中心との距離が、前記信号線路導体を伝送する高周波信号の波長の1/4以下である。   Further, according to the communication module of the present embodiment, the ground conductor layer is provided so as to extend in a direction orthogonal to the arrangement direction of the signal line conductor and the ground conductor, and the width direction end of the ground conductor layer And the center of the ground conductor is ¼ or less of the wavelength of the high-frequency signal transmitted through the signal line conductor.

前記接地導体層の幅方向寸法を上記のように規定することにより、幅方向における共振の発生を抑制することができる。   By defining the dimension in the width direction of the ground conductor layer as described above, the occurrence of resonance in the width direction can be suppressed.

本発明の実施形態である電子部品搭載用パッケージ10の外観を示す斜視図である。1 is a perspective view showing an appearance of an electronic component mounting package 10 according to an embodiment of the present invention. 図1の切断面線A−Aで切断したときの断面図である。It is sectional drawing when cut | disconnecting by cut surface line AA of FIG. 本発明の実施形態である通信用モジュール100の構成を示す断面図である。It is sectional drawing which shows the structure of the module for communication 100 which is embodiment of this invention. 本発明の他の実施形態である電子部品搭載用パッケージ12の構成を示す断面図である。It is sectional drawing which shows the structure of the package 12 for electronic components which is other embodiment of this invention. 通信用モジュール100を回路基板20の裏面側からみた平面図である。FIG. 3 is a plan view of the communication module 100 as viewed from the back side of the circuit board 20. 電子部品搭載用パッケージ10における基体1の他の態様を示す斜視図である。FIG. 6 is a perspective view showing another aspect of the substrate 1 in the electronic component mounting package 10. 本発明のさらに他の実施形態である箱型の電子部品搭載用パッケージ30の構成を示す図である。It is a figure which shows the structure of the package 30 for a box-shaped electronic component mounting which is further another embodiment of this invention. 電子部品搭載用パッケージ30における基体1の他の態様を示す斜視図である。6 is a perspective view showing another aspect of the base body 1 in the electronic component mounting package 30. FIG.

図1は、本発明の実施形態である電子部品搭載用パッケージ10の外観を示す斜視図である。図2は、図1の切断面線A−Aで切断したときの断面図である。   FIG. 1 is a perspective view showing an external appearance of an electronic component mounting package 10 according to an embodiment of the present invention. 2 is a cross-sectional view taken along the cutting plane line AA of FIG.

電子部品搭載用パッケージ10は、基体1、誘電体2、信号リード3、搭載基板4、接地リード7および蓋体8を備える。   The electronic component mounting package 10 includes a base 1, a dielectric 2, a signal lead 3, a mounting substrate 4, a ground lead 7 and a lid 8.

基体1は、金属円板状部材からなり、厚み方向に貫通する貫通孔1aが設けられる。また、基体1は、電子部品6を搭載する一方主面である搭載面1bを基準とする厚みが異なる2つの部分である薄層部1cと厚層部1dとからなる。   The substrate 1 is made of a metal disk-like member, and is provided with a through hole 1a penetrating in the thickness direction. The substrate 1 includes a thin layer portion 1c and a thick layer portion 1d, which are two portions having different thicknesses with respect to the mounting surface 1b that is one main surface on which the electronic component 6 is mounted.

基体1は、搭載された電子部品6が発生する熱を放散する機能を有する。このため、基体1は、熱伝導性の良い金属から成り、搭載される電子部品6やセラミック製の搭載基板4の熱膨張係数に近い材質やコストの安い材質として、たとえば、Fe−Ni−Co合金やFe−Mn合金等の鉄系の合金や純鉄等の金属が選ばれる。より具体的には、Fe99.6質量%−Mn0.4質量%系のSPC(Steel Plate Cold)材がある。基体1がFe−Mn合金から成る場合は、このインゴット(塊)に圧延加工や打ち抜き加工等の周知の金属加工方法を施すことによって所定形状に製作され、貫通孔1aはドリル加工や金型による打ち抜き加工によって形成される。また、基体1の搭載面1bは、切削加工やプレス加工することによって形成することができる。   The substrate 1 has a function of dissipating heat generated by the mounted electronic component 6. For this reason, the base body 1 is made of a metal having good thermal conductivity, and as a material close to the thermal expansion coefficient of the electronic component 6 to be mounted or the mounting substrate 4 made of ceramic or a low-cost material, for example, Fe-Ni-Co An alloy such as an alloy or an Fe-Mn alloy or a metal such as pure iron is selected. More specifically, there is an SPC (Steel Plate Cold) material of Fe 99.6 mass% -Mn 0.4 mass%. When the substrate 1 is made of an Fe—Mn alloy, the ingot (lumps) is manufactured in a predetermined shape by applying a known metal processing method such as rolling or punching, and the through-hole 1a is formed by drilling or a die. It is formed by punching. Further, the mounting surface 1b of the base body 1 can be formed by cutting or pressing.

基体1の形状は、厚層部1dの厚みが0.5〜2mm、薄層部1cの厚みが0.1〜1mm程度の板状であり、その形状には特に制限はないが、たとえば直径が3〜10mmの円板状、半径が1.5〜8mmの円周の一部を切り取った半円板状、一辺が3〜15mmの四角板状等である。貫通孔1aを有する基体1に1個の電子部品6を搭載しているが、複数の電子部品6を搭載したり、電子部品6の数や電子部品6の端子の数に応じて、信号リード3を固定する貫通孔1aを3つ以上形成してもよい。   The shape of the substrate 1 is a plate shape in which the thickness of the thick layer portion 1d is 0.5 to 2 mm and the thickness of the thin layer portion 1c is about 0.1 to 1 mm, and the shape is not particularly limited. Is a disc shape having a diameter of 3 to 10 mm, a semi-disc shape having a radius of 1.5 to 8 mm, and a square plate shape having a side of 3 to 15 mm. One electronic component 6 is mounted on the base body 1 having the through hole 1a. However, depending on the number of electronic components 6 or the number of electronic components 6 and the number of terminals of the electronic components 6, the signal leads Three or more through holes 1 a for fixing 3 may be formed.

基体1の厚層部1dの厚みは0.5mm以上2mm以下が好ましい。厚みが0.5mm未満の場合は、電子部品6を保護するための金属製の蓋体8を金属製の基体1の上面に接合する際に、接合温度等の接合条件によって基体1が曲がったりして変形し易くなり、変形によって気密性が低下しやすくなる。一方、厚みが2mmを超えると、電子部品搭載用パッケージや電子装置の厚みが不要に厚いものとなり、小型化し難くなる。   The thickness of the thick layer portion 1d of the substrate 1 is preferably 0.5 mm or more and 2 mm or less. When the thickness is less than 0.5 mm, when the metal lid 8 for protecting the electronic component 6 is bonded to the upper surface of the metal substrate 1, the substrate 1 may be bent depending on the bonding conditions such as the bonding temperature. Therefore, it becomes easy to deform | transform, and it becomes easy to reduce airtightness by deformation | transformation. On the other hand, if the thickness exceeds 2 mm, the thickness of the electronic component mounting package or the electronic device becomes unnecessarily thick, and it is difficult to reduce the size.

基体1の表面には、耐食性に優れ、電子部品6や搭載基板4あるいは蓋体8を接合し固定するためのろう材との濡れ性に優れた、厚さが0.5〜9μmのNi層と厚さが0.5〜5μmのAu層とをめっき法によって順次被着させておくのがよい。これにより、基体1が酸化腐食するのを有効に防止できるとともに電子部品6や搭載基板4あるいは蓋体8を基体1に良好にろう接することができる。   An Ni layer having a thickness of 0.5 to 9 μm on the surface of the substrate 1 having excellent corrosion resistance and excellent wettability with a brazing material for joining and fixing the electronic component 6, the mounting substrate 4 or the lid 8. And an Au layer having a thickness of 0.5 to 5 μm are preferably sequentially deposited by a plating method. Thereby, it is possible to effectively prevent the base body 1 from being oxidatively corroded and to satisfactorily braze the electronic component 6, the mounting substrate 4, or the lid body 8 to the base body 1.

誘電体2は、信号リード3と貫通孔1aの内周面との間に設けられる。信号リード3は、貫通孔1aの中心部に挿通され、基体1の主面に対して直交する方向に延びる。基体1の貫通孔1a周辺部分が外皮導体として機能し、誘電体2と信号リード3とによって同軸線路が構成される。   The dielectric 2 is provided between the signal lead 3 and the inner peripheral surface of the through hole 1a. The signal lead 3 is inserted through the central portion of the through hole 1 a and extends in a direction orthogonal to the main surface of the base 1. The peripheral portion of the base 1 around the through hole 1a functions as an outer conductor, and the dielectric 2 and the signal lead 3 constitute a coaxial line.

搭載基板4は、主面が搭載面1bに直交するように設けられ、一方主面に、電子部品6と信号リード3とを接続する接続導体4aを有する。電子部品6は、搭載基板4の一方主面に実装され、ボンディングワイヤ6aによって電子部品6の信号パッドと接続導体4aとを電気的に接続する。   The mounting substrate 4 is provided so that its main surface is orthogonal to the mounting surface 1 b, and has a connection conductor 4 a for connecting the electronic component 6 and the signal lead 3 on one main surface. The electronic component 6 is mounted on one main surface of the mounting substrate 4 and electrically connects the signal pad of the electronic component 6 and the connection conductor 4a by a bonding wire 6a.

信号リード3は、基体1の搭載面1b側に0.5〜3mm程度突出し、この突出した部分と接続導体4aとがろう材5などの導電性材料によって接続されている。また、信号リード3は、本実施形態では2本設けられており、いずれも基体1の厚層部1dに設けられる。信号リード3は、厚層部1dの一方主面とは反対側の面(以下では厚層裏面という。)1eに直交する方向に1〜20mm程度の長さで延びるように設けられる。なお、本実施形態において、2本の信号リード3はいずれも同じ長さであり、基体1の搭載面1bおよび厚層裏面1eからそれぞれ突出する突出長さも同じである。   The signal lead 3 protrudes about 0.5 to 3 mm toward the mounting surface 1 b of the base 1, and the protruding portion and the connection conductor 4 a are connected by a conductive material such as a brazing material 5. In the present embodiment, two signal leads 3 are provided, both of which are provided on the thick layer portion 1 d of the substrate 1. The signal lead 3 is provided so as to extend with a length of about 1 to 20 mm in a direction orthogonal to a surface (hereinafter referred to as a thick layer back surface) 1e opposite to one main surface of the thick layer portion 1d. In the present embodiment, the two signal leads 3 have the same length, and the protruding lengths protruding from the mounting surface 1b and the thick layer back surface 1e of the substrate 1 are also the same.

接地リード7は、信号リード3と同様に基体1の厚層部1dに設けられるが、基体1を貫通する必要はなく、厚層裏面1eに固着されるか、厚層裏面1eから数mm程度挿入されて固着される。   The ground lead 7 is provided in the thick layer portion 1d of the base 1 like the signal lead 3. However, the ground lead 7 does not need to penetrate the base 1, and is fixed to the thick back surface 1e or about several mm from the thick back surface 1e. Inserted and fixed.

信号リード3と接地リード7とは、厚層裏面1eに平行な方向に、一直線状に配列し、2本の信号リード3の間の中間位置に1本の接地リード7が位置するように設けられる。   The signal lead 3 and the ground lead 7 are arranged in a straight line in a direction parallel to the thick layer back surface 1 e, and are provided so that one ground lead 7 is located at an intermediate position between the two signal leads 3. It is done.

蓋体8は、搭載基板4、電子部品6などを収容する収容空間を有し、搭載面1bに接着固定される。蓋体8には、電子部品6と対向する部分に光を透過させる窓を設けてもよいし、窓に換えて、または窓に加えて光ファイバおよび戻り光防止用の光アイソレータを接合したものでもよい。   The lid 8 has a housing space for housing the mounting substrate 4, the electronic component 6, and the like, and is bonded and fixed to the mounting surface 1 b. The lid 8 may be provided with a window that transmits light at a portion facing the electronic component 6, or an optical fiber and an optical isolator for preventing return light joined in place of or in addition to the window. But you can.

蓋体8は、Fe−Ni−Co合金やFe−Ni合金、Fe−Mn合金等の金属から成り、これらの板材にプレス加工や打ち抜き加工等の周知の金属加工方法を施すことによって作製される。蓋体8は、基体1の材料と同程度の熱膨張係数を有するものが好ましく、基体1の材料と同じものを用いるのがより好ましい。蓋体8が窓を有する場合は、電子部品6と対向する部分に孔を設けたものに、平板状やレンズ状のガラス製の窓部材を低融点ガラスなどによって接合する。   The lid 8 is made of a metal such as an Fe—Ni—Co alloy, an Fe—Ni alloy, or an Fe—Mn alloy, and is produced by subjecting these plate materials to a known metal working method such as press working or punching. . The lid 8 preferably has the same thermal expansion coefficient as the material of the base 1, and more preferably the same as the material of the base 1. When the lid 8 has a window, a plate-like or lens-like glass window member is joined to a member provided with a hole in the portion facing the electronic component 6 with a low melting point glass or the like.

蓋体8の基体1への接合は、シーム溶接やYAGレーザ溶接等の溶接またはAu−Snろう材等のろう材によるろう接によって行われる。   The lid 8 is joined to the base body 1 by welding such as seam welding or YAG laser welding or by brazing with a brazing material such as an Au-Sn brazing material.

誘電体2は、ガラスやセラミックスなどの誘電性の無機材料から成り、信号リード3と基体1との絶縁間隔を確保するとともに、信号リード3を基体1の貫通孔1a内に固定する機能を有する。このような誘電体2の例としては、ホウケイ酸ガラス、ソーダガラス等のガラスおよびこれらのガラス誘電体2の熱膨張係数や比誘電率を調整するためのセラミックフィラーを加えたものが挙げられ、インピーダンスマッチングのためにその比誘電率を適宜選択する。比誘電率を低下させるフィラーとしては、酸化リチウム等が挙げられる。   The dielectric 2 is made of a dielectric inorganic material such as glass or ceramics, and has a function of securing an insulation interval between the signal lead 3 and the base 1 and fixing the signal lead 3 in the through hole 1 a of the base 1. . Examples of such dielectric 2 include glass such as borosilicate glass and soda glass and those added with a ceramic filler for adjusting the thermal expansion coefficient and relative dielectric constant of these glass dielectrics 2, The relative dielectric constant is appropriately selected for impedance matching. Examples of the filler that lowers the dielectric constant include lithium oxide.

たとえば、誘電体2の比誘電率が6.8であり、信号リード3の外径が0.25mmの場合は、貫通孔1aの直径を0.75mmとすることで信号リード3の特性インピーダンスを25Ωとすることができる。また、誘電体2の比誘電率が5であり、信号リード3の外径が0.25mmの場合は、貫通孔1aの直径を0.64mmとすることで特性インピーダンスを25Ωとすることができ、貫通孔1aの直径を1.62mmとすることで特性インピーダンスを50Ωとすることができる。   For example, when the relative permittivity of the dielectric 2 is 6.8 and the outer diameter of the signal lead 3 is 0.25 mm, the characteristic impedance of the signal lead 3 can be increased by setting the diameter of the through hole 1a to 0.75 mm. It can be 25Ω. Further, when the relative permittivity of the dielectric 2 is 5 and the outer diameter of the signal lead 3 is 0.25 mm, the characteristic impedance can be 25Ω by setting the diameter of the through hole 1 a to 0.64 mm. The characteristic impedance can be 50Ω by setting the diameter of the through hole 1a to 1.62 mm.

信号リード3は、Fe−Ni−Co合金やFe−Ni合金等の金属から成り、たとえば信号リード3がFe−Ni−Co合金から成る場合は、このインゴット(塊)に圧延加工や打ち抜き加工、切削加工等の周知の金属加工方法を施すことによって、長さが1.5〜22mmで直径が0.1〜1mmの直線状に製作される。信号リード3の強度を確保しながらより高い特性インピーダンスでのマッチングを行ないつつ小型にするには、信号リード3の直径は0.15〜0.3mmが好ましい。信号リード3の直径が0.15mmよりも細くなると、電子部品搭載用パッケージを実装する場合の取り扱いで信号リード3が曲がりやすくなり、作業性が低下しやすくなる。また、直径が0.3mmよりも太くなると、インピーダンス整合させた場合の貫通孔1aの径が信号リード3の径に伴い大きくなるので、製品の小型化に向かないものとなってしまう。   The signal lead 3 is made of a metal such as an Fe—Ni—Co alloy or an Fe—Ni alloy. For example, when the signal lead 3 is made of an Fe—Ni—Co alloy, the ingot (lumb) is rolled or punched, By applying a known metal processing method such as cutting, a length of 1.5 to 22 mm and a diameter of 0.1 to 1 mm are produced. In order to reduce the size of the signal lead 3 while ensuring the strength of the signal lead 3 while performing matching with a higher characteristic impedance, the diameter of the signal lead 3 is preferably 0.15 to 0.3 mm. When the diameter of the signal lead 3 is smaller than 0.15 mm, the signal lead 3 is easily bent by handling when mounting the electronic component mounting package, and the workability is easily lowered. On the other hand, if the diameter is larger than 0.3 mm, the diameter of the through hole 1a when impedance matching is increased with the diameter of the signal lead 3, which is not suitable for downsizing of the product.

信号リード3を貫通孔1aに充填された誘電体2を挿通して固定するには、たとえば、以下のような方法による。誘電体2がガラスから成る場合は、まず、周知の粉体プレス法や押し出し成形法を用いてガラス粉末を成形して、内径が信号リード3の外径で、外径が貫通孔1a内径となる筒状の成形体を作製し、この誘電体2の成形体の挿通孔に信号リード3を挿通して成形体を型に入れる。所定の温度に加熱してガラス成分を溶融させた後、冷却して固化させることによって、信号リード3が固定された所定形状の誘電体2を形成しておく。これにより、誘電体2によって貫通孔1aが気密に封止されるとともに、誘電体2によって信号リード3が基体1と絶縁されて固定され、同軸線路が形成される。あらかじめ貫通孔1aの形状に合わせた誘電体2だけを形成しておき、これを貫通孔1aに挿入するとともに信号リード3も誘電体2の挿通孔に挿通し、誘電体2と貫通孔1aの内面および信号リード3の外面との接合を同時に行ってもよい。   In order to insert and fix the signal lead 3 through the dielectric 2 filled in the through hole 1a, for example, the following method is used. When the dielectric 2 is made of glass, first, glass powder is molded using a known powder pressing method or extrusion molding method, the inner diameter is the outer diameter of the signal lead 3, and the outer diameter is the inner diameter of the through hole 1a. A cylindrical molded body is prepared, and the signal lead 3 is inserted into the insertion hole of the molded body of the dielectric 2 to put the molded body into a mold. The glass component is melted by heating to a predetermined temperature, and then cooled and solidified to form the dielectric 2 having a predetermined shape to which the signal lead 3 is fixed. As a result, the through hole 1a is hermetically sealed by the dielectric 2, and the signal lead 3 is insulated and fixed from the base 1 by the dielectric 2 to form a coaxial line. Only the dielectric 2 matching the shape of the through hole 1a is formed in advance, and this is inserted into the through hole 1a, and the signal lead 3 is also inserted into the insertion hole of the dielectric 2, and the dielectric 2 and the through hole 1a are inserted. The inner surface and the outer surface of the signal lead 3 may be joined at the same time.

搭載基板4は、酸化アルミニウム(アルミナ:Al)質焼結体、窒化アルミニウム(AlN)質焼結体等のセラミックス絶縁材料等から成る絶縁基板に接続導体4aが形成されたものである。絶縁基板がたとえば酸化アルミニウム質焼結体から成る場合であれば、まずアルミナ(Al)やシリカ(SiO)、カルシア(CaO)、マグネシア(MgO)等の原料粉末に適当な有機溶剤、溶媒を添加混合して泥漿状とし、これを周知のドクターブレード法やカレンダーロール法等によってシート状に成形してセラミックグリーンシート(以下、グリーンシートともいう)を得る。その後、グリーンシートを所定形状に打ち抜き加工するとともに必要に応じて複数枚積層し、これを約1600℃の温度で焼成することによって製作される。 The mounting substrate 4 is obtained by forming a connection conductor 4a on an insulating substrate made of a ceramic insulating material such as an aluminum oxide (alumina: Al 2 O 3 ) sintered body or an aluminum nitride (AlN) sintered body. . If the insulating substrate is made of, for example, an aluminum oxide sintered body, an organic solvent suitable for the raw material powder such as alumina (Al 2 O 3 ), silica (SiO 2 ), calcia (CaO), magnesia (MgO), etc. Then, a solvent is added and mixed to form a slurry, which is formed into a sheet by a known doctor blade method, calendar roll method, or the like to obtain a ceramic green sheet (hereinafter also referred to as a green sheet). Thereafter, the green sheet is punched into a predetermined shape, and a plurality of sheets are laminated as necessary, and the green sheet is fired at a temperature of about 1600 ° C.

接続導体4aの形成方法は、絶縁基板と同時焼成で、あるいは絶縁基板を作製した後に金属メタライズを形成する周知の方法や、絶縁基板を作製した後に蒸着法やフォトリソグラフィ法によって形成する方法がある。パッケージが小型である場合は、それに搭載される搭載基板4はさらに小さいので、接続導体4aは微細なものとなり、また接続導体4aと信号リード3との位置合わせ精度を高めるためには蒸着法やフォトリソグラフィ法によって接続導体4aを形成する方法が好ましく、この場合は、必要に応じて絶縁基板の主面に研磨加工を施す場合もある。   As a method for forming the connection conductor 4a, there are a well-known method of forming metal metallization by simultaneous firing with the insulating substrate, or after the insulating substrate is manufactured, and a method of forming the insulating substrate by vapor deposition or photolithography after the insulating substrate is manufactured. . When the package is small, the mounting substrate 4 mounted on the package is smaller, so that the connection conductor 4a is fine. In order to increase the alignment accuracy between the connection conductor 4a and the signal lead 3, a vapor deposition method or the like is used. A method of forming the connection conductor 4a by a photolithography method is preferable. In this case, the main surface of the insulating substrate may be polished as necessary.

以下、接続導体4aを蒸着法やフォトリソグラフィ法によって形成する場合について詳細に説明する。接続導体4aは、たとえば密着金属層、拡散防止層および主導体層が順次積層された3層構造の導体層から成る。   Hereinafter, the case where the connection conductor 4a is formed by vapor deposition or photolithography will be described in detail. The connection conductor 4a is composed of a conductor layer having a three-layer structure in which, for example, an adhesion metal layer, a diffusion prevention layer, and a main conductor layer are sequentially laminated.

密着金属層は、セラミックス等から成る絶縁基板との密着性を良好とするという観点からは、チタン(Ti)、クロム(Cr)、タンタル(Ta)、ニオブ(Nb)、ニッケル−クロム(Ni−Cr)合金、窒化タンタル(TaN)等の熱膨張率がセラミックスと近い金属のうちの少なくとも1種より成るのが好ましく、その厚みは0.01〜0.2μm程度が好ましい。密着金属層の厚みが0.01μm未満では、密着金属層を絶縁基板に強固に密着することが困難となる傾向があり、0.2μmを超えると、成膜時の内部応力によって密着金属層が絶縁基板から剥離し易くなる傾向がある。 From the viewpoint of improving the adhesion with an insulating substrate made of ceramics or the like, the adhesion metal layer is made of titanium (Ti), chromium (Cr), tantalum (Ta), niobium (Nb), nickel-chromium (Ni- It is preferable to be made of at least one kind of metal having a thermal expansion coefficient close to that of ceramics, such as a Cr) alloy and tantalum nitride (Ta 2 N), and the thickness is preferably about 0.01 to 0.2 μm. If the thickness of the adhesion metal layer is less than 0.01 μm, it tends to be difficult to firmly adhere the adhesion metal layer to the insulating substrate. If the thickness exceeds 0.2 μm, the adhesion metal layer is caused by internal stress during film formation. There is a tendency to easily peel from the insulating substrate.

拡散防止層は、密着金属層と主導体層との相互拡散を防ぐという観点からは、白金(Pt)、パラジウム(Pd)、ロジウム(Rh)、ニッケル(Ni)、Ni−Cr合金、Ti−W合金等の熱伝導性の良好な金属のうち少なくとも1種より成ることが好ましく、その厚みは0.05〜1μm程度が好ましい。拡散防止層の厚みが0.05μm未満では、ピンホール等の欠陥が発生して拡散防止層としての機能を果たしにくくなる傾向があり、1μmを超えると、成膜時の内部応力によって拡散防止層が密着金属層から剥離し易く成る傾向がある。なお、拡散防止層にNi−Cr合金を用いる場合は、Ni−Cr合金は絶縁基板との密着性が良好なため、密着金属層を省くことも可能である。   From the viewpoint of preventing mutual diffusion between the adhesion metal layer and the main conductor layer, the diffusion preventing layer is platinum (Pt), palladium (Pd), rhodium (Rh), nickel (Ni), Ni—Cr alloy, Ti— It is preferably made of at least one metal having good thermal conductivity such as W alloy, and its thickness is preferably about 0.05 to 1 μm. If the thickness of the diffusion preventive layer is less than 0.05 μm, defects such as pinholes tend to be generated, making it difficult to function as a diffusion preventive layer. If the thickness exceeds 1 μm, the diffusion preventive layer is caused by internal stress during film formation. Tends to be easily peeled off from the adhesive metal layer. When a Ni—Cr alloy is used for the diffusion preventing layer, the adhesion metal layer can be omitted because the Ni—Cr alloy has good adhesion to the insulating substrate.

主導体層は、電気抵抗の小さい金(Au)、Cu、Ni、銀(Ag)の少なくとも1種より成ることが好ましく、その厚みは0.1〜5μm程度が好ましい。主導体層の厚みが0.1μm未満では、電気抵抗が大きなものとなり搭載基板4の接続導体4aに要求される電気抵抗を満足できなくなる傾向があり、5μmを超えると、成膜時の内部応力によって主導体層が拡散防止層から剥離し易く成る傾向がある。また、Cuは酸化し易いので、その上にNiおよびAuからなる保護層を被覆してもよい。   The main conductor layer is preferably made of at least one of gold (Au), Cu, Ni and silver (Ag) having a low electric resistance, and the thickness is preferably about 0.1 to 5 μm. If the thickness of the main conductor layer is less than 0.1 μm, the electric resistance becomes large, and the electric resistance required for the connection conductor 4a of the mounting substrate 4 tends to be not satisfied. Therefore, the main conductor layer tends to be easily separated from the diffusion preventing layer. Further, since Cu is easily oxidized, a protective layer made of Ni and Au may be coated thereon.

接続導体4aがマイクロストリップ構造とした場合、搭載基板4の絶縁層として比誘電率が9.5のアルミナを用い、厚みを0.2mmとし、幅を0.64mmとすると、特性インピーダンスが25Ωとなる。   When the connection conductor 4a has a microstrip structure, when the alumina having a relative dielectric constant of 9.5 is used as the insulating layer of the mounting substrate 4, the thickness is 0.2 mm, and the width is 0.64 mm, the characteristic impedance is 25Ω. Become.

このようにして作製した搭載基板4を基体1の搭載面1bに接合し、信号リード3と接続導体4aとをろう材5で接続する。   The mounting board 4 thus manufactured is joined to the mounting surface 1 b of the base 1, and the signal lead 3 and the connection conductor 4 a are connected by the brazing material 5.

電子部品6を搭載基板4に搭載し、基体1に蓋体8を接合することによって、電子部品搭載用パッケージ10に電子部品6が搭載された電子装置11が得られる。   An electronic device 11 in which the electronic component 6 is mounted on the electronic component mounting package 10 is obtained by mounting the electronic component 6 on the mounting substrate 4 and joining the lid 8 to the base 1.

搭載する電子部品6としては、LD(レーザーダイオード)やPD(フォトダイオ−ド)等の光半導体素子、半導体集積回路素子を含む半導体素子、水晶振動子や弾性表面波素子等の圧電素子、圧力センサー素子、容量素子、抵抗器等が挙げられる。   Electronic components 6 to be mounted include optical semiconductor elements such as LD (laser diode) and PD (photodiode), semiconductor elements including semiconductor integrated circuit elements, piezoelectric elements such as crystal resonators and surface acoustic wave elements, pressure A sensor element, a capacitive element, a resistor, etc. are mentioned.

電子部品6の搭載基板4への搭載、あるいは搭載基板4の電子部品搭載用パッケージ10への搭載は、ろう材や導電性樹脂等の導電性の接合材によって固定することによって行なえばよい。たとえば、搭載基板4を基体1上に搭載した後に電子部品6を搭載基板4上に搭載する場合は、搭載基板4の固定には金−錫(Au−Sn)合金や金−ゲルマニウム(Au−Ge)合金のろう材を接合材として用い、電子部品6の固定には、これらよりも融点の低い錫−銀(Sn−Ag)合金や錫−銀−銅(Sn−Ag−Cu)合金のろう材や、融点よりも低い温度で硬化可能な、Agエポキシ等の樹脂製の接着剤を接合材として用いればよい。また、電子部品6を搭載基板4に搭載した後に搭載基板4を基体1上に搭載してもよく、その場合は上記とは逆に、搭載基板4を基体1上に搭載する際に用いる接合材の融点の方を低くすればよい。いずれの場合であっても、搭載基板4や基体1の搭載面1bに接合材のペーストを周知のスクリーン印刷法を用いて印刷したり、フォトリソグラフィ法によって接合材層を形成したり、接合材となる低融点ろう材のプリフォームを載置するなどすればよい。   The electronic component 6 may be mounted on the mounting substrate 4 or the mounting substrate 4 may be mounted on the electronic component mounting package 10 by being fixed with a conductive bonding material such as a brazing material or a conductive resin. For example, when the electronic component 6 is mounted on the mounting substrate 4 after mounting the mounting substrate 4 on the base body 1, a gold-tin (Au—Sn) alloy or gold-germanium (Au—) is used to fix the mounting substrate 4. A brazing material of Ge) alloy is used as a bonding material, and for fixing the electronic component 6, a tin-silver (Sn-Ag) alloy or a tin-silver-copper (Sn-Ag-Cu) alloy having a melting point lower than these is used. A brazing material or a resin adhesive such as Ag epoxy that can be cured at a temperature lower than the melting point may be used as the bonding material. Further, after mounting the electronic component 6 on the mounting substrate 4, the mounting substrate 4 may be mounted on the base 1, and in this case, contrary to the above, bonding used when mounting the mounting substrate 4 on the base 1 is performed. The melting point of the material may be lowered. In any case, a paste of a bonding material is printed on the mounting substrate 4 or the mounting surface 1b of the base body 1 using a known screen printing method, a bonding material layer is formed by a photolithography method, For example, a preform of a low melting point brazing material may be placed.

図3は、本発明の実施形態である通信用モジュール100の構成を示す断面図である。
通信用モジュール100は、回路基板20に電子装置11が実装されて得られる。回路基板20は、たとえばフレキシブルプリント基板(FPC)などで実現され、誘電体層21、接地導体層22、貫通導体23および信号配線層24を有する。誘電体層21は、板状の誘電性材料からなる。誘電性材料としては、有機樹脂材料、セラミックス材料、樹脂とセラミックスとの混合材料などを用いることができる。有機樹脂材料としては、たとえば、エポキシ樹脂およびポリイミド樹脂などを用いることができる。セラミックス材料としては、アルミナなどの金属酸化物、窒化ケイ素などの窒化物、炭化ケイ素などの炭化物、およびガラス材料などを用いることができる。
FIG. 3 is a cross-sectional view showing a configuration of the communication module 100 according to the embodiment of the present invention.
The communication module 100 is obtained by mounting the electronic device 11 on the circuit board 20. The circuit board 20 is realized by, for example, a flexible printed circuit board (FPC) and has a dielectric layer 21, a ground conductor layer 22, a through conductor 23, and a signal wiring layer 24. The dielectric layer 21 is made of a plate-like dielectric material. As the dielectric material, an organic resin material, a ceramic material, a mixed material of resin and ceramics, or the like can be used. As the organic resin material, for example, an epoxy resin and a polyimide resin can be used. As the ceramic material, a metal oxide such as alumina, a nitride such as silicon nitride, a carbide such as silicon carbide, and a glass material can be used.

貫通導体23は、誘電体層21の一方面から他方面まで貫通し、電子部品搭載用パッケージ10の信号リード3を挿通するための挿通孔23aが設けられる。貫通導体23は、誘電体層21の一方面上に設けられる、円環形状の表面導体23bと、誘電体層21に内挿され、中心に挿通孔23aを有する内挿導体23cと、誘電体層21の他方面上に設けられる、円環形状の裏面導体23dとからなる。挿通孔23aは、信号リード3の直径とほぼ同じ大きさの孔径を有し、実装時には、一方面側から他方面側に信号リード3が挿通される。信号リード3は、予め定める長さだけ挿通孔23aに挿通される。このとき、その先端が裏面導体23dよりも突出するように挿通され、突出した先端と裏面導体23dとが、はんだなどの導電性接続材によって接続されるとともに、信号リード3が貫通導体23に対して固定される。   The through conductor 23 penetrates from one surface of the dielectric layer 21 to the other surface, and is provided with an insertion hole 23 a for inserting the signal lead 3 of the electronic component mounting package 10. The through conductor 23 is provided on one surface of the dielectric layer 21, an annular surface conductor 23 b, an insertion conductor 23 c inserted in the dielectric layer 21 and having an insertion hole 23 a in the center, and a dielectric It consists of an annular back conductor 23d provided on the other surface of the layer 21. The insertion hole 23a has a hole diameter substantially the same as the diameter of the signal lead 3, and the signal lead 3 is inserted from one side to the other side during mounting. The signal lead 3 is inserted through the insertion hole 23a by a predetermined length. At this time, the tip is inserted so as to protrude from the back conductor 23d, the protruding tip and the back conductor 23d are connected by a conductive connecting material such as solder, and the signal lead 3 is connected to the through conductor 23. Fixed.

接地導体層22は、このようにして電子装置11が実装された状態で、少なくとも基体1の薄層部1cと誘電体層21とが対向する領域に設けられる。図示していないが、電子部品搭載用パッケージ10の接地リード7は、信号リード3と同様に回路基板20を厚み方向に貫通し、固定される。そして、固定された状態で、接地導体層22と電気的に接続される。   The ground conductor layer 22 is provided at least in a region where the thin layer portion 1c of the substrate 1 and the dielectric layer 21 face each other in a state where the electronic device 11 is mounted in this manner. Although not shown, the ground lead 7 of the electronic component mounting package 10 penetrates the circuit board 20 in the thickness direction and is fixed similarly to the signal lead 3. And it is electrically connected to the ground conductor layer 22 in a fixed state.

信号配線層24は、誘電体層21の他方面に設けられ、裏面導体23dと接続することで、貫通導体23と電気的に導通される。したがって、実装時には、信号配線層24と信号リード3とは、貫通導体23を介して電気的に接続され、高周波信号は、信号配線層24と信号リード3とを伝送することができる。   The signal wiring layer 24 is provided on the other surface of the dielectric layer 21 and is electrically connected to the through conductor 23 by being connected to the back conductor 23d. Therefore, at the time of mounting, the signal wiring layer 24 and the signal lead 3 are electrically connected via the through conductor 23, and a high-frequency signal can be transmitted between the signal wiring layer 24 and the signal lead 3.

上記のように、回路基板20に電子装置11が実装された状態で、接地導体層22と基体1の薄層部1cとの間隔G1、具体的には接地導体層22の表面と、薄層部1cの表面である薄層裏面1fとの距離が、信号リード3を伝送する高周波信号の波長の1/8以上となっている。   As described above, with the electronic device 11 mounted on the circuit board 20, the gap G1 between the ground conductor layer 22 and the thin layer portion 1c of the base 1, specifically, the surface of the ground conductor layer 22, and the thin layer The distance from the thin layer back surface 1 f which is the surface of the portion 1 c is 1/8 or more of the wavelength of the high frequency signal transmitted through the signal lead 3.

接地導体層22と基体1の薄層部1cとの間隔G1が、高周波信号の波長の1/8未満である、すなわち、接地導体層22と基体1の薄層部1cとが近づき過ぎると共振が生じてしまい、伝送する高周波信号の高周波特性が低下する。接地導体層22と基体1の薄層部1cとの間隔G1を上記の如く十分に広げることで不要な共振の発生を抑制することができる。   The distance G1 between the ground conductor layer 22 and the thin layer portion 1c of the base body 1 is less than 1/8 of the wavelength of the high-frequency signal, that is, if the ground conductor layer 22 and the thin layer portion 1c of the base body 1 are too close to each other, resonance occurs. Occurs, and the high-frequency characteristics of the transmitted high-frequency signal deteriorate. The occurrence of unnecessary resonance can be suppressed by sufficiently widening the gap G1 between the ground conductor layer 22 and the thin layer portion 1c of the base 1 as described above.

さらに、誘電体2と貫通導体23との間隔G2、具体的には、筒状の誘電体2の底面と貫通導体23の表面導体23bとの距離が、信号リード3を伝送する高周波信号の波長の1/16以下となっている。   Further, the distance G2 between the dielectric 2 and the through conductor 23, specifically, the distance between the bottom surface of the cylindrical dielectric 2 and the surface conductor 23b of the through conductor 23 is the wavelength of the high frequency signal transmitted through the signal lead 3. 1/16 or less.

この間隔G2は、信号リード3が露出している部分の長さに相当する。信号リード3の露出部分が長いほど不要なインダクタンス成分が大きくなるので、間隔G2を上記の如く十分に狭めることで、不要なインダクタンス成分を小さくすることができる。   This interval G2 corresponds to the length of the portion where the signal lead 3 is exposed. The longer the exposed portion of the signal lead 3, the larger the unnecessary inductance component. Therefore, the unnecessary inductance component can be reduced by sufficiently narrowing the gap G2 as described above.

また電子部品搭載用パッケージ10を、蓋体8側から平面視したとき、基体1の厚層部1dと、接地導体層22とは重複する部分があり、この重複部分によっても共振が発生する。重複部分による不要な共振の発生を抑制するためには、重複部分の長さのうち最も長いものが、信号リード3を伝送する高周波信号の波長の1/8以下とすればよい。   Further, when the electronic component mounting package 10 is viewed from the lid 8 side, the thick layer portion 1d of the base 1 and the ground conductor layer 22 overlap each other, and resonance also occurs due to this overlapping portion. In order to suppress the occurrence of unnecessary resonance due to the overlapping portion, the longest length of the overlapping portion may be set to 1/8 or less of the wavelength of the high-frequency signal transmitted through the signal lead 3.

本実施形態では、薄層部1cと厚層部1dとの間の段差は、信号リード3および接地リード7が配列する方向に平行な直線状に設けられている。このとき、重複部分において、直線状の段差に対して直交する方向の長さG3を、信号リード3を伝送する高周波信号の波長の1/8以下とする。   In the present embodiment, the step between the thin layer portion 1c and the thick layer portion 1d is provided in a straight line parallel to the direction in which the signal lead 3 and the ground lead 7 are arranged. At this time, in the overlapping portion, the length G3 in the direction orthogonal to the linear step is set to 1/8 or less of the wavelength of the high-frequency signal transmitted through the signal lead 3.

図4は、本発明の他の実施形態である電子部品搭載用パッケージ12の構成を示す断面図である。なお、本実施形態は、接地リード7に設けられた間隔規定部9をすることのみが上記の実施形態と異なる構成であるので、上記の実施形態である電子部品搭載用パッケージ10と同じ構成については、同じ参照符号を付して説明は省略する。   FIG. 4 is a cross-sectional view showing a configuration of an electronic component mounting package 12 according to another embodiment of the present invention. Note that this embodiment is different from the above-described embodiment only in that the gap defining portion 9 provided on the ground lead 7 is different from the above-described embodiment, and therefore the same configuration as the electronic component mounting package 10 according to the above-described embodiment. Are denoted by the same reference numerals and description thereof is omitted.

上記のように、間隔G1および間隔G2を所望の間隔とすることで、高周波特性を向上させることができるが、これらの間隔は、実装時の信号リード3および接地リード7の回路基板20への挿通深さによって決まる。実装工程では、冶具を用いた手作業または実装装置により、各リードを挿通させるが、手作業では挿通深さの精度が十分に得られず、実装装置では、各リードの挿通深さを検出する検出機構などが必要となる。   As described above, the high frequency characteristics can be improved by setting the gap G1 and the gap G2 to desired distances. However, these gaps are determined when the signal leads 3 and the ground leads 7 are mounted on the circuit board 20 during mounting. It depends on the insertion depth. In the mounting process, each lead is inserted by manual operation using a jig or a mounting device, but the accuracy of the insertion depth cannot be obtained sufficiently by manual operation, and the mounting device detects the insertion depth of each lead. A detection mechanism is required.

本実施形態では、接地リード7に間隔規定部9を設けている。間隔規定部9は、接地リード7の外方に突出する突起部からなる。接地リード7に間隔規定部9が設けられていると、電子部品搭載用パッケージ12の接地リード7を挿通するときに、間隔規定部9の突起部が回路基板20の表面に接触した時点で、それ以上は電子部品搭載用パッケージ12を挿通することができなくなる。挿通することができなくなった状態で、間隔G1および間隔G2が、上記のような適切な範囲となるように、間隔規定部9の接地リード7における位置を設定しておけば、挿通できなくなるまで挿通するという単純な作業で、高精度に間隔G1および間隔G2を達成できる。   In the present embodiment, an interval defining portion 9 is provided on the ground lead 7. The space defining portion 9 is formed by a protruding portion that protrudes outward from the ground lead 7. When the space defining portion 9 is provided on the ground lead 7, when the protruding portion of the space defining portion 9 contacts the surface of the circuit board 20 when the ground lead 7 of the electronic component mounting package 12 is inserted, The electronic component mounting package 12 cannot be inserted any further. If the position of the gap defining portion 9 on the ground lead 7 is set so that the gap G1 and the gap G2 are in the appropriate ranges as described above in a state where the gap cannot be inserted, until the gap G1 and the gap G2 are not inserted. The interval G1 and the interval G2 can be achieved with high accuracy by a simple operation of insertion.

図5は、通信モジュール100を回路基板20の裏面側からみた平面図である。
図5に示すように、2本の信号リード3と1本の接地リード7とは、基体1の主面に平行な方向、すなわち紙面に平行な方向に、一直線状に設けられ、2本の信号リード3の中間に1本の接地リード7が位置するように設けられる。
FIG. 5 is a plan view of the communication module 100 as seen from the back side of the circuit board 20.
As shown in FIG. 5, two signal leads 3 and one ground lead 7 are provided in a straight line in a direction parallel to the main surface of the substrate 1, that is, a direction parallel to the paper surface. One ground lead 7 is provided in the middle of the signal lead 3.

ここで、接地導体層22は、誘電体層21に一方面に広く形成されているのではなく、少なくとも電子装置11の近傍においては、信号リード3と接地リード7の配列方向に直交する方向に延びる矩形状部分を有している。そして、この矩形状部分の幅方向端部と接地リード7の中心との距離D1が、信号リード3を伝送する高周波信号の波長の1/4以下に設定される。すなわち、矩形状部分の幅寸法は2×D1に設定される。   Here, the ground conductor layer 22 is not widely formed on one surface of the dielectric layer 21, but at least in the vicinity of the electronic device 11 in a direction orthogonal to the arrangement direction of the signal leads 3 and the ground leads 7. It has a rectangular portion that extends. The distance D1 between the widthwise end of the rectangular portion and the center of the ground lead 7 is set to ¼ or less of the wavelength of the high-frequency signal transmitted through the signal lead 3. That is, the width dimension of the rectangular portion is set to 2 × D1.

接地導体層22の矩形状部分において、このような幅寸法とすることにより、幅方向における共振の発生を抑制することができる。   By setting such a width dimension in the rectangular portion of the ground conductor layer 22, the occurrence of resonance in the width direction can be suppressed.

さらに、矩形状部分の延伸方向端部のうち、電子装置11側の端部と接地リード7の中心との距離D2も、信号リード3を伝送する高周波信号の波長の1/4以下に設定される。これにより、接地導体層22の矩形状部分において、延伸方向における共振の発生を抑制することができる。   Further, the distance D2 between the end of the rectangular portion in the extending direction and the center of the ground lead 7 is also set to 1/4 or less of the wavelength of the high-frequency signal transmitted through the signal lead 3. The Thereby, the occurrence of resonance in the extending direction can be suppressed in the rectangular portion of the ground conductor layer 22.

上記の実施形態では、基体1において、薄層部1cと厚層部1dとの間の段差が、信号リード3および接地リード7が配列する方向に平行な直線状に設けられている構成としている。しかしながら、薄層部1cは、既に示したように接地導体層22との間隔G1を十分に広げるために設けるものであるので、基体1において段差が直線状となる構成には限定されない。   In the above embodiment, the base 1 is configured such that the step between the thin layer portion 1c and the thick layer portion 1d is provided in a straight line parallel to the direction in which the signal lead 3 and the ground lead 7 are arranged. . However, since the thin layer portion 1c is provided in order to sufficiently widen the gap G1 with the ground conductor layer 22 as already described, the thin layer portion 1c is not limited to the configuration in which the step is linear in the base body 1.

図6は、電子部品搭載用パッケージ10における基体1の他の態様を示す斜視図である。図6(a)に示すように、他の態様としては、薄層部1cと厚層部1dとを同心円板状に設けており、薄層部1cが厚層部1dよりも外側に位置するように構成している。厚層部1dは、少なくとも信号リード3、接地リード7および誘電体2の配置位置を含む領域に設けられる。   FIG. 6 is a perspective view showing another aspect of the substrate 1 in the electronic component mounting package 10. As shown in FIG. 6A, as another aspect, the thin layer portion 1c and the thick layer portion 1d are provided in a concentric disk shape, and the thin layer portion 1c is positioned outside the thick layer portion 1d. It is configured as follows. The thick layer portion 1d is provided in a region including at least the position where the signal lead 3, the ground lead 7, and the dielectric 2 are arranged.

図6(b)に示すように、さらに他の態様としては、厚層部1dが、直方体と直方体の長手方向両端部に接続される半円板とから構成される。厚層部1dを構成する直方体は、長辺が2本の信号リード3の間隔と同じであり、短辺が誘電体2の直径よりやや長く形成される。半円板は、直径が直方体の短辺と同じ長さであり、直径と短辺とが一致するように設けられる。   As shown in FIG. 6B, as yet another aspect, the thick layer portion 1d is configured by a rectangular parallelepiped and semicircular plates connected to both ends in the longitudinal direction of the rectangular parallelepiped. The rectangular parallelepiped that forms the thick layer portion 1 d has a long side that is the same as the interval between the two signal leads 3 and a short side that is slightly longer than the diameter of the dielectric 2. The semicircular disk has the same diameter as the short side of the rectangular parallelepiped, and is provided so that the diameter and the short side coincide.

厚層部1dと接地導体層22との間で不要な共振が生じるので、図6に示す態様のように、薄層部1cがなるべく大きくなるように基体1を構成するほうが好ましい。   Since unnecessary resonance occurs between the thick layer portion 1d and the ground conductor layer 22, it is preferable to configure the base 1 so that the thin layer portion 1c is as large as possible, as shown in FIG.

さらに、上記では、いわゆるステム型の電子部品搭載用パッケージについて説明したが、これに限らず、いわゆる箱型の電子部品搭載用パッケージであってもよい。   Furthermore, in the above description, a so-called stem-type electronic component mounting package has been described. However, the present invention is not limited to this, and a so-called box-type electronic component mounting package may be used.

図7は、本発明のさらに他の実施形態である箱型の電子部品搭載用パッケージ30の構成を示す図である。図7(a)は斜視図であり、図7(b)は図7(a)の切断面線A−Aで切断したときの断面図であり、図7(c)は平面図である。   FIG. 7 is a diagram showing a configuration of a box-type electronic component mounting package 30 according to still another embodiment of the present invention. Fig.7 (a) is a perspective view, FIG.7 (b) is sectional drawing when cut | disconnecting by the cutting surface line AA of Fig.7 (a), FIG.7 (c) is a top view.

ステム型と箱型の違いは、信号リード3が1本であり、信号リード3を挟んで2本の接地リード7が一直線状に設けられていること、基体1の形状が円板状ではなく、矩形板状であることであるので、上記の実施形態である電子部品搭載用パッケージ10と同じ構成については、同じ参照符号を付して説明は省略する。   The difference between the stem type and the box type is that there is one signal lead 3 and two grounding leads 7 are provided in a straight line across the signal lead 3, and the shape of the substrate 1 is not a disc shape. Since it has a rectangular plate shape, the same reference numerals are assigned to the same components as those of the electronic component mounting package 10 according to the above embodiment, and the description thereof is omitted.

一般的に、ステム型は小型化に有利であり、箱型は放熱性に優れる。また、本実施形態の電子部品搭載用パッケージ30のように、信号リード3が2本の接地リード7に挟まれるように配置されると、信号リード3に対する接地電位が安定するので、信号リード3がより周波数の高い信号を伝送することができる。   In general, the stem type is advantageous for downsizing, and the box type is excellent in heat dissipation. Further, when the signal lead 3 is disposed so as to be sandwiched between the two ground leads 7 as in the electronic component mounting package 30 of the present embodiment, the ground potential with respect to the signal lead 3 is stabilized. Can transmit a signal having a higher frequency.

本実施形態の電子部品搭載用パッケージ30は、1つの面が開放された箱型筐体31の内部空間に半導体素子6を収納する。箱型筐体31は、開放面の反対側にある底板31a、および底板31aの4辺から底板31aに対して垂直に起立する側壁31bから構成される。側壁31bのうちの1つの側壁が基体1となる。基体1には、貫通孔1aが設けられ、貫通孔1aの中心に信号リード3が挿通さえる。誘電体2は、信号リード3と貫通孔1aの内周面との間に設けられる。   The electronic component mounting package 30 of this embodiment stores the semiconductor element 6 in the internal space of a box-shaped housing 31 having one surface open. The box-shaped housing 31 includes a bottom plate 31a on the opposite side of the open surface, and a side wall 31b that stands upright from the four sides of the bottom plate 31a with respect to the bottom plate 31a. One of the side walls 31b is the base body 1. The base 1 is provided with a through hole 1a, and the signal lead 3 can be inserted into the center of the through hole 1a. The dielectric 2 is provided between the signal lead 3 and the inner peripheral surface of the through hole 1a.

側壁の1つである基体1は、薄層部1cと厚層部1dとを有し、接地リード7は、信号リード3と同様に基体1の厚層部1dに設けられる。信号リード3は、接続導体4aとろう材5によって電気的に接続される。   The base body 1, which is one of the side walls, has a thin layer portion 1 c and a thick layer portion 1 d, and the ground lead 7 is provided on the thick layer portion 1 d of the base body 1 like the signal lead 3. The signal lead 3 is electrically connected to the connecting conductor 4 a and the brazing material 5.

電子部品搭載用パッケージ10,12と同様に、薄層部1cを有するので、電子部品搭載用パッケージ30を回路基板20に実装した場合に、誘電体層21の表面に設けられた接地導体層22との間隔を十分広くするために設けられる。これによって、上記の実施形態と同様に不要な共振の発生を抑制することができる。   Similar to the electronic component mounting packages 10 and 12, the thin layer portion 1 c is provided. Therefore, when the electronic component mounting package 30 is mounted on the circuit board 20, the ground conductor layer 22 provided on the surface of the dielectric layer 21. Is provided in order to sufficiently widen the interval. As a result, generation of unnecessary resonance can be suppressed as in the above embodiment.

図8は、電子部品搭載用パッケージ30における基体1の他の態様を示す斜視図である。図8(a)に示すように、他の態様としては、矩形板状の薄層部1cに対して円板状の厚層部1dを重ね合わせるように設けられ、薄層部1cが厚層部1dよりも外側に位置するように構成している。厚層部1dは、少なくとも信号リード3、接地リード7および誘電体2の配置位置を含む領域に設けられる。図8(b)に示すように、さらに他の態様としては、薄層部1c矩形板状に形成され、厚層部1dが、直方体と直方体の長手方向両端部に接続される半円板とから構成される。   FIG. 8 is a perspective view showing another aspect of the base body 1 in the electronic component mounting package 30. As shown in FIG. 8 (a), as another aspect, a rectangular plate-like thin layer portion 1c is provided so as to overlap a disk-like thick layer portion 1d, and the thin layer portion 1c is a thick layer. It is comprised so that it may be located outside the part 1d. The thick layer portion 1d is provided in a region including at least the position where the signal lead 3, the ground lead 7, and the dielectric 2 are arranged. As shown in FIG. 8 (b), as yet another aspect, the thin layer portion 1c is formed in a rectangular plate shape, and the thick layer portion 1d is connected to the rectangular parallelepiped and the longitudinal ends of the rectangular parallelepiped. Consists of

厚層部1dと接地導体層22との間で不要な共振が生じるので、図8に示す態様のように、薄層部1cがなるべく大きくなるように基体1を構成するほうが好ましい。   Since unnecessary resonance occurs between the thick layer portion 1d and the ground conductor layer 22, it is preferable to configure the base 1 so that the thin layer portion 1c is as large as possible, as shown in FIG.

箱型の電子部品搭載用パッケージ30においても、ステム型の電子部品搭載用パッケージ10と同様に、電子部品6を搭載した電子装置として回路基板20に実装し、通信モジュールを構成する。1本の信号リード3と2本の接地リード7は一直線状に設けられ、回路基板20の挿通孔に挿通されて実装される。回路基板20に設けられる接地導体層22は、ステム型の電子部品搭載用パッケージ10を実装する場合と同様に、不要な共振の発生を抑制するために、信号リード3と接地リード7の配列方向に直交する方向に延びる矩形状部分を有し、その幅方向端部と接地リード7の中心との距離D1が、信号リード3を伝送する高周波信号の波長の1/4以下に設定される。さらに、矩形状部分の延伸方向端部のうち、電子装置が実装されている側の端部と接地リード7の中心との距離D2も、信号リード3を伝送する高周波信号の波長の1/4以下に設定される。   Similarly to the stem-type electronic component mounting package 10, the box-type electronic component mounting package 30 is mounted on the circuit board 20 as an electronic device on which the electronic component 6 is mounted, and constitutes a communication module. One signal lead 3 and two ground leads 7 are provided in a straight line, and are inserted through an insertion hole of the circuit board 20 and mounted. The ground conductor layer 22 provided on the circuit board 20 is arranged in the direction in which the signal leads 3 and the ground leads 7 are arranged in order to suppress unnecessary resonance, as in the case of mounting the stem-type electronic component mounting package 10. The distance D1 between the width direction end and the center of the ground lead 7 is set to ¼ or less of the wavelength of the high-frequency signal transmitted through the signal lead 3. Further, the distance D2 between the end of the rectangular portion in the extending direction and the center of the ground lead 7 on the side where the electronic device is mounted is also ¼ of the wavelength of the high-frequency signal transmitted through the signal lead 3. Set to:

また、電子部品搭載用パッケージ30をFPCに実装し、FPCを回路基板と接続させて通信モジュールを構成してもよい。箱型の電子部品搭載用パッケージ30の場合、FPCの端部に実装し、FPCを略90度に折り曲げて、電子部品搭載用パッケージ30が実装されていない側の端部を回路基板に接続する。これにより、電子部品搭載用パッケージ30の底板31aが回路基板20と平行になり、底板31aを筐体などに接合して底板31aからの伝熱による冷却効率を向上させることができる。   Alternatively, the electronic module mounting package 30 may be mounted on an FPC, and the FPC may be connected to a circuit board to constitute a communication module. In the case of the box-type electronic component mounting package 30, it is mounted on the end portion of the FPC, the FPC is bent at approximately 90 degrees, and the end portion on the side where the electronic component mounting package 30 is not mounted is connected to the circuit board. . As a result, the bottom plate 31a of the electronic component mounting package 30 is parallel to the circuit board 20, and the bottom plate 31a can be joined to a housing or the like to improve the cooling efficiency by heat transfer from the bottom plate 31a.

上記では、信号リード3と接地リード7について、信号リード3の本数および接地リード7の本数は、1本または2本に限定されず、3本以上であってもよい。また、1本の信号リード3を挟んで2本の接地リードを設ける構成が好ましい。たとえば、差動信号の伝送などに適用するためには、信号リード3を少なくとも2本設ける必要がある。サイズが予め決まっている場合は、電子部品搭載用パッケージ10のように、1本の接地リード7を挟んで2本の信号リード3を設ける構成が好ましいが、より好ましくは、3本の接地リード7の間に2本の信号リード3を設け、信号リード3が2本の接地リード7に挟まれるような構成である。   In the above, regarding the signal leads 3 and the ground leads 7, the number of signal leads 3 and the number of ground leads 7 are not limited to one or two, and may be three or more. Further, it is preferable that two ground leads are provided with one signal lead 3 interposed therebetween. For example, it is necessary to provide at least two signal leads 3 in order to apply to transmission of differential signals. When the size is determined in advance, it is preferable to provide two signal leads 3 with one ground lead 7 interposed therebetween as in the electronic component mounting package 10, but more preferably, three ground leads. Two signal leads 3 are provided between the two signal leads 3, and the signal leads 3 are sandwiched between the two ground leads 7.

1 基体
1a 貫通孔
1c 薄層部
1d 厚層部
2 誘電体
3 信号リード
4 搭載基板
4a 接続導体
6 電子部品
7 接地リード
8 蓋体
9 間隔規定部
10,12 電子部品搭載用パッケージ
11 電子装置
12 電子部品搭載用パッケージ
20 回路基板
21 誘電体層
22 接地導体層
23 貫通導体
23a 挿通孔
24 信号配線層
100 通信用モジュール
DESCRIPTION OF SYMBOLS 1 Base | substrate 1a Through-hole 1c Thin layer part 1d Thick layer part 2 Dielectric body 3 Signal lead 4 Mounting board 4a Connection conductor 6 Electronic component 7 Grounding lead 8 Lid 9 Spacing part 10, 12 Electronic component mounting package 11 Electronic device 12 Electronic component mounting package 20 Circuit board 21 Dielectric layer 22 Ground conductor layer 23 Through conductor 23a Insertion hole 24 Signal wiring layer 100 Communication module

Claims (4)

金属板状部材からなり、厚み方向に貫通する貫通孔が設けられた基体であって、一方主面に電子部品が搭載され、前記一方主面を基準とする厚みが他の部分に比べて薄い薄層部を有する基体と、
前記貫通孔の中心部に挿通され、前記基体の主面に対して直交する方向に延びる信号線路導体と、
前記信号線路導体と前記貫通孔の内周面との間に設けられる誘電体と、
前記基体の一方主面側に設けられ、前記電子部品と前記信号線路導体とを接続する接続導体と、
前記基体の他方主面側に設けられ、前記信号線路導体と平行に延びる接地導体と、を備えることを特徴とする電子部品搭載用パッケージ。
A substrate made of a metal plate-like member and provided with a through-hole penetrating in the thickness direction. An electronic component is mounted on one main surface, and the thickness with respect to the one main surface is thinner than other portions. A substrate having a thin layer portion;
A signal line conductor inserted in the center of the through hole and extending in a direction perpendicular to the main surface of the base body;
A dielectric provided between the signal line conductor and the inner peripheral surface of the through hole;
A connection conductor provided on one main surface side of the base, and connecting the electronic component and the signal line conductor;
An electronic component mounting package comprising: a ground conductor provided on the other main surface side of the base body and extending in parallel with the signal line conductor.
請求項1記載の電子部品搭載用パッケージと、前記電子部品搭載用パッケージに搭載された電子部品と、回路基板とを有する通信用モジュールであって、
前記回路基板は、
誘電体層と、
前記誘電体層の一方面に設けられる接地導体層と、
前記誘電体層の一方面から他方面まで貫通し、前記電子部品搭載用パッケージの前記信号線路導体を挿通するための挿通孔が設けられた貫通導体と、
前記誘電体層の他方面に設けられ、前記貫通導体と接続される信号配線層とを有し、
前記信号線路導体が、前記貫通導体の前記挿通孔に挿通されて、前記電子部品搭載用パッケージが前記回路基板に実装された状態で、前記接地導体層は、前記基体の薄層部と前記誘電体層とが対向する領域に設けられ、
前記接地導体層と前記基体の薄層部との間隔が、前記信号線路導体を伝送する高周波信号の波長の1/8以上となるように、前記電子部品搭載用パッケージが前記回路基板に実装されることを特徴とする通信用モジュール。
A communication module comprising: the electronic component mounting package according to claim 1; an electronic component mounted on the electronic component mounting package; and a circuit board.
The circuit board is
A dielectric layer;
A grounding conductor layer provided on one surface of the dielectric layer;
A penetrating conductor that penetrates from one surface of the dielectric layer to the other surface and is provided with an insertion hole for inserting the signal line conductor of the electronic component mounting package;
A signal wiring layer provided on the other surface of the dielectric layer and connected to the through conductor;
In a state where the signal line conductor is inserted into the insertion hole of the through conductor and the electronic component mounting package is mounted on the circuit board, the ground conductor layer includes the thin layer portion of the base and the dielectric Provided in the region facing the body layer,
The electronic component mounting package is mounted on the circuit board so that an interval between the ground conductor layer and the thin layer portion of the base is 1/8 or more of a wavelength of a high-frequency signal transmitted through the signal line conductor. A communication module characterized by that.
前記誘電体と前記貫通導体との間隔が、前記信号線路導体を伝送する高周波信号の波長の1/16以下となるように、前記電子部品搭載用パッケージが前記回路基板に実装されることを特徴とする請求項2記載の通信用モジュール。   The electronic component mounting package is mounted on the circuit board so that a distance between the dielectric and the through conductor is 1/16 or less of a wavelength of a high-frequency signal transmitted through the signal line conductor. The communication module according to claim 2. 前記電子部品搭載用パッケージは、1または複数の前記線路導体と1または複数の接地導体とを有し、
前記信号線路導体と前記接地導体とは、前記基体の主面に平行な方向に、一直線状に位置するように設けられ、
前記回路基板は、前記接地導体層が、前記信号線路導体および前記接地導体の配列方向に直交する方向に延びて設けられ、前記接地導体層の幅方向端部と前記接地導体の中心との距離が、前記信号線路導体を伝送する高周波信号の波長の1/4以下であることを特徴とする請求項2または3記載の通信用モジュール。
The electronic component mounting package has one or more line conductors and one or more ground conductors,
The signal line conductor and the ground conductor are provided so as to be positioned in a straight line in a direction parallel to the main surface of the base body,
The circuit board is provided with the ground conductor layer extending in a direction perpendicular to the arrangement direction of the signal line conductor and the ground conductor, and a distance between a width direction end of the ground conductor layer and the center of the ground conductor. 4. The communication module according to claim 2, wherein is not more than ¼ of a wavelength of a high-frequency signal transmitted through the signal line conductor. 5.
JP2010208613A 2010-09-16 2010-09-16 Electronic component mounting package and communication module Expired - Fee Related JP5616178B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2010208613A JP5616178B2 (en) 2010-09-16 2010-09-16 Electronic component mounting package and communication module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010208613A JP5616178B2 (en) 2010-09-16 2010-09-16 Electronic component mounting package and communication module

Publications (2)

Publication Number Publication Date
JP2012064817A true JP2012064817A (en) 2012-03-29
JP5616178B2 JP5616178B2 (en) 2014-10-29

Family

ID=46060200

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010208613A Expired - Fee Related JP5616178B2 (en) 2010-09-16 2010-09-16 Electronic component mounting package and communication module

Country Status (1)

Country Link
JP (1) JP5616178B2 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017188269A1 (en) * 2016-04-26 2017-11-02 京セラ株式会社 Semiconductor package and semiconductor device using same
JP2019186379A (en) * 2018-04-10 2019-10-24 日本ルメンタム株式会社 Optical module
DE102013114547B4 (en) 2013-01-18 2020-01-16 Schott Ag TO package
CN110957278A (en) * 2018-09-27 2020-04-03 京瓷株式会社 Electronic component mounting package and electronic device using same
KR20230119203A (en) 2021-01-28 2023-08-16 미쓰비시덴키 가부시키가이샤 semiconductor device
JP7546735B1 (en) 2023-07-31 2024-09-06 Nttイノベーティブデバイス株式会社 Light source device and method for manufacturing the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0964485A (en) * 1995-06-13 1997-03-07 Fuji Electric Co Ltd Semiconductor laser device
JP2005228766A (en) * 2004-02-10 2005-08-25 Opnext Japan Inc Optical transmitter
JP2008211072A (en) * 2007-02-27 2008-09-11 Mitsubishi Electric Corp Optical module

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0964485A (en) * 1995-06-13 1997-03-07 Fuji Electric Co Ltd Semiconductor laser device
JP2005228766A (en) * 2004-02-10 2005-08-25 Opnext Japan Inc Optical transmitter
JP2008211072A (en) * 2007-02-27 2008-09-11 Mitsubishi Electric Corp Optical module

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102013114547B4 (en) 2013-01-18 2020-01-16 Schott Ag TO package
CN109075527B (en) * 2016-04-26 2021-06-29 京瓷株式会社 Semiconductor package and semiconductor device using the same
KR20180123122A (en) * 2016-04-26 2018-11-14 쿄세라 코포레이션 Semiconductor package and semiconductor device using same
CN109075527A (en) * 2016-04-26 2018-12-21 京瓷株式会社 Semiconductor package part and the semiconductor device for using it
JPWO2017188269A1 (en) * 2016-04-26 2019-02-28 京セラ株式会社 Semiconductor package and semiconductor device using the same
WO2017188269A1 (en) * 2016-04-26 2017-11-02 京セラ株式会社 Semiconductor package and semiconductor device using same
KR102164911B1 (en) * 2016-04-26 2020-10-13 교세라 가부시키가이샤 Semiconductor package and semiconductor device using the same
JP2019186379A (en) * 2018-04-10 2019-10-24 日本ルメンタム株式会社 Optical module
CN110957278A (en) * 2018-09-27 2020-04-03 京瓷株式会社 Electronic component mounting package and electronic device using same
CN110957278B (en) * 2018-09-27 2023-09-26 京瓷株式会社 Package for mounting electronic component and electronic device using the same
KR20230119203A (en) 2021-01-28 2023-08-16 미쓰비시덴키 가부시키가이샤 semiconductor device
DE112021006940T5 (en) 2021-01-28 2023-11-16 Mitsubishi Electric Corporation Semiconductor device
JP7546735B1 (en) 2023-07-31 2024-09-06 Nttイノベーティブデバイス株式会社 Light source device and method for manufacturing the same

Also Published As

Publication number Publication date
JP5616178B2 (en) 2014-10-29

Similar Documents

Publication Publication Date Title
JP5473583B2 (en) Electronic component mounting package and electronic device using the same
JP5537673B2 (en) Electronic component mounting package and electronic device using the same
JP5409432B2 (en) Electronic component mounting package and electronic device using the same
JP5616178B2 (en) Electronic component mounting package and communication module
JP2016189431A (en) Package for mounting electronic component and electronic component using the same
JP2010062512A (en) Package for mounting electronic component, and electronic apparatus using the same
US10629505B2 (en) Electronic component mounting package and electronic device using the same
JP4874298B2 (en) Connection structure between signal terminal and signal line conductor, electronic component mounting package and electronic device
JP2009152520A (en) Connection structure between signal terminal and signal line conductor, electronic component mounting package, and electronic apparatus
JP5004824B2 (en) Connection structure between signal terminal and signal line conductor, electronic component mounting package and electronic device
JP5127475B2 (en) Connection board and electronic device
JP6431441B2 (en) Electronic component mounting package and electronic device using the same
JP5312358B2 (en) Electronic component mounting package and electronic device using the same
JP2010245507A (en) Package for mounting electronic component thereon, and electronic device using the same
JP2009054982A (en) Package for mounting electronic component, and electronic equipment using the same
JP5409456B2 (en) Electronic component mounting package and electronic device using the same
JP5361637B2 (en) Electronic component mounting package and electronic device using the same
JP5361609B2 (en) Electronic component mounting package and electronic device
JP5404484B2 (en) Electronic component mounting package and electronic device using the same
JP5705491B2 (en) Electronic component mounting package and electronic device using the same
JP2014146756A (en) Electronic component mounting package and electronic device using the same
JP2011114104A (en) Sub-mount and electronic device using the same
JP2009054750A (en) Package for mounting electronic component, and electronic equipment using the same
JP2012227482A (en) Electronic component mounting package and electronic device using the same
JP2009158520A (en) Connection substrate and electronic device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20130819

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20140520

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20140610

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140731

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20140819

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20140911

R150 Certificate of patent or registration of utility model

Ref document number: 5616178

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees