JP2012015731A - High frequency multistep active circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high frequency multistep active circuit capable of canceling a parasitic capacitance component of a shunt and suppressing degradation in characteristics of a high frequency band.SOLUTION: A high frequency multistep active circuit comprises an inter-step impedance matching circuit 20 including an inter-digital capacitor formed on a dielectric substrate 21 by placing a pair of comb-like conductive electrode patterns less than 1/4 wavelength in length to face each other. A key part of comb-like electrodes 23a and 23b of the inter-digital capacitor is connected to a dielectric stub, and a bias voltage is applied to active devices 10 and 30 through the dielectric stub.

Description

  The present invention relates to a high-frequency multistage active circuit that suppresses parasitic capacitance between ground planes generated in a series capacitor element such as an interdigital capacitor used in a high-frequency band, and suppresses deterioration in passing amount in a high-frequency band due to the parasitic capacitance. Is.

  In a multistage active circuit, the matching circuit between the stages is required to have an impedance matching function, a bias voltage application to the active device in the front and rear stages, and a DC cut function that separates the bias voltage. A series capacitor is used as an element to perform. One means for realizing a series capacitor in a high-frequency band is an interdigital capacitor in which a pair of comb-shaped conductor electrode patterns are opposed to each other on a dielectric substrate (for example, see Non-Patent Document 1).

  The interdigital capacitor will be described with reference to FIG. FIG. 5 is a diagram illustrating a configuration of the interdigital capacitor. The figure (a) shows an upper surface and the figure (b) shows a side surface, respectively. In the following, in each figure, the same reference numerals indicate the same or corresponding parts.

  In FIG. 5, the interdigital capacitor includes a dielectric substrate 21, input / output terminals 22 a and 22 b, comb-shaped electrodes 23 a and 23 b, and a ground plane conductor 24.

  In the interdigital capacitor, a pair of comb-shaped conductor electrode patterns 23a and 23b having a length less than ¼ wavelength are formed on the dielectric substrate 21 so as to face each other. The input / output terminals 22a and 22b receive and input high frequency signals. A ground plane conductor 24 is formed on the back surface of the dielectric substrate 21, and the input / output terminals 22 a and 22 b together with the ground plane conductor 24 constitute a microstrip line. The comb-shaped electrodes 23a and 23b are arranged to face each other and close to each other at a minute distance of about several tens of μm, and a capacitor is formed therebetween, which becomes a series capacitor when viewed from the input / output terminals 22a and 22b. .

B. C. Wadell, “Transmission Line Design Handbook”, Arttech House, 1991

  However, in the above-described interdigital capacitor, a shunt capacitance component is parasitically generated between the comb electrodes 23 a and 23 b and the ground plane conductor 24 in addition to a desired series capacitance component. Since the capacitance component of this shunt exhibits a low-pass and high-frequency cutoff type characteristic, there is a problem that when the interdigital capacitor is applied to a multistage active circuit, the characteristic deterioration occurs in the high-frequency band. .

  The present invention has been made in order to solve the above-described problems, and by connecting an inductance to the shunt with respect to the interdigital capacitor, the parasitic capacitance component of the shunt of the capacitor can be offset. An object of the present invention is to obtain a high-frequency multi-stage active circuit capable of suppressing characteristic deterioration in a frequency band.

  A high-frequency multistage active circuit according to the present invention is a high-frequency multistage active circuit including an interstage impedance matching circuit connected between a front-stage active device and a rear-stage active device, and the interstage impedance matching circuit is provided on a dielectric substrate. An interdigital capacitor composed of a pair of comb-shaped electrodes, and an inductive stub connected to the input / output side of the comb-shaped electrode in the high-frequency signal transmission direction, A bias application terminal for applying a bias voltage to the front-stage active device and the rear-stage active device via the inductive stub is included.

  According to the high-frequency multistage active circuit of the present invention, the parasitic capacitance component of the shunt of the capacitor can be canceled by connecting the inductance to the shunt with respect to the interdigital capacitor, and the characteristic deterioration in the high frequency band is suppressed. can do.

It is a figure which shows the structure of the high frequency multistage active circuit based on Embodiment 1 of this invention. It is a figure which shows the equivalent circuit of the high frequency multistage active circuit which concerns on Embodiment 1 of this invention. It is a figure which shows the frequency characteristic of the gain of the high frequency multistage active circuit which concerns on Embodiment 1 of this invention. It is a figure which shows the structure of the high frequency multistage active circuit based on Embodiment 2 of this invention. It is a figure which shows the structure of an interdigital capacitor.

  Hereinafter, preferred embodiments of the high-frequency multistage active circuit of the present invention will be described with reference to the drawings.

Embodiment 1 FIG.
A high-frequency multistage active circuit according to Embodiment 1 of the present invention will be described with reference to FIGS. 1 is a diagram showing a configuration of a high-frequency multistage active circuit according to Embodiment 1 of the present invention. FIG. 2 is a diagram showing an equivalent circuit of the high-frequency multistage active circuit according to Embodiment 1 of the present invention. FIG. 1 illustrates only the interstage part of the two-stage amplifier.

  1, the high-frequency multistage active circuit according to Embodiment 1 of the present invention includes a front-stage field effect transistor (FET) (front-stage active device) 10, an interstage impedance matching circuit 20, and a rear-stage field effect transistor (FET) ( And a subsequent active device) 30.

  Conductor wires 4a and 4b are connected between the front-stage field effect transistor 10 and the interstage impedance matching circuit 20, and between the interstage impedance matching circuit 20 and the rear-stage field effect transistor 30. An impedance matching circuit is appropriately connected to the input side of the front-stage field effect transistor 10 and the output side of the rear-stage field effect transistor 30 as appropriate.

  The interstage impedance matching circuit 20 includes a dielectric substrate 21 having a ground plane conductor 24 formed on the back surface, input / output terminals 22a and 22b, comb electrodes 23a and 23b constituting an interdigital capacitor, and transistors 10 and 30. Bias application terminals 25a and 25b for applying a bias voltage, microstrip lines 26a and 26b, MIM (Metal-Insulator-Metal) capacitors 27a and 27b, and through holes 28a and 28b, partially omitted (22a- 23a and 22b-23b) is provided.

  Note that the line length d of the microstrip lines 26a and 26b in FIG. 1 is less than a quarter wavelength at the operating frequency of the high-frequency multistage active circuit. The line length d is a distance from the upper end of the metal conductor pattern constituting the microstrip line between the input / output terminal 22a (22b) and the comb electrode 23a (23b) to the center of the MIM capacitor 27a (27b). .

  Next, the operation of the high-frequency multistage active circuit according to the first embodiment will be described with reference to the drawings. FIG. 3 is a diagram showing the frequency characteristics of the gain of the high-frequency multistage active circuit according to Embodiment 1 of the present invention.

  First, in FIG. 1, an electrical ground point is formed by the MIM capacitors 27a and 27b and the through holes 28a and 28b in the operating frequency band of the high-frequency multi-stage active circuit which is a multi-stage amplifier. Thereby, the microstrip lines 26a and 26b function as inductive stubs whose one ends are electrically grounded.

  As described above, the interdigital capacitor including the comb electrodes 23a and 23b has a shunt parasitic capacitance component in addition to the series capacitance component. This interdigital capacitor functions as a component of the impedance matching circuit as a susceptance element, and in addition, due to its DC blocking characteristic, the mutual interference of the bias voltage to each of the front-stage field effect transistor 10 and the rear-stage field effect transistor 30 This also functions as a so-called DC cut element.

  In general, in a multistage amplifier, an interstage DC cut element is indispensable, and in setting the capacitance value, the capacitance value is set to be sufficiently large so that the susceptance is sufficiently large at the operating frequency of the amplifier. As a value, the physical dimension of the capacitor element is kept small, and the capacitor element is used as a DC cut / impedance matching element.

  In the equivalent circuit of FIG. 2, Lp is the inductance of the inductive stub, and Clf is the capacitance of the MIM capacitors 27a and 27b, and the susceptance is sufficiently large at the operating frequency of the multistage amplifier. In FIG. 2, C and Cp represent the series capacitance of the interdigital capacitor and the capacitance component of the shunt, respectively.

  Here, since the capacitance of the shunt is generally a low-pass element, the passing amount of the interdigital capacitor alone decreases as the frequency increases. Therefore, if there is no inductance Lp in FIG. 2 (Lp = ∞), the gain of the multistage amplifier is reduced at the high frequency end by Cp. On the other hand, an inductive stub having an inductance Lp is added as in the first embodiment so that the parallel resonance condition of the following equation (1) is satisfied at the high frequency end fH of the operating frequency of the multistage amplifier. By giving Lp, the current flowing through the capacitance Cp becomes 0 at fH, so that it is possible to suppress the above-described gain deterioration at the high frequency end fH.

(2πfH) ² = 1 / (LpCp) (1)

  FIG. 3 shows the frequency characteristics of the gain of the high-frequency multistage active circuit in the case A of the first embodiment where Lp ≠ ∞ and the value is given by the equation (1) and in the case B where Lp = ∞. It can be seen that the first embodiment can suppress the gain deterioration at the high frequency end.

  In FIG. 1, the bias voltage to the FETs 10 and 30 is applied from the outside of the MIM capacitors 27a and 27b and the through holes 28a and 28b that form an electrical short-circuit point by an inductive stub. This electrical short-circuit point is a point having sufficiently small impedance at the operating frequency of the high-frequency multistage active circuit, so even if a power supply circuit is connected to the outside, the high-frequency characteristics of the circuit are not affected. Therefore, the inductive stub included in the first embodiment also functions as a bias application terminal to the FETs 10 and 30 of the high-frequency multistage active circuit, so that it is not necessary to provide a separate bias circuit.

  In this way, as an interstage impedance matching element and a DC cut element, an interdigital capacitor loaded with an inductive stub is used in the interstage impedance matching circuit of a high-frequency multistage active circuit that is a multistage amplifier, thereby reducing the size of the entire circuit. In addition, the parasitic ground plane capacitance component of the capacitor can be canceled, and the gain reduction in the high frequency band of the multistage amplifier can be suppressed.

Embodiment 2. FIG.
A high-frequency multistage active circuit according to Embodiment 2 of the present invention will be described with reference to FIG. 4 is a diagram showing a configuration of a high-frequency multistage active circuit according to Embodiment 2 of the present invention.

  4, the high-frequency multistage active circuit according to Embodiment 2 of the present invention includes a front-stage field effect transistor (FET) (front-stage active device) 10, an interstage impedance matching circuit 20A, and a rear-stage field effect transistor (FET) ( And a subsequent active device) 30.

  Conductor wires 4a and 4b are connected between the front-stage field effect transistor 10 and the interstage impedance matching circuit 20A, and between the interstage impedance matching circuit 20A and the rear-stage field effect transistor 30. An impedance matching circuit is appropriately connected to the input side of the front-stage field effect transistor 10 and the output side of the rear-stage field effect transistor 30 as appropriate.

  The interstage impedance matching circuit 20A includes a dielectric substrate 21 having a ground plane conductor 24 formed on the back surface, input / output terminals 22a and 22b, comb electrodes 23a and 23b constituting an interdigital capacitor, and transistors 10 and 30. Bias application terminals 25a and 25b for applying a bias voltage, microstrip lines 26a and 26b, MIM (Metal-Insulator-Metal) capacitors 27a and 27b, through holes 28a and 28b, and an input / output terminal 22a-comb A microstrip line is provided between the mold electrodes 23a and between the input / output terminal 22b and the comb-shaped electrode 23b.

  Note that the line length d of the microstrip lines 26a and 26b in FIG. 4 is less than a quarter wavelength at the operating frequency of the high-frequency multistage active circuit. The line length d is a distance from the upper end of the metal conductor pattern constituting the comb electrodes 23a and 23b to the center of the MIM capacitors 27a and 27b.

  Next, the operation of the high-frequency multistage active circuit according to the second embodiment will be described with reference to the drawings.

  Similar to the first embodiment, the interstage impedance matching circuit 20A is the same in that it includes an interdigital capacitor and an inductive stub, but the position where the inductive stub is connected to the interdigital capacitor is the same as in the first embodiment. Different from 1.

  In the first embodiment, the inductive stub is connected to the main part of the comb-shaped electrodes 23a and 23b, that is, the input / output side of the comb-shaped electrodes 23a and 23b in the high-frequency signal transmission direction. On the other hand, in the second embodiment, the corners of the comb electrodes 23a and 23b, that is, the upper side (one side) orthogonal to the transmission direction of the high frequency signal of the comb electrodes 23a and 23b are connected. Yes.

  By adopting such a configuration and giving the inductance Lp of the inductive stub according to the equation (1), while obtaining the effect of suppressing the deterioration of the passing amount in the high frequency band as in the first embodiment, Furthermore, the circuit dimension in the transmission direction of the high frequency signal, that is, the circuit dimension in the horizontal direction on FIG. 4 can be further reduced. However, connecting the inductive stubs to the corners of the comb electrodes 23a and 23b may disturb the uniformity of the voltage and current distribution between the combs. Compared with the capacitive circuit in the first mode, the number is slightly increased.

  In this way, by loading inductive stubs at the corners of the interdigital capacitor comb electrodes 23a and 23b, the parasitic ground plane capacitance component of the capacitor is canceled while suppressing an increase in circuit dimensions as much as possible. It is possible to suppress a decrease in the passing amount in the high frequency band.

  In the first embodiment and the second embodiment, it has been described that an interdigital capacitor is used as a series capacitor, but instead of this interdigital capacitor, a chip capacitor, a MIM (Metal-Insulator-Metal) capacitor, Alternatively, a gap capacitor configured by adjoining a pair of open-ended electrode patterns may be used.

  4a, 4b Conductor wire, 10 Pre-stage field effect transistor, 20-stage impedance matching circuit, 20A Inter-stage impedance matching circuit, 21 Dielectric substrate, 22a, 22b Input / output terminal, 23a, 23b Comb electrode, 24 Ground plane conductor, 25a , 25b Bias application terminal, 26a, 26b Microstrip line, 27a, 27b MIM capacitor, 28a, 28b Through-hole, 30 Subsequent field effect transistor.

Claims (3)

A high-frequency multistage active circuit comprising an interstage impedance matching circuit connected between a front stage active device and a backstage active device,
The interstage impedance matching circuit is:
An interdigital capacitor composed of a pair of comb-shaped electrodes formed on a dielectric substrate;
An inductive stub connected to the input / output side of the comb electrode high-frequency signal transmission direction,
The inductive stub is
A high-frequency multi-stage active circuit comprising a bias application terminal for applying a bias voltage to the front-stage active device and the rear-stage active device via the inductive stub. The interstage impedance matching circuit is:
Instead of the inductive stub connected to the input / output side of the comb electrode high-frequency signal transmission direction,
The high frequency multistage active circuit according to claim 1, further comprising an inductive stub connected to one side of the comb electrode that is orthogonal to a transmission direction of the high frequency signal. 3. The high-frequency multistage active circuit according to claim 1, wherein a chip capacitor, an MIM capacitor, or a gap capacitor formed by adjoining a pair of open-ended electrode patterns is used instead of the interdigital capacitor. .

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