JP2012004329A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP2012004329A JP2012004329A JP2010137879A JP2010137879A JP2012004329A JP 2012004329 A JP2012004329 A JP 2012004329A JP 2010137879 A JP2010137879 A JP 2010137879A JP 2010137879 A JP2010137879 A JP 2010137879A JP 2012004329 A JP2012004329 A JP 2012004329A
- Authority
- JP
- Japan
- Prior art keywords
- base
- substrate
- semiconductor device
- coating layer
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81909—Post-treatment of the bump connector or bonding area
- H01L2224/8192—Applying permanent coating, e.g. protective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Abstract
【解決手段】 半導体装置の製造方法は、第1の基体11と第2の基体12の間に充填される充填材16に対して親和性を示す被覆層15を、第1の基体及び第2の基体の互いに対向する面の少なくとも一方の面上に形成し、その後、第1の基体と第2の基体との間に充填材を充填する。
【選択図】図1
Description
h:液面の上昇高さ、T:表面張力、θ:接触角(ぬれ性のパラメータ)、ρ:液体の密度、g:重力加速度、r:管の内径。
12 第2の基体
13 空間
14 バンプ
15 被覆層
16 アンダーフィル材
21 第1または第2の基体の表面に対して親和性を持つ部位
22 アンダーフィル材に対して親和性を持つ部位
31 真空チャンバー
32 ロードロック系
33 排気系
34 ヒーター
35 試料保持部
36 原料気化部
37 基体
41 成膜チャンバー
42 ヒーター
43 背圧調整器
44,45,46 送液ポンプ
47 熱交換器
48 試料
Claims (13)
- 第1の基体と第2の基体の間に充填される充填材に対して親和性を示す被覆層を、前記第1の基体及び前記第2の基体の互いに対向する面の少なくとも一方の面上に形成し、
その後、前記第1の基体と前記第2の基体との間に前記充填材を充填する、
ことを特徴とする半導体装置の製造方法。 - 前記被覆層の形成は、前記被覆層の材料を気化させて行われることを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記被覆層の形成は、前記第1の基体及び前記第2の基体の少なくとも一方を減圧雰囲気下に置いて行われることを特徴とする請求項2に記載の半導体装置の製造方法。
- 前記充填材は硬化剤と混合されたエポキシ樹脂であり、前記被覆層の材料は硬化剤と混合されていないエポキシ樹脂であることを特徴とする請求項1,2または3に記載の半導体装置の製造方法。
- 前記被覆層はポリイミドであることを特徴とする請求項1,2または3に記載の半導体装置の製造方法。
- 前記充填材の充填は、毛細管現象を利用して行われることを特徴とする請求項1乃至5のいずれか一項に記載の半導体装置の製造方法。
- 前記被覆層の形成は、前記第1の基体の上に前記第2の基体を設置した後に行われることを特徴とする請求項1乃至6のいずれか一項に記載の半導体装置の製造方法。
- 前記被覆層の形成は、前記第1の基体の上に前記第2の基体を設置する前に、前記第1の基体及び前記第2の基体の少なくとも一方に対して行われることを特徴とする請求項1乃至6のいずれか一項に記載の半導体装置の製造方法。
- 前記第1の基体及び前記第2の基体はともに半導体チップであることを特徴とする請求項1乃至8のいずれか一項に記載の半導体装置の製造方法。
- 前記第1の基体は実装基板であり、前記第2の基体は半導体チップであることを特徴とする請求項1乃至8のいずれか一項に記載の半導体装置の製造方法。
- 第1の基体と、
該第1の基体の上に設置された第2の基体と、
前記第1の基体と前記第2の基体の互いに対向する面の少なくとも一方の面上に形成され、前記第1の基体と前記第2の基体の間に注入される充填材に対して親和性を示す被覆層と、
前記充填材と、
を備えることを特徴とする半導体装置。 - 前記第1の基体及び前記第2の基体はともに半導体チップであることを特徴とする請求項11に記載の半導体装置。
- 前記第1の基体は実装基板であり、前記第2の基体は半導体チップであることを特徴とする請求項11に記載の半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010137879A JP2012004329A (ja) | 2010-06-17 | 2010-06-17 | 半導体装置の製造方法 |
US13/156,948 US8779607B2 (en) | 2010-06-17 | 2011-06-09 | Devices with covering layer and filler |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010137879A JP2012004329A (ja) | 2010-06-17 | 2010-06-17 | 半導体装置の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2012004329A true JP2012004329A (ja) | 2012-01-05 |
Family
ID=45327933
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010137879A Withdrawn JP2012004329A (ja) | 2010-06-17 | 2010-06-17 | 半導体装置の製造方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US8779607B2 (ja) |
JP (1) | JP2012004329A (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20160034717A (ko) * | 2014-09-22 | 2016-03-30 | 삼성전자주식회사 | 반도체 패키지 및 그 제조 방법 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000269166A (ja) * | 1999-03-15 | 2000-09-29 | Toshiba Corp | 集積回路チップの製造方法及び半導体装置 |
JP2002141643A (ja) * | 2000-10-31 | 2002-05-17 | Kyocera Corp | バンプ付電子部品の実装構造 |
JP2002270721A (ja) * | 2001-03-12 | 2002-09-20 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JP2003309227A (ja) * | 2002-04-17 | 2003-10-31 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
JP2004179590A (ja) * | 2002-11-29 | 2004-06-24 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
JP2009176863A (ja) * | 2008-01-23 | 2009-08-06 | Alps Electric Co Ltd | 半導体装置およびその製造方法 |
JP2010087418A (ja) * | 2008-10-02 | 2010-04-15 | Nec Corp | 電子装置及びその製造方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4238528A (en) * | 1978-06-26 | 1980-12-09 | International Business Machines Corporation | Polyimide coating process and material |
US5371328A (en) * | 1993-08-20 | 1994-12-06 | International Business Machines Corporation | Component rework |
US6248614B1 (en) * | 1999-03-19 | 2001-06-19 | International Business Machines Corporation | Flip-chip package with optimized encapsulant adhesion and method |
US7547579B1 (en) * | 2000-04-06 | 2009-06-16 | Micron Technology, Inc. | Underfill process |
JP3646720B2 (ja) * | 2003-06-19 | 2005-05-11 | セイコーエプソン株式会社 | 半導体装置及びその製造方法、回路基板並びに電子機器 |
JP4700438B2 (ja) | 2005-08-22 | 2011-06-15 | ナミックス株式会社 | 半導体装置の製造方法 |
JP5273435B2 (ja) | 2007-12-18 | 2013-08-28 | トヨタ自動車株式会社 | 燃料電池システム |
JP2011216818A (ja) * | 2010-04-02 | 2011-10-27 | Elpida Memory Inc | 半導体装置の製造方法 |
JP2011243725A (ja) * | 2010-05-18 | 2011-12-01 | Elpida Memory Inc | 半導体装置の製造方法 |
TWI427753B (zh) * | 2010-05-20 | 2014-02-21 | Advanced Semiconductor Eng | 封裝結構以及封裝製程 |
-
2010
- 2010-06-17 JP JP2010137879A patent/JP2012004329A/ja not_active Withdrawn
-
2011
- 2011-06-09 US US13/156,948 patent/US8779607B2/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000269166A (ja) * | 1999-03-15 | 2000-09-29 | Toshiba Corp | 集積回路チップの製造方法及び半導体装置 |
JP2002141643A (ja) * | 2000-10-31 | 2002-05-17 | Kyocera Corp | バンプ付電子部品の実装構造 |
JP2002270721A (ja) * | 2001-03-12 | 2002-09-20 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JP2003309227A (ja) * | 2002-04-17 | 2003-10-31 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
JP2004179590A (ja) * | 2002-11-29 | 2004-06-24 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
JP2009176863A (ja) * | 2008-01-23 | 2009-08-06 | Alps Electric Co Ltd | 半導体装置およびその製造方法 |
JP2010087418A (ja) * | 2008-10-02 | 2010-04-15 | Nec Corp | 電子装置及びその製造方法 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20160034717A (ko) * | 2014-09-22 | 2016-03-30 | 삼성전자주식회사 | 반도체 패키지 및 그 제조 방법 |
KR102306673B1 (ko) * | 2014-09-22 | 2021-09-29 | 삼성전자주식회사 | 반도체 패키지 및 그 제조 방법 |
Also Published As
Publication number | Publication date |
---|---|
US20110309499A1 (en) | 2011-12-22 |
US8779607B2 (en) | 2014-07-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20200165494A1 (en) | Enhanced adhesive materials and processes for 3d applications | |
JP5309886B2 (ja) | 半導体封止用フィルム状接着剤、半導体装置の製造方法及び半導体装置 | |
KR101284512B1 (ko) | 반도체 장치의 제조 방법 | |
US20190378781A1 (en) | Enhanced adhesive materials and processes for 3d applications | |
TWI411049B (zh) | An adhesive for an electronic component, a lamination method for a semiconductor wafer, and a semiconductor device | |
TWI489565B (zh) | Semiconductor wafer laminated body manufacturing method and semiconductor device | |
US20180350764A1 (en) | Packaging device and method of making the same | |
Liang et al. | Thermal conductivity enhancement of epoxy composites by interfacial covalent bonding for underfill and thermal interfacial materials in Cu/Low-K application | |
TWI452095B (zh) | 絕緣性糊、電子裝置及絕緣部形成方法 | |
JPH034588B2 (ja) | ||
JP2009117811A (ja) | 半導体封止用フィルム状接着剤及びその接着剤を用いた半導体装置の製造方法並びに半導体装置 | |
JP2012004329A (ja) | 半導体装置の製造方法 | |
US20160118364A1 (en) | Integrated Circuit with a Thermally Conductive Underfill and Methods of Forming Same | |
JP5332799B2 (ja) | 半導体封止用フィルム状接着剤、半導体装置及びその製造方法 | |
WO2013125558A1 (ja) | 配線基板、これを用いた実装構造体および配線基板の製造方法 | |
JP2012079972A (ja) | 配線基板、実装構造体、複合積層板及び配線基板の製造方法 | |
JP5263050B2 (ja) | 接着剤組成物及びそれを用いた半導体装置の製造方法、半導体装置 | |
Fukushima et al. | On‐wafer thermomechanical characterization of a thin film polyimide formed by vapor deposition polymerization for through‐silicon via applications: Comparison to plasma‐enhanced chemical vapor deposition SiO2 | |
CN109698115B (zh) | 半导体装置的制造方法 | |
JP2021182621A (ja) | 積層体、組成物及び積層体の製造方法 | |
JP2011216565A (ja) | 電子部品、電子機器及びそれらの製造方法 | |
JP4876882B2 (ja) | フリップチップ実装方法 | |
Fukushima et al. | Low-temperature and high-step-coverage polyimide TSV liner formation by vapor deposition polymerization | |
JP7160794B2 (ja) | 実装構造体の製造方法およびこれに用いられるシート材 | |
JP2021172725A (ja) | 封止用液状エポキシ樹脂組成物、半導体装置、及び半導体装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20130402 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20130730 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20140131 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140305 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20140602 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20140605 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20140703 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20140708 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140709 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140730 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20141022 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20141027 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20141118 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20141121 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20141224 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150129 |
|
A761 | Written withdrawal of application |
Free format text: JAPANESE INTERMEDIATE CODE: A761 Effective date: 20150203 |