JP2011519095A - マルチバンク記憶装置のためのストレージアドレス再マッピングのための方法およびシステム - Google Patents
マルチバンク記憶装置のためのストレージアドレス再マッピングのための方法およびシステム Download PDFInfo
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- JP2011519095A JP2011519095A JP2011506353A JP2011506353A JP2011519095A JP 2011519095 A JP2011519095 A JP 2011519095A JP 2011506353 A JP2011506353 A JP 2011506353A JP 2011506353 A JP2011506353 A JP 2011506353A JP 2011519095 A JP2011519095 A JP 2011519095A
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7201—Logical to physical mapping or translation of blocks or pages
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7202—Allocation control and policies
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7205—Cleaning, compaction, garbage collection, erase control
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7208—Multiple device management, e.g. distributing data over multiple flash devices
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/110,050 | 2008-04-25 | ||
| US12/110,050 US20090271562A1 (en) | 2008-04-25 | 2008-04-25 | Method and system for storage address re-mapping for a multi-bank memory device |
| PCT/US2009/040153 WO2009131851A1 (en) | 2008-04-25 | 2009-04-10 | Method and system for storage address re-mapping for a multi-bank memory device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2011519095A true JP2011519095A (ja) | 2011-06-30 |
| JP2011519095A5 JP2011519095A5 (enExample) | 2012-05-31 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011506353A Pending JP2011519095A (ja) | 2008-04-25 | 2009-04-10 | マルチバンク記憶装置のためのストレージアドレス再マッピングのための方法およびシステム |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US20090271562A1 (enExample) |
| EP (1) | EP2286341B1 (enExample) |
| JP (1) | JP2011519095A (enExample) |
| KR (1) | KR20100139149A (enExample) |
| TW (1) | TWI437441B (enExample) |
| WO (1) | WO2009131851A1 (enExample) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013030081A (ja) * | 2011-07-29 | 2013-02-07 | Toshiba Corp | データ記憶装置、メモリ制御装置及びメモリ制御方法 |
| US8930614B2 (en) | 2011-07-29 | 2015-01-06 | Kabushiki Kaisha Toshiba | Data storage apparatus and method for compaction processing |
| US10175889B2 (en) | 2016-03-10 | 2019-01-08 | Toshiba Memory Corporation | Memory system capable of accessing memory cell arrays in parallel |
| JP2025097887A (ja) * | 2023-12-19 | 2025-07-01 | エトロン テクノロジー,インコーポレイテッド | メモリシステム及びメモリチップ |
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Also Published As
| Publication number | Publication date |
|---|---|
| KR20100139149A (ko) | 2010-12-31 |
| US20140068152A1 (en) | 2014-03-06 |
| US20090271562A1 (en) | 2009-10-29 |
| WO2009131851A1 (en) | 2009-10-29 |
| TWI437441B (zh) | 2014-05-11 |
| EP2286341A1 (en) | 2011-02-23 |
| EP2286341B1 (en) | 2015-06-03 |
| TW200951722A (en) | 2009-12-16 |
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