JP2011249601A - Short circuit thyristor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a short circuit thyristor which can achieve the reduction of the breakover voltage, at which the thyristor goes into ON state, with no influence on the holding current characteristics.SOLUTION: A short circuit thyristor 100 has a first region (P region 1), a second region (N region 2), a third region (P region 3), a fourth region (N region 4), which are connected in order, an electrode 11 for short-circuiting the first region (P region 1) and the second region (N region 2), a fifth region (P++ region 31) formed to adjoin the third region (P region 3) and having an impurity density higher than that of the third region (P region 3), and a sixth region (N++ region 41) formed to adjoin the second region (N region 2) and the fifth region (P++ region 31) and having an impurity density higher than that of the second region (N region 2). The value of its breakover voltage is set by the impurity densities of the fifth region (P++ region 31) and the sixth region (N++ region 41).

Description

  The present invention relates to a short-circuit thyristor.

In the PNPN thyristor, a short-circuit thyristor is disclosed that reduces a breakover voltage, which is a withstand voltage that shifts to an ON state, by providing a junction with a region having a lower junction withstand voltage than other parts (for example, Patent Document 1). To Patent Document 4).
In the conventional short-circuit thyristor shown in FIG. 4, when a bias is applied from the terminal T1 to the terminal T2, a reverse voltage is applied to the junction J2. As a result, the high concentration impurity layer P ++ region having a junction breakdown voltage lower than that of the junction J2 breaks down first. As a result, current concentrates in this P ++ region. When this current increases, a voltage drop occurs in the N1 region immediately below the P1 region due to the resistance component in the lateral direction. Due to this voltage drop, the junction J1 is forward-biased, and the bias value becomes maximum in the P ++ region. When this bias exceeds the diffusion potential of the junction J1, holes are injected from the P1 region, and the terminal T1 and the terminal T2 are turned on. As described above, in the conventional short-circuit type thyristor shown in FIG. 4, the breakover voltage to be turned on is determined by the junction breakdown voltage between the P ++ region and the N1 region.

Japanese Patent Laid-Open No. 03-62571 JP 04-106935 A Japanese Patent Laid-Open No. 03-233993 Japanese Patent Laid-Open No. 05-190837

  However, in the short-circuit thyristor shown in FIG. 4, the breakover voltage that shifts to the ON state is determined based on the impurity concentration of the P ++ region and the N1 region that is in contact with the P ++ region. Therefore, when realizing a short-circuit thyristor with an extremely low breakover voltage, it is necessary to change the impurity concentration in both the P ++ region and the N1 region. However, when the impurity concentration of the N1 region is changed, the holding current characteristic which is the characteristic of the thyristor is affected. Therefore, it is difficult to reduce the breakover voltage while maintaining the holding current characteristic by changing the impurity concentration in the N1 region. As described above, the short-circuit thyristor shown in FIG. 4 has a problem that it is difficult to realize a low breakover voltage for shifting to the on state without affecting the holding current characteristics.

  Therefore, an object of the present invention is to provide a short-circuit thyristor that realizes a reduction in the breakover voltage that shifts to the on state without affecting the holding current characteristics.

  In order to solve the above problem, the present invention provides a first region of a first conductivity type, a second region of a second conductivity type, a third region of the first conductivity type, and a second region of the second conductivity type. A short-circuit thyristor that has an electrode that is sequentially joined to the fourth region and that short-circuits the first region and the second region, is formed in contact with the third region, and has a higher impurity concentration than the third region A fifth region of the first conductivity type; and a sixth region of the second conductivity type formed in contact with the second region and the fifth region and having an impurity concentration higher than that of the second region. The short-circuit thyristor has a breakover voltage value set by the impurity concentration of the fifth region and the impurity concentration of the sixth region, and a holding current value set by a parameter including at least the impurity concentration of the second region. .

In the present invention, the fifth region or the sixth region is a distance from a contact surface between the electrode and the second region in a joint surface between the second region and the third region. Is formed at the position where the length becomes the longest.
Furthermore, the present invention is characterized in that, in the above-mentioned invention, the bonding surface between the fifth region and the sixth region is perpendicular to the surface of the semiconductor substrate in contact with the electrode.
Moreover, the present invention is characterized in that, in the above-described invention, a bonding surface between the fifth region and the sixth region is parallel to a surface of a semiconductor substrate in contact with the electrode.
Further, the present invention is characterized in that in the above invention, at least one of the fifth region and the sixth region is formed so as to be exposed on a surface of a semiconductor substrate in contact with the electrode.

  According to the present invention, the short-circuit thyristor includes a first region of the first conductivity type, a second region of the second conductivity type, a third region of the first conductivity type, and a fourth region of the second conductivity type. Are sequentially joined, and have an electrode for short-circuiting the first region and the second region. The short-circuit thyristor is formed in contact with the third region, is formed in contact with the fifth region of the first conductivity type having a higher impurity concentration than the third region, and the second region and the fifth region. And a sixth region of the second conductivity type having a higher impurity concentration than the region. In such a short-circuit thyristor, when a bias voltage is applied between the first region and the fourth region, the impurity concentration in the fifth region and the impurity concentration in the sixth region are high, so A breakdown occurs at the joint surface between the fifth region and the sixth region prior to the joint surface with the three regions. For this reason, the breakover voltage at which the short-circuit thyristor shifts to the on state is determined by the junction breakdown voltage between the fifth region and the sixth region. Here, the junction breakdown voltage is determined by the impurity concentration of the fifth region and the impurity concentration of the sixth region, and does not depend on the impurity concentration of the second region related to the holding current characteristics.

  Thus, in the short-circuit thyristor of the present invention, the parameters that determine the breakover voltage are the impurity concentration in the fifth region and the impurity concentration in the sixth region, and one of the parameters that determine the holding current is the impurity concentration in the second region. It is a relationship that. For this reason, the breakover voltage and the holding current can be controlled independently. As a result, the short-circuit thyristor of the present invention can achieve a low breakover voltage without affecting the holding current characteristics.

It is a section lineblock diagram showing the short circuit type thyristor by a 1st embodiment. It is a section lineblock diagram showing the short circuit type thyristor by a 2nd embodiment. It is a section lineblock diagram showing the short circuit type thyristor by a 3rd embodiment. It is a cross-sectional block diagram which shows the conventional short circuit thyristor.

<First Embodiment>
A short-circuit thyristor according to a first embodiment of the present invention will be described below with reference to the drawings.
FIG. 1 is a cross-sectional configuration diagram illustrating a short-circuit thyristor 100 according to the present embodiment.
In FIG. 1, a short-circuit thyristor 100 includes a P region (1, 3, 5), an N region (2, 4), a channel stopper (6-9), an electrode (11, 12), and an insulating layer (21-24). , P ++ regions (31, 32), and N ++ regions (41, 42).

The P region 3 is a region of a p-type semiconductor as the first conductivity type, and constitutes a semiconductor substrate that becomes a bulk layer of the short-circuited thyristor 100. Here, the upper surface of the semiconductor substrate in FIG. 1 is defined as a first surface F1, and the lower surface of the semiconductor substrate is defined as a second surface F2.
The N region 2 is a region of an n-type semiconductor as the second conductivity type. The N region 2 is formed between the P region 1 and the P region 3, and a part thereof is in contact with the first surface F1.
The P region 1 is a p-type semiconductor region and is formed to be exposed on the first surface F1.
The N region 4 is an n-type semiconductor region. The N region 4 is formed between the P region 3 and the P region 5, and a part thereof is in contact with the second surface F2.
The P region 5 is a p-type semiconductor region and is formed so as to be exposed to the second surface F2.

The channel stoppers (6 to 9) are formed in contact with the first surface F <b> 1 or the second surface F <b> 2 and the side surface of the short-circuit thyristor 100, and are p-type semiconductor regions having a higher impurity concentration than the P region 3. The channel stoppers (6 to 9) suppress leakage current (channel current) that is not desirable as a function of the short-circuit thyristor 100.
The insulating layer 21 is provided in contact with the first surface F1 and faces the first surface F1. The insulating layer 21 is formed so as to cover a part of the channel stopper 6 to a part of the P region 1. The insulating layer 22 is provided in contact with the first surface F1 and faces the first surface F1. The insulating layer 22 is formed so as to cover a part from the channel stopper 7 to a part of the N region 2.
The insulating layer 23 is provided in contact with the second surface F2 and faces the second surface F2. The insulating layer 23 is formed so as to cover a part from the channel stopper 9 to a part of the P region 5. The insulating layer 24 is provided in contact with the second surface F2 and faces the second surface F2. The insulating layer 24 is formed so as to cover a part of the channel stopper 8 to a part of the N region 4.

The electrode 11 is formed along the first surface F <b> 1 in contact with a part of the P region 1 not covered with the insulating layer 21 and a part of the N region 2 not covered with the insulating layer 22. The material of the electrode 11 is a metal, for example, aluminum. The electrode 11 short-circuits the P region 1 and the N region 2 and makes ohmic contact with the P region 1 and the N region 2.
The electrode 12 is formed along the second surface F <b> 2 in contact with a part of the P region 5 not covered with the insulating layer 23 and a part of the N region 4 not covered with the insulating layer 24. The material of the electrode 12 is a metal, for example, aluminum. The electrode 12 short-circuits the P region 5 and the N region 4 and makes ohmic contact with the P region 5 and the N region 4.

The P ++ region 31 is a p-type semiconductor region that is formed under the insulating layer 21 in contact with the P region 3 and has a higher impurity concentration than the P region 3. Further, the P ++ region 31 is formed so as to be exposed on the first surface F1.
The P ++ region 32 is a p-type semiconductor region formed on the insulating layer 23 in contact with the P region 3 and having a higher impurity concentration than the P region 3. Further, the P ++ region 32 is formed so as to be exposed on the second surface F2.
The N ++ region 41 is an n-type semiconductor region formed below the insulating layer 21 in contact with the N region 2 and the P ++ region 31 and having a higher impurity concentration than the N region 2. Further, the N ++ region 41 is formed so as to be exposed on the first surface F1.
The N ++ region 42 is an n-type semiconductor region formed on the insulating layer 23 in contact with the N region 4 and the P ++ region 32 and having a higher impurity concentration than the N region 4. Further, the N ++ region 42 is formed so as to be exposed on the second surface F2.
The P ++ region (31, 32) and the N ++ region (41, 42) are formed by being exposed to the first surface F1 or the second surface F2, for example, by an ion implantation method or the like.

Note that the P ++ region 31 or the N ++ region 41 is arranged such that the distance from the contact surface between the electrode 11 and the N region 2 in the joint surface J2 between the N region 2 and the P region 3 is increased. A desirable arrangement position is the position where the distance from the contact surface between the electrode 11 and the N region 2 is the longest or the vicinity thereof. Further, in the joint portion J5 between the P ++ region 31 and the N ++ region 41, the joint surface of the joint portion J5 is perpendicular to the first surface F1 in contact with the electrode 11. In addition, the P ++ region 32 or the N ++ region 42 is disposed so that the distance from the contact surface between the electrode 12 and the N region 4 in the joint surface J3 between the N region 4 and the P region 3 is increased. A desirable arrangement position is the position where the distance from the contact surface between the electrode 12 and the N region 4 is the longest or the vicinity thereof. Further, in the joint portion J6 between the P ++ region 32 and the N ++ region 42, the joint surface of the joint portion J6 is perpendicular to the second surface F2 in contact with the electrode 12.
In the joints J5 and J6, the larger the joint area of the joints J5 and J6, the easier it is for the thyristor to shift to the on state. Accordingly, the shapes of the joints J5 and J6 may be appropriately set by adjusting the joint areas of the joints J5 and J6 to be wide according to the specifications of the thyristor.

In the short-circuit thyristor 100, a bias voltage is applied between a terminal T1 connected to the electrode 11 and a terminal T2 connected to the electrode 12, and the terminal voltage of the terminal T1 is higher than the terminal voltage of the terminal T2. In some cases, it operates as an on-state PNPNP thyristor. In this first case, the short-circuit thyristor 100 has a P region 1 (first region), an N region 2 (second region), a P region 3 (third region), and an N region 4 (fourth region) as PNPN. It becomes equivalent to a thyristor joined in this order. Here, the P ++ region 31 is a fifth region, and the N ++ region 41 is a sixth region.
The short-circuit thyristor 100 operates as an on-state PNPNP thyristor when a bias voltage is applied between the terminal T2 and the terminal T1 and the terminal voltage at the terminal T2 is higher than the terminal voltage at the terminal T1. To do. In this second case, the short-circuit thyristor 100 has a P region 5 (first region), an N region 4 (second region), a P region 3 (third region), and an N region 2 (fourth region) that are PNPN. It becomes equivalent to a thyristor joined in this order. Here, the P ++ region 32 is a fifth region, and the N ++ region 42 is a sixth region. As described above, the short-circuit thyristor 100 is a so-called bidirectional two-terminal thyristor.

Next, the operation of this embodiment will be described.
First, the operation in the first case where a bias voltage is applied between the terminal T1 and the terminal T2 in the short-circuit thyristor 100 shown in FIG. 1 will be described.
In FIG. 1, in the first case, reverse voltages (reverse bias) are applied to the junction J2 and the junction J5, respectively. The junction J2 is a junction between the N region 2 (second region) and the P region 3 (third region), and the junction J5 includes the N ++ region 41 (sixth region) and the P ++ region 31 (fifth region). ). The impurity concentration of the N ++ region 41 is higher than the impurity concentration of the N region 2. Further, the impurity concentration of the P ++ region 31 is higher than the impurity concentration of the P region 3. For this reason, the junction breakdown voltage of the junction J5 is lower than the junction breakdown voltage of the junction J2. Thereby, the junction part J5 breaks down before the junction part J2. As a result, current concentrates on the portion where the N ++ region 41 and the P ++ region 31 are joined. When this current increases, the resistance component in the lateral direction in the N region 2, that is, the resistance component in the region reaching the N ++ region 41 from the contact surface between the electrode 11 and the N region 2 and passing under the P region 1, A voltage drop occurs in the N region 2 immediately below the region 1. Due to this voltage drop, the junction J1 between the P region 1 and the N region 2 is forward biased, and the bias value becomes maximum in the P ++ region 31. When this bias exceeds the diffusion potential of the junction J1, holes are injected from the P region 1, and the terminal T1 and the terminal T2 are turned on.

  In the short-circuit thyristor 100, a voltage at which the terminal T1 and the terminal T2 are turned on is referred to as a breakover voltage. The breakover voltage in the first case is equal to the voltage at which the junction J5 breaks down. The voltage at which the junction J5 breaks down is set by the impurity concentration of the P ++ region 31 and the impurity concentration of the N ++ region 41. That is, the breakover voltage in the first case is set by the impurity concentration of the P ++ region 31 and the impurity concentration of the N ++ region 41. One of the characteristics of the thyristor, which is a holding current value indicating a current value for maintaining the ON state between the terminal T1 and the terminal T2, is set by a parameter including at least the impurity concentration of the N region 2. Other parameters that determine the holding current value include the impurity concentration and diffusion depth of the P region 1, the impurity concentration and diffusion depth of the P region 3, the pattern shape of the P region 1, and the like. The impurity concentration of the N region 2 is one of parameters that determine the holding current value.

Next, in the short-circuit thyristor 100 shown in FIG. 1, the operation in the second case where a bias voltage is applied between the terminal T2 and the terminal T1 will be described.
In FIG. 1, in the second case, a reverse voltage (reverse bias) is applied to the junction J3 and the junction J6, respectively. The junction J3 is a junction between the N region 4 (second region) and the P region 3 (third region), and the junction J6 includes the N ++ region 42 (sixth region) and the P ++ region 32 (fifth region). ). The impurity concentration of the N ++ region 42 is higher than the impurity concentration of the N region 4. Further, the impurity concentration of the P ++ region 32 is higher than the impurity concentration of the P region 3. For this reason, the junction breakdown voltage of the junction J6 is lower than the junction breakdown voltage of the junction J3. Thereby, the junction J6 breaks down before the junction J3. As a result, current concentrates on the portion where the N ++ region 42 and the P ++ region 32 are joined. When this current increases, the resistance component in the lateral direction in the N region 4, that is, the resistance component in the region that reaches the N ++ region 42 from the contact surface between the electrode 12 and the N region 4 and above the P region 5, A voltage drop occurs in the N region 4 immediately above the region 5. Due to this voltage drop, the junction J4 between the P region 5 and the N region 4 is forward biased, and the bias value becomes maximum in the P ++ region 32. When this bias exceeds the diffusion potential of the junction J4, holes are injected from the P region 5 and the terminal T2 and the terminal T1 are turned on.

  In the short-circuit thyristor 100, the breakover voltage in the second case is equal to the voltage at which the junction J6 breaks down. The voltage at which the junction J6 breaks down is set by the impurity concentration of the P ++ region 32 and the impurity concentration of the N ++ region 42. That is, the breakover voltage in the second case is set by the impurity concentration of the P ++ region 32 and the impurity concentration of the N ++ region 42. The holding current value indicating the current value for maintaining the ON state between the terminal T2 and the terminal T1 is set by a parameter including at least the impurity concentration of the N region 4. Other parameters that determine the holding current value include the impurity concentration and diffusion depth of the P region 5, the impurity concentration and diffusion depth of the P region 3, and the pattern shape of the P region 5. The impurity concentration of the N region 4 is one of parameters that determine the holding current value.

  As described above, in the short-circuit thyristor 100 according to this embodiment, the P region 1, the N region 2, the P region 3, and the N region 4 are sequentially PNPN-junctioned, and the short-circuit thyristor 100 includes the P region 1 and the N region 2. Has an electrode 11 for short-circuiting. In addition, the short-circuit thyristor 100 includes an electrode 12 that causes the P region 5, the N region 4, the P region 3, and the N region 2 to be PNPN-junction in order, and the P region 5 and the N region 4 are short-circuited. The short-circuit thyristor 100 has a P ++ region 31 (or 32) having an impurity concentration higher than that of the P region 3, an N ++ region 41 having an impurity concentration higher than that of the N region 2, and an N ++ region 42 having an impurity concentration higher than that of the N region 4. . Therefore, when a bias voltage is applied between the electrode 11 and the electrode 12, the junction J5 between the P ++ region 31 and the N ++ region 41 before the junction J2 (or the P ++ region 32 and the N ++ region prior to the junction J3). Breakdown occurs at the junction J6) with 42. The breakover voltage at which the short-circuit thyristor 100 shifts to the ON state is determined by the junction breakdown voltage between the P ++ region 31 and the N ++ region 41 (or the junction breakdown voltage between the P ++ region 32 and the N ++ region 42).

This junction breakdown voltage is determined by the impurity concentration between the P ++ region 31 and the N ++ region 41 (or the impurity concentration between the P ++ region 32 and the N ++ region 42). Therefore, the junction breakdown voltage can be determined without depending on the impurity concentration of the N region 2 (or 4) related to the holding current characteristics. For example, when lowering the breakover voltage, the junction breakdown voltage between the P ++ region 31 and the N ++ region 41 (or the P ++ region 32 and the N ++ region 42 is increased by increasing the impurity concentration of the N ++ region (41, 42). Junction breakdown voltage) can be reduced. Thus, the short-circuit thyristor 100 can reduce the breakover voltage.
Since the breakover voltage can be easily set in this way, for example, a breakover voltage can be set in accordance with the forward voltage of various LEDs (Light Emitting Diodes). Thereby, the short-circuit thyristor 100 can be applied as a current bypass element in the case of an open failure of the LED.

  Thus, in the short-circuit thyristor 100 according to the present embodiment, the parameters that determine the breakover voltage are the impurity concentration of the P ++ region 31 (or 32) and the impurity concentration of the N ++ region 41 (or 42). One of the parameters that determine the holding current is the impurity concentration of the N region 2 (or 4). For this reason, the breakover voltage and the holding current can be controlled independently. As a result, the short-circuit thyristor 100 can achieve a low breakover voltage without affecting the holding current characteristics.

<Second Embodiment>
Hereinafter, a short-circuit thyristor according to a second embodiment of the present invention will be described with reference to the drawings.
FIG. 2 is a cross-sectional configuration diagram illustrating the short-circuit thyristor 100a according to the present embodiment.
In FIG. 2, the short-circuit thyristor 100a includes a P region (1, 3, 5), an N region (2, 4), a channel stopper (6-9), an electrode (11, 12), and an insulating layer (21-24). , P ++ regions (31a, 32a), and N ++ regions (41a, 42a). In this figure, the same components as those in FIG.

The P ++ region 31 a is a p-type semiconductor region formed below the insulating layer 21 in contact with the P region 3 and having a higher impurity concentration than the P region 3. Further, the P ++ region 31a is formed at a portion of the joint portion J2 below the P region 1.
The P ++ region 32 a is a p-type semiconductor region formed in contact with the P region 3 and above the insulating layer 23 and having a higher impurity concentration than the P region 3. Further, the P ++ region 32 a is formed in the portion of the joint portion J <b> 3 above the P region 5.
The N ++ region 41 a is an n-type semiconductor region formed in contact with the N region 2 and the P ++ region 31 a and having a higher impurity concentration than the N region 2. The N ++ region 41a is formed in a portion above the P ++ region 31a.
The N ++ region 42 a is an n-type semiconductor region formed in contact with the N region 4 and the P ++ region 32 a and having a higher impurity concentration than the N region 4. Further, the N ++ region 42a is formed in a portion below the P ++ region 32a.
The P ++ region (31a, 32a) and the N ++ region (41a, 42a) are formed by being embedded in the semiconductor substrate by, for example, an embedded diffusion method.

  Note that the P ++ region 31a or the N ++ region 41a is arranged so that the distance from the contact surface between the electrode 11 and the N region 2 in the joint surface J2 between the N region 2 and the P region 3 is increased. A desirable arrangement position is the position where the distance from the contact surface between the electrode 11 and the N region 2 is the longest or the vicinity thereof. In the joint portion J5a between the P ++ region 31a and the N ++ region 41a, the joint surface of the joint portion J5a is parallel to the first surface F1 in contact with the electrode 11. In addition, the P ++ region 32a or the N ++ region 42a is arranged so that the distance from the contact surface between the electrode 12 and the N region 4 in the joint surface at the joint portion J3 between the N region 4 and the P region 3 is increased. A desirable arrangement position is the position where the distance from the contact surface between the electrode 12 and the N region 4 is the longest or the vicinity thereof. In the joint portion J6a between the P ++ region 32a and the N ++ region 42a, the joint surface of the joint portion J6a is parallel to the second surface F2 in contact with the electrode 12.

The short-circuit thyristor 100a operates as an on-state PNPNP thyristor in the first case where a bias voltage is applied between the terminal T1 and the terminal T2 and the terminal voltage at the terminal T1 is higher than the terminal voltage at the terminal T2. In this first case, the short-circuit thyristor 100a has a P region 1 (first region), an N region 2 (second region), a P region 3 (third region), and an N region 4 (fourth region) as PNPN. It becomes equivalent to a thyristor joined in this order. Here, the P ++ region 31a is a fifth region, and the N ++ region 41a is a sixth region.
The short-circuit thyristor 100a operates as an on-state PNPNP thyristor in the second case where a bias voltage is applied between the terminal T2 and the terminal T1 and the terminal voltage at the terminal T2 is higher than the terminal voltage at the terminal T1. To do. In this second case, the short-circuit thyristor 100a has a P region 5 (first region), an N region 4 (second region), a P region 3 (third region), and an N region 2 (fourth region) that are PNPN. It becomes equivalent to a thyristor joined in this order. Here, the P ++ region 32a is a fifth region, and the N ++ region 42a is a sixth region. Thus, the short-circuit thyristor 100a is a so-called bidirectional two-terminal thyristor.

Next, the operation of this embodiment will be described.
The short-circuit thyristor 100a shown in FIG. 2 replaces the P ++ region (31, 32) and the N ++ region (41, 42) of the short-circuit thyristor 100 with a P ++ region (31a, 32a) and an N ++ region (41a, 42a). Works the same except for.

In FIG. 2, the impurity concentration of N ++ region 41 a is higher than the impurity concentration of N region 2. Further, the impurity concentration of the P ++ region 31a is higher than the impurity concentration of the P region 3. For this reason, the junction breakdown voltage of the junction J5a is lower than the junction breakdown voltage of the junction J2. In the first case, the junction J5a between the N ++ region 41a (sixth region) and the P ++ region 31a (fifth region) breaks down before the junction J2. The subsequent operation is the same as that of the short-circuit thyristor 100.
In the short-circuit thyristor 100a, the breakover voltage in the first case is equal to the voltage at which the junction J5a breaks down. The voltage at which the junction J5a breaks down is set by the impurity concentration of the P ++ region 31a and the impurity concentration of the N ++ region 41a. That is, the breakover voltage in the first case is set by the impurity concentration of the P ++ region 31a and the impurity concentration of the N ++ region 41a. The holding current value indicating the current value for maintaining the ON state between the terminal T1 and the terminal T2 is set by a parameter including at least the impurity concentration of the N region 2. Other parameters that determine the holding current value include the impurity concentration and diffusion depth of the P region 1, the impurity concentration and diffusion depth of the P region 3, the pattern shape of the P region 1, and the like. The impurity concentration of the N region 2 is one of parameters that determine the holding current value.

Further, the impurity concentration of the N ++ region 42 a is higher than the impurity concentration of the N region 4. Further, the impurity concentration of the P ++ region 32a is higher than the impurity concentration of the P region 3. For this reason, the junction breakdown voltage of the junction J6a is lower than the junction breakdown voltage of the junction J3. Thus, in the second case, the junction J6a between the N ++ region 42a (sixth region) and the P ++ region 32a (fifth region) breaks down before the junction J3. The subsequent operation is the same as that of the short-circuit thyristor 100.
In the short-circuited thyristor 100a, the breakover voltage in the second case is equal to the voltage at which the junction J6a breaks down. The voltage at which the junction J6a breaks down is set by the impurity concentration of the P ++ region 32a and the impurity concentration of the N ++ region 42a. That is, the breakover voltage in the second case is set by the impurity concentration of the P ++ region 32a and the impurity concentration of the N ++ region 42a. The holding current value indicating the current value for maintaining the ON state between the terminal T2 and the terminal T1 is set by a parameter including at least the impurity concentration of the N region 4. Other parameters that determine the holding current value include the impurity concentration and diffusion depth of the P region 5, the impurity concentration and diffusion depth of the P region 3, and the pattern shape of the P region 5. The impurity concentration of the N region 4 is one of parameters that determine the holding current value.

As described above, the short-circuit thyristor 100a according to this embodiment includes the P ++ region 31a (or 32a) having an impurity concentration higher than that of the P region 3, the N ++ region 41a having an impurity concentration higher than that of the N region 2, and the impurity concentration higher than that of the N region 4. And an N ++ region 42a having a high concentration. Therefore, when a bias voltage is applied between the electrode 11 and the electrode 12, the junction J5a between the P ++ region 31a and the N ++ region 41a before the junction J2 (or the P ++ region 32a and the N ++ region before the junction J3). Breakdown occurs at the junction J6a) with 42a. The breakover voltage at which the short-circuit thyristor 100a is turned on is determined by the junction breakdown voltage between the P ++ region 31a and the N ++ region 41a (or the junction breakdown voltage between the P ++ region 32a and the N ++ region 42a).
This junction breakdown voltage is determined by the impurity concentration of the P ++ region 31a and the N ++ region 41a (or the impurity concentration of the P ++ region 32a and the N ++ region 42a). Therefore, the junction breakdown voltage can be determined without depending on the impurity concentration of the N region 2 (or 4) related to the holding current characteristics.
Thereby, the short-circuit thyristor 100a in the present embodiment can be expected to have the same effect as the short-circuit thyristor 100 in the first embodiment.

<Third Embodiment>
Hereinafter, a short-circuit thyristor according to a third embodiment of the present invention will be described with reference to the drawings.
FIG. 3 is a cross-sectional configuration diagram illustrating the short-circuit thyristor 100b according to the present embodiment.
In FIG. 3, the short-circuit thyristor 100b includes a P region (1a, 1b, 3), an N region (2a, 2b, 4), a channel stopper (6-9), electrodes (11a, 12a), an insulating layer (22a, 22b, 25), P ++ region 31b, and N ++ region (41b, 42b). In this figure, the same components as those in FIG.

The P regions 1a and 1b are p-type semiconductor regions and are formed so as to be exposed to the first surface F1.
N region 2 a is an n-type semiconductor region, and is formed between P region 1 a and P region 3. Part of the N region 2a is in contact with the first surface F1.
N region 2 b is an n-type semiconductor region and is formed between P region 1 b and P region 3. Part of the N region 2b is in contact with the first surface F1.
The N region 4 is an n-type semiconductor region and is formed to be exposed on the second surface F2.

The insulating layer 22a is provided in contact with the first surface F1 and faces the first surface F1. The insulating layer 22a is formed so as to cover a part from the channel stopper 7 to a part of the N region 2a. The insulating layer 22b is provided in contact with the first surface F1 and faces the first surface F1. The insulating layer 22b is formed so as to cover a part of the channel stopper 6 to a part of the N region 2b. The insulating layer 25 is provided in contact with the first surface F1 and faces the first surface F1. The insulating layer 25 is formed so as to cover a part of the P region 1a to a part of the P region 1b.
The electrode 11a includes a part of the P region (1a, 1b) not covered with the insulating layer 25 and the N region (2a, 2b) not covered with the insulating layer (22a, 22b) along the first surface F1. It is formed in contact with a part of. The material of the electrode 11a is a metal, for example, aluminum. The electrode 11a short-circuits the P region (1a, 1b) and the N region (2a, 2b) and is in ohmic contact with the P region (1a, 1b) and the N region (2a, 2b).
The electrode 12a is formed in contact with the N region 4 and the channel stopper (8, 9) along the second surface F2. The material of the electrode 12a is a metal, for example, aluminum. The electrode 12a is in ohmic contact with the N region 4.

The P ++ region 31 b is a p-type semiconductor region that is formed under the insulating layer 25 in contact with the P region 3 and has a higher impurity concentration than the P region 3. Further, the P ++ region 31b is formed so as to be exposed on the first surface F1.
The N ++ region 41b is an n-type semiconductor region formed below the insulating layer 25 in contact with the N region 2a and the P ++ region 31b and having a higher impurity concentration than the N region 2a. The N ++ region 41b is formed so as to be exposed on the first surface F1.
The N ++ region 42b is an n-type semiconductor region formed below the insulating layer 25 in contact with the N region 2b and the P ++ region 31b and having a higher impurity concentration than the N region 2b. The N ++ region 42b is formed so as to be exposed on the first surface F1.
The P ++ region 31b and the N ++ region (41b, 42b) are formed to be exposed on the first surface F1 by, for example, an ion implantation method.

  Note that the N ++ region 41b is arranged so that the distance from the contact surface between the electrode 11a and the N region 2a in the joint portion J2a between the N region 2a and the P region 3 is increased. A desirable arrangement position is the position where the distance from the contact surface between the electrode 11a and the N region 2a is the longest or the vicinity thereof. In the joint portion J7a between the P ++ region 31b and the N ++ region 41b, the joint surface of the joint portion J7a is perpendicular to the first surface F1 in contact with the electrode 11a. In addition, the N ++ region 42b is arranged so that the distance from the contact surface between the electrode 11a and the N region 2b in the joint surface J2b between the N region 2b and the P region 3 is increased. A desirable arrangement position is the position where the distance from the contact surface between the electrode 11a and the N region 2b is the longest or the vicinity thereof. In the joint portion J7b between the P ++ region 31b and the N ++ region 42b, the joint surface of the joint portion J7b is perpendicular to the first surface F1 in contact with the electrode 11a.

In the short-circuit thyristor 100b, a bias voltage is applied between the terminal T1 connected to the electrode 11a and the terminal T2 connected to the electrode 12a, and the first terminal voltage of the terminal T1 is higher than the terminal voltage of the terminal T2. In some cases, it operates as an on-state PNPNP thyristor. In this first case, the short-circuit thyristor 100b includes a P region 1a (first region), an N region 2a (second region), a P region 3 (third region), an N region 4 (fourth region), and P This is equivalent to a thyristor in which the region 1b (first region), the N region 2b (second region), the P region 3 (third region), and the N region 4 (fourth region) are joined in the order of PNPN. Here, the P ++ region 31b is the fifth region, and the N ++ regions (41b, 42b) are the sixth region.
Further, in the second case where the bias voltage is applied between the terminal T2 and the terminal T1 and the terminal voltage of the terminal T2 is higher than the terminal voltage of the terminal T1, the short-circuit thyristor 100b becomes a reverse bias and does not conduct.
Thus, the short-circuit thyristor 100b is a so-called unidirectional two-terminal thyristor.

Next, the operation of this embodiment will be described.
The short-circuit thyristor 100b shown in FIG. 3 operates in the same manner as the short-circuit thyristor 100 shown in FIG. 1 except for the following points.
(1) The short-circuit thyristor 100b is a thyristor having a unidirectional two-terminal structure.
(2) In the short-circuit thyristor 100b, the P region 1 of the short-circuit thyristor 100 is replaced with the P region (1a, 1b), and the N region 2 is replaced with the N region (2a, 2b).
(3) In the short-circuit thyristor 100b, the P ++ region (31, 32) and the N ++ region (41, 42) of the short-circuit thyristor 100 are replaced with the P ++ region 31b and the N ++ region (41b, 42b).

In FIG. 3, the impurity concentration of the N ++ region 41b is higher than the impurity concentration of the N region 2a, and the impurity concentration of the N ++ region 42b is higher than the impurity concentration of the N region 2b. Further, the impurity concentration of the P ++ region 31b is higher than the impurity concentration of the P region 3. Therefore, the junction breakdown voltage of the junction J7a between the N ++ region 41b and the P ++ region 31b is lower than the junction breakdown voltage of the junction J2a between the N region 2a and the P region 3. Further, the junction breakdown voltage of the junction J7b between the N ++ region 42b and the P ++ region 31b is lower than the junction breakdown voltage of the junction J2b between the N region 2b and the P region 3. In the first case where a bias voltage is applied between the terminal T1 and the terminal T2, the junctions J7a and J7b between the N ++ regions 41a and 42a (sixth region) and the P ++ region 31b (fifth region) are joined. Break down before parts J2a and J2b. The subsequent operation is the same as that of the short-circuit thyristor 100.
In the short-circuit thyristor 100b, the breakover voltage in the first case is equal to the voltage at which the junctions J7a and J7b break down. The voltage at which the junctions J7a and J7b break down is set by the impurity concentration of the P ++ region 31b and the impurity concentration of the N ++ regions (41b, 42b). That is, the breakover voltage in the first case is set by the impurity concentration of the P ++ region 31b and the impurity concentration of the N ++ regions (41b, 42b). Further, the holding current value indicating the current value for maintaining the ON state between the terminal T1 and the terminal T2 is set by a parameter including at least the impurity concentration of the N region (2a, 2b). Other parameters that determine the holding current value include the impurity concentration and diffusion depth of the P region (1a, 1b), the impurity concentration and diffusion depth of the P region 3, and the pattern shape of the P region (1a, 1b). Is included. The impurity concentration of the N region (2a, 2b) is one of the parameters that determine the holding current value.

  In the second case where a bias voltage is applied between the terminal T2 and the terminal T1, the short-circuited thyristor 100b is reverse-biased and thus does not conduct.

As described above, the short-circuit thyristor 100b in this embodiment includes the P ++ region 31b having a higher impurity concentration than the P region 3, the N ++ region 41b having a higher impurity concentration than the N region 2a, and the N ++ having a higher impurity concentration than the N region 2b. Region 42b. For this reason, in the first case where a bias voltage is applied between the terminal T1 and the terminal T2, the junction J7a between the P ++ region 31b and the N ++ region 41b before the junction J2a (or P ++ before the junction J2b). A breakdown occurs at the junction J7b) between the region 31b and the N ++ region 42b. The breakover voltage at which the short-circuit thyristor 100b is turned on is determined by the junction breakdown voltage between the P ++ region 31b and the N ++ region 41b (or the junction breakdown voltage between the P ++ region 31b and the N ++ region 42b).
This junction breakdown voltage is determined by the impurity concentration of the P ++ region 31b and the N ++ region 41b (or the impurity concentration of the P ++ region 31b and the N ++ region 42b). Therefore, this junction breakdown voltage can be determined without depending on the impurity concentration of the N regions 2a and 2b related to the holding current characteristics.
Thereby, the short-circuit thyristor 100b in the present embodiment can be expected to have the same effect as the short-circuit thyristor 100 in the first embodiment.

According to the embodiment of the present invention, the first region (P region 1) of the first conductivity type (p-type semiconductor), the second region (N region 2) of the second conductivity type (n-type semiconductor), and the second region The first conductivity type third region (P region 3) and the second conductivity type fourth region (N region 4) are sequentially joined, and the first region (P region 1) and the second region (N region 2). The short-circuiting thyristor 100 having the electrode 11 for short-circuiting is formed in contact with the third region (P region 3) and has a first conductivity type fifth region having a higher impurity concentration than the third region (P region 3). (P ++ region 31) is formed in contact with the second region (N region 2) and the fifth region (P ++ region 31), and has a second conductivity type having a higher impurity concentration than the second region (N region 2). 6 regions (N ++ region 41). The short-circuit thyristor 100 has a breakover voltage value set by the impurity concentration of the fifth region (P ++ region 31) and the impurity concentration of the sixth region (N ++ region 41), and at least the second region (N region 2). The holding current value is set by a parameter including the impurity concentration.
As a result, the short-circuit thyristor 100 can achieve a low breakover voltage without affecting the holding current characteristics.

Further, the fifth region (P ++ region 31) or the sixth region (N ++ region 41) is a joint surface between the second region (N region 2) and the third region (P region 3) (joint surface of the joint portion J2). Among these, the distance from the contact surface between the electrode 11 and the second region (N region 2) is the longest.
As a result, the lateral resistance component in the second region (N region 2) increases. The larger this resistance component, the greater the voltage drop that makes the first region (P region 1) and the second region (N region 2) forward biased. For this reason, the longer this distance, the easier it is for the thyristor to shift to the on state.

Further, at least one of the fifth region (P ++ region 31 or 31a) and the sixth region (N ++ region 41 or 41a) is a surface of the semiconductor substrate in contact with the electrode 11 (first surface F1 or second surface F2). ) And exposed.
Thereby, the short-circuit thyristor 100 can form the fifth region (P ++ region 31) and the sixth region (N ++ region 41) by, for example, ion implantation. The short-circuit thyristor 100 can simplify the manufacturing process.

  The present invention is not limited to the above embodiments, and can be modified without departing from the spirit of the present invention. In each of the above embodiments, the first conductivity type has been described as a p-type semiconductor, and the second conductivity type has been described as an n-type semiconductor. However, the first conductivity type is an n-type semiconductor, and the second conductivity type is a p-type semiconductor. It is also good. In this case, conduction is made in the direction from the fourth region (p-type semiconductor region) to the first region (n-type semiconductor region), and the conduction direction is the reverse of the above embodiments.

In each of the above embodiments, the position of the joint surface at the joint (J5, J5a, J6, J6a, J7a, or J7b) of the fifth region (P ++ region) and the sixth region (N ++ region) is the second position. It may be formed so as to coincide with the bonding surface at the junction (J2, J2a, J2b, or J3) between the region (N region) and the first region (P region), or may be formed at a shifted position. . Moreover, although the form provided with a channel stopper (6-9) was demonstrated, you may apply this invention to the form which is not provided with a channel stopper (6-9).
Further, the fifth region (P ++ region) or the sixth region (N ++ region) is formed by combining the electrode and the second region (N region) in the bonding surface between the second region (N region) and the third region (P region). Although the form which forms in the position where the distance from a contact surface becomes the longest was demonstrated, it is not limited to this. As long as the thyristor can perform an operation of shifting to the on state, the thyristor may be formed in another position. However, the longer the distance from the contact surface between the electrode and the second region (N region), the greater the lateral resistance component. The larger this resistance component, the larger the voltage drop that makes the first region (P region) and the second region (N region) forward biased. For this reason, the longer this distance, the easier it is for the thyristor to shift to the on state.

If the fifth region (P ++ region) is in contact with the third region (P region) and the sixth region (N ++ region) is in contact with the fifth region (P ++ region) and the second region (N region), The shapes and positional relationships of the five regions (P ++ region) and the sixth region (N ++ region) are not limited to the above embodiments. For example, the sixth region (N ++ region) may be arranged below the fifth region (P ++ region).
In the second embodiment, the fifth region (P ++ region) and the sixth region (N ++ region) are vertically stacked, but the fifth region (P ++ region) and the sixth region (N ++) are described. Any one of (region) may be formed by exposing it to the semiconductor substrate. In this case, since any one of the fifth region (P ++ region) and the sixth region (N ++ region) can be formed by, for example, an ion implantation method, the manufacturing process can be simplified.

1, 3, 5, 1a, 1b P region 2, 4, 2a, 2b N region 6, 7, 8, 9 Channel stopper 11, 12, 11a, 12a Electrode 21, 22, 23, 24, 25 Insulating layer 31, 32, 31a, 32a, 31b, 32b P ++ region 41, 42, 41a, 42a, 41b, 42b N ++ region 100, 100a, 100b Short-circuit thyristor

Claims (5)

A first region of the first conductivity type, a second region of the second conductivity type, a third region of the first conductivity type, and a fourth region of the second conductivity type are joined in order, A short-circuit thyristor having an electrode for short-circuiting the region and the second region,
A fifth region of the first conductivity type formed in contact with the third region and having an impurity concentration higher than that of the third region;
A sixth region of the second conductivity type formed in contact with the second region and the fifth region and having an impurity concentration higher than that of the second region;
A breakover voltage value is set by the impurity concentration of the fifth region and the impurity concentration of the sixth region, and a holding current value is set by a parameter including at least the impurity concentration of the second region. Type thyristor. The fifth region or the sixth region is formed at a position where the distance from the contact surface between the electrode and the second region is the longest among the joint surfaces between the second region and the third region. The short-circuit thyristor according to claim 1. 3. The short-circuit thyristor according to claim 1, wherein a joint surface between the fifth region and the sixth region is perpendicular to a surface of a semiconductor substrate in contact with the electrode. 3. The short-circuit thyristor according to claim 1, wherein a joint surface between the fifth region and the sixth region is parallel to a surface of a semiconductor substrate in contact with the electrode. 5. The device according to claim 1, wherein at least one of the fifth region and the sixth region is formed so as to be exposed on a surface of a semiconductor substrate in contact with the electrode. Short-circuit thyristor.

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