JP2011249395A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
JP2011249395A
JP2011249395A JP2010118266A JP2010118266A JP2011249395A JP 2011249395 A JP2011249395 A JP 2011249395A JP 2010118266 A JP2010118266 A JP 2010118266A JP 2010118266 A JP2010118266 A JP 2010118266A JP 2011249395 A JP2011249395 A JP 2011249395A
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JP
Japan
Prior art keywords
lead
semiconductor device
solder
internal
semiconductor element
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Granted
Application number
JP2010118266A
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Japanese (ja)
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JP5270614B2 (en
Inventor
Takuya Oga
琢也 大賀
Masaki Kato
政紀 加藤
Takeshi Sugihara
剛 杉原
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Priority to JP2010118266A priority Critical patent/JP5270614B2/en
Publication of JP2011249395A publication Critical patent/JP2011249395A/en
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Publication of JP5270614B2 publication Critical patent/JP5270614B2/en
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device capable of reducing the distance on a flat plane between leads and a semiconductor element where plate-like internal leads are used for connection and also capable of suppressing variation in the joined positions of the internal leads through improved reliability of joints.SOLUTION: A protruded part with a flat and circular top of a second lead is formed by a dowel-shaping process, thereby suppressing changes in the planar shape of the second lead. Further, the surface of the protruded part is covered with a solder to secure a solder thickness by an amount equal to the height of the protruded part, thereby improving the reliability of solder joints. The internal leads on a semiconductor element are corrected for irregular placement by a self-alignment effect of interposing molten solder, so that the joined positions of the internal leads are normalized.

Description

本発明は、ＭＯＳ−ＦＥＴを用いたパワー用インバータ回路を構成するための樹脂封止型の半導体装置に関する。   The present invention relates to a resin-encapsulated semiconductor device for constituting a power inverter circuit using a MOS-FET.

車両用回転電機への制御装置一体化や、車載機器の小型化が進められるに伴い、それらに用いられる半導体装置も小型化、軽量化が求められている。
従来の半導体装置として、第１のリード下面および第２のリード下面が樹脂封止下面と同一面で、かつ、パワー素子の電極へ平板状の内部リードをはんだ付けする構造が開示されている（例えば、特許文献１参照）。 As control devices are integrated into a vehicular rotating electrical machine and downsizing of in-vehicle devices is progressed, semiconductor devices used for them are also required to be downsized and light.
As a conventional semiconductor device, a structure is disclosed in which a first lead lower surface and a second lead lower surface are flush with a resin-encapsulated lower surface, and a flat internal lead is soldered to an electrode of a power element ( For example, see Patent Document 1).

特許第４４１６１４０号Patent No. 4416140

従来の半導体装置は、第２のリード上に半導体素子を載置するものであり、半導体素子の上面と第１のリードの上面に、水平に伸びるように内部リードを配置させるため、第１のリードと内部リードとの接合部を、半導体素子の上面の高さに揃える必要があり、第１のリードを屈曲させて高さを稼ぎ、半導体素子と同じ高さの水平面を構成していた。   In the conventional semiconductor device, the semiconductor element is mounted on the second lead, and the first lead is disposed so as to extend horizontally on the upper surface of the semiconductor element and the upper surface of the first lead. The joint between the lead and the internal lead must be aligned with the height of the upper surface of the semiconductor element, and the first lead is bent to increase the height, thereby forming a horizontal plane having the same height as the semiconductor element.

ここで、第１のリードと第２のリードは、一つの平板をプレス機で打ち抜き加工して切り目を設けた二つの端子部によって構成されており、第１のリードと第２のリードの先端部（端部）上にそれぞれ内部リードの一端、他端がそれぞれ配置されてブリッジする状態で両者を接続するが、樹脂封止までの段階では、第１のリードと第２のリードの他端部（内部リードが接続されない側の端部）は元の一つの平板（リードフレーム）に接続固定されている。   Here, the first lead and the second lead are constituted by two terminal portions having a notch formed by punching one flat plate with a press machine, and the leading ends of the first lead and the second lead. One end and the other end of the internal lead are respectively arranged on the part (end part) and are connected in a bridge state, but at the stage until resin sealing, the other end of the first lead and the second lead The portion (the end on the side where the internal lead is not connected) is connected and fixed to the original flat plate (lead frame).

リードフレームに他端が接続された第１のリードの端部（第二のリードに近い部分）を屈曲させた場合、第１、第２のリード間の距離が、第１のリードを水平面から突出させる量だけ水平面上で余計に離間してしまう状態となっていた。
そのため、第１のリードを屈曲させた構造では、半導体装置の面積を小さくすることが難しく、また、第１のリードと内部リードの間に接合部材としてはんだ層を設けても、その厚さを十分に確保することができず、接合強度の低下が懸念された。 When the end of the first lead (the portion close to the second lead) whose other end is connected to the lead frame is bent, the distance between the first and second leads is such that the first lead is It was in a state of being further separated on the horizontal plane by the amount to be projected.
Therefore, in the structure in which the first lead is bent, it is difficult to reduce the area of the semiconductor device, and even if a solder layer is provided as a bonding member between the first lead and the internal lead, the thickness thereof is reduced. It could not be ensured sufficiently, and there was concern about a decrease in bonding strength.

また、従来技術にあるように、第１のリードと内部リードを凹凸により位置合わせする構造とした場合に内部リード他端の配置に制約が生じるために、内部リードと半導体素子との配置にばらつきが生じ、また、半導体素子と第２のリードまたは内部リードとの接合をはんだ付けによって行うために、第２のリードに対して半導体素子および内部リードの配置にばらつきが生じることになり、半導体素子内の電流分布がばらつくことが懸念された。   In addition, as in the prior art, when the first lead and the internal lead are configured to be aligned by unevenness, there is a restriction on the arrangement of the other end of the internal lead, resulting in variations in the arrangement of the internal lead and the semiconductor element. In addition, since the semiconductor element and the second lead or the internal lead are joined by soldering, the arrangement of the semiconductor element and the internal lead varies with respect to the second lead. There was concern that the current distribution would vary.

本発明は、上記のような問題を解決するためになされたものであり、半導体装置を構成するリードの屈曲を無くし、半導体装置の小型化を可能とし、リードと内部リードの接合強度を向上させることを目的とする。
また、各リードと内部リードとの接合位置のばらつきを抑制し、半導体素子内の電流分
布の偏りを抑制することが可能な半導体装置を得ることを目的とする。 The present invention has been made to solve the above problems, eliminates bending of leads constituting the semiconductor device, enables miniaturization of the semiconductor device, and improves the bonding strength between the lead and the internal lead. For the purpose.
It is another object of the present invention to obtain a semiconductor device capable of suppressing variation in the bonding position between each lead and internal lead and suppressing uneven current distribution in the semiconductor element.

この発明に係わる半導体装置は、平板状の第一のリード、上記第一のリードと離間して同一平面上に配置された平板状の第二のリード、上記第二のリードの端部形状は変化させず平面部の一部を突出させてなる突起部、上記第一のリード上に載置された半導体素子、一端が上記半導体素子上に第一の接合部材を介して接合され、他端が上記第二のリードに設けられた上記突起部上に第二の接合部材を介して接合された平板状の内部リード、上記内部リードおよび上記半導体素子を含む上記第一、第二のリード上面を覆って封止するとともに、上記第一、第二のリードの外部との接続のための端子部分を露出させる封止樹脂を備え、上記第二のリードの平面よりも突出した上記突起部の表面部を覆うように上記第二の接合部材が配置されたものである。   The semiconductor device according to the present invention includes a flat plate-like first lead, a flat plate-like second lead spaced apart from the first lead, and arranged on the same plane, and the end shape of the second lead is A protrusion formed by protruding a part of the flat surface without changing, a semiconductor element placed on the first lead, and one end bonded to the semiconductor element via a first bonding member, and the other end The upper surface of the first and second leads including a flat plate-like internal lead, the internal lead, and the semiconductor element, which are joined to the protrusion provided on the second lead via a second joining member And a sealing resin that exposes a terminal portion for connection to the outside of the first and second leads, the protrusion of the protrusion protruding from the plane of the second lead The second bonding member is placed so as to cover the surface part A.

この発明の半導体装置によれば、突起部が、第二のリードの端部形状を維持したまま平面部の一部を突出させた形状であるため、突起部形成前後で第一のリードと第二のリード間の平面上での距離が変化することがなく、また、第二のリードの平面よりも突出した突起部の表面部を覆うように第二の接合部材を配置することで、突起部の高さに相当した厚みの第二の接合部材を配置でき、第二のリードと内部リードとを接合するための第二の接合部材の量を十分に確保することが可能となる。   According to the semiconductor device of the present invention, since the protruding portion has a shape in which a part of the planar portion protrudes while maintaining the end shape of the second lead, the first lead and the first lead are formed before and after forming the protruding portion. The distance between the two leads on the plane does not change, and the second bonding member is arranged so as to cover the surface portion of the protrusion protruding beyond the plane of the second lead, thereby A second joining member having a thickness corresponding to the height of the portion can be disposed, and a sufficient amount of the second joining member for joining the second lead and the internal lead can be secured.

本発明の実施の形態１の半導体装置の断面図である。It is sectional drawing of the semiconductor device of Embodiment 1 of this invention. 本発明の実施の形態１の内部リードの平面図および側面図である。It is the top view and side view of an internal lead of Embodiment 1 of the present invention. 本発明の実施の形態１の半導体装置の要部平面図である。1 is a plan view of a principal part of a semiconductor device according to a first embodiment of the present invention. 本発明の実施の形態１のリードフレーム加工工程を示す工程図である。It is process drawing which shows the lead frame processing process of Embodiment 1 of this invention. 本発明の実施の形態１のはんだ供給工程を示す工程図である。It is process drawing which shows the solder supply process of Embodiment 1 of this invention. 本発明の実施の形態１の内部リード配置後はんだ溶融前後の半導体装置の要部平面図である。It is a principal part top view of the semiconductor device before and after solder melting after arrangement of internal leads of Embodiment 1 of the present invention. 本発明の実施の形態２の半導体装置の断面図である。It is sectional drawing of the semiconductor device of Embodiment 2 of this invention. 本発明の実施の形態２の内部リードの平面図および側面図（断面図）である。It is the top view and side view (sectional drawing) of the internal lead of Embodiment 2 of this invention. 本発明の実施の形態３の半導体装置を示す平面図である。It is a top view which shows the semiconductor device of Embodiment 3 of this invention. 本発明の実施の形態３の半導体装置の電気回路を示す図である。It is a figure which shows the electric circuit of the semiconductor device of Embodiment 3 of this invention. 本発明の実施の形態３の半導体装置を用いた回転電機を示す図である。It is a figure which shows the rotary electric machine using the semiconductor device of Embodiment 3 of this invention.

実施の形態１．
次に、この発明の実施の形態１について、図１〜６を用いて説明する。
図１は、本発明の実施の形態１の半導体装置１の断面図である。
図１に示すように、プレス機による打ち抜き加工で成型された第一のリード１１、第二のリード１２、ゲート用リード１３は、それぞれ同一平面上に配置された状態である。第一のリード１１上にはＭＯＳＦＥＴ素子（半導体素子）２１が配置される。このＭＯＳＦＥＴ素子２１は、上面に上面電極２２が、下面に下面電極２３が設けられ、さらに上面電極２２と離間した領域（上面）にゲート電極２４が形成されている。ＭＯＳＦＥＴ素子２１と第一のリード１１は、はんだ５１を介して接合されている。 Embodiment 1 FIG.
Next, Embodiment 1 of the present invention will be described with reference to FIGS.
FIG. 1 is a sectional view of a semiconductor device 1 according to the first embodiment of the present invention.
As shown in FIG. 1, the first lead 11, the second lead 12, and the gate lead 13 molded by punching with a press machine are arranged on the same plane. A MOSFET element (semiconductor element) 21 is disposed on the first lead 11. The MOSFET element 21 has an upper surface electrode 22 on the upper surface, a lower surface electrode 23 on the lower surface, and a gate electrode 24 in a region (upper surface) spaced from the upper surface electrode 22. The MOSFET element 21 and the first lead 11 are joined via a solder 51.

ＭＯＳＦＥＴ素子２１の上面は、上面電極２２を円形に露出させる開口部とゲート電極２４を露出させる開口部が設けられた保護膜２５によって覆われた状態であり、上面電極２２を露出させた開口部にははんだ（第一の接合部材）５２が配置される。このはんだ５
２によって、ＭＯＳＦＥＴ素子２１とＭＯＳＦＥＴ素子２１上に配置される内部リード３１の端部との接合がなされる。 The upper surface of the MOSFET element 21 is covered with a protective film 25 provided with an opening that exposes the upper electrode 22 in a circular shape and an opening that exposes the gate electrode 24, and the opening that exposes the upper electrode 22. A solder (first joining member) 52 is disposed on the surface. This solder 5
2 joins the MOSFET element 21 and the end portion of the internal lead 31 disposed on the MOSFET element 21.

また、第一のリード１１と離間して配置される第二のリード１２は、上面側に凸状に突出する突起部６１がダボ出し加工によって形成されている。ダボ出し加工であれば、屈曲加工と違って、第二のリード１２の平面部の一部を変形させて凸部を形成する加工であるため、第二のリード１２の端部形状（平面図における輪郭形状。）は加工の前後で変化しない。ダボ出し加工によって形成される突起部６１は、最も高い部分となる平坦な上面の平面形状が円形であり、第二のリード１２の上面から突起部６１の上面に至る立ち上がり部は略円筒状に形成され、立ち上がり角度はほぼ直角である。なお、加工特性上、突起部６１を構成する膜の厚さは、第二のリード１２の膜厚よりも小さくなる。   In addition, the second lead 12 that is spaced apart from the first lead 11 is formed with a protrusion 61 protruding in a convex shape on the upper surface side by doweling. Unlike the bending process, the doweling process is a process in which a part of the flat portion of the second lead 12 is deformed to form a convex portion. Therefore, the end shape of the second lead 12 (plan view) The contour shape in) does not change before and after processing. The protrusion 61 formed by the doweling process has a circular planar shape on the flat upper surface that is the highest portion, and the rising portion from the upper surface of the second lead 12 to the upper surface of the protrusion 61 is substantially cylindrical. It is formed and the rising angle is almost a right angle. Note that, due to processing characteristics, the thickness of the film constituting the protrusion 61 is smaller than the film thickness of the second lead 12.

さらに、突起部６１の表面部である上面および外側面は、はんだ（第二の接合部材）５３によって覆われた状態である。このはんだ５３を介して、突起部６１上に配置される内部リード３１の他端と第二のリード１２との接合がなされる。なお、第二のリード１２の平面よりも突出した突起部６１の表面を覆うようにはんだ５３が配置された状態となるため、はんだ５３の高さ方向における厚さを、突起部６１の高さ分だけ（高さに応じて）確保することができ、はんだ接合信頼性を向上させることが可能である。   Furthermore, the upper surface and the outer surface, which are the surface portions of the protrusion 61, are covered with the solder (second bonding member) 53. The second lead 12 is joined to the other end of the internal lead 31 disposed on the protruding portion 61 via the solder 53. Since the solder 53 is disposed so as to cover the surface of the protruding portion 61 protruding from the plane of the second lead 12, the thickness of the solder 53 in the height direction is set to the height of the protruding portion 61. Therefore, it is possible to secure a sufficient amount (depending on the height), and it is possible to improve the solder joint reliability.

また、封止樹脂４１によって、第一のリード１１、第二のリード１２およびゲート用リード１３の上面を、ＭＯＳＦＥＴ素子２１および内部リード３１を含めて封止している。このとき、各リードの、外部との接続端子となる部分は露出された状態となる。
ゲート電極２４とゲート用リード１３とは、アルミワイヤ７１によって互いに接続されている。 In addition, the upper surfaces of the first lead 11, the second lead 12, and the gate lead 13 including the MOSFET element 21 and the internal lead 31 are sealed with a sealing resin 41. At this time, a portion of each lead that becomes a connection terminal to the outside is exposed.
The gate electrode 24 and the gate lead 13 are connected to each other by an aluminum wire 71.

次に、図２（ａ）に内部リード３１の平面図（上側の図）および側面図（下側の図）を示す。内部リード３１の平面形状は、所定幅で一方向に伸びる略短冊状であり、所定幅の中心を通る線（中心線）を基準とした左右対称形状である。また、内部リード３１が平板状で、上下方向への配置が限定されるため、半導体装置の薄型化に寄与している。さらに、内部リード３１は、ＭＯＳＦＥＴ素子２１が重ね合わされる側の端部が、半円形（端部形状が１／２円弧）の円弧部３１ａとなっている。
また、円弧を形成する角度をより増大させた場合は、図２（ｂ）に示すような、中心角が半円よりも大きな円弧部３２ａ（例えば、３／４円弧。）が、両端部に設けられた内部リード３２となる。 Next, FIG. 2A shows a plan view (upper view) and a side view (lower view) of the internal lead 31. The planar shape of the internal lead 31 is a substantially strip shape extending in one direction with a predetermined width, and is a bilaterally symmetric shape with reference to a line (center line) passing through the center of the predetermined width. Moreover, since the internal lead 31 is flat and the arrangement | positioning to an up-down direction is limited, it has contributed to thickness reduction of a semiconductor device. Further, the end portion of the internal lead 31 on the side where the MOSFET element 21 is overlapped is a semicircular arc portion 31a (the end portion shape is a 1/2 arc).
Further, when the angle forming the arc is further increased, as shown in FIG. 2B, arc portions 32a (for example, 3/4 arcs) having a central angle larger than a semicircle are formed at both ends. It becomes the provided internal lead 32.

上述した通り、ＭＯＳＦＥＴ素子２１上の保護膜２５の開口部からは上面電極２２が円形状に露出しているが、保護膜２５の開口部に供給された円形のはんだ５２に、同心となるように内部リード３１の端部（円弧部３１ａ、３２ａ）を配置した場合に、位置ズレが生じていない正確な配置である場合、ほどんどの部分が重なり合う状態となる。なお、実際には、はんだ５２の耐久性確保のためにフィレットを形成するため、内部リード３１の円弧部３１ａよりも、保護膜２５に開口される開口部の径の方が少し大きくなる。   As described above, the upper surface electrode 22 is exposed in a circular shape from the opening of the protective film 25 on the MOSFET element 21, but is concentric with the circular solder 52 supplied to the opening of the protective film 25. When the end portions (arc portions 31a, 32a) of the internal lead 31 are arranged in an accurate arrangement with no positional deviation, most of the portions overlap each other. Actually, since the fillet is formed to ensure the durability of the solder 52, the diameter of the opening portion opened in the protective film 25 is slightly larger than the arc portion 31 a of the internal lead 31.

図３は本発明の実施の形態１の上面図を示している。上述したように、ＭＯＳＦＥＴ素子２１上には、円形形状の開口部２５ａと、ゲート接続部となる開口部２５ｂが開口された保護膜２５が備えられており、はんだ５２の形状は開口部２５ａの輪郭に沿って円形に成型されている。内部リード３１は、ＭＯＳＦＥＴ素子２１に対して、内部リード３１の円弧とはんだ５２の円形形状が同心円状に位置している。   FIG. 3 shows a top view of the first embodiment of the present invention. As described above, the MOSFET element 21 is provided with the protective film 25 having the opening 25a having a circular shape and the opening 25b serving as the gate connection portion, and the solder 52 has the shape of the opening 25a. It is molded in a circle along the contour. In the internal lead 31, the arc of the internal lead 31 and the circular shape of the solder 52 are located concentrically with respect to the MOSFET element 21.

次に、上記のような半導体装置の製造工程について説明する。
まず、リードフレーム材料として銅板を投入する（材料投入）。銅板は、量産時におい
ては帯状となっている。
次に、図４（ａ）に平面工程図を示すように、プレス機で銅板１０を抜き加工し、各リード（第一のリード１１、第二のリード１２、ゲート用リード１３）の端部が外枠となる銅板１０に繋がって一続きとなった状態を得る。
その後、図４（ｂ）に示すように、プレス機で第二のリード１２の先端部に、ダボ出し加工を行い、突起部６１を形成する。各リードは、後述する樹脂封止工程の後に、外枠となる銅板１０から切り離されるが、それまでは繋がった状態で製造が進められるものである。このようにリードフレームが形成される（リードフレーム加工）。 Next, a manufacturing process of the semiconductor device as described above will be described.
First, a copper plate is input as a lead frame material (material input). The copper plate has a band shape at the time of mass production.
Next, as shown in the plan process diagram in FIG. 4A, the copper plate 10 is punched with a press machine, and the ends of the respective leads (first lead 11, second lead 12, gate lead 13). Is connected to the copper plate 10 as an outer frame to obtain a continuous state.
Thereafter, as shown in FIG. 4B, doweling is performed on the tip of the second lead 12 with a press machine to form the protrusion 61. Each lead is cut off from the copper plate 10 serving as an outer frame after a resin sealing step to be described later, but until then, the manufacturing is proceeded in a connected state. In this way, a lead frame is formed (lead frame processing).

この時、ダボ出し加工前後の図４（ａ）、（ｂ）での、第一のリード１１と第二のリード１２間の距離ｄには変化が生じない。第二のリード１２の突起部６１に代えて、従来のような折り曲げ加工による屈曲（段差）部を構成する場合、第二のリード１２と第一のリード１１との距離は、およそｄ＋ｈ（ｈは段差の高さ。）に近い数値となる。この場合、内部リード３１で接続すべき二つのリード間の距離が大きくなり、半導体装置の高集積化が困難となる。本願発明のようなダボ出し加工であれば、第二のリード１２の投影形状の変形はなく、高集積化を阻害しない。   At this time, there is no change in the distance d between the first lead 11 and the second lead 12 in FIGS. 4A and 4B before and after doweling. In the case of forming a bent (step) portion by a conventional bending process instead of the protruding portion 61 of the second lead 12, the distance between the second lead 12 and the first lead 11 is approximately d + h (h Is close to the height of the step.) In this case, the distance between the two leads to be connected by the internal lead 31 becomes large, and it becomes difficult to achieve high integration of the semiconductor device. If the doweling process is as in the present invention, the projection shape of the second lead 12 is not deformed, and high integration is not hindered.

次に、はんだ印刷機（スクリーン印刷機）でリードフレーム１０上にＭＯＳＦＥＴ素子２１の接合用のクリームはんだ（はんだ５１）を印刷する（はんだ印刷）。ディスペンサによる供給でもクリームはんだを塗布できるが、印刷の方が精度良くパターニングすることができる。
その後、第一のリード１１上のクリームはんだ（はんだ５１）の上に、マウンタでＭＯＳＦＥＴ素子２１を載せる（半導体素子搭載）。このＭＯＳＦＥＴ素子２１の上面には、円形の開口部２５ａをもつ保護膜２５が被膜されている。 Next, cream solder (solder 51) for joining the MOSFET elements 21 is printed on the lead frame 10 by a solder printer (screen printer) (solder printing). Cream solder can be applied even by supplying with a dispenser, but printing can be more accurately patterned.
Thereafter, the MOSFET element 21 is mounted on the cream solder (solder 51) on the first lead 11 by a mounter (semiconductor element mounting). A protective film 25 having a circular opening 25 a is coated on the upper surface of the MOSFET element 21.

次に、リードフレーム１０をリフロー装置に通すことで、リードフレーム１０を加熱し、はんだを溶融させ、リードフレーム１０とＭＯＳＦＥＴ素子２１をはんだ付けする（はんだ溶融）。その後、クリームはんだは、冷却されて固体のはんだ５１となる。
なお、ダイボンダ１台で上記工程を処理する場合もあり、その場合は、クリームはんだに代えて糸はんだが供給される。 Next, the lead frame 10 is passed through a reflow device, whereby the lead frame 10 is heated to melt the solder, and the lead frame 10 and the MOSFET element 21 are soldered (solder melting). Thereafter, the cream solder is cooled to become a solid solder 51.
Note that the above process may be processed by one die bonder, and in that case, thread solder is supplied instead of cream solder.

次に、図５（ａ）に平面工程図を、図５（ｂ）および（ｃ）に側断面図を示すように、ディスペンサ５０で、ＭＯＳＦＥＴ素子２１上の保護膜２５の開口部２５ａと、第二のリード１２の突起部６１上部にクリームはんだ５２ａ、５３ａを順次を供給する。
次に、クリームはんだ５２ａ、５３ａの上に、マウンタで内部リード３１を搭載する（内部リード搭載）。その後、リフロー装置に通し、リードフレーム１０を加熱し、はんだを溶融させ、ＭＯＳＦＥＴ素子２１と内部リード３１、第二のリード１２と内部リード３１をはんだ付けする（はんだ溶融）。このはんだ溶融時に、内部リード３１は、セルフアライメント効果によって位置ずれを補正される。 Next, as shown in FIG. 5A and FIG. 5B and FIG. 5C, a side sectional view is shown, and with the dispenser 50, an opening 25a of the protective film 25 on the MOSFET element 21, The cream solders 52a and 53a are sequentially supplied to the upper portion of the protrusion 61 of the second lead 12.
Next, the internal leads 31 are mounted on the cream solders 52a and 53a by a mounter (internal lead mounting). Thereafter, the lead frame 10 is heated through a reflow device to melt the solder, and the MOSFET element 21 and the internal lead 31 and the second lead 12 and the internal lead 31 are soldered (solder melting). When this solder is melted, the internal lead 31 is corrected for misalignment by the self-alignment effect.

図６（ａ）は、内部リード３１が製造過程にある半導体装置のクリームはんだ５２ａ、５３ａ上に載置された状態を示す上面図である。この状態で、内部リード３１の中心線は、保護膜２５の円形の開口部２５ａの中心からずれており、また突起部６１の中心からもずれた状態となっている。このように、内部リード３１がＭＯＳＦＥＴ素子２１の本来配置されるべき位置からはずれていても、また、開口部２５ａの全面にはんだ５２が広がっていなくても、その後のはんだ溶融工程ではんだが溶融した時に保護膜２５の開口部２５ａの形状に合わせてはんだ５２が濡れ、開口部２５ａに位置が規制されたはんだ５２の表面張力により、セルフアライメント効果によって内部リード３１が図６（ｂ）のように所定の位置へ引き寄せられ、内部リード３１の位置補正がなされる。   FIG. 6A is a top view showing a state in which the internal lead 31 is placed on the cream solders 52a and 53a of the semiconductor device in the manufacturing process. In this state, the center line of the internal lead 31 is shifted from the center of the circular opening 25 a of the protective film 25 and is also shifted from the center of the protrusion 61. As described above, even if the internal lead 31 is displaced from the position where the MOSFET element 21 is supposed to be disposed or the solder 52 does not spread over the entire surface of the opening 25a, the solder is melted in the subsequent solder melting step. 6B, the solder 52 gets wet according to the shape of the opening 25a of the protective film 25, and the surface tension of the solder 52 whose position is regulated by the opening 25a causes the internal lead 31 to have a self-alignment effect as shown in FIG. Thus, the position of the internal lead 31 is corrected.

なお、内部リード３１の他端は、内部リード３１が平板であるため、はんだ５３に密着する面も平坦面であり、リフロー時に、突起部６１上のクリームはんだ５３ａが溶融し、突起部６１の表面部に濡れ広がる状態となり、上述したようなはんだ５２の表面張力に引っ張られて水平移動することを妨げず、内部リード３１の両端での位置ズレ（つまり内部リード３１全体の位置ズレ）の補正がなされる。
ここで、内部リード３１は、中心線を基準とした左右対称形状であり、重心が対称軸上にあるため、溶融はんだ５２、５３上に載置された状態でも、バランスを崩しにくい構造となっていることは言うまでもない。 The other end of the internal lead 31 is a flat surface because the internal lead 31 is a flat plate, and the cream solder 53a on the protrusion 61 is melted during reflow and the protrusion 61 has a flat surface. Correction of positional misalignment at both ends of the internal lead 31 (that is, positional misalignment of the entire internal lead 31) without obstructing horizontal movement by being pulled by the surface tension of the solder 52 as described above. Is made.
Here, since the internal lead 31 has a symmetrical shape with respect to the center line and the center of gravity is on the axis of symmetry, the internal lead 31 has a structure in which the balance is not easily lost even when placed on the molten solders 52 and 53. Needless to say.

従来では、半導体素子の配置ばらつきに関係なく内部リードを所定の位置に配置していたため、位置ズレした半導体素子の中心は内部リードの中心線上に配置されず、半導体装置の性能ばらつきの原因となっていた。しかし、本発明の半導体装置によれば、半導体素子の載置時に位置ズレが生じたとしても、配置ばらつきを補正するように、開口部２５ａに位置が規制されたはんだ５２の表面張力によって、内部リード３１を自動的に、内部リード３１の中心線が、半導体素子の中心側へ近づくように位置合わせできる。そのため、完成した半導体装置の性能ばらつきを抑制することができる。   Conventionally, the internal leads are arranged at predetermined positions regardless of the variation in the arrangement of the semiconductor elements. Therefore, the center of the misaligned semiconductor elements is not arranged on the center line of the internal leads, which causes the fluctuation in performance of the semiconductor device. It was. However, according to the semiconductor device of the present invention, even if a positional deviation occurs when the semiconductor element is placed, the internal tension is caused by the surface tension of the solder 52 whose position is regulated by the opening 25a so as to correct the arrangement variation. The lead 31 can be automatically aligned so that the center line of the internal lead 31 approaches the center side of the semiconductor element. Therefore, it is possible to suppress the performance variation of the completed semiconductor device.

なお、クリームはんだ５２ａ、５３ａ供給後のリフロー前の段階では、図５（ｃ）に示したように、突起部６１上部にクリームはんだ５３ａのかたまりが乗った状態で配置されているが、リフロー後は、図１の完成図にあるはんだ５３と同じ形状となる。つまり、クリームはんだ５３ａが溶融して突起部６１の側面部全面に周り込み、突起部６１の全高さにわたって、その表面部をはんだ５３が覆う状態となる。このように、内部リード３１の一端は第二のリード１２とはんだ５３で接合されるが、はんだ溶融工程ではんだが溶融しても内部リード３１の一端は突起部６１に支えられるので、はんだ５３の厚みを突起部６１の高さ分だけ確保することができる。
従って、はんだ５３の厚みを確保することで、温度サイクルで生じる熱ストレスに対して応力を緩和しやすくなり、はんだ接合部の信頼性を高めることが可能となる。 In addition, in the stage before reflow after supplying cream solder 52a, 53a, as shown in FIG.5 (c), it has arrange | positioned in the state where the lump of cream solder 53a got on top of the projection part 61, but after reflow Is the same shape as the solder 53 in the completed drawing of FIG. That is, the cream solder 53 a melts and goes around the entire side surface of the protrusion 61, and the solder 53 covers the entire surface of the protrusion 61 over the entire height. As described above, one end of the internal lead 31 is joined to the second lead 12 by the solder 53, but even if the solder is melted in the solder melting process, the one end of the internal lead 31 is supported by the protruding portion 61. Can be ensured by the height of the protrusion 61.
Therefore, by ensuring the thickness of the solder 53, it becomes easy to relieve the stress against the thermal stress generated in the temperature cycle, and the reliability of the solder joint can be improved.

次に、リフロー工程でクリームはんだから流れ出たフラックスを洗い流す（洗浄）。
その後、ＭＯＳＦＥＴ素子２１のゲート電極２４とリードフレーム１０のゲート用リード１３とを、素子配置面側にてアルミワイヤ７１で接続する（ワイヤボンド）。アルミワイヤ７１とゲート端子およびゲート用リード１３との接合は、ワイヤボンダで超音波接合することで行う。
次に、成型機と成型金型を用いて、封止樹脂１４を注入し、樹脂封止（樹脂成型）を行う（樹脂封止）。
その後、プレス機でリードフレーム１０の余分な部分を切断除去する（タイバーカット）。このような処理によって、図１に示す半導体装置１を得ることができる。 Next, the flux that has flowed out of the cream solder in the reflow process is washed away (cleaning).
Thereafter, the gate electrode 24 of the MOSFET element 21 and the gate lead 13 of the lead frame 10 are connected by an aluminum wire 71 on the element arrangement surface side (wire bonding). The aluminum wire 71 is bonded to the gate terminal and the gate lead 13 by ultrasonic bonding with a wire bonder.
Next, the sealing resin 14 is injected using a molding machine and a molding die, and resin sealing (resin molding) is performed (resin sealing).
Thereafter, an excess portion of the lead frame 10 is cut and removed with a press machine (tie bar cut). By such processing, the semiconductor device 1 shown in FIG. 1 can be obtained.

なお、上述の例においては、突起部６１の上面の平面形状は円形としたが、これに限るものではなく、図示しない四角形やその他多角形、あるいは楕円形や長円形とすることも可能である。
また、はんだ５２によるリフロー時のセルフアライメント効果は、リード端部形状と保護膜２５の開口部２５ａ形状（はんだ５２ａの平面形状）が一致する場合に最も大きく作用するものである。また、溶融はんだの平面形状に合致する、保護膜２５の開口部２５ａは、円形とすることでリフロー時のはんだ形状が安定する。 In the above-described example, the planar shape of the upper surface of the protrusion 61 is a circle. However, the shape is not limited to this, and may be a rectangle, other polygons, an ellipse, or an oval not shown. .
Further, the self-alignment effect during reflow by the solder 52 is most effective when the lead end shape matches the shape of the opening 25a of the protective film 25 (planar shape of the solder 52a). Moreover, the opening 25a of the protective film 25 that matches the planar shape of the molten solder is circular, so that the solder shape during reflow is stabilized.

実施の形態２．
次に、この発明の実施の形態２について図７および図８を用いて説明する。
先述の実施の形態１では、内部リード３１は、上面および裏面が平らな平板状であったが、この実施の形態２では、ＭＯＳＦＥＴ素子２１の上面に配置されるはんだ層を所定の
厚さに確保するために、図７に示すように、内部リード３３の、ＭＯＳＦＥＴ素子２１に対向する面部から下向きに突出する突出部６４を設けたことを特徴としている。 Embodiment 2. FIG.
Next, a second embodiment of the present invention will be described with reference to FIGS.
In the above-described first embodiment, the internal lead 31 has a flat plate shape whose upper surface and back surface are flat. However, in this second embodiment, the solder layer disposed on the upper surface of the MOSFET element 21 has a predetermined thickness. In order to ensure this, as shown in FIG. 7, a protruding portion 64 that protrudes downward from the surface portion of the internal lead 33 facing the MOSFET element 21 is provided.

実施の形態２による内部リード３３の平面図および断面図を図８（ａ）に示す。図８（ａ）のように、突き当たり面となる円形の平坦面を持つ突出部６４を設けることで、突出部６４の高さ分だけＭＯＳＦＥＴ素子２１の上面電極２２と内部リード３３の下側平面との間隔をとり、その隙間にはんだ５２を充填させることで十分な量のはんだ５２を確保でき、はんだ接合部の信頼性を向上させることが可能となる。図８（ｂ）に示すように、内部リード３４の一方の円弧部３２ａ側に、突出部６５を２ヶ所（複数ヶ所）に設けることも可能である。   FIG. 8A shows a plan view and a cross-sectional view of the internal lead 33 according to the second embodiment. As shown in FIG. 8A, by providing the projecting portion 64 having a circular flat surface as a contact surface, the upper surface electrode 22 of the MOSFET element 21 and the lower plane of the internal lead 33 by the height of the projecting portion 64. And a sufficient amount of solder 52 can be secured, and the reliability of the solder joint can be improved. As shown in FIG. 8B, it is also possible to provide the protrusions 65 at two places (a plurality of places) on the one arc portion 32a side of the internal lead 34.

実施の形態３．
次に、この発明の実施の形態３について図９〜１１を用いて説明する。
図９は、この発明の実施の形態３による半導体装置の平面構造を示す図である。
第一のリード１４上に第一のＭＯＳＦＥＴ素子（半導体素子）２６を配置し、第一のＭＯＳＦＥＴ素子２６の下面電極をはんだを介して第一のリード１４と接合している。
第一のＭＯＳＦＥＴ素子２６の上面電極には、はんだを介して内部リード３５の一端が接合されており、他端は、はんだを介して第二のリード１５と接合されている。ここで第二のリード１５の接合部にはダボ出し加工により第二のリード１５を変形させた突起部６２を設けてあり、この突起部６２によって内部リード３５の一端と第二のリード１５を接合するはんだの厚みを確保している。 Embodiment 3 FIG.
Next, a third embodiment of the present invention will be described with reference to FIGS.
FIG. 9 shows a planar structure of a semiconductor device according to the third embodiment of the present invention.
A first MOSFET element (semiconductor element) 26 is disposed on the first lead 14, and a lower electrode of the first MOSFET element 26 is joined to the first lead 14 via solder.
One end of an internal lead 35 is joined to the upper surface electrode of the first MOSFET element 26 via solder, and the other end is joined to the second lead 15 via solder. Here, the joint portion of the second lead 15 is provided with a projection 62 obtained by deforming the second lead 15 by doweling, and this projection 62 connects one end of the internal lead 35 and the second lead 15. The thickness of solder to be joined is secured.

さらに、第二のリード１５上に第二のＭＯＳＦＥＴ素子（別の半導体素子）２７を配置し、第二のＭＯＳＦＥＴ素子２７の下面電極をはんだを介して第二のリード１５と接合させている。
第二のＭＯＳＦＥＴ素子２７の上面電極には、はんだを介して内部リード３６の一端が接合されており、もう一方の端部は、はんだを介して第三のリード１６と接合されている。ここで第三のリード１６の接合部には、ダボ出し加工により第三のリード１６を変形させた突起部６３を設けてあり、この突起部６３によって内部リード３６の一端と第三のリード１６を接合するはんだの厚みを確保している。 Further, a second MOSFET element (another semiconductor element) 27 is disposed on the second lead 15, and the lower electrode of the second MOSFET element 27 is joined to the second lead 15 via solder.
One end of the internal lead 36 is joined to the upper surface electrode of the second MOSFET element 27 via solder, and the other end is joined to the third lead 16 via solder. Here, the joint portion of the third lead 16 is provided with a projection 63 obtained by deforming the third lead 16 by doweling, and this projection 63 allows one end of the internal lead 36 and the third lead 16 to be deformed. The thickness of the solder for joining is secured.

第一のＭＯＳＦＥＴ素子２６、第二のＭＯＳＦＥＴ素子２７のゲート電極は、それぞれゲート用リード１７、１８に、アルミワイヤ７２、７３で電気的に接続されている。
これら第一のリード１４、第二のＭＯＳＦＥＴ素子２７、第一の内部リード３５、第二の内部リード３６、アルミワイヤ７２、７３、ゲート用リード１７、１８を封止樹脂で一体に成型、固定している。ただし、外部との接続端子部となる部分の第一のリード１４の一部、第二のリード１５の一部、第三のリード１６の一部、ゲート用リード１７、１８の一部は、封止樹脂の外側に露出した状態となる。
図９に示した実施の形態３における第一、第二の内部リード３５、３６の形状は、例えば、実施の形態１および２で示した内部リード３１の形状と同様である。 The gate electrodes of the first MOSFET element 26 and the second MOSFET element 27 are electrically connected to the gate leads 17 and 18 by aluminum wires 72 and 73, respectively.
The first lead 14, the second MOSFET element 27, the first internal lead 35, the second internal lead 36, the aluminum wires 72 and 73, and the gate leads 17 and 18 are integrally molded and fixed with a sealing resin. is doing. However, a part of the first lead 14, a part of the second lead 15, a part of the third lead 16, and a part of the gate leads 17, 18, which are the connection terminal portions to the outside, It will be in the state exposed to the outer side of sealing resin.
The shape of the first and second internal leads 35 and 36 in the third embodiment shown in FIG. 9 is the same as the shape of the internal lead 31 shown in the first and second embodiments, for example.

図９に示されたリードに付された記号であるが、ＬＧは、Ｌｏｗ側（下アーム）ＭＯＳＦＥＴのゲート電極に繋がる端子、ＨＳは、Ｈｉｇｈ側（上アーム）ＭＯＳＦＥＴのソース電極に繋がる端子、ＨＧは、Ｈｉｇｈ側（上アーム）ＭＯＳＦＥＴのゲート電極に繋がっている端子、ＧＮＤは、グランド（接地）または電源の負極につなげる端子、ＡＣは、交流出力端子、回転電機のコイルにつなげる端子、Ｐは、プラス電位を持たせるための電源の正極につなげる端子を意味している。   9. Symbols attached to the leads shown in FIG. 9, where LG is a terminal connected to the gate electrode of the Low side (lower arm) MOSFET, HS is a terminal connected to the source electrode of the High side (upper arm) MOSFET, HG is a terminal connected to the gate electrode of the High side (upper arm) MOSFET, GND is a terminal connected to the ground (ground) or the negative electrode of the power source, AC is an AC output terminal, a terminal connected to the coil of the rotating electrical machine, P Means a terminal connected to the positive electrode of a power source for providing a positive potential.

図１０に、図９に示した半導体装置の電気回路図を示す。図１０に示すように、半導体装置１は、第一のＭＯＳＦＥＴ２６からなる上アーム１１１と、第二のＭＯＳＦＥＴ２７
からなる下アーム１１２が接続されている。
また、図１１に本発明の半導体装置を用いた回転電機１００の構成を示す。図１１に示すように、回転電機１００は、制御手段１０１と電流切替手段１０２と固定コイル１０３、１０４と、可動コイル１０５を含む構成である。 FIG. 10 is an electric circuit diagram of the semiconductor device shown in FIG. As shown in FIG. 10, the semiconductor device 1 includes an upper arm 111 composed of a first MOSFET 26, and a second MOSFET 27.
A lower arm 112 is connected.
FIG. 11 shows a configuration of a rotating electrical machine 100 using the semiconductor device of the present invention. As shown in FIG. 11, the rotating electrical machine 100 includes a control unit 101, a current switching unit 102, fixed coils 103 and 104, and a movable coil 105.

固定コイル１０３および固定コイル１０４の各層にはＭＯＳＦＥＴからなる上アーム部１１１と下アーム部１１２を介して蓄電手段１２０と接続されており、これらのＭＯＳＦＥＴをＯＮ／ＯＦＦし、固定コイルの各相に流れる電流を切り替える。この回転電機１００は制御手段１０１からの信号により、可動コイル１０５を回転駆動することも、可動コイル１０５の回転から発電することも可能である。   Each layer of the fixed coil 103 and the fixed coil 104 is connected to the power storage means 120 via an upper arm part 111 and a lower arm part 112 made of MOSFETs. Switch the flowing current. The rotating electrical machine 100 can drive the movable coil 105 in response to a signal from the control means 101 or can generate electric power from the rotation of the movable coil 105.

図９および図１０に示した半導体装置は、回転電機１００における上アーム部１１１と下アーム部１１２を一体成型した、つまり、一つの封止樹脂にて封止された半導体装置である。これにより、上アームと下アームの接続は外部配線を必要とせず、図１２に示される電流切替手段１０２は簡略化された配線となっている。複数の半導体素子を用いる電機機器において、半導体装置の外部の配線を省略した構造を実現できることは、電機機器を小型化する上で有効である。
また、第一の内部リード３５と第二の内部リード３６を同一形状とすることで、半導体装置を製造するにあたり、複数種類の内部リードを製造する必要がなく、部分共用化による工程の簡略化とコスト低減が可能となる。 The semiconductor device shown in FIGS. 9 and 10 is a semiconductor device in which the upper arm portion 111 and the lower arm portion 112 in the rotating electrical machine 100 are integrally molded, that is, sealed with one sealing resin. Thus, the connection between the upper arm and the lower arm does not require an external wiring, and the current switching means 102 shown in FIG. 12 is a simplified wiring. In electrical equipment using a plurality of semiconductor elements, the ability to realize a structure in which wiring outside the semiconductor device is omitted is effective in reducing the size of the electrical equipment.
In addition, since the first internal lead 35 and the second internal lead 36 have the same shape, it is not necessary to manufacture a plurality of types of internal leads when manufacturing a semiconductor device, and the process is simplified by partial sharing. And cost reduction.

１ 半導体装置 １０ リードフレーム
１１、１４ 第一のリード １２、１５ 第二のリード
１３、１７、１８ ゲート用リード １６ 第三のリード
２１ ＭＯＳＦＥＴ素子（半導体素子） ２２ 上面電極
２３ 下面電極 ２４ ゲート電極
２５ 保護膜 ２５ａ、２５ｂ 開口部
２６ 第一のＭＯＳＦＥＴ（半導体素子）
２７ 第二のＭＯＳＦＥＴ（別の半導体素子）
３１、３２、３３、３４ 内部リード ３１ａ、３２ａ 円弧部
３５ 第一の内部リード（内部リード）
３６ 第二の内部リード（別の内部リード） ４１ 封止樹脂
５０ ディスペンサ ５１ はんだ
５２ はんだ（第一の接合部材） ５２ａ、５３ａ クリームはんだ
５３ はんだ（第二の接合部材） ６１、６２ 突起部
６３ 突起部（別の突起部） ６４、６５ 突出部（半導体素子側）
７１、７２、７３ アルミワイヤ １００ 回転電機
１０１ 制御手段 １０２ 電流切替手段
１０３、１０４ 固定コイル １０５ 可動コイル
１１１ 上アーム １１２ 下アーム
１２０ 蓄電手段。 DESCRIPTION OF SYMBOLS 1 Semiconductor device 10 Lead frame 11, 14 First lead 12, 15 Second lead 13, 17, 18 Gate lead 16 Third lead 21 MOSFET element (semiconductor element) 22 Upper surface electrode 23 Lower surface electrode 24 Gate electrode 25 Protective film 25a, 25b Opening 26 First MOSFET (semiconductor element)
27 Second MOSFET (another semiconductor device)
31, 32, 33, 34 Internal lead 31a, 32a Arc portion 35 First internal lead (internal lead)
36 Second internal lead (another internal lead) 41 Sealing resin 50 Dispenser 51 Solder 52 Solder (first joint member) 52a, 53a Cream solder 53 Solder (second joint member) 61, 62 Protrusion 63 Protrusion Part (another protruding part) 64, 65 protruding part (semiconductor element side)
71, 72, 73 Aluminum wire 100 Rotating electrical machine 101 Control means 102 Current switching means 103, 104 Fixed coil 105 Movable coil 111 Upper arm 112 Lower arm 120 Power storage means.

Claims (9)

平板状の第一のリード、上記第一のリードと離間して同一平面上に配置された平板状の第二のリード、上記第二のリードの端部形状は変化させず平面部の一部を突出させてなる突起部、上記第一のリード上に載置された半導体素子、一端が上記半導体素子上に第一の接合部材を介して接合され、他端が上記第二のリードに設けられた上記突起部上に第二の接合部材を介して接合された平板状の内部リード、上記内部リードおよび上記半導体素子を含む上記第一、第二のリード上面を覆って封止するとともに、上記第一、第二のリードの外部との接続のための端子部分を露出させる封止樹脂を備え、上記第二のリードの平面よりも突出した上記突起部の表面部を覆うように上記第二の接合部材が配置されたことを特徴とする半導体装置。   Flat first lead, flat second lead arranged on the same plane separated from the first lead, end shape of the second lead is not changed, part of the flat part A protrusion formed by protruding a semiconductor element mounted on the first lead, one end is bonded to the semiconductor element via a first bonding member, and the other end is provided on the second lead Covering and sealing the upper surfaces of the first and second leads including the plate-like internal lead, the internal lead and the semiconductor element, which are bonded onto the protruding portion via the second bonding member, A sealing resin that exposes terminal portions for connection to the outside of the first and second leads, and the first and second leads so as to cover a surface portion of the protruding portion protruding from the plane of the second lead; A semiconductor device, wherein two joining members are arranged. 上記突起部の上記表面部は、上記突起部の上面となる平坦な円形状の上面部と、上記突起部の立ち上がり部となる上記第二のリードの上記平面から上記上面部の外周へつながる略円筒形状の外側面部よりなることを特徴とする請求項１記載の半導体装置。   The surface portion of the protruding portion is a flat circular upper surface portion that becomes the upper surface of the protruding portion, and an approximate connection from the flat surface of the second lead that becomes the rising portion of the protruding portion to the outer periphery of the upper surface portion. 2. The semiconductor device according to claim 1, comprising a cylindrical outer surface portion. 上記突起部は、ダボ出し加工によって形成されたことを特徴とする請求項１または請求項２記載の半導体装置。   3. The semiconductor device according to claim 1, wherein the protrusion is formed by a doweling process. 上記内部リードの平面形状は、所定幅で一方向に伸びる略短冊状であり、上記所定幅の中心を通る線を基準とした左右対称形状であることを特徴とする請求項１記載の半導体装置。   2. The semiconductor device according to claim 1, wherein a planar shape of the internal lead is a substantially strip shape extending in one direction with a predetermined width, and is a left-right symmetrical shape with respect to a line passing through the center of the predetermined width. . 上記内部リードの少なくとも一方の端部の平面形状が、円弧形状に形成されたことを特徴とする請求項４記載の半導体装置。   The semiconductor device according to claim 4, wherein the planar shape of at least one end of the internal lead is formed in an arc shape. 上記半導体素子上に配置される上記第一の接合部材は、平面形状が円形となるように形成されたことを特徴とする請求項５記載の半導体装置。   6. The semiconductor device according to claim 5, wherein the first bonding member disposed on the semiconductor element is formed so as to have a circular planar shape. 上記内部リードの上記半導体素子に接続される端面部に、上記半導体素子側に突出した内部リード突出部を設けたことを特徴とする請求項４記載の半導体装置。   The semiconductor device according to claim 4, wherein an internal lead protrusion that protrudes toward the semiconductor element is provided on an end surface portion of the internal lead connected to the semiconductor element. 上記第一、第二のリードと離間して同一平面上に配置された平板状の第三のリード、上記第三のリードの端部形状は変化させず平面部の一部を突出させてなる別の突起部、上記第二のリード上に載置された別の半導体素子、一端が上記別の半導体素子上に第三の接合部材を介して接合され、他端が上記第三のリード上に設けられた上記別の突起部上に第四の接合部材を介して接合された平板状の別の内部リードを備え、上記封止樹脂によって上記別の内部リードおよび上記別の半導体素子を含む上記第三のリード上面を覆って封止するとともに、上記第三のリードの外部との接続のための端子部分を露出させ、上記第三のリードの平面よりも突出した上記別の突起部の表面部を覆うように、上記第四の接合部材が配置されたことを特徴とする請求項１記載の半導体装置。   A flat plate-like third lead arranged on the same plane and spaced apart from the first and second leads, and an end shape of the third lead is not changed, and a part of the flat portion is projected. Another protrusion, another semiconductor element mounted on the second lead, one end is joined to the other semiconductor element via a third joining member, and the other end is on the third lead A flat plate-like internal lead joined via a fourth joining member on the separate protrusion provided on the substrate, and the sealing resin includes the separate internal lead and the separate semiconductor element. Covering and sealing the upper surface of the third lead, exposing a terminal portion for connection to the outside of the third lead, and projecting the other protrusion from the plane of the third lead. The fourth joining member is arranged so as to cover the surface portion. Motomeko first semiconductor device according. 上記内部リードと、上記別の内部リードは、同一形状であることを特徴とする請求項８記載の半導体装置。   9. The semiconductor device according to claim 8, wherein the internal lead and the other internal lead have the same shape.
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