JP2011192733A - Method of manufacturing photovoltaic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a photovoltaic device which has good characteristics by improving interface characteristics of a crystalline silicon substrate and an intrinsic semiconductor layer. <P>SOLUTION: The method includes; a process (S101) for forming a second conductive type first semiconductor layer different from a first conductive type on a light receiving surface side of a first conductive type silicon semiconductor substrate; a process (S105) for forming the intrinsic semiconductor layer on a surface opposite to the light receiving surface of the silicon semiconductor substrate; a process (S106, S107) for carrying out first thermal treatment after forming the intrinsic semiconductor layer; a process (S108) for forming a first conductive type second semiconductor layer with higher impurity density than the silicon semiconductor substrate on a surface opposite to the intrinsic semiconductor layer after the first thermal treatment; and a process (S109) for carrying out second thermal treatment after forming the second semiconductor layer. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a photovoltaic device such as a solar cell, and more particularly to a method for manufacturing a heterojunction solar cell capable of increasing efficiency in a crystalline silicon solar cell.

  A current polycrystalline silicon solar cell uses a p-type polycrystalline silicon substrate having a thickness of about 200 μm, and has a surface texture, an n-type diffusion layer, an antireflection film, and a surface electrode (for example, a comb-shaped Ag electrode) that increase the light absorption rate. ) Are sequentially formed on the light-receiving surface side of the substrate, and a back electrode (for example, an Al electrode) is formed on the non-light-receiving surface side of the substrate by screen printing, and then is generally manufactured by firing them. .

  In such firing, the solvent content of the front electrode and the back electrode is volatilized, and the comb-shaped Ag electrode penetrates the antireflection film on the light receiving surface side of the substrate and is connected to the n-type diffusion layer. On the surface side, a part of Al of the Al electrode diffuses into the substrate to form a back surface field layer (BSF).

  This BSF layer forms an internal electric field at the bonding surface with the silicon substrate, pushes minority carriers generated near the BSF layer back into the silicon substrate, and suppresses carrier recombination near the Al electrode. Can be high.

  An invention relating to a heterojunction solar cell in which a junction made of an impurity-doped silicon layer or a BSF layer is formed on a crystalline silicon substrate via a thin intrinsic semiconductor layer has already been disclosed (see Patent Documents 1 to 3).

  By forming the impurity doped layer as a thin film, the concentration distribution of the impurity doped layer can be freely set, and since the impurity layer is thin, carrier recombination in the film can be suppressed. In addition, since the intrinsic semiconductor layer inserted between them can suppress impurity diffusion between the junctions and form a junction having a steep impurity profile, a high open-circuit voltage can be obtained by forming a good junction interface.

  Further, since the intrinsic semiconductor layer and the impurity doped layer can be formed at a low temperature of about 200 ° C., stress generated in the substrate due to heat and warpage of the substrate can be reduced even if the substrate is thin. In addition, it can be expected that deterioration of the substrate quality can be suppressed even for a polycrystalline silicon substrate that is easily deteriorated by heat.

  As a method for improving the conversion efficiency of the heterojunction solar cell, it is disclosed that heat treatment is performed at a high temperature after the collector electrode of the solar cell is formed (see Patent Documents 4 and 5).

  Along with the effect of improving each interface property inside the solar cell, such as the interface between the silicon substrate and the film, the interface between the intrinsic semiconductor layer and the impurity layer, the interface between the transparent conductive film and the impurity layer, by performing the heat treatment at a high temperature. The specific resistance of the impurity doped layer is reduced, the series resistance component is suppressed, and the conversion efficiency of the solar cell is improved.

  Patent Document 4 discloses a method of improving the characteristics of a solar cell by optimizing the temperature and time of heat treatment after the collector electrode is formed. In Patent Document 5, there is a method in which a silicon oxide film is sandwiched between an impurity doped layer in a predetermined region in contact with a back electrode and a silicon substrate so that the impurity doped layer altered by heat treatment does not directly affect the silicon substrate. It is disclosed.

Japanese Patent No. 2132527 Japanese Patent No. 2614561 Japanese Patent No. 3469729 JP 2007-294830 A JP-A-9-97916

  With respect to a heterojunction solar cell in which a junction made of an impurity-doped silicon layer or a BSF layer is formed on a crystalline silicon substrate via a thin intrinsic semiconductor layer, when the heat treatment is performed after the collector electrode is formed, the interface between the crystalline silicon and the intrinsic semiconductor layer Since the heat treatment temperature for improving the characteristics is different from the heat resistance temperature of the impurity-doped layer, sufficient solar cell characteristics cannot be obtained by the collective heat treatment.

  This is probably because the heat treatment temperature for improving the interface characteristics between the crystalline silicon and the intrinsic semiconductor layer exists on the higher temperature side than the heat resistance temperature of the impurity-doped silicon layer. When the heat treatment temperature after forming the collector electrode is adjusted to the heat treatment temperature for improving the interface characteristics between the crystalline silicon and the intrinsic semiconductor layer, the temperature becomes too high for the heat resistance temperature of the impurity doped silicon layer. As a result, the quality of the solar cell is deteriorated and sufficient solar cell characteristics cannot be obtained.

  In addition, when the heat treatment temperature is adjusted to the heat resistance temperature of the impurity doped layer, the temperature is too low for the heat treatment temperature to improve the interface characteristics between the crystalline silicon and the intrinsic semiconductor layer, and thus the interface characteristics between the crystalline silicon substrate and the intrinsic semiconductor layer. There was a problem that could not be improved sufficiently.

  Also, if heat treatment is performed collectively after the collector electrode is formed, hydrogen diffuses and desorbs from the intrinsic semiconductor layer to the impurity doped layer due to the heat treatment, and the passivation effect at the interface between the silicon substrate and the intrinsic semiconductor layer is reduced. there were.

  Further, since the intrinsic semiconductor layer is easily grown epitaxially on the crystalline silicon substrate, the impurity doped layer to be formed thereafter is also easily grown epitaxially. In this case, defects due to grain boundary formation are formed in the impurity doped layer, and the passivation effect is lowered. there were.

  The present invention has been made in view of the above, and can improve the interface characteristics between a crystalline silicon substrate and an intrinsic semiconductor layer to suppress carrier recombination, thereby forming a photovoltaic device having good characteristics. In addition, it is possible to produce a photovoltaic device in which intrinsic semiconductor layer deposition can obtain good interface characteristics, and furthermore, formation of defects due to grain boundary formation of an impurity doped layer formed after the intrinsic semiconductor layer can be prevented. The purpose is to obtain a method.

  In order to solve the above-described problems and achieve the object, the present invention provides a first semiconductor layer of a second conductivity type different from the first conductivity type on the light receiving surface side of the first conductivity type silicon semiconductor substrate. Forming an intrinsic semiconductor layer on a surface opposite to the light receiving surface of the silicon semiconductor substrate, performing a first heat treatment after the formation of the intrinsic semiconductor layer, and after the first heat treatment Forming a second semiconductor layer of a first conductivity type having an impurity concentration higher than that of the silicon semiconductor substrate on the opposite surface of the intrinsic semiconductor layer, and performing a second heat treatment after the formation of the second semiconductor layer. And performing the process.

  According to the present invention, the interface characteristic between the crystalline silicon substrate and the intrinsic semiconductor layer is improved and the recombination of carriers is suppressed, so that it is possible to form a photovoltaic device having good characteristics. .

FIG. 1 is a cross-sectional view showing a cell structure of a photovoltaic device formed by the manufacturing method according to the first embodiment of the present invention. FIG. 2 is a flowchart of the method for manufacturing the photovoltaic device according to the first embodiment. FIG. 3 is a diagram comparing the solar cell formed by the manufacturing method of Embodiment 1 and the solar cell formed by the manufacturing method of the comparative example.

  Embodiments of a method for manufacturing a photovoltaic device according to the present invention will be described below in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.

Embodiment 1 FIG.
FIG. 1 is a cross-sectional view showing a cell structure of a photovoltaic device formed by the manufacturing method according to the first embodiment of the present invention. FIG. 2 is a flowchart of the method for manufacturing the photovoltaic device according to the present embodiment. Below, the manufacturing method of the photovoltaic apparatus concerning this Embodiment is demonstrated using FIG.1 and FIG.2.

  First, 1Ωcm p-type single crystal silicon is used as the substrate (first conductive silicon semiconductor substrate) 1 to remove wire saw damage at the time of slicing in an alkaline solution, and then textured by anisotropic etching with an alkaline solution. (Step S100 in FIG. 2, not shown in FIG. 1).

Thereafter, a phosphorus diffusion layer (second conductivity type impurity doped layer) 2 is formed as an n-type bonding layer (first semiconductor layer) having a conductivity type opposite to that of the substrate 1 by heat treatment in a POCl ₃ gas atmosphere. (Step S101), the phosphorus glass formed on the surface was removed.

  Further, an SiN antireflection film 3 was formed on the light receiving surface side by plasma CVD using silane and ammonia as raw materials as an antireflection film. Thereafter, the SiN antireflection film 3 on the light-receiving surface side was protected, and the back surface (n-type diffusion layer) of the silicon substrate 1 having the phosphorous diffusion layer 2 was removed by about 5 μm with hydrofluoric acid (step S102).

  Then, the comb-shaped electrode 4 was formed on the light-receiving surface side SiN antireflection film 3 by screen printing using an Ag electrode paste, and the surface electrode 4 was formed by baking at about 800 ° C. (step S103).

  Thereafter, the back surface of the silicon substrate 1 is cleaned by RCA cleaning (step S104), and the oxide film is removed with dilute hydrofluoric acid to form an intrinsic semiconductor layer of about 4 nm in a 27.56 MHz VHF plasma CVD chamber. A crystalline silicon film 5 was formed (step S105).

The i-type amorphous silicon film 5 was formed by flowing silane at 30 sccm and hydrogen at 500 sccm in an atmosphere with an RF output of 50 mW / cm ² , a substrate temperature of 200 ° C., and a gas pressure of 500 Pa.

  Thereafter, heat treatment (first first half heat treatment) at 200 ° C. for 5 minutes was performed in a gas atmosphere containing oxygen (oxygen 20%) (step S106), and then in forming gas (inert gas atmosphere containing 5% hydrogen) Then, a heat treatment (first second heat treatment) at 385 ° C. for 10 minutes was performed (step S107). The first first half heat treatment (step S106) and the first second half heat treatment (step S107) are combined to form a first heat treatment.

  Thereafter, on the i-type amorphous silicon film 5 (in the direction of the back surface of the substrate 1), a p-type microcrystalline silicon film (first conductivity type high-concentration impurity doping) of about 100 nm in a 27.56 MHz plasma CVD chamber. Layer) 6 was formed (step S108).

Deposition conditions were 100 mW / cm ² , 10 sccm of silane, 1000 sccm of hydrogen, and 20 sccm of diborane diluted to 0.1% with hydrogen in an atmosphere of a substrate temperature of 140 ° C. and a gas pressure of 500 Pa. The impurity concentration of the p-type microcrystalline silicon film (second semiconductor layer) 6 formed here is higher than that of the silicon semiconductor substrate 1.

  Thereafter, a heat treatment (second heat treatment) was performed at 325 ° C. for 10 minutes in a forming gas (inert gas atmosphere containing 5% hydrogen) (step S109). The second heat treatment (step S109) is performed at a temperature different from that of the first heat treatment. That is, the temperature of the first second heat treatment (step S107), which is the latter half of the first heat treatment, is higher than the maximum temperature of 325 ° C. of the second heat treatment.

  Thereafter, an Al electrode (non-light-receiving surface side electrode) 7 was formed on the back surface by vacuum deposition (Step S110), and heat treatment was performed at 200 ° C. for 30 minutes in a forming gas (inert gas atmosphere containing 5% hydrogen) ( Step S111).

  For comparison, heat treatment (step S106) in a gas atmosphere containing oxygen after forming the i-type amorphous silicon film using a substrate having the same crystal and the same characteristics as the solar cell manufactured by the above process. The solar cells were fabricated by the same process except for the presence or absence and the presence or absence of the heat treatment (Step S107) in the forming gas after forming the i-type amorphous silicon oxide film.

  As shown in FIG. 3, the current-voltage characteristics were evaluated by a solar simulator of AM1.5 together with the solar cells produced by the process according to the present embodiment as Comparative Examples 1 and 2.

  As a result, in the sample of this embodiment, after the heat treatment (step S106) in the gas atmosphere containing oxygen after the i-type amorphous silicon film is formed, the sample of this embodiment is subjected to the heat treatment (step S107) in the forming gas. An open circuit voltage about 4 mV higher than that of a sample of Comparative Example 1 could be obtained.

  In the present embodiment, after the formation of the i-type amorphous silicon film (step S105), heat treatment is performed at a temperature higher than the maximum heat treatment temperature after the formation of the p-type microcrystalline silicon film (step S108). The interface characteristics with the i-type amorphous silicon film can be improved.

  That is, in the case of the conventional technique in which heat treatment aiming at improving the interface characteristics is performed after forming the p-type microcrystalline film, the heat resistance temperature of the p-type microcrystalline film is lower than the optimum temperature for improving the interface characteristics of the intrinsic semiconductor layer / substrate. Therefore, it is necessary to match the heat resistance temperature of the p-type microcrystalline film. In that case, a sufficient passivation effect between the intrinsic semiconductor layer and the substrate interface could not be obtained.

  In this embodiment, the passivation effect can be enhanced by performing heat treatment at different optimum temperatures after the intrinsic semiconductor layer is formed and after the p-type microcrystalline film is formed.

  Further, by performing heat treatment in a gas atmosphere containing oxygen after forming the i-type amorphous silicon film 5 (step S106), an oxide layer is formed on the outermost surface of the i-type amorphous silicon film 5, and a higher temperature thereafter. It functions as a cap layer that suppresses hydrogen from being removed from the i-type amorphous silicon film by an appropriate heat treatment.

  For this reason, the interface between the silicon substrate 1 and the i-type amorphous silicon film 5 can be kept good. That is, a sufficient interface passivation effect can be obtained and the solar cell characteristics are improved.

  Even when the i-type amorphous silicon film 5 is epitaxially grown on the silicon substrate 1, the presence of the oxide layer suppresses the epitaxial growth of the p-type microcrystalline silicon film 6 to be formed thereafter. It is possible to form a p-type microcrystalline silicon film 6 having good quality without grain boundaries or dislocations.

  Although a single crystal substrate is used in this embodiment mode, a polycrystalline substrate may be used. Further, although a semiconductor layer not containing oxygen is used in this embodiment mode, a semiconductor layer containing oxygen, nitrogen, or carbon may be used. In the case of the i-type amorphous silicon film 5, by containing oxygen, epitaxial growth is suppressed with respect to the crystalline silicon substrate 1, and good interface characteristics are obtained.

  In this embodiment, foaming gas (inert gas containing 5% hydrogen) is used, but atmospheric gas containing oxygen, nitrogen, argon, or the like may be used. However, since the gas containing hydrogen enhances the passivation effect by terminating the interface between the crystalline silicon substrate 1 and the i-type amorphous silicon film 5 with hydrogen, and defects in the film are also repaired by hydrogen. It is desirable to use a gas containing hydrogen.

  In addition, in the heat treatment in an atmosphere containing oxygen (step S106), if the oxygen concentration is lower than 5%, the formation of an oxide layer is insufficient and a function as a cap layer for suppressing hydrogen removal cannot be obtained sufficiently. The epitaxial growth of the p-type microcrystalline layer 6 cannot be suppressed.

  On the contrary, if the oxygen concentration is higher than 50%, the entire i-type amorphous silicon film 5 is oxidized, so that the conductivity becomes low and the series resistance becomes high. Therefore, in order to appropriately obtain the above-described effect, it is desirable that the oxygen concentration in step S106 is about 5 to 50%.

  Crystal substrate of one conductivity type is used as substrate, intrinsic light semiconductor layer on the light receiving surface side, impurity doped silicon layer of opposite conductivity type to substrate, transparent conductive film, collector electrode, or substrate opposite to light receiving surface The same process as above can be carried out in a photovoltaic device having an intrinsic semiconductor layer on the surface, an impurity-doped silicon layer of the same conductivity type as the substrate, a transparent conductive film, a back electrode, or both structures. is there.

  That is, after the formation of the intrinsic semiconductor layer and after the formation of the impurity-doped silicon layer, the heat treatment is performed at different optimum temperatures. At the same time, the heat treatment after the formation of the intrinsic semiconductor layer can be performed in an atmosphere containing oxygen first. The same effect can be obtained.

  According to the present embodiment, the interface characteristics between the crystalline silicon substrate and the intrinsic semiconductor layer are improved by performing the heat treatment at an optimum different temperature after the intrinsic semiconductor layer deposition and after the impurity doped layer deposition, By suppressing recombination of carriers, a photovoltaic device having good characteristics can be formed.

  In addition, in the heat treatment after the formation of the intrinsic semiconductor layer, an oxide layer is formed on the surface of the intrinsic semiconductor layer by first performing the heat treatment in an atmosphere containing oxygen, so that the hydrogen is removed from the film by the subsequent heat treatment. It functions as a cap layer that prevents separation, and good interface characteristics can be obtained.

  Furthermore, even when the intrinsic semiconductor layer is epitaxially grown on the crystalline silicon substrate, the impurity doped layer to be formed thereafter is suppressed by the oxide layer on the surface of the intrinsic semiconductor layer, so that the epitaxial growth on the intrinsic semiconductor layer is suppressed, and defects due to grain boundary formation occur. Can be prevented.

  Furthermore, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the invention in the implementation stage. Further, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent requirements. For example, even if some constituent requirements are deleted from all the constituent requirements shown in the embodiment, the problem described in the column of the problem to be solved by the invention can be solved, and is described in the column of the effect of the invention. When an effect is obtained, a configuration from which this configuration requirement is deleted can be extracted as an invention. Furthermore, the constituent elements over different embodiments may be appropriately combined.

  As described above, the method for manufacturing a photovoltaic device according to the present invention is useful for manufacturing a photovoltaic device, and is particularly suitable for manufacturing a solar cell.

DESCRIPTION OF SYMBOLS 1 1st conductivity type silicon semiconductor substrate 2 2nd conductivity type impurity doped layer 3 SiN antireflection film 4 Light-receiving surface side comb-type Ag electrode 5 i-type amorphous silicon layer 6 High concentration impurity doping of 1st conductivity type Layer 7 Non-light-receiving surface side electrode

Claims (6)

Forming a first semiconductor layer of a second conductivity type different from the first conductivity type on the light-receiving surface side of the silicon semiconductor substrate of the first conductivity type;
Forming an intrinsic semiconductor layer on a surface opposite to the light receiving surface of the silicon semiconductor substrate;
Performing a first heat treatment after forming the intrinsic semiconductor layer;
Forming a second semiconductor layer of a first conductivity type having an impurity concentration higher than that of the silicon semiconductor substrate on the opposite surface of the intrinsic semiconductor layer after the first heat treatment;
And a step of performing a second heat treatment after the formation of the second semiconductor layer. A method for manufacturing a photovoltaic device, comprising: The method for manufacturing a photovoltaic device according to claim 1, wherein a temperature of the first heat treatment is higher than a maximum temperature of the second heat treatment. The step of performing the first heat treatment includes a step of performing a first first half heat treatment and a step of performing a first second half heat treatment subsequent thereto,
The method for manufacturing a photovoltaic device according to claim 1, wherein the first first-half heat treatment is performed in an atmosphere containing oxygen. The method for manufacturing a photovoltaic device according to claim 3, wherein a temperature of the first second heat treatment is higher than a maximum temperature of the second heat treatment. The method for producing a photovoltaic device according to claim 3 or 4, wherein the oxygen concentration in the atmosphere containing oxygen is 5 to 50%.   The photovoltaic device according to any one of claims 3 to 5, wherein the first second heat treatment and the second heat treatment are an atmosphere containing any of hydrogen, oxygen, and nitrogen. Method.

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