JP2011176260A - Method of bonding led chip and leadframe - Google Patents

Method of bonding led chip and leadframe Download PDF

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JP2011176260A
JP2011176260A JP2010135858A JP2010135858A JP2011176260A JP 2011176260 A JP2011176260 A JP 2011176260A JP 2010135858 A JP2010135858 A JP 2010135858A JP 2010135858 A JP2010135858 A JP 2010135858A JP 2011176260 A JP2011176260 A JP 2011176260A
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led chip
layer
lead frame
alloy
tin
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JP5436349B2 (en
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Takeshi Sakurai
健 櫻井
Shinichi Funaki
真一 船木
Seiichi Ishikawa
誠一 石川
Kenji Kubota
賢治 久保田
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Mitsubishi Shindoh Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Abstract

<P>PROBLEM TO BE SOLVED: To provide a bonding method that facilitates bonding a leadframe with an LED chip by a high bonding strength at 240 to 300°C using a small quantity of expensive silver. <P>SOLUTION: In the leadframe 8, a nickel plating layer 12, a copper-tin alloy layer 13, a tin plating layer 14, and an Ag<SB>3</SB>Sn alloy layer 16 are formed in sequence on a copper alloy member 11 that is punched into a specified shape, and its uppermost surface is the Ag<SB>3</SB>Sn alloy layer 16. At the joint between the leadframe 8 and the LED chip 1, a gold layer 9 forming the uppermost surface layer of the LED chip 1 is alloyed with part of the Ag<SB>3</SB>Sn alloy layer 16 on the uppermost surface and part of the tin plating layer 14 in the leadframe 7 so as to form a gold-silver-tin alloy layer 15, and the LED chip 1 and the leadframe 7 are joined with each other by the gold-silver-tin alloy layer 15. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、ＬＥＤ（発光ダイオード）チップとリードフレームとの接合方法に関するものである。   The present invention relates to a method for joining an LED (light emitting diode) chip and a lead frame.

ＬＥＤチップは、サファイア（Ａｌ２Ｏ３）基板等の上にｐ型半導体とｎ型半導体とが接合状態に設けられ、ｐ側電極とｎ側電極との間に通電することにより、両半導体の間のｐｎ接合面で発光を生じさせるものであり、液晶のバックライト、オーディオ機器のインジケータ、信号機、電光掲示板、自動車等のランプ、電球や蛍光灯に代わる各種照明器具など、光源として用途が広まっている。 In an LED chip, a p-type semiconductor and an n-type semiconductor are provided in a joined state on a sapphire (Al 2 O 3 ) substrate or the like, and an electric current is passed between the p-side electrode and the n-side electrode, thereby It emits light at the pn junction surface between them, and is used as a light source for liquid crystal backlights, audio equipment indicators, traffic lights, electric bulletin boards, various lamps for light bulbs and fluorescent lamps. ing.

このようなＬＥＤチップとして、特許文献１又は特許文献２に記載のように、このＬＥＤチップをリードフレームに接続したものがある。
特許文献１記載の技術は、ＬＥＤチップがリードフレームに導電性接着剤によって接着固定されている。リードフレームは、銅又は銅合金の薄板を材料として、その表面に銀めっきされた構成とされ、ＬＥＤチップから出射された光の一部が、銀めっき面によって反射され、ＬＥＤチップの蛍光体分散樹脂内の蛍光体を励起・発光（白色光）させるようにされている。
特許文献２記載の技術では、ベース部となるコパール製パッケージ（リードフレーム）の表面にＮｉ／Ａｇ層が設けられ、ＬＥＤチップの裏面にアルミニウムでメタライズした状態でＡｇ−Ｓｎ合金にて共晶接合している。 As such an LED chip, there is one in which this LED chip is connected to a lead frame as described in Patent Document 1 or Patent Document 2.
In the technique described in Patent Document 1, the LED chip is bonded and fixed to the lead frame with a conductive adhesive. The lead frame is made of a thin plate of copper or copper alloy, and the surface thereof is silver-plated. A part of the light emitted from the LED chip is reflected by the silver-plated surface, and the phosphor dispersion of the LED chip The phosphor in the resin is excited and emits light (white light).
In the technique described in Patent Document 2, a Ni / Ag layer is provided on the surface of a COPAL package (lead frame) serving as a base portion, and eutectic bonding is performed with an Ag—Sn alloy in a state where the back surface of the LED chip is metalized with aluminum. is doing.

特開２００８−１９２９２９号公報JP 2008-192929 A 特開２００６−２９４８２１号公報JP 2006-294821 A

ところで、リードフレームの表面には銀又は銀合金のめっき層が施されるが、この銀めっき層は、光の反射率が高いので、ＬＥＤチップからの光を有効に反射することができる反面、銀は融点が高いので、その上にＬＥＤチップを高強度に接合するのは難しくなる。
特許文献１記載の技術では導電性接着剤によってＬＥＤチップをリードフレームに接着しているが、導電性接着剤では耐熱性に不安がある。また、特許文献２記載に開示されているＡｇ−Ｓｎ合金を用いることにより、融点を下げることができるが、貴金属の銀を多く用いるため、高価になる。 By the way, a silver or silver alloy plating layer is applied to the surface of the lead frame, but since this silver plating layer has a high light reflectivity, it can effectively reflect the light from the LED chip, Since silver has a high melting point, it is difficult to bond an LED chip on it with high strength.
In the technique described in Patent Document 1, the LED chip is bonded to the lead frame with a conductive adhesive, but the conductive adhesive is uneasy about heat resistance. Moreover, although the melting point can be lowered by using the Ag—Sn alloy disclosed in Patent Document 2, it is expensive because a large amount of noble metal silver is used.

本発明は、前述の事情に鑑みてなされたものであり、少量の高価な銀を使用して、２４０〜３００℃の温度にてリードフレームとＬＥＤチップとを高い接合強度で簡単に接合することができる接合方法の提供を目的とする。   The present invention has been made in view of the above-described circumstances, and uses a small amount of expensive silver to easily bond a lead frame and an LED chip at a temperature of 240 to 300 ° C. with high bonding strength. It aims at providing the joining method which can be performed.

本発明の接合方法は、ＬＥＤチップと銅合金リードフレームとの接合方法において、前記ＬＥＤチップの前記銅合金リードフレームと接合される部位に金を０．１〜１μｍの厚みにて蒸着し、前記銅合金リードフレームの表面に、最表面側が錫めっき層である複数のめっき層あるいは合金層を形成するとともに、前記錫めっき層の表面に、厚さが０．０１〜０．５μｍで、光沢度が８０〜１１０％であるＡｇ３Ｓｎ合金層を形成し、前記銅合金リードフレームのＡｇ３Ｓｎ合金層部位に前記ＬＥＤチップの金が蒸着された部位を重ね合わせ、その重ね合わせ状態で２４０〜３００℃の温度に加熱することにより、前記リードフレームのＡｇ３Ｓｎ合金層部位と、前記ＬＥＤチップの金が蒸着された部位との間に、金銀錫合金層を形成して前記ＬＥＤチップを前記リードフレームに接合することを特徴とするＬＥＤチップとリードフレームとの接合することを特徴とする。 The bonding method of the present invention is a method of bonding an LED chip and a copper alloy lead frame, wherein gold is deposited in a thickness of 0.1 to 1 μm on a portion of the LED chip to be bonded to the copper alloy lead frame, A plurality of plating layers or alloy layers whose outermost surface is a tin plating layer is formed on the surface of the copper alloy lead frame, and the thickness is 0.01 to 0.5 μm on the surface of the tin plating layer. An Ag 3 Sn alloy layer having a thickness of 80 to 110% is formed, and a portion where the gold of the LED chip is deposited on the Ag 3 Sn alloy layer portion of the copper alloy lead frame is overlaid. By heating to a temperature of 300 ° C., a gold-silver-tin alloy layer is formed between the Ag 3 Sn alloy layer portion of the lead frame and the portion of the LED chip where gold is deposited. The LED chip is bonded to the lead frame, and the LED chip and the lead frame are bonded.

リードフレーム最表面のＡｇ３Ｓｎ合金層とＬＥＤチップの金とが重ね合わせ状態で２４０〜３００℃の温度に加熱されることにより、Ａｇ３Ｓｎ合金層の下層の錫めっき層を含む３者間にて３元系の金銀錫合金層が形成され強固な接合層となる。
Ａｇ３Ｓｎ合金層は、錫めっき層の表面に０．０１〜０．５μｍの銀めっきを施し、適切な条件にて処理することにより、銀と錫が反応して錫めっき層の表面に薄層となって形成される。
Ａｇ３Ｓｎ合金層の厚みは０．０１〜０．５μｍであり、厚みが０．０１μｍ未満では、銀めっき層としての各種機能が不足し、厚みが０．５μｍを超えると、下層の錫層での３元系の金銀錫合金の形成が不十分となり接合強度が低下し、また、銀の使用量も増えて好ましくない。
ボイド等の欠陥がなく高い接合強度となる金銀錫合金層を得るために、２４０℃以上の加熱温度とするのが好ましい。加熱温度が３００℃を超えても、接合強度のそれ以上の向上は期待できないとともに、熱応力が大きくなるので好ましくない。
この場合、ＬＥＤチップ最表面の金層が０．１μｍ未満の厚さであると、十分な接合強度を確保するのに足るだけの厚みで金銀錫合金層が形成されず、剥離が生じ易い。接合に寄与する金銀錫合金層を形成するには、金層が０．１μｍ以上あればよく、１μｍを超えてもコスト面で無駄である。
また、リードレーム最表面のＡｇ３Ｓｎ合金層は、光沢度が８０〜１１０％であり、光沢度が８０％未満では、ＬＥＤ用としては光の反射が充分ではなく、１１０％を超えると効果が飽和しコスト面で無駄となる。 Three layers including the tin plating layer under the Ag 3 Sn alloy layer by heating the Ag 3 Sn alloy layer on the outermost surface of the lead frame and the gold of the LED chip to a temperature of 240 to 300 ° C. in a superposed state. A ternary gold-silver-tin alloy layer is formed at 1 to form a strong bonding layer.
The Ag 3 Sn alloy layer is obtained by applying 0.01 to 0.5 μm of silver plating on the surface of the tin plating layer and treating it under appropriate conditions, whereby silver and tin react to form a thin film on the surface of the tin plating layer. It is formed as a layer.
The Ag 3 Sn alloy layer has a thickness of 0.01 to 0.5 μm. If the thickness is less than 0.01 μm, various functions as a silver plating layer are insufficient. If the thickness exceeds 0.5 μm, the lower tin layer The formation of a ternary gold-silver-tin alloy is unsatisfactory and the bonding strength is lowered, and the amount of silver used is undesirably increased.
In order to obtain a gold-silver-tin alloy layer having no defects such as voids and high bonding strength, it is preferable to set the heating temperature to 240 ° C. or higher. Even if the heating temperature exceeds 300 ° C., no further improvement in bonding strength can be expected, and thermal stress increases, which is not preferable.
In this case, if the gold layer on the outermost surface of the LED chip has a thickness of less than 0.1 μm, the gold-silver-tin alloy layer is not formed with a thickness sufficient to ensure sufficient bonding strength, and peeling is likely to occur. In order to form a gold-silver-tin alloy layer that contributes to bonding, the gold layer should be 0.1 μm or more, and even if it exceeds 1 μm, it is useless in terms of cost.
In addition, the Ag 3 Sn alloy layer on the outermost surface of the lead frame has a glossiness of 80 to 110%. If the glossiness is less than 80%, the reflection of light is not sufficient for an LED, and if it exceeds 110%, an effect is obtained. Becomes saturated and is wasted in terms of cost.

本発明の接合方法において、前記銅合金リードフレームのＡｇ３Ｓｎ合金層部位に前記ＬＥＤチップの金が蒸着された部位を重ね合わせる前に、前記Ａｇ３Ｓｎ合金層の表面に厚み５〜２０ｎｍの透明な酸化錫皮膜を形成しておくとよい。
Ａｇ３Ｓｎ合金層の表面に透明な酸化錫皮膜を形成しておくことにより、Ａｇ３Ｓｎ合金層の耐硫化特性が向上し、使用雰囲気やその上に成形される樹脂中に含まれるサルファ（Ｓ）により硫化されることが防止される。透明な酸化錫皮膜の厚みが５ｎｍ未満では硫化防止効果が不十分であり、２０ｎｍを超えると光沢度が低下するとともに、目的とする接合を妨げる傾向がみられる。 In the bonding method of the present invention, before superimposing the gold-deposited portion of the LED chip on the Ag 3 Sn alloy layer portion of the copper alloy lead frame, a thickness of 5 to 20 nm is formed on the surface of the Ag 3 Sn alloy layer. A transparent tin oxide film may be formed.
By forming a transparent tin oxide film on the surface of the Ag 3 Sn alloy layer, Ag 3 Sn improved sulfidation properties of the alloy layer, sulfur contained in the resin to be molded on the use ambience or its ( S) prevents sulfidation. If the thickness of the transparent tin oxide film is less than 5 nm, the effect of preventing sulfidation is insufficient, and if it exceeds 20 nm, the glossiness is lowered and the intended bonding tends to be hindered.

本発明の接合方法において、前記複数のめっき層あるいは合金層が、前記銅合金部材の表面から順に銅錫合金層、前記錫めっき層であるとよい。
また、前記複数のめっき層あるいは合金層が、前記銅合金部材の表面から順に、ニッケルめっき層、銅錫合金層、前記錫めっき層としてもよい。
リードフレームとして一般的に使用される、二層めっき、あるいは、三層めっきの銅合金部材を適用することができる。 In the joining method of the present invention, the plurality of plating layers or alloy layers may be a copper tin alloy layer and a tin plating layer in order from the surface of the copper alloy member.
The plurality of plating layers or alloy layers may be a nickel plating layer, a copper tin alloy layer, and the tin plating layer in order from the surface of the copper alloy member.
A two-layer plating or three-layer plating copper alloy member generally used as a lead frame can be applied.

さらに、本発明の接合方法において、前記銅合金部材は、Ｆｅ；１．５〜２．４質量％、Ｐ；０．００８〜０．０８質量％およびＺｎ；０．０１〜０．５質量％を含み、透過型電子顕微鏡観察において、１μｍ２あたりの析出物粒子の面積に等しい円相当直径のヒストグラムにおけるピーク値が直径１５〜３５ｎｍの範囲内でありかつ当該範囲内の直径の析出物粒子が総度数の５０％以上の頻度で存在し、その半値幅が２５ｎｍ以下であるとよい。
この銅合金部材は、強度に優れるとともに、耐熱性が高く、プレス打抜き性、また、導電率も良好で、ＬＥＤチップに接続されるリードフレームとして好適である。 Furthermore, in the joining method of the present invention, the copper alloy member contains Fe; 1.5 to 2.4 mass%, P; 0.008 to 0.08 mass%, and Zn; 0.01 to 0.5 mass%. In the transmission electron microscope observation, the peak value in the histogram of equivalent circle diameter equal to the area of the precipitate particles per 1 μm 2 is in the range of 15 to 35 nm in diameter, and the precipitate particles having the diameter in the range are It exists at a frequency of 50% or more of the total frequency, and its half-value width is preferably 25 nm or less.
This copper alloy member has excellent strength, high heat resistance, press punchability, and good electrical conductivity, and is suitable as a lead frame connected to an LED chip.

本発明によれば、リードフレームの表面の下層として錫めっき層を有するＡｇ３Ｓｎ合金層とＬＥＤチップの金層とを重ね合わせて加熱するという簡単な方法でこれらを接合することができ、これらの間に形成される金銀錫合金層により強固に接合でき、高価な銀を多量に使用することなく安価に製造することができる。 According to the present invention, the Ag 3 Sn alloy layer having a tin plating layer as a lower layer on the surface of the lead frame and the gold layer of the LED chip can be joined and heated by a simple method, It can be firmly joined by the gold-silver-tin alloy layer formed between them, and can be manufactured at low cost without using a large amount of expensive silver.

本発明の接合方法によって接合された状態のＬＥＤチップとリードフレームとの断面図である。It is sectional drawing of the LED chip of the state joined by the joining method of this invention, and a lead frame. 図１のＸで示す部分の拡大断面図であり、（ａ）は接合前の重ね合わせた状態を示し、（ｂ）が接合後の状態を示す。It is an expanded sectional view of the part shown by X of Drawing 1, (a) shows the state where it overlapped before joining, and (b) shows the state after joining. 本発明の他の実施形態の接合方法を説明する図２同様の図である。It is a figure similar to FIG. 2 explaining the joining method of other embodiment of this invention. 図１のリードフレームとして用いられる実施形態の銅合金の観察倍率５万倍による透過型電子顕微鏡観察写真である。It is a transmission electron microscope observation photograph by the observation magnification of 50,000 times of the copper alloy of embodiment used as a lead frame of FIG. 図４に示す実施形態の銅合金の観察倍率１０万倍による透過型電子顕微鏡観察写真である。It is a transmission electron microscope observation photograph by the observation magnification of 100,000 times of the copper alloy of embodiment shown in FIG. 実施形態の銅合金の透過型電子顕微鏡観察による１μｍ２あたりの析出物粒子の直径の詳細なヒストグラムである。It is a detailed histogram of the diameter of the deposit particle | grains per micrometer 2 by the transmission electron microscope observation of the copper alloy of embodiment. 実施形態の銅合金の製造時の冷間圧延、及び低温焼鈍工程における透過型電子顕微鏡観察による１μｍ２あたりの析出物粒子の直径のヒストグラムの推移を示す概略図である。It is the schematic which shows transition of the histogram of the diameter of the deposit particle | grains per 1 micrometer 2 by the transmission electron microscope observation in the cold rolling at the time of manufacture of the copper alloy of embodiment, and a low-temperature annealing process. 実施形態の銅合金の５００℃加熱保持での耐熱性（保持率の経時変化）を示すグラフである。It is a graph which shows the heat resistance (time-dependent change of a retention rate) by the 500 degreeC heating holding | maintenance of the copper alloy of embodiment.

以下に、本発明の実施形態について説明する。
ＬＥＤチップ１は、図１に示すように、サファイア基板２の表面にｎ型半導体層３とｐ型半導体層４とが接合状態に積層されるとともに、その一部のｐ型半導体層４を除去して露出させたｎ型半導体層３にｎ型電極５、ｐ型半導体層４にｐ型電極６が形成されたものである。このＬＥＤチップ１はフリップフロップタイプのＬＥＤチップであり、ｎ型電極５及びｐ型電極６にそれぞれリードフレーム７，８が接合状態に接続される。 Hereinafter, embodiments of the present invention will be described.
As shown in FIG. 1, the LED chip 1 has an n-type semiconductor layer 3 and a p-type semiconductor layer 4 laminated on the surface of the sapphire substrate 2 and a part of the p-type semiconductor layer 4 is removed. The n-type electrode 5 is formed on the exposed n-type semiconductor layer 3, and the p-type electrode 6 is formed on the p-type semiconductor layer 4. The LED chip 1 is a flip-flop type LED chip, and lead frames 7 and 8 are connected to an n-type electrode 5 and a p-type electrode 6 in a joined state, respectively.

図２には、そのｐ型電極部分を拡大して示しており、以下、このｐ型電極部分を代表して説明する。その電極６には、Ｔｉ層、Ｎｉ層、金（Ａｕ）層を含む複数の金属層が形成されており、図２（ａ）に示すように、その最表面層として電気接触性を向上させる金層９が蒸着にて形成されている。この金層９の厚さは、後述するようにリードフレームとの十分な接合強度を確保するために０．１〜１μｍが好ましい。   FIG. 2 is an enlarged view of the p-type electrode portion. Hereinafter, the p-type electrode portion will be described as a representative. The electrode 6 is formed with a plurality of metal layers including a Ti layer, a Ni layer, and a gold (Au) layer, and as shown in FIG. A gold layer 9 is formed by vapor deposition. The thickness of the gold layer 9 is preferably 0.1 to 1 μm in order to ensure sufficient bonding strength with the lead frame as will be described later.

リードフレーム８は、所定の形状に打ち抜き加工された銅合金部材１１の上にニッケルめっき層１２、銅錫合金層１３、錫めっき層１４、Ａｇ３Ｓｎ合金層１６を順に形成したものであり、最表面がＡｇ３Ｓｎ合金層１６とされている。
このリードフレーム８とＬＥＤチップ１との接合部は、図２（ｂ）に示すように、ＬＥＤチップ１の最表面層を形成していた金層９が、リードフレーム８の最表面のＡｇ３Ｓｎ合金層１６の一部及び錫めっき層１４の一部と溶融して、金銀錫合金層１５を形成しており、この金銀錫合金層１５によってＬＥＤチップ１とリードフレーム８とが接合されている。 The lead frame 8 is formed by sequentially forming a nickel plating layer 12, a copper tin alloy layer 13, a tin plating layer 14, and an Ag 3 Sn alloy layer 16 on a copper alloy member 11 punched into a predetermined shape. The outermost surface is an Ag 3 Sn alloy layer 16.
As shown in FIG. 2B, the gold layer 9 that formed the outermost surface layer of the LED chip 1 is formed of Ag 3 on the outermost surface of the lead frame 8. A part of the Sn alloy layer 16 and a part of the tin plating layer 14 are melted to form a gold-silver-tin alloy layer 15, and the LED chip 1 and the lead frame 8 are joined by the gold-silver-tin alloy layer 15. Yes.

次に、リードフレーム８の詳細について説明する。
［銅合金］
このリードフレームの基材を構成する銅合金は、必ずしも限定されるものではないが、耐熱性に優れ、引張り強度が５００ＭＰａ以上で、かつ、導電率が５０％ＩＡＣＳ以上である基本特性を有するＣｕ−Ｆｅ−Ｐ−Ｚｎ系銅合金であり、Ｆｅ；１．５〜２．４質量％、Ｐ；０．００８〜０．０８質量％およびＺｎ；０．０１〜０．５質量％を含み、残部がＣｕ及び不可避不純物からなる基本組成とする。この基本組成に対し、後述するＳｎ、Ｎｉ等の元素を更に選択的に含有させても良い。 Next, details of the lead frame 8 will be described.
[Copper alloy]
The copper alloy constituting the base material of the lead frame is not necessarily limited, but Cu having excellent basic properties such as excellent heat resistance, tensile strength of 500 MPa or more, and conductivity of 50% IACS or more. -Fe-P-Zn based copper alloy, including Fe; 1.5-2.4 mass%, P; 0.008-0.08 mass% and Zn; 0.01-0.5 mass%, The balance is a basic composition consisting of Cu and inevitable impurities. You may further selectively contain elements, such as Sn and Ni mentioned later, with respect to this basic composition.

（Ｆｅ）
Ｆｅは銅の母相中に分散する析出物粒子を形成して強度及び耐熱性を向上させる効果があるが、その含有量が１．５質量％未満では析出物の個数が不足し、その効果を奏功せしめることができない。一方、２．４質量％を超えて含有すると、強度及び耐熱性の向上に寄与しない粗大な析出物粒子が存在してしまい、耐熱性に効果のあるサイズの析出物粒子が不足してしまうことになる。このため、Ｆｅの含有量は１．５〜２．４質量％の範囲内とすることが好ましい。 (Fe)
Fe has the effect of improving the strength and heat resistance by forming precipitate particles dispersed in the copper matrix, but if its content is less than 1.5% by mass, the number of precipitates is insufficient, and the effect Can't succeed. On the other hand, if the content exceeds 2.4% by mass, coarse precipitate particles that do not contribute to the improvement of strength and heat resistance exist, and there is a shortage of precipitate particles having a size effective for heat resistance. become. For this reason, it is preferable to make content of Fe into the range of 1.5-2.4 mass%.

（Ｐ）
ＰはＦｅと共に銅の母相中に分散する析出物粒子を形成して強度及び耐熱性を向上させる効果があるが、その含有量が０．００８質量％未満では析出物粒子の個数が不足し、その効果を奏功せしめることができない。一方、０．０８質量％を超えて含有すると、強度及び耐熱性の向上に寄与しない粗大な析出物粒子が存在してしまい、耐熱性に効果のあるサイズの析出物粒子が不足してしまうことになると共に導電率及び加工性が低下してしまう。このため、Ｐの含有量は０．００８〜０．０８質量％の範囲内とすることが好ましい。 (P)
P has the effect of improving the strength and heat resistance by forming precipitate particles dispersed in the copper matrix with Fe, but if the content is less than 0.008% by mass, the number of precipitate particles is insufficient. , You can not make the effect. On the other hand, if the content exceeds 0.08% by mass, coarse precipitate particles that do not contribute to the improvement of strength and heat resistance exist, and the precipitate particles having a size effective for heat resistance are insufficient. As a result, the electrical conductivity and workability deteriorate. For this reason, it is preferable to make content of P into the range of 0.008-0.08 mass%.

（Ｚｎ）
Ｚｎは銅の母相中に固溶して半田耐熱剥離性を向上させる効果を有しており、０．０１質量％未満ではその効果を奏功せしめることができない。一方、０．５質量％を超えて含有しても、更なる効果を得ることが出来なくなると共に母相中への固溶量が多くなって導電率の低下をきたす。このため、Ｚｎの含有量は０．０１〜０．５質量％の範囲内とすることが好ましい。 (Zn)
Zn has the effect of improving the heat resistance peelability of the solder by solid solution in the copper matrix, and if it is less than 0.01% by mass, the effect cannot be achieved. On the other hand, even if the content exceeds 0.5% by mass, further effects cannot be obtained, and the amount of solid solution in the mother phase increases, resulting in a decrease in conductivity. For this reason, it is preferable to make content of Zn into the range of 0.01-0.5 mass%.

（Ｎｉ）
Ｎｉは母相中に固溶して強度を向上させる効果を有しており、０．００３質量％未満ではその効果を奏功せしめることができない。一方、０．５質量％を超えて含有すると導電率の低下をきたす。このため、Ｎｉを含有する場合には、０．００３〜０．５質量％の範囲内とすることが好ましい。 (Ni)
Ni has an effect of improving the strength by dissolving in the matrix, and if it is less than 0.003 mass%, the effect cannot be achieved. On the other hand, if the content exceeds 0.5% by mass, the conductivity is lowered. For this reason, when it contains Ni, it is preferable to set it as the range of 0.003-0.5 mass%.

（Ｓｎ）
Ｓｎは母相中に固溶して強度を向上させる効果を有しており、０．００３質量％未満ではその効果を奏功せしめることができない。一方、０．５質量％を超えて含有すると導電率の低下をきたす。このため、Ｓｎを含有する場合には、０．００３〜０．５質量％の範囲内とすることが好ましい。 (Sn)
Sn has an effect of improving the strength by dissolving in the matrix, and if it is less than 0.003 mass%, the effect cannot be achieved. On the other hand, if the content exceeds 0.5% by mass, the conductivity is lowered. For this reason, when it contains Sn, it is preferable to set it as the range of 0.003-0.5 mass%.

なお、この銅合金は、Ａｌ，Ｂｅ，Ｃａ，Ｃｒ，Ｍｇ及びＳｉのうちの少なくとも１種以上が０．０００７〜０．５質量％含有されていても良い。これらの元素は、銅合金の様々な特性を向上させる役割を有しており、用途に応じて選択的に添加することが好ましい。   In addition, this copper alloy may contain 0.0007-0.5 mass% of at least 1 sort (s) among Al, Be, Ca, Cr, Mg, and Si. These elements have a role of improving various properties of the copper alloy, and are preferably added selectively depending on the application.

（析出物粒子の直径とその個数）
前述の銅合金は、図６に示す様に、透過型電子顕微鏡観察において、１μｍ２あたりの析出物粒子の直径のヒストグラムにおけるピーク値が直径１５〜３５ｎｍの範囲内でありかつ当該範囲内の直径の析出物粒子が総度数の５０％以上の頻度で存在し、その半値幅が２５ｎｍとされる。 (Diameter and number of precipitate particles)
As shown in FIG. 6, the above copper alloy has a peak value in the histogram of the diameter of the precipitate particles per 1 μm 2 in the range of 15 to 35 nm in the transmission electron microscope observation, and the diameter within the range. The precipitate particles are present at a frequency of 50% or more of the total frequency, and the half width is 25 nm.

即ち、析出物粒子の直径が上記のヒストグラムの限定範囲値内にピーク値を有する分布状態であれば、５００℃前後の高温領域においても、ピン止め効果を最大限に発揮して再結晶化を抑制し、高温での強度低下を確実に防止することが出来るのである。析出物粒子の直径のピーク値が限定範囲値を外れれば、ピン止め効果は小さくなって再結晶化を抑制出来ず、高温での強度を維持出来ず耐熱性の低下をきたすこととなる。   That is, if the diameter of the precipitate particles is a distribution state having a peak value within the limited range value of the above-mentioned histogram, even in a high temperature region around 500 ° C., the pinning effect is maximized and recrystallization is performed. It is possible to suppress the strength decrease at a high temperature. If the peak value of the diameter of the precipitate particles is out of the limit range value, the pinning effect becomes small, recrystallization cannot be suppressed, the strength at high temperature cannot be maintained, and the heat resistance is lowered.

ここで、析出物粒子の直径は、その断面観察において、析出物粒子の面積に等しい面積を持つ円の直径（円相当直径）として算出した。この場合、析出物粒子の面積は、透過型電子顕微鏡観察画像から得られる画像鉛直方向への投影面積を観察倍率から実際の面積に換算した値となる。
また、透過型電子顕微鏡観察において、５ｎｍ以下の析出物粒子については、析出物粒子であるか或いは観察時に生じる影であるかの明確な識別が不可能であるため、観察された析出物粒子の全個数には含めないことにした。
更に、その観察においては、観察倍率によって分解能が変化し、観察される析出物粒子の直径や個数に変動が生じる。そこで、１５ｎｍ以上の析出物粒子を測定する際には観察倍率を５万倍とし、１５ｎｍ未満の析出物粒子を測定する際には観察倍率を１０万倍とした。 Here, the diameter of the precipitate particles was calculated as the diameter of a circle having an area equal to the area of the precipitate particles (equivalent circle diameter) in the cross-sectional observation. In this case, the area of the precipitate particles is a value obtained by converting the projection area in the image vertical direction obtained from the transmission electron microscope observation image into the actual area from the observation magnification.
In addition, in the transmission electron microscope observation, for the precipitate particles of 5 nm or less, it is impossible to clearly identify the precipitate particles or the shadow generated at the time of observation. It was decided not to include it in the total number.
Furthermore, in the observation, the resolution changes depending on the observation magnification, and the diameter and the number of the observed precipitate particles vary. Therefore, when measuring precipitate particles of 15 nm or more, the observation magnification was set to 50,000 times, and when measuring precipitate particles of less than 15 nm, the observation magnification was set to 100,000 times.

前述の銅合金の薄板から、透過型電子顕微鏡観察用の薄膜を作製し、観察倍率５万倍及び１０万倍で組織観察を行い、析出物粒子の直径及び個数を測定する。図４に観察倍率５万倍での観察写真を、図５に観察倍率１０万倍での観察写真を示す。なお、図４、図５に示された写真の実際の倍率については、これらの写真の右下に記載されたスケールバーから換算することになる。   A thin film for observation with a transmission electron microscope is prepared from the copper alloy thin plate described above, and the structure is observed at observation magnifications of 50,000 and 100,000, and the diameter and number of the precipitate particles are measured. FIG. 4 shows an observation photograph at an observation magnification of 50,000 times, and FIG. 5 shows an observation photograph at an observation magnification of 100,000. The actual magnification of the photographs shown in FIGS. 4 and 5 is converted from the scale bar described at the lower right of these photographs.

図４及び図５において、矢印で示す粒子が析出物である。矢印Ａで示される粒子が直径１５〜３５ｎｍのものであり、矢印Ｂで示される粒子が直径１５ｎｍ未満、矢印Ｃで示される粒子が直径３５ｎｍを超えるものである。また、透過型電子顕微鏡観察にはレプリカ法により作製した試料を用いても良い。   4 and 5, particles indicated by arrows are precipitates. The particle indicated by the arrow A has a diameter of 15 to 35 nm, the particle indicated by the arrow B is less than 15 nm in diameter, and the particle indicated by the arrow C exceeds 35 nm in diameter. A sample prepared by a replica method may be used for transmission electron microscope observation.

図４に示す写真（観察倍率５万倍）の視野面積は２．６μｍ２である。従って、この写真内でカウントされた析出物粒子の個数を２．６で除し１μｍ２あたりの析出物の個数が算出されることになる。
同様に、図５に示す写真（観察倍率１０万倍）の視野面積は０．６５μｍ２である。従って、この写真内でカウントされた析出物粒子の個数を０．６５で除し１μｍ２あたりの析出物の個数が算出されることになる。
なお、透過型電子顕微鏡観察は局所的な観察となるため、観察箇所を変えてこのような観察を複数回行うことが好ましい。 The field of view of the photograph shown in FIG. 4 (observation magnification 50,000 times) is 2.6 μm 2 . Therefore, the number of precipitate particles counted in this photograph is divided by 2.6, and the number of precipitates per 1 μm 2 is calculated.
Similarly, the visual field area of the photograph shown in FIG. 5 (observation magnification is 100,000 times) is 0.65 μm 2 . Therefore, the number of precipitate particles counted in this photograph is divided by 0.65 to calculate the number of precipitates per 1 μm 2 .
In addition, since transmission electron microscope observation is local observation, it is preferable to perform such observation a plurality of times by changing observation locations.

（耐熱性試験）
この銅合金の耐熱性試験は次の方法で行い、保持率にて評価することが好ましい。
銅合金薄板試料を作製して加熱保持炉内にて５００℃にて１、３、５、１０分間各々保持した後のビッカース強度を測定し、各々の熱処理前のビッカース強度と比較し保持率にて耐熱性を評価する。
保持率は（熱処理後ビッカース強度）／（熱処理前ビッカース強度）にて算出する。各々の加熱保持時間での保持率の変化の代表例を図８に示す。
この銅合金は析出物粒子のピン止め効果が充分に発揮された優れた耐熱性を有し、５００℃にて１０分間加熱保持後の保持率は８８％以上となる。 (Heat resistance test)
The heat resistance test of this copper alloy is preferably carried out by the following method and evaluated by the retention rate.
A copper alloy thin plate sample was prepared and measured for Vickers strength after holding for 1, 3, 5, and 10 minutes at 500 ° C. in a heating and holding furnace, and compared with the Vickers strength before each heat treatment. To evaluate heat resistance.
The retention is calculated by (Vickers strength after heat treatment) / (Vickers strength before heat treatment). A representative example of the change in the retention rate in each heating and holding time is shown in FIG.
This copper alloy has excellent heat resistance in which the effect of pinning precipitate particles is sufficiently exhibited, and the retention after heating and holding at 500 ° C. for 10 minutes is 88% or more.

（銅合金の製造条件）
次に、この析出物粒子（Ｆｅ−Ｐ系化合物）を有するＣｕ−Ｆｅ−Ｐ系銅合金の製造条件について以下に説明する。後述する好ましい時効処理、冷間圧延、低温焼鈍の各条件を除き、通常の製造工程自体を大きく変えることは不要である。
また、本製造工程における、冷間圧延、低温焼鈍での銅合金の１μｍ２あたりの析出物粒子の直径のヒストグラムの変化を図７に示す。横軸は析出物粒子の粒径（円相当直径）であり、縦軸は度数（１μｍ２あたりの析出物粒子の個数）である。
先ず、上記の好ましい成分範囲に調整された銅合金を溶解鋳造し、鋳塊を面削後、圧延率を６０％以上にて熱間圧延を施し、次に、９００〜９５０℃にて２０〜３００秒の溶体化処理を行う。 (Copper alloy production conditions)
Next, manufacturing conditions for the Cu—Fe—P copper alloy having the precipitate particles (Fe—P compound) will be described below. Except for the preferable aging treatment, cold rolling, and low-temperature annealing described later, it is not necessary to greatly change the normal manufacturing process itself.
Moreover, the change of the histogram of the diameter of the deposit particle | grains per micrometer 2 of the copper alloy in cold rolling and low-temperature annealing in this manufacturing process is shown in FIG. The horizontal axis is the particle size (equivalent circle diameter) of the precipitate particles, and the vertical axis is the frequency (number of precipitate particles per 1 μm 2 ).
First, a copper alloy adjusted to the above-mentioned preferable component range is melt cast, and after chamfering the ingot, hot rolling is performed at a rolling rate of 60% or more, and then at 900 to 950 ° C. A solution treatment for 300 seconds is performed.

（時効処理）
溶体化処理後の銅合金板を４５０〜５７５℃にて３〜１２時間の時効処理を行い、広範な粒度分布を有する析出物粒子を析出させ、最終の目的とする構成の析出物粒子を得るための素地をつくる。４５０℃以下或いは３時間以下では析出物粒子が充分に析出せず、５７５℃以上或いは１２時間以上では銅合金組織が軟化する。 (Aging treatment)
The copper alloy plate after solution treatment is subjected to aging treatment at 450 to 575 ° C. for 3 to 12 hours to precipitate precipitate particles having a wide particle size distribution, thereby obtaining precipitate particles having a final target configuration. Create a foundation for Precipitate particles do not sufficiently precipitate at 450 ° C. or less or 3 hours or less, and the copper alloy structure softens at 575 ° C. or more or 12 hours or more.

（第１冷間圧延）
時効処理後の銅合金板を加工率６０〜８０％で冷間圧延し、析出物の粒径を小さくすると共に更なる析出物粒子の析出を促進させる。析出相の優先核形成サイトが核生成の駆動力的に有利な転位セル境界となるため、核生成頻度が促進される。加工率が６０％以下では析出物粒子の粒径を小さくするには不十分であり、８０％以上では核生成頻度の促進効果に支障を来たす。図７に示す様に、この段階では析出物粒子の直径のヒストグラムのピーク値は形成されていないと推察される。 (First cold rolling)
The copper alloy plate after the aging treatment is cold-rolled at a processing rate of 60 to 80% to reduce the particle size of the precipitate and promote the precipitation of further precipitate particles. Since the preferential nucleation site of the precipitation phase becomes a dislocation cell boundary that is advantageous in terms of driving force for nucleation, the nucleation frequency is promoted. When the processing rate is 60% or less, it is insufficient to reduce the particle size of the precipitate particles, and when it is 80% or more, the effect of promoting the nucleation frequency is hindered. As shown in FIG. 7, it is presumed that the peak value of the histogram of the diameter of the precipitate particles is not formed at this stage.

（第１低温焼鈍）
第１冷間圧延後の銅合金板を２００〜４００℃にて０．５分〜３時間の低温焼鈍を行い、析出物粒子の直径のヒストグラムのピーク値、頻度、半値幅を一定の範囲値内にシフトさせる。２００℃以下或いは０．５分以下では効果がなく、４００℃或いは３時間以上では析出物粒子の粗大化に繋がりピン止め効果の発揮に支障をきたす。図７に示す様に、この段階では析出物粒子の直径のヒストグラムのピーク値は１５ｎｍ以下になっていると推察されピン止め効果は充分に発揮されない。この１回の低温焼鈍のみでは、析出物粒子の直径のヒストグラムのピーク値、頻度、半値幅を最適範囲値内に入れるのは無理であり、更なる冷間圧延及び低温焼鈍が必要となる。 (First low temperature annealing)
The copper alloy sheet after the first cold rolling is subjected to low temperature annealing at 200 to 400 ° C. for 0.5 minutes to 3 hours, and the peak value, frequency and half width of the histogram of the diameter of the precipitate particles are within a certain range value. Shift in. If it is 200 ° C. or less or 0.5 minutes or less, there is no effect, and if it is 400 ° C. or 3 hours or more, it leads to coarsening of the precipitate particles and hinders the effect of pinning. As shown in FIG. 7, at this stage, the peak value of the histogram of the diameter of the precipitate particles is assumed to be 15 nm or less, and the pinning effect is not sufficiently exhibited. With only this single low-temperature annealing, it is impossible to put the peak value, frequency, and half-value width of the histogram of the diameter of the precipitate particles within the optimum range values, and further cold rolling and low-temperature annealing are required.

（第２冷間圧延）
第１低温焼鈍後の銅合金板を加工率３０〜６０％で冷間圧延し、析出物粒子を目的とする直径のヒストグラムのピーク値、頻度、半値幅の範囲内にシフトさせる素地を作成する。加工率６０％以上では全体としての圧延率が高くなり、再結晶化を促すことに繋がり、また、強度、導電率、ビッカース硬度にも悪影響を及ぼす。加工率３０％以下では殆んど効果はない。図７に示す様に、この段階でも析出物粒子の直径のヒストグラムピーク値は１５ｎｍ以下になっているが、更なる析出物粒子の析出を促進させ、ヒストグラムを最適化する素地が出来上がっていると推察される。 (Second cold rolling)
The copper alloy sheet after the first low-temperature annealing is cold-rolled at a processing rate of 30 to 60%, and a base for shifting the precipitate particles within the peak value, frequency, and half-value width ranges of the target diameter histogram is created. . If the processing rate is 60% or more, the rolling rate as a whole increases, leading to the promotion of recrystallization, and also adversely affects strength, conductivity, and Vickers hardness. There is almost no effect at a processing rate of 30% or less. As shown in FIG. 7, the histogram peak value of the diameter of the precipitate particles is still 15 nm or less even at this stage. Inferred.

（第２低温焼鈍）
第２冷間圧延後の銅合金板を２００〜４００℃にて０．５分〜３時間の低温焼鈍を行い、図７に示す様に、析出物粒子の１μｍ２あたりの直径のヒストグラムにおけるピーク値が直径１５〜３５ｎｍの範囲内であり、かつ、総度数の５０％以上の頻度とし、その半値幅を２５ｎｍ以下として、ピン止め効果を最大限に発揮させる。この析出物粒子の１μｍ２あたりの直径のヒストグラムの詳細を図６に示す。 (Second low temperature annealing)
The copper alloy sheet after the second cold rolling was annealed at 200 to 400 ° C. for 0.5 minutes to 3 hours, and as shown in FIG. 7, the peak in the histogram of the diameter per 1 μm 2 of the precipitate particles The value is within the range of 15 to 35 nm in diameter, and the frequency is 50% or more of the total frequency, and the half-value width is 25 nm or less, so that the pinning effect is maximized. The details of the histogram of the diameter per 1 μm 2 of the precipitate particles are shown in FIG.

この第２低温焼鈍にて、１μｍ２あたりの析出物粒子の直径のヒストグラムが、目的とするピーク値、頻度、半値幅内にシフトしなければ、更に冷間圧延及び低温焼鈍を上記の加工率、熱処理条件にて繰返すことが必要となる。この場合、冷間圧延或いは低温焼鈍を単独で繰り返しても意味はなく、冷間圧延の後に低温焼鈍を行うことが重要である。 If the histogram of the diameter of the precipitate particles per 1 μm 2 does not shift within the target peak value, frequency, and full width at half maximum in this second low-temperature annealing, cold rolling and low-temperature annealing are further performed at the above processing rate. It is necessary to repeat under heat treatment conditions. In this case, there is no point in repeating cold rolling or low temperature annealing alone, and it is important to perform low temperature annealing after cold rolling.

前述の様な構成とされた本実施形態の銅合金は、５００℃前後の高温領域においても、ピン止め効果を最大限に発揮して、強度の低下をきたさず、耐熱性に優れた高強度、高導電率の銅合金となる。   The copper alloy of the present embodiment configured as described above exhibits the pinning effect to the maximum even in a high temperature region around 500 ° C., and does not cause a decrease in strength, and has high strength excellent in heat resistance. It becomes a copper alloy with high conductivity.

［リードフレーム］
リードフレームは、銅合金部材をリードフレームの形状に打ち抜き加工した後、ニッケルめっき、銅めっき、錫めっきを順に施し、これらをリフロー処理することによって得られる。
ニッケルめっきの条件としては、めっき浴に、硫酸ニッケル（ＮｉＳＯ４）、ホウ酸（Ｈ３ＢＯ３）を主成分としたワット浴、スルファミン酸ニッケル（Ｎｉ(ＮＨ２ＳＯ３)２）とホウ酸（Ｈ３ＢＯ３）を主成分としたスルファミン酸浴等が用いられる。例えば、硫酸ニッケルが３００ｇ／Ｌ、ホウ酸が３０ｇ／Ｌの濃度のめっき浴とされる。酸化反応を起こし易くする塩類として塩化ニッケル（ＮｉＣｌ２）などが加えられる場合もある。また、めっき温度は４５〜５５℃、電流密度は２０〜５０Ａ／ｄｍ２とされる。 [Lead frame]
The lead frame is obtained by punching a copper alloy member into the shape of the lead frame, applying nickel plating, copper plating, and tin plating in this order, and reflowing them.
Nickel plating conditions include a plating bath, a Watt bath mainly composed of nickel sulfate (NiSO 4 ) and boric acid (H 3 BO 3 ), nickel sulfamate (Ni (NH 2 SO 3 ) 2 ) and boric acid. A sulfamic acid bath or the like mainly composed of (H 3 BO 3 ) is used. For example, the plating bath has a concentration of nickel sulfate of 300 g / L and boric acid of 30 g / L. In some cases, nickel chloride (NiCl 2 ) or the like is added as a salt that easily causes an oxidation reaction. The plating temperature is 45 to 55 ° C., and the current density is 20 to 50 A / dm 2 .

銅めっきの条件としては、めっき浴に硫酸銅（ＣｕＳＯ４）及び硫酸（Ｈ２ＳＯ４）を主成分とした硫酸銅浴が用いられ、レベリングのために塩素イオン（Ｃｌ−）が添加される。例えば、硫酸銅が２５０ｇ／Ｌ、硫酸が６０ｇ／Ｌ、塩素イオンが５０ｍｇ／Ｌの濃度のめっき浴とされる。めっき温度は３５〜５５℃、電流密度は２０〜６０Ａ／ｄｍ２とされる。 As the conditions for copper plating, a copper sulfate bath containing copper sulfate (CuSO 4 ) and sulfuric acid (H 2 SO 4 ) as main components is used for the plating bath, and chlorine ions (Cl − ) are added for leveling. . For example, a plating bath having a concentration of 250 g / L for copper sulfate, 60 g / L for sulfuric acid, and 50 mg / L for chloride ions is used. The plating temperature is 35 to 55 ° C., and the current density is 20 to 60 A / dm 2 .

錫めっきの条件としては、めっき浴に硫酸（Ｈ２ＳＯ４）と硫酸第一錫（ＳｎＳＯ４）を主成分とした硫酸浴が用いられる。また、錫めっき浴には、めっき表面を平滑にして光沢度を上げるために、光沢剤が添加されても良い。その光沢剤としては、例えば、ポリオキシノニルフェニルエーテル等のような非イオン性界面活性剤とホルマリン等のようなホルミル基を成分とするものが好適である。この錫めっき浴としては、例えば、硫酸が８０ｇ／Ｌ、硫酸第一鉄が６０ｇ／Ｌ、光沢剤が１０ｍｇ／Ｌの濃度とされる。この場合、光沢剤の添加量としては、５〜１５ｍｇ／Ｌが好ましい。添加量が５ｍｇ／Ｌ未満では、錫めっき層表面に所望の光沢度（８０〜１１０％）が得られず、１５ｍｇ／Ｌを超えても効果は飽和する。めっき温度は１５〜３５℃、電流密度は１０〜３０Ａ／ｄｍ２とされる。 As the conditions for tin plating, a sulfuric acid bath containing sulfuric acid (H 2 SO 4 ) and stannous sulfate (SnSO 4 ) as main components is used for the plating bath. Further, a brightening agent may be added to the tin plating bath in order to smooth the plating surface and increase the glossiness. As the brightening agent, for example, a nonionic surfactant such as polyoxynonylphenyl ether and a formyl group such as formalin are suitable. For example, the tin plating bath has a concentration of 80 g / L for sulfuric acid, 60 g / L for ferrous sulfate, and 10 mg / L for brightener. In this case, the addition amount of the brightener is preferably 5 to 15 mg / L. If the addition amount is less than 5 mg / L, the desired glossiness (80 to 110%) cannot be obtained on the surface of the tin plating layer, and the effect is saturated even if it exceeds 15 mg / L. The plating temperature is 15 to 35 ° C., and the current density is 10 to 30 A / dm 2 .

いずれのめっき処理も、一般的なめっき技術よりも高い電流密度で行われる。その場合に、めっき液の攪拌技術が重要となるが、めっき液を処理板に向けて高速で噴きつける方法やめっき液を処理板と平行に流す方法などとすることにより、処理板の表面に新鮮なめっき液を速やかに供給し、高電流密度によって均質なめっき層を短時間で形成することができる。そのめっき液の流速としては、処理板の表面において０．５ｍ／秒以上とすることが望ましい。また、この従来技術よりも一桁高い電流密度でのめっき処理を可能とするために、陽極には、アノード限界電流密度の高い酸化イリジウム（ＩｒＯ２）を被覆したＴｉ板等の不溶性陽極を用いることが望ましい。 All the plating processes are performed at a higher current density than a general plating technique. In this case, the plating solution agitation technology is important. However, by using a method of spraying the plating solution at a high speed toward the processing plate or a method of flowing the plating solution in parallel with the processing plate, A fresh plating solution can be supplied quickly, and a uniform plating layer can be formed in a short time with a high current density. The flow rate of the plating solution is desirably 0.5 m / second or more on the surface of the treatment plate. In addition, in order to enable the plating process at a current density that is an order of magnitude higher than that of the prior art, an insoluble anode such as a Ti plate coated with iridium oxide (IrO 2 ) having a high anode limit current density is used as the anode. It is desirable.

このようにして銅合金部材の上にニッケルめっき層、銅めっき層、錫めっき層を順に形成した後、加熱してリフロー処理する。
このリフロー処理はＣＯ還元性雰囲気にした加熱炉内でめっき後の処理材を１０〜９０℃／秒の昇温速度で２４０〜３００℃のピーク温度まで加熱する加熱工程と、そのピーク温度に達した後、３０℃／秒以下の冷却速度で１〜３０秒間冷却する一次冷却工程と、一次冷却後に５０〜２５０℃／秒の冷却速度で冷却する二次冷却工程とを有する処理とする。一次冷却工程は空冷により、二次冷却工程は１０〜９０℃の水を用いた水冷により行われる。 Thus, after forming a nickel plating layer, a copper plating layer, and a tin plating layer in order on a copper alloy member, it heats and performs reflow processing.
This reflow treatment is a heating process in which the treated material after plating is heated to a peak temperature of 240 to 300 ° C. at a temperature rising rate of 10 to 90 ° C./second in a heating furnace having a CO reducing atmosphere, and the peak temperature is reached. Then, it is set as the process which has the primary cooling process cooled for 1 to 30 seconds with the cooling rate of 30 degrees C / sec or less, and the secondary cooling process cooled with the cooling rate of 50-250 degrees C / sec after primary cooling. The primary cooling step is performed by air cooling, and the secondary cooling step is performed by water cooling using 10 to 90 ° C. water.

このリフロー処理を還元性雰囲気で行うことにより錫めっき表面に溶融温度の高い錫酸化物皮膜が生成するのを防ぎ、より低い温度かつより短い時間でリフロー処理を行うことが可能となり、所望の合金（金属間化合物）構造を作製することが容易となる。また、冷却工程を二段階とし、冷却速度の小さい一次冷却工程を設けることにより、Ｃｕ原子がＳｎ粒内に穏やかに拡散し、所望の合金構造で成長する。つまり、前述したＳｎ柱状結晶の粒界からのＣｕの拡散を緩やかにして、その凸部をなだらかにする。そして、その後に急冷を行うことにより合金層の成長を止め、所望の構造で固定化することができ、適切な状態の表面粗さの銅錫合金層を得ることができる。
ところで、高電流密度で電析した銅と錫は安定性が低く室温においても合金化や結晶粒肥大化が発生し、リフロー処理で所望の合金構造を作ることが困難になる。このため、めっき処理後速やかにリフロー処理を行うことが望ましい。具体的には３０分以内、望ましくは１５分以内、より好ましくは５分以内にリフロー処理を行うとよい。めっき後の放置時間が短いことは問題とならないが、通常の処理ラインでは構成上１分後程度となる。 By performing this reflow treatment in a reducing atmosphere, it is possible to prevent the formation of a tin oxide film having a high melting temperature on the surface of the tin plating, and the reflow treatment can be performed at a lower temperature and in a shorter time. It becomes easy to produce a (intermetallic compound) structure. Further, by providing a cooling process in two stages and providing a primary cooling process with a low cooling rate, Cu atoms are gently diffused in the Sn grains and grow in a desired alloy structure. In other words, the diffusion of Cu from the grain boundaries of the Sn columnar crystals described above is moderated, and the convex portions are smoothed. Then, by rapid cooling thereafter, the growth of the alloy layer can be stopped and fixed with a desired structure, and a copper-tin alloy layer with an appropriate surface roughness can be obtained.
By the way, copper and tin electrodeposited at a high current density are low in stability, and alloying and grain enlargement occur even at room temperature, making it difficult to produce a desired alloy structure by reflow treatment. For this reason, it is desirable to perform the reflow process immediately after the plating process. Specifically, the reflow process may be performed within 30 minutes, desirably within 15 minutes, more preferably within 5 minutes. A short standing time after plating does not cause a problem, but in a normal processing line, it is about one minute after construction.

更に、このリフロー処理が施されたリードフレーム形状の銅合金部材に、電気化学還元法にて表面の酸化膜を除去した後、その表面にシアン系化合物を使用した銀ストライクめっき法にてＡｇめっきを形成する。
電気化学還元法にて電解液中で錫めっき層の酸化膜を還元して完全に除去することにより、錫めっき層のＳｎ金属面を露出させ、次の銀めっきを密着させることができ、これにより、合金化処理においてＡｇとＳｎとの相互拡散を確実にすることができる。電解処理液としては弱アルカリ電解脱脂液が用いられる。
また、銀ストライクめっきの条件は、次の表１に示す通りである。 Furthermore, after removing the oxide film on the surface of the lead frame-shaped copper alloy member subjected to the reflow treatment by an electrochemical reduction method, Ag plating is performed by a silver strike plating method using a cyanide compound on the surface. Form.
By reducing the oxide film of the tin plating layer in the electrolytic solution by the electrochemical reduction method and completely removing it, the Sn metal surface of the tin plating layer can be exposed and the next silver plating can be adhered. Thus, mutual diffusion of Ag and Sn can be ensured in the alloying process. A weak alkaline electrolytic degreasing solution is used as the electrolytic treatment solution.
The conditions for silver strike plating are as shown in Table 1 below.

Figure 2011176260
Figure 2011176260

ここで、シアン化銀カリウムの濃度は１ｇ／Ｌ未満であると、錫めっき層に対して所望の面積被覆率が得られず、また８ｇ／Ｌを超えると、Ａｇめっき表面が粗くなるので、１〜８ｇ／Ｌが好ましい。そして、この銀ストライクめっきにより形成されるＡｇめっきの厚さは０．０１〜０．５μｍとする。この範囲のＡｇめっき層とすることにより、最終的なＡｇ３Ｓｎ合金層を所望の膜厚とすることができる。
次に、このＡｇめっきした処理材に、ベンゾチアゾール化合物を含む水溶液中にて合金化処理を施す。その合金化処理の条件を次の表２に示す。 Here, if the concentration of potassium potassium cyanide is less than 1 g / L, a desired area coverage cannot be obtained for the tin plating layer, and if it exceeds 8 g / L, the Ag plating surface becomes rough. 1-8 g / L is preferable. And the thickness of Ag plating formed by this silver strike plating shall be 0.01-0.5 micrometer. With Ag plating layer in this range, the final Ag 3 Sn alloy layer can be set to a desired thickness.
Next, this Ag-plated treatment material is subjected to an alloying treatment in an aqueous solution containing a benzothiazole compound. The conditions for the alloying treatment are shown in Table 2 below.

Figure 2011176260
Figure 2011176260

Ａｇめっきした処理材をこの処理液に浸漬することにより、表面のＡｇとその下のＳｎとが相互拡散して合金化し、表面にＡｇ３Ｓｎ合金層が形成される。 By immersing the Ag-plated treatment material in this treatment solution, Ag on the surface and Sn underneath are diffused and alloyed to form an Ag 3 Sn alloy layer on the surface.

以上のような方法により、銅合金部材１１の上に形成したニッケルめっき層１２と、錫めっき層１４との間に、銅錫合金層１３を有し、錫めっき層１４の上の最表面がＡｇ３Ｓｎ合金層１６である４層めっきのリードフレーム８が完成される。この場合、図示はしないが、銅錫合金層１３はさらに、ニッケルめっき層１２の上に形成されるＣｕ３Ｓｎ層と、このＣｕ３Ｓｎ層の上に形成されるＣｕ６Ｓｎ５層とから構成される。
また、最表面のＡｇ３Ｓｎ合金層１６は、表面の光沢度が８０〜１１０％とされる。 By the above method, it has the copper tin alloy layer 13 between the nickel plating layer 12 formed on the copper alloy member 11, and the tin plating layer 14, and the outermost surface on the tin plating layer 14 is The lead frame 8 of the four-layer plating that is the Ag 3 Sn alloy layer 16 is completed. In this case, although not shown, the copper tin alloy layer 13 is further composed of a Cu 3 Sn layer formed on the nickel plating layer 12 and a Cu 6 Sn 5 layer formed on the Cu 3 Sn layer. Composed.
The outermost surface of the Ag 3 Sn alloy layer 16 has a glossiness of 80 to 110%.

［接合方法］
次に、このように構成したリードフレーム８にＬＥＤチップ１を接合する方法について説明する。
リードフレーム８の上にＬＥＤチップ１の電極を重ね合わせる。このとき、図２（ａ）に示すように、リードフレーム１のめっき層のうちの最表面のＡｇ３Ｓｎ合金層１６とＬＥＤチップ１の電極の最表面の金層９とが接触状態となる。そして、この重ね合わせ状態で加熱炉内に入れ、窒素雰囲気の下、温度２４０〜３００℃で、例えば６０〜１２０秒間保持することにより、これらを接合する。この接合条件に保持することにより、ＬＥＤチップ１の最表面層の金層９と、リードフレーム８の最表面のＡｇ３Ｓｎ合金層１６の一部と錫めっき層１４の一部との間に合金反応が生じて、図２（ｂ）に示すように、金銀錫合金層１５を形成し、この金銀錫合金層１５によってＬＥＤチップ１とリードフレーム８とが接合状態となる。
接合部にボイド等の欠陥がなく、高い接合強度となる金銀錫合金層を得るために２４０℃以上の加熱温度とするのが好ましい。加熱温度が３００℃を超えても、接合強度のそれ以上の向上は期待できないとともに、熱応力が大きくなるので好ましくない。 [Joint method]
Next, a method for bonding the LED chip 1 to the lead frame 8 configured as described above will be described.
The electrodes of the LED chip 1 are overlaid on the lead frame 8. At this time, as shown in FIG. 2A, the outermost Ag 3 Sn alloy layer 16 of the plating layer of the lead frame 1 and the outermost gold layer 9 of the electrode of the LED chip 1 are in contact with each other. . And it puts in a heating furnace in this overlapping state, and joins these by hold | maintaining at a temperature of 240-300 degreeC, for example for 60-120 second under nitrogen atmosphere. By maintaining this bonding condition, the gold layer 9 of the outermost surface layer of the LED chip 1, and a portion of the Ag 3 Sn alloy layer 16 of the outermost surface of the lead frame 8 and a portion of the tin plating layer 14 are interposed. As shown in FIG. 2B, an alloy reaction occurs, and a gold-silver-tin alloy layer 15 is formed. The gold-silver-tin alloy layer 15 brings the LED chip 1 and the lead frame 8 into a bonded state.
In order to obtain a gold-silver-tin alloy layer having no defects such as voids in the joint and high joint strength, the heating temperature is preferably 240 ° C. or higher. Even if the heating temperature exceeds 300 ° C., no further improvement in bonding strength can be expected, and thermal stress increases, which is not preferable.

このようにしてＬＥＤチップ１とリードフレーム８とを接合することにより、これらの間に形成される金銀錫合金層１５が両者を強固に接合することができ、また、リードフレーム８の最表面は、光沢度８０〜１１０％のＡｇ３Ｓｎ合金層１６により構成されるので、ＬＥＤチップ１から出射される光の反射効率が良く、ＬＥＤとしての性能を良好に発揮させることができる。 By joining the LED chip 1 and the lead frame 8 in this way, the gold-silver-tin alloy layer 15 formed between them can be firmly joined, and the outermost surface of the lead frame 8 is Since it is composed of the Ag 3 Sn alloy layer 16 having a glossiness of 80 to 110%, the reflection efficiency of light emitted from the LED chip 1 is good, and the performance as an LED can be exhibited well.

以上の実施形態では、リードフレームの最表面をＡｇ３Ｓｎ合金層とし、その上にＬＥＤチップの金層を重ねて接合するようにしたが、ＬＥＤチップが接合されるリードフレームは高い光沢度を有していることが重要であり、８０〜１１０％の光沢度を維持する必要がある。しかしながら、使用環境やモールド樹脂に使われる材料等によっては、雰囲気や樹脂中に含まれるサルファ（Ｓ）によってリードフレームのＡｇ３Ｓｎ合金層が硫化されることがあり、硫化されると光沢度が低下する。
そこで、この硫化を防止するために、図３に示す他の実施形態のように、Ａｇ３Ｓｎ合金層１６の上に厚みが５〜２０ｎｍの透明な酸化錫皮膜１７を形成したリードフレーム２１を用いてもよい。この酸化錫皮膜１７は、厚みが５ｎｍ未満では硫化防止効果が不十分であり、２０ｎｍを超えると光沢度が低下するとともに、目的とする接合を妨げる傾向がみられる。 In the above embodiment, the outermost surface of the lead frame is made of an Ag 3 Sn alloy layer, and the gold layer of the LED chip is stacked thereon and bonded. However, the lead frame to which the LED chip is bonded has high glossiness. It is important to have a glossiness of 80-110%. However, depending on the usage environment and the material used for the mold resin, the atmosphere and the sulfur (S) contained in the resin may cause the Ag 3 Sn alloy layer of the lead frame to be sulfided. descend.
In order to prevent this sulfidation, a lead frame 21 in which a transparent tin oxide film 17 having a thickness of 5 to 20 nm is formed on an Ag 3 Sn alloy layer 16 as in another embodiment shown in FIG. It may be used. When the thickness of the tin oxide film 17 is less than 5 nm, the effect of preventing sulfidation is insufficient. When the thickness exceeds 20 nm, the glossiness is lowered and the intended bonding tends to be hindered.

この酸化錫皮膜１７は、ＬＥＤチップ１を接合する前に、Ａｇ３Ｓｎ合金層１６が形成されたリードフレームを例えば酸素含有雰囲気下で７００〜１０００℃に５〜６０秒加熱することにより、Ａｇ３Ｓｎ合金層１６の表面を雰囲気の酸素と反応させることにより形成することができる。この加熱処理が７００℃未満あるいは５秒未満では、酸化錫皮膜の厚みが５ｎｍに達せず、硫化防止効果が不十分となる。また、加熱処理が１０００℃を超えあるいは６０秒を超えると、酸化錫皮膜の厚みが２０ｎｍを超えることになり、光沢度が低下するとともに、目的とする接合を妨げる傾向がみられる。
この酸化錫皮膜１７が形成されたリードフレーム２１にＬＥＤチップ１を重ねると、リードフレーム２１のＡｇ３Ｓｎ合金層１６とＬＥＤチップ１の金層９との間に酸化錫皮膜１７が介在するが、５〜２０ｎｍと極めて薄いため、リードフレーム２１のめっき層とＬＥＤチップ１の金層９との合金化反応を阻害することはない。 This tin oxide film 17 is formed by heating the lead frame on which the Ag 3 Sn alloy layer 16 is formed, for example, at 700 to 1000 ° C. for 5 to 60 seconds in an oxygen-containing atmosphere before bonding the LED chip 1. The surface of the 3 Sn alloy layer 16 can be formed by reacting with oxygen in the atmosphere. When this heat treatment is less than 700 ° C. or less than 5 seconds, the thickness of the tin oxide film does not reach 5 nm, and the effect of preventing sulfidation is insufficient. On the other hand, when the heat treatment exceeds 1000 ° C. or exceeds 60 seconds, the thickness of the tin oxide film exceeds 20 nm, the glossiness is lowered, and the intended bonding tends to be hindered.
When the LED chip 1 is stacked on the lead frame 21 on which the tin oxide film 17 is formed, the tin oxide film 17 is interposed between the Ag 3 Sn alloy layer 16 of the lead frame 21 and the gold layer 9 of the LED chip 1. Since it is as thin as 5 to 20 nm, the alloying reaction between the plating layer of the lead frame 21 and the gold layer 9 of the LED chip 1 is not hindered.

Ｆｅ；１．５〜２．４質量％、Ｐ；０．００８〜０．０８質量％およびＺｎ；０．０１〜０．５質量％を含み、残部がＣｕ及び不可避不純物からなるＣｕ−Ｆｅ−Ｐ−Ｚｎ系銅合金を還元雰囲気下で溶解して鋳塊を作製し、これを前述の製造条件にて銅合金部材とした。この銅合金部材をプレス打抜きにて所定の形状に加工した後、その表面にニッケルめっき、銅めっき、錫めっきを順に施し、錫めっき付き銅合金リードフレームを得た。その後、加熱してリフロー処理することにより、銅合金部材の表面にニッケルめっき層、銅錫合金層、錫めっき層が順に形成された３層めっき銅合金部材を作成し、更に、その錫めっき表面を、電気化学還元法にて、電解液中で錫めっき層の酸化膜を除去し、表１に示す条件にて、膜厚を変化させて銀ストライクめっきを施し、表２に示す条件にて、ベンゾチアゾール化合物を含む水溶液中にて合金化処理を施し、最表面をＡｇ３Ｓｎ層としたリードフレームを作製した。
また、試料番号５，６については、さらに、リードフレームを８５０℃の酸素含有雰囲気で３０秒加熱処理することにより、Ａｇ３Ｓｎ層の表面に約１０ｎｍの酸化錫皮膜を形成した。
次に、ＬＥＤチップの電極最表面に金を種々の厚さで蒸着したものを用意し、リードフレームの最表面のＡｇ３Ｓｎ層（試料番号５，６については酸化錫皮膜）に金蒸着層を重ね合わせてＬＥＤチップとリードフレームとを表３に示す温度で接合した。
そして、接合状態となったリードフレームとＬＥＤチップとの剥離試験を行い、また、リードフレーム表面の光沢度を測定した。
剥離試験は、米国ＭＩＬ ＳＴＤ−８８３に準拠して、ＬＥＤチップをリードフレームに接合し、ＬＥＤチップをピンセットの先端の様に尖った先でシェアーし、リードフレームから剥離しなかった試料を○とし、剥離した試料を×とした。
この剥離試験は、常温で実施するとともに、耐熱性を確認するために、１７５℃×１０００時間加熱した後についても実施した。
光沢度は、「ＪＩＳ Ｚ ８７４１ 測定方法３ ６０度鏡面光沢」に準拠して、接触式の光沢度計（日本電色工業株式会社製 ＰＧ−１Ｍ）にて測定した。測定サイズは１０×２０ｍｍとして、５箇所測定し、その平均値を光沢度とした。
これらの結果を表１に示す。 Fe: 1.5-2.4% by mass, P: 0.008-0.08% by mass and Zn: 0.01-0.5% by mass, the balance being Cu—Fe— consisting of Cu and inevitable impurities An ingot was produced by melting a P—Zn-based copper alloy in a reducing atmosphere, and this was used as a copper alloy member under the above-described production conditions. After processing this copper alloy member into a predetermined shape by press punching, nickel plating, copper plating, and tin plating were sequentially applied to the surface to obtain a copper alloy lead frame with tin plating. Then, by heating and reflowing, a three-layer plated copper alloy member in which a nickel plating layer, a copper tin alloy layer, and a tin plating layer are formed in order on the surface of the copper alloy member is created. In the electrochemical reduction method, the oxide film of the tin plating layer is removed in the electrolytic solution, and the film is subjected to silver strike plating under the conditions shown in Table 1 under the conditions shown in Table 2. Then, an alloying treatment was performed in an aqueous solution containing a benzothiazole compound, and a lead frame having an Ag 3 Sn layer as the outermost surface was produced.
For sample numbers 5 and 6, the lead frame was further heat-treated in an oxygen-containing atmosphere at 850 ° C. for 30 seconds to form a tin oxide film having a thickness of about 10 nm on the surface of the Ag 3 Sn layer.
Next, gold vapor-deposited at various thicknesses are prepared on the electrode outermost surface of the LED chip, and the gold vapor-deposited layer is formed on the Ag 3 Sn layer (tin oxide film for sample numbers 5 and 6) on the outermost surface of the lead frame. The LED chip and the lead frame were bonded at a temperature shown in Table 3.
Then, a peel test was performed between the lead frame and the LED chip in a joined state, and the glossiness of the lead frame surface was measured.
In the peel test, in accordance with US MIL STD-883, the LED chip was bonded to the lead frame, the LED chip was shared at the pointed tip like the tip of the tweezers, and the sample that was not peeled off from the lead frame The peeled sample was marked with x.
This peel test was performed at room temperature and also after heating at 175 ° C. for 1000 hours in order to confirm heat resistance.
The glossiness was measured with a contact-type glossmeter (PG-1M manufactured by Nippon Denshoku Industries Co., Ltd.) in accordance with “JIS Z 8741 Measurement Method 3 60 ° Specular Gloss”. The measurement size was 10 × 20 mm, and five locations were measured, and the average value was taken as the glossiness.
These results are shown in Table 1.

Figure 2011176260
Figure 2011176260

この表１に示されるように、Ａｇ３Ｓｎ合金層の厚みを０．０１〜０．５μｍとし、金蒸着層の厚みを０．１〜１μｍとし、接合温度を２４０〜３００℃とすることにより、ＬＥＤチップが強固に接合され、剥離し難いものとなっている。この場合、加熱後も十分な接合強度を示しており、耐熱性も十分である。また、光沢度も８０〜１１０％であり、ＬＥＤチップ用のリードフレームとして充分な光沢がある。 As shown in Table 1, the thickness of the Ag 3 Sn alloy layer is 0.01 to 0.5 μm, the thickness of the gold vapor deposition layer is 0.1 to 1 μm, and the bonding temperature is 240 to 300 ° C. The LED chip is firmly bonded and is difficult to peel off. In this case, sufficient bonding strength is exhibited even after heating, and heat resistance is sufficient. Further, the glossiness is 80 to 110%, and the gloss is sufficient as a lead frame for an LED chip.

以上、本発明の実施形態について説明したが、本発明はこの記載に限定されることはなく、その発明の技術的思想を逸脱しない範囲で適宜変更可能である。
例えば、前記実施形態では、銅合金部材をリードフレームの形状に打ち抜き加工した後にめっき処理、リフロー処理を施してリードフレームとしたが、最初に銅合金部材にめっき処理、リフロー処理した後に、リードフレームの形状に打ち抜き加工してもよい。 Although the embodiment of the present invention has been described above, the present invention is not limited to this description and can be appropriately changed without departing from the technical idea of the present invention.
For example, in the above-described embodiment, the copper alloy member is punched into the shape of the lead frame and then plated and reflowed to obtain a lead frame. However, after the copper alloy member is first plated and reflowed, the lead frame is It may be punched into a shape.

１ ＬＥＤチップ
５，６ 電極
７，８ リードフレーム
９ 金層
１１ 銅合金部材
１２ ニッケルめっき層
１３ 銅錫合金層
１４ 錫めっき層
１５ 金銀錫合金層
１６ Ａｇ３Ｓｎ合金層
１７ 酸化錫皮膜
２１ リードフレーム DESCRIPTION OF SYMBOLS 1 LED chip 5, 6 Electrode 7, 8 Lead frame 9 Gold layer 11 Copper alloy member 12 Nickel plating layer 13 Copper tin alloy layer 14 Tin plating layer 15 Gold silver tin alloy layer 16 Ag 3 Sn alloy layer 17 Tin oxide film 21 Lead frame

Claims (5)

ＬＥＤチップと銅合金リードフレームとの接合方法において、前記ＬＥＤチップの前記銅合金リードフレームと接合される部位に金を０．１〜１μｍの厚みにて蒸着するとともに、前記銅合金リードフレームの表面に、最表面側が錫めっき層である複数のめっき層あるいは合金層を形成し、前記錫めっき層の表面に、厚さが０．０１〜０．５μｍで、光沢度が８０〜１１０％であるＡｇ３Ｓｎ合金層を形成し、前記銅合金リードフレームのＡｇ３Ｓｎ合金層部位に前記ＬＥＤチップの金が蒸着された部位を重ね合わせ、その重ね合わせ状態で２４０〜３００℃の温度に加熱することにより、前記リードフレームのＡｇ３Ｓｎ合金層部位と、前記ＬＥＤチップの金が蒸着された部位との間に、金銀錫合金層を形成して前記ＬＥＤチップを前記リードフレームに接合することを特徴とするＬＥＤチップとリードフレームとの接合方法。 In the method for joining an LED chip and a copper alloy lead frame, gold is deposited in a thickness of 0.1 to 1 μm on a portion of the LED chip to be joined to the copper alloy lead frame, and the surface of the copper alloy lead frame In addition, a plurality of plating layers or alloy layers whose outermost surface side is a tin plating layer are formed, and the thickness of the tin plating layer is 0.01 to 0.5 μm and the glossiness is 80 to 110%. An Ag 3 Sn alloy layer is formed, the portion of the copper alloy lead frame where the gold of the LED chip is deposited is superposed on the Ag 3 Sn alloy layer portion of the copper alloy lead frame, and heated to a temperature of 240 to 300 ° C. in the superposed state. Accordingly, a gold-silver-tin alloy layer is formed between the Ag 3 Sn alloy layer portion of the lead frame and the portion of the LED chip where gold is deposited, and the LED chip is A method for bonding an LED chip and a lead frame, wherein the LED chip is bonded to a lead frame. 前記銅合金リードフレームのＡｇ３Ｓｎ合金層部位に前記ＬＥＤチップの金が蒸着された部位を重ね合わせる前に、前記Ａｇ３Ｓｎ合金層の表面に厚み５〜２０ｎｍの透明な酸化錫皮膜を形成しておくことを特徴とする請求項１記載のＬＥＤチップとリードフレームとの接合方法。 A transparent tin oxide film having a thickness of 5 to 20 nm is formed on the surface of the Ag 3 Sn alloy layer before superimposing the gold-deposited portion of the LED chip on the Ag 3 Sn alloy layer portion of the copper alloy lead frame. 2. The method of bonding an LED chip and a lead frame according to claim 1, wherein 前記複数のめっき層あるいは合金層が、前記銅合金部材の表面から順に銅錫合金層、前記錫めっき層であることを特徴とする請求項１又は２記載のＬＥＤチップとリードフレームとの接合方法。 3. The method of bonding an LED chip and a lead frame according to claim 1, wherein the plurality of plating layers or alloy layers are a copper tin alloy layer and the tin plating layer in order from the surface of the copper alloy member. . 前記複数のめっき層あるいは合金層が、前記銅合金部材の表面から順に、ニッケルめっき層、銅錫合金層、前記錫めっき層であることを特徴とする請求項１又は２記載のＬＥＤチップとリードフレームとの接合方法。   3. The LED chip and the lead according to claim 1, wherein the plurality of plating layers or alloy layers are a nickel plating layer, a copper tin alloy layer, and the tin plating layer in order from the surface of the copper alloy member. Joining method with frame. 前記銅合金部材は、Ｆｅ；１．５〜２．４質量％、Ｐ；０．００８〜０．０８質量％およびＺｎ；０．０１〜０．５質量％を含み、透過型電子顕微鏡観察において、１μｍ２あたりの析出物粒子の面積に等しい円相当直径のヒストグラムにおけるピーク値が直径１５〜３５ｎｍの範囲内でありかつ当該範囲内の直径の析出物粒子が総度数の５０％以上の頻度で存在し、その半値幅が２５ｎｍ以下であることを特徴とする請求項１〜４のいずれか一項に記載のＬＥＤチップとリードフレームとの接合方法。 The copper alloy member contains Fe; 1.5 to 2.4 mass%, P; 0.008 to 0.08 mass%, and Zn; 0.01 to 0.5 mass%. The peak value in the histogram of equivalent circle diameter equal to the area of the precipitate particles per 1 μm 2 is in the range of 15 to 35 nm in diameter, and the precipitate particles having the diameter in the range have a frequency of 50% or more of the total frequency. The method for bonding an LED chip and a lead frame according to any one of claims 1 to 4, wherein the method has a half width of 25 nm or less.
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