JP2011108943A - Semiconductor device, substrate for semiconductor device and method for manufacturing them - Google Patents

Semiconductor device, substrate for semiconductor device and method for manufacturing them Download PDF

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JP2011108943A
JP2011108943A JP2009264180A JP2009264180A JP2011108943A JP 2011108943 A JP2011108943 A JP 2011108943A JP 2009264180 A JP2009264180 A JP 2009264180A JP 2009264180 A JP2009264180 A JP 2009264180A JP 2011108943 A JP2011108943 A JP 2011108943A
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semiconductor device
metal
resist layer
substrate
plating
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JP2011108943A5 (en
JP5636184B2 (en
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Hiroshi Nakagawa
宏史 中川
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Kyushu Hitachi Maxell Ltd
Maxell Holdings Ltd
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Hitachi Maxell Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device where the plating of high gloss can securely be formed only in a necessary part while manufacturing is made efficient by using a resist layer of a material which does not dissolve in a fluid plating liquid by which the plating of high gloss can be obtained and finally making the resist layer as a part of a device exterior without removing the layer after plating, and to provide manufacturing methods of the semiconductor device and a substrate for the semiconductor device. <P>SOLUTION: Since the resist layer 12 formed in a non-arranging part of a metal part 11 prior to the formation of the metal part 11 in the semiconductor device 1 where the metal part 11 is exposed at a bottom has resistance to the plating liquid used in plating of a surface metal layer 13 to a surface of the metal part 11, plating on a part except for a necessary part is securely prevented without deteriorating the resist layer 12 against the plating liquid, the surface metal layer 13 of the high gloss can appropriately be formed only in the necessary part such as the surface of the meal part 11, and the surface metal layer 13 can be used as a reflection part of light. Thus, an application range as the semiconductor device can be expanded. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、底部に電極等の金属部が露出する状態でパッケージングされた半導体装置、及びその製造に用いる半導体装置用基板に関する。   The present invention relates to a semiconductor device packaged with a metal portion such as an electrode exposed at the bottom, and a substrate for a semiconductor device used for manufacturing the semiconductor device.

半導体素子支持用の基板上に半導体素子を搭載し、半導体素子と外部導出用の金属端子とを配線接続した上で、樹脂等の保護材で半導体素子を含む基板全体を被覆した一般的な構造の半導体装置に対し、半導体素子搭載部分や電極部分となる金属部(リード)を形成し、この金属部上に半導体素子を搭載し配線等の処理後、半導体素子や配線等のある金属部の表面側を樹脂等の封止材で封止し、金属部が底部に一部露出した構成とされる半導体装置は、その高さを低くして省スペース化が図れる他、露出した金属部を通じて半導体素子で生じた熱を外部に放出でき、放熱の面で優れるといった特長を有しており、チップサイズなど超小型の半導体装置の分野で注目を集めている。   A general structure in which a semiconductor element is mounted on a substrate for supporting a semiconductor element, and the semiconductor element and a metal terminal for lead-out are connected by wiring, and the entire substrate including the semiconductor element is covered with a protective material such as resin. In the semiconductor device, a metal part (lead) to be a semiconductor element mounting part or an electrode part is formed, a semiconductor element is mounted on the metal part, and after processing of the wiring or the like, the metal part having the semiconductor element or wiring or the like A semiconductor device whose surface side is sealed with a sealing material such as a resin and the metal part is partially exposed at the bottom can be made space-saving by reducing its height, and through the exposed metal part The heat generated in the semiconductor element can be released to the outside and the heat dissipation is excellent, and it is attracting attention in the field of ultra-small semiconductor devices such as chip size.

こうした半導体装置は、主に、導電性を有する母型基板上に半導体素子搭載部分や電極部分となる金属部を電鋳により半導体装置の所望個数分まとめて形成し、半導体素子が搭載され配線等の処理を経た金属部の表面側を封止材で封止した後、母型基板のみを除去し、一体にまとまった状態の多数の半導体装置を個別に切り分ける、といった製造過程を経て製造されており、このような半導体装置の製造方法の一例としては、特開2002−9196号公報や特開2004−214265号公報に開示されるものがある。   In such a semiconductor device, a metal part to be a semiconductor element mounting part or an electrode part is mainly formed on a conductive mother substrate by electroforming by a desired number of semiconductor devices, and the semiconductor element is mounted on the wiring. After sealing the surface side of the metal part that has undergone the above processing with a sealing material, it is manufactured through a manufacturing process such as removing only the base substrate and individually cutting a number of integrated semiconductor devices. As an example of a method for manufacturing such a semiconductor device, there are those disclosed in Japanese Patent Application Laid-Open Nos. 2002-9196 and 2004-214265.

特開2002−9196号公報JP 2002-9196 A 特開2004−214265号公報JP 2004-214265 A

従来の半導体装置の製造方法は前記特許文献に示される構成となっており、母型基板上への金属部の電鋳による形成にあたり、母型基板における金属部の非配置部分にレジスト層をあらかじめ形成して、金属部が適切な位置に形成されるようにしていた。この金属部には、電鋳に適したニッケル等の金属が使用されており、導電性や配線用ワイヤの接合性を高めるために、金属部表面には一般に銀メッキが施されていた。このメッキに対しても、レジスト層が必要箇所以外へのメッキの付着を防ぐ役割を果していた。そして、このレジスト層を溶剤等で溶解除去した上で、母型基板とその表面に形成された金属部を、半導体装置用基板として、さらに半導体装置の製造工程に進ませ、半導体素子の取付や配線、封止材による封止等を行うようにしていた。   A conventional method for manufacturing a semiconductor device has a structure shown in the above-mentioned patent document. In forming a metal part on a mother board by electroforming, a resist layer is previously formed on a non-arranged part of the metal part on the mother board. The metal part was formed at an appropriate position. A metal such as nickel suitable for electroforming is used for the metal part, and silver plating is generally applied to the surface of the metal part in order to improve the conductivity and the bonding property of the wire for wiring. Also for this plating, the resist layer played a role of preventing the adhesion of the plating to portions other than the necessary portions. Then, after dissolving and removing the resist layer with a solvent or the like, the base substrate and the metal portion formed on the surface of the resist substrate are used as a semiconductor device substrate, and the semiconductor device manufacturing process is further performed. Sealing with wiring and a sealing material was performed.

金属部表面の銀メッキについては、従来は、メッキ表面は低光沢となるものの、レジスト層を溶解させにくく、メッキの際の電流密度を高められ処理時間を短縮でき、且つ廃水処理等が容易になるといった特長のある低シアン含有で弱アルカリ性のメッキ液が使用されていた。これに対し、近年、透光性の封止材を介在させて外部に光を放射するLED等への装置構造適用の目的から、金属部表面のメッキ部分が放射光の反射部の役割も期待されるようになり、メッキとして光の反射率の優れた高光沢のものが求められる場合も増えている。   Conventionally, silver plating on the metal surface has a low gloss, but the resist layer is difficult to dissolve, the current density during plating can be increased, the processing time can be shortened, and wastewater treatment can be easily performed. A low-cyanide and weakly alkaline plating solution having such a characteristic was used. On the other hand, in recent years, for the purpose of applying the device structure to an LED or the like that emits light to the outside through a light-transmitting sealing material, the plated part on the surface of the metal part is also expected to function as a reflection part of the emitted light. As a result, there is an increasing number of cases where a high-gloss plating having excellent light reflectivity is required as the plating.

銀メッキの場合、メッキの光沢の度合を高めるには、メッキ液にヒ素や、セレン、テルル、タリウム等の成分を含んだ光沢剤を添加することが知られているが、こうした光沢剤の効果はメッキ液が高シアン且つ強アルカリの液性でないと十分に発揮されないという問題がある。しかしながら、光沢剤の効果を発揮させて高光沢のメッキを得るために、メッキ液を単純に高シアン強アルカリのものとすると、メッキの際の電流密度を高めることができず、処理時間が長くかかる分、レジスト層もより長くメッキ液に接触することとなり、従来用いられていたレジスト層では強アルカリに対する耐性が不足し、メッキ液との接触で溶解するなどレジスト層としての機能を果すことができなくなるという課題を有していた。   In the case of silver plating, it is known to add a brightening agent containing components such as arsenic, selenium, tellurium and thallium to the plating solution in order to increase the degree of luster of the plating. Has a problem that the plating solution is not sufficiently exhibited unless it is a liquid of high cyan and strong alkali. However, if the plating solution is simply made of a high-cyan strong alkali in order to obtain the effect of the brightener and obtain a high-gloss plating, the current density during plating cannot be increased and the processing time is long. As a result, the resist layer also comes into contact with the plating solution for a longer time, and the resist layer that has been used in the past has insufficient resistance to strong alkali and can function as a resist layer, such as being dissolved by contact with the plating solution. It had the problem of being unable to do so.

一方、従来のレジスト層は、物理的強度の高い封止材で金属部を覆って保護する必要性から、半導体装置用基板の段階で溶解除去されていたが、こうしたレジスト除去処理では弱アルカリに溶解する性質を備えつつ、金属部への高光沢のメッキを形成する段階では強アルカリのメッキ液に対する耐性を有するような材質は存在し得ず、高光沢のメッキを実行可能な状況を作り出すことができないという課題を有していた。   On the other hand, the conventional resist layer was dissolved and removed at the stage of the substrate for a semiconductor device because it was necessary to cover and protect the metal part with a sealing material having high physical strength. While creating a high-gloss plating on metal parts, there should be no material that can withstand strong alkaline plating solutions, creating a situation where high-gloss plating can be performed. Had the problem of not being able to.

本発明は前記課題を解消するためになされたもので、高光沢のメッキを得られる液性のメッキ液では溶解しない材質のレジスト層を用いると共に、メッキ後もレジスト層を除去せず最終的に装置外装の一部として、製造を効率化しつつ必要な箇所のみに確実に高光沢のメッキを形成できる半導体装置及び半導体装置用基板の各製造方法、並びに、これらの製造方法で得られる半導体装置及び半導体装置用基板を提供することを目的とする。   The present invention has been made to solve the above-mentioned problems, and uses a resist layer made of a material that does not dissolve in a liquid plating solution capable of obtaining high gloss plating, and finally does not remove the resist layer after plating. Semiconductor device and semiconductor device substrate manufacturing method capable of reliably forming high-gloss plating only at necessary locations while making manufacturing efficient as part of the device exterior, and semiconductor devices obtained by these manufacturing methods and An object is to provide a substrate for a semiconductor device.

本発明に係る半導体装置は、半導体素子搭載部又は電極部となる金属部を有し、当該金属部表面にメッキにより表面金属層を形成され、金属部表面側への半導体素子搭載及び配線、封止材による封止がなされ、装置底部に前記金属部の裏面側が露出した状態とされる半導体装置において、前記金属部の非配置部分に対応させて形成されるレジスト層を備え、前記表面金属層が、表面の光沢度がGAM光沢度で1.0以上となる光沢メッキとして形成され、前記レジスト層が、前記表面金属層のメッキで使用するメッキ液に対する耐溶解性を備えた絶縁性材で形成されてなり、前記封止材による封止に伴って封止材と密着一体化し、装置外装の一部となるものである。   The semiconductor device according to the present invention has a metal part to be a semiconductor element mounting part or an electrode part, a surface metal layer is formed on the surface of the metal part by plating, and mounting of semiconductor elements on the metal part surface side, wiring, sealing. In a semiconductor device that is sealed with a stopper and the back side of the metal part is exposed at the bottom of the device, the semiconductor device includes a resist layer formed corresponding to a non-arranged part of the metal part, and the surface metal layer However, the surface glossiness is formed as a glossy plating having a GAM glossiness of 1.0 or more, and the resist layer is an insulating material having resistance to dissolution with respect to a plating solution used for plating the surface metal layer. It is formed, and is tightly integrated with the sealing material along with the sealing with the sealing material, and becomes a part of the apparatus exterior.

このように本発明によれば、底部に金属部が露出した状態とされる半導体装置の、金属部の形成に先立って金属部の非配置部分に形成されるレジスト層が、金属部表面への表面金属層のメッキで用いるメッキ液に対する耐性を有することにより、メッキ液に対しレジスト層が変質することなく必要部分以外へのメッキを確実に防ぎつつ、金属部表面等必要箇所のみに適切に表面金属層としての高光沢のメッキを施せ、表面金属層を光の反射部として利用可能となるなど、半導体装置としての応用範囲を広げられる。また、レジスト層が除去されず残されることで、このレジスト層の分だけ廃棄物を減らせると共に、残されたレジスト層が封止材の一部と置き換わる形で装置外装をなすことで、封止材の使用量を低減できる。さらに、レジスト層の除去処理を考慮せずに済み、レジスト層として備えるべき必要箇所以外への液剤付着等を防ぐ性質に加えて、メッキ液への耐性を有するものであれば、除去処理に適さない材質でも使用でき、レジスト層をなす材質の選択の自由度を広げられ、コストダウンに繋げられる。   As described above, according to the present invention, the resist layer formed on the non-arranged portion of the metal portion prior to the formation of the metal portion of the semiconductor device in which the metal portion is exposed at the bottom is formed on the surface of the metal portion. By having resistance to the plating solution used for plating the surface metal layer, the resist layer does not change in quality against the plating solution. The application range as a semiconductor device can be widened by applying high-gloss plating as a metal layer and using the surface metal layer as a light reflecting portion. In addition, since the resist layer is left without being removed, waste can be reduced by the amount of the resist layer, and the remaining resist layer can be replaced with a part of the sealing material to form an exterior of the apparatus. The amount of stop material used can be reduced. Furthermore, it is not necessary to consider the removal process of the resist layer, and it is suitable for the removal process as long as it has resistance to the plating solution in addition to the property of preventing the adhesion of the liquid agent to other than the necessary portions to be provided as the resist layer. It is possible to use any material that does not exist, which increases the degree of freedom in selecting the material that forms the resist layer, leading to cost reduction.

また、本発明に係る半導体装置は必要に応じて、前記金属部が、前記レジスト層より厚く、且つ上端周縁に張出し部を有する形状として形成され、前記張出し部が、封止材による封止に伴ってレジスト層と封止材で挟まれて固定されるものである。   In addition, in the semiconductor device according to the present invention, the metal part is formed in a shape having a thicker part than the resist layer and having a protruding part at the upper edge, as necessary, and the protruding part is sealed with a sealing material. Along with this, the resist layer and the sealing material are sandwiched and fixed.

このように本発明によれば、レジスト層より厚くした金属部の上端周縁にレジスト層側へ張出す張出し部を形成し、レジスト層と封止材との間に張出し部が挟まれて固定され、レジスト層と封止材からなる装置外装が金属部と強固に一体化することにより、金属部裏面側に装置外装から引離そうとする外力が加わっても、レジスト層と封止材との間に挟まれた張出し部が大きな抵抗力を発揮して金属部の移動や脱落を防ぐこととなり、金属部のずれ等をなくして歩留りを向上させられると共に、半導体装置としての強度を高められ、使用時の耐久性や装置動作の信頼性も高められる。   As described above, according to the present invention, the overhanging portion that protrudes toward the resist layer is formed at the upper edge of the metal portion thicker than the resist layer, and the overhanging portion is sandwiched and fixed between the resist layer and the sealing material. Even if an external force is applied to the back surface side of the metal portion to separate the device exterior from the device exterior, the resist layer and the sealant are made of a resist layer and a sealant. The overhanging part sandwiched between them will exert a great resistance to prevent the movement and dropout of the metal part, and the yield as well as the deviation of the metal part can be improved, and the strength as a semiconductor device can be increased, Durability during use and reliability of device operation are also improved.

また、本発明に係る半導体装置は必要に応じて、前記金属部が、前記レジスト層以下の厚さとして形成され、前記表面金属層が、前記レジスト層表面を超える厚さを有し、且つ上端周縁に張出し部を有する形状として形成され、前記張出し部が、封止材による封止に伴ってレジスト層と封止材で挟まれて固定されるものである。   In addition, in the semiconductor device according to the present invention, the metal part is formed as a thickness equal to or less than the resist layer as necessary, the surface metal layer has a thickness exceeding the resist layer surface, and an upper end. It is formed as a shape having an overhanging portion on the periphery, and the overhanging portion is sandwiched and fixed between the resist layer and the sealing material along with sealing with the sealing material.

このように本発明によれば、レジスト層を超えて形成された表面金属層の上端周縁にレジスト層側へ張出す張出し部を形成し、レジスト層と封止材との間に張出し部が挟まれて固定され、レジスト層と封止材からなる装置外装が表面金属層及び金属部と強固に一体化することにより、金属部裏面側に装置外装から引離そうとする外力が加わっても、レジスト層と封止材との間に挟まれた張出し部が大きな抵抗力を発揮して金属部の移動や脱落を防ぐこととなり、金属部のずれ等をなくして歩留りを向上させられると共に、半導体装置としての強度を高められ、使用時の耐久性や装置動作の信頼性も高められる。   As described above, according to the present invention, the overhanging portion that protrudes toward the resist layer side is formed at the upper edge of the surface metal layer formed beyond the resist layer, and the overhanging portion is sandwiched between the resist layer and the sealing material. Even if an external force is applied to the metal part back side from the apparatus exterior, the apparatus exterior composed of the resist layer and the sealing material is firmly integrated with the surface metal layer and the metal part. The overhanging part sandwiched between the resist layer and the sealing material exerts a great resistance to prevent the metal part from moving or falling off, eliminating the deviation of the metal part and improving the yield, and the semiconductor The strength of the device can be increased, and the durability during use and the reliability of device operation can also be improved.

また、本発明に係る半導体装置用基板は、装置底部に半導体素子搭載部又は電極部となる金属部が露出する半導体装置の製造に用いられ、導電性を有する母型基板上に前記金属部及び当該金属部の非配置部分に対応するレジスト層がそれぞれ形成され、前記金属部表面にメッキにより表面金属層を形成されてなる半導体装置用基板において、前記表面金属層が、表面の光沢度がGAM光沢度で1.0以上となる光沢メッキとして形成され、前記レジスト層が、前記表面金属層のメッキで使用するメッキ液に対する耐溶解性を備えた絶縁性材で形成されてなるものである。   The substrate for a semiconductor device according to the present invention is used for manufacturing a semiconductor device in which a metal portion serving as a semiconductor element mounting portion or an electrode portion is exposed at the bottom of the device. In a semiconductor device substrate in which a resist layer corresponding to a non-arranged portion of the metal portion is formed and a surface metal layer is formed on the surface of the metal portion by plating, the surface metal layer has a surface glossiness of GAM. It is formed as a glossy plating having a glossiness of 1.0 or more, and the resist layer is formed of an insulating material having resistance to dissolution with respect to a plating solution used for plating of the surface metal layer.

このように本発明によれば、半導体装置用基板における母型基板上の金属部非配置部分に形成されるレジスト層が、金属部表面への表面金属層のメッキで用いるメッキ液に対する耐性を有して、必要箇所のみへの高光沢のメッキを実現させつつ、メッキ後も除去されず残され、母型基板上の金属部間にレジスト層を配置したまま半導体装置用基板が提供されることにより、金属部間に常にレジスト層が存在して金属部と接触し、母型基板だけでなくレジスト層でも金属部を保持して形成後の金属部のずれを防ぎ、製造される半導体装置の歩留り向上が図れる。また、レジスト層の除去処理を考慮せずに済み、レジスト層として備えるべき必要箇所以外への液剤付着等を防ぐ性質に加えて、メッキ液への耐性を有するものであれば、除去処理に適さない材質でも使用でき、レジスト層をなす材質の選択の自由度が広がる。さらに、半導体装置の製造時には封止材の封止を経てレジスト層が封止材と密着一体化し、装置外装の一部をなすこととなり、封止材を金属部の裏面側以外の全てに密着させる手間を省けると共に、封止材の使用量を低減できる。   As described above, according to the present invention, the resist layer formed on the metal part non-arranged portion on the mother board in the semiconductor device substrate has resistance to the plating solution used for plating the surface metal layer on the metal part surface. In addition, while realizing high-gloss plating only on necessary portions, the substrate for a semiconductor device is provided without being removed after plating and with the resist layer being placed between the metal parts on the mother substrate. Thus, there is always a resist layer between the metal parts, and the metal parts are in contact with each other, and the metal parts are held not only in the matrix substrate but also in the resist layer to prevent the metal parts from being displaced, and the manufactured semiconductor device Yield can be improved. Moreover, it is not necessary to consider the removal process of the resist layer, and in addition to the property of preventing the liquid agent from adhering to other than the necessary portions to be provided as the resist layer, it is suitable for the removal process as long as it has resistance to the plating solution. Any material that can be used can be used, which increases the degree of freedom in selecting the material that forms the resist layer. In addition, when manufacturing the semiconductor device, the resist layer is tightly integrated with the sealing material through sealing with the sealing material to form a part of the exterior of the device, and the sealing material is in close contact with all but the back side of the metal part. This saves time and effort and reduces the amount of sealing material used.

また、本発明に係る半導体装置用基板の製造方法は、導電性を有する母型基板上に、金属部の非配置部分に対応するレジスト層を形成した後、電鋳で前記金属部を形成し、さらに当該金属部表面にメッキにより表面金属層を形成して、金属部表面側への半導体素子搭載及び配線が可能な半導体装置用基板を得る半導体装置用基板の製造方法において、前記表面金属層を、表面の光沢度がGAM光沢度で1.0以上となる光沢メッキで形成すると共に、前記レジスト層を、前記表面金属層のメッキで使用するメッキ液に対する耐溶解性を備えた絶縁性材であらかじめ形成し、前記金属部及び表面金属層の形成後も除去せずに残すものである。   In the method for manufacturing a substrate for a semiconductor device according to the present invention, a resist layer corresponding to a non-arranged portion of the metal portion is formed on the conductive mother substrate, and then the metal portion is formed by electroforming. Furthermore, in the method of manufacturing a semiconductor device substrate, a surface metal layer is formed by plating on the surface of the metal portion to obtain a semiconductor device substrate capable of mounting and wiring a semiconductor element on the metal portion surface side. Is formed by gloss plating with a surface glossiness of 1.0 or more in terms of GAM gloss, and the resist layer is an insulating material having resistance to dissolution with respect to a plating solution used for plating the surface metal layer And is left without being removed after the formation of the metal part and the surface metal layer.

このように本発明によれば、半導体装置用基板をなす母型基板上の金属部非配置部分に、金属部表面への表面金属層のメッキで用いるメッキ液に対する耐性を有するレジスト層を形成し、必要箇所のみへの高光沢のメッキを実現させつつ、メッキ後もレジスト層を残し、母型基板上の金属部間にレジスト層を配置したままとすることにより、金属部間に常にレジスト層が存在して金属部と接触し、母型基板だけでなくレジスト層でも金属部を保持して形成後の金属部のずれを防ぎ、製造される半導体装置の歩留り向上が図れる。また、レジスト層の除去処理を考慮せずに済み、レジスト層として備えるべき必要箇所以外への液剤付着等を防ぐ性質に加えて、メッキ液への耐性を有するものであれば、除去処理に適さない材質でも使用でき、レジスト層をなす材質の選択の自由度が広がる。さらに、半導体装置の製造時には封止材の封止を経てレジスト層が封止材と密着一体化し、装置外装の一部をなすこととなり、封止材を金属部の裏面側以外の全てに密着させる手間を省けると共に、封止材の使用量を低減できる。   As described above, according to the present invention, a resist layer having resistance to the plating solution used for plating the surface metal layer on the surface of the metal part is formed on the metal part non-arranged part on the base substrate constituting the semiconductor device substrate. By realizing high-gloss plating only on the necessary parts, leaving the resist layer after plating and leaving the resist layer between the metal parts on the matrix substrate, the resist layer is always between the metal parts The metal part is in contact with the metal part, and the metal part is held not only by the matrix substrate but also by the resist layer to prevent the metal part from being displaced after the formation, thereby improving the yield of the manufactured semiconductor device. Moreover, it is not necessary to consider the removal process of the resist layer, and in addition to the property of preventing the liquid agent from adhering to other than the necessary portions that should be provided as the resist layer, it is suitable for the removal process if it has resistance to the plating solution Any material that can be used can be used, which increases the degree of freedom in selecting the material that forms the resist layer. In addition, when manufacturing the semiconductor device, the resist layer is tightly integrated with the sealing material through sealing with the sealing material to form a part of the exterior of the device, and the sealing material is in close contact with all but the back side of the metal part. This saves time and effort and reduces the amount of sealing material used.

また、本発明に係る半導体装置用基板の製造方法は必要に応じて、前記金属部を、前記レジスト層より厚く、且つ上端周縁に張出し部を有する形状として形成するものである。   Also, in the method for manufacturing a substrate for a semiconductor device according to the present invention, the metal portion is formed in a shape having a thicker portion than the resist layer and having an overhanging portion at the upper edge.

このように本発明によれば、金属部におけるレジスト層を超える上端部の周縁にレジスト層側へ張出す張出し部を形成して、金属部とレジスト層との接触面積を増やすことにより、半導体装置用基板におけるレジスト層による金属部の保持性能が向上し、レジスト層で金属部を確実にずれなく保持できる。また、半導体装置の製造時には封止材の封止を経てレジスト層が封止材と密着一体化するのに伴い、レジスト層と封止材との間に張出し部が挟まれて固定され、レジスト層と封止材からなる装置外装が金属部と一体化することにより、封止後の半導体装置で金属部裏面側に装置外装から引離そうとする外力が加わっても、レジスト層と封止材との間に挟まれた張出し部が大きな抵抗力を発揮して金属部の移動や脱落を防ぐこととなり、金属部のずれ等をなくして半導体装置の歩留りを向上させられると共に、半導体装置としての強度を高められ、使用時の耐久性や装置動作の信頼性も高められる。   As described above, according to the present invention, the overhanging portion that protrudes toward the resist layer is formed on the periphery of the upper end portion of the metal portion that exceeds the resist layer, and the contact area between the metal portion and the resist layer is increased, thereby providing a semiconductor device. The holding performance of the metal part by the resist layer in the substrate for use is improved, and the metal part can be reliably held without deviation by the resist layer. In addition, when the semiconductor device is manufactured, the overhanging portion is sandwiched and fixed between the resist layer and the sealing material as the resist layer is tightly integrated with the sealing material after sealing with the sealing material. The device exterior consisting of the layer and the sealing material is integrated with the metal part, so that the resist layer and the seal are sealed even if an external force is applied to the back side of the metal part in the semiconductor device after sealing. The overhanging part sandwiched between the materials will exert a great resistance to prevent the metal part from moving or falling off, and the yield of the semiconductor device can be improved by eliminating the deviation of the metal part, etc. The strength of the machine can be increased, and the durability during use and the reliability of device operation can also be improved.

また、本発明に係る半導体装置用基板の製造方法は必要に応じて、前記金属部を、前記レジスト層以下の厚さとして形成すると共に、前記表面金属層を、前記レジスト層表面を超える厚さを有し、且つ上端周縁に張出し部を有する形状として形成するものである。   Further, in the method for manufacturing a substrate for a semiconductor device according to the present invention, the metal part is formed as a thickness equal to or smaller than the resist layer as necessary, and the surface metal layer has a thickness exceeding the resist layer surface. And a shape having an overhanging portion on the periphery of the upper end.

このように本発明によれば、レジスト層を超える表面金属層上端部の周縁にレジスト層側へ張出す張出し部を形成して、金属部及び表面金属層とレジスト層との接触面積を増やすことにより、半導体装置用基板におけるレジスト層による金属部の保持性能が向上し、レジスト層で金属部を確実にずれなく保持できる。また、半導体装置の製造時には封止材の封止を経てレジスト層が封止材と密着一体化するのに伴い、レジスト層と封止材との間に張出し部が挟まれて固定され、レジスト層と封止材からなる装置外装が表面金属層及び金属部と一体化することにより、封止後の半導体装置で金属部裏面側に装置外装から引離そうとする外力が加わっても、レジスト層と封止材との間に挟まれた張出し部が大きな抵抗力を発揮して金属部の移動や脱落を防ぐこととなり、金属部のずれ等をなくして半導体装置の歩留りを向上させられると共に、半導体装置としての強度を高められ、使用時の耐久性や装置動作の信頼性も高められる。   As described above, according to the present invention, the overhanging portion that protrudes toward the resist layer side is formed at the periphery of the upper end portion of the surface metal layer that exceeds the resist layer, thereby increasing the contact area between the metal portion and the surface metal layer and the resist layer. As a result, the holding performance of the metal part by the resist layer in the semiconductor device substrate is improved, and the metal part can be securely held without deviation by the resist layer. In addition, when the semiconductor device is manufactured, the overhanging portion is sandwiched and fixed between the resist layer and the sealing material as the resist layer is tightly integrated with the sealing material after sealing with the sealing material. Even if an external force is applied to the back side of the metal part on the back side of the metal part in the semiconductor device after sealing, the device exterior composed of the layer and the sealing material is integrated with the surface metal layer and the metal part. The overhanging part sandwiched between the layer and the sealing material exerts a great resistance to prevent the metal part from moving or falling off, thereby eliminating the deviation of the metal part and improving the yield of the semiconductor device. The strength of the semiconductor device can be increased, and the durability during use and the reliability of device operation can also be improved.

また、本発明に係る半導体装置用基板の製造方法は必要に応じて、前記表面金属層を、高シアン強アルカリのメッキ液を使用したメッキで形成し、前記レジスト層を、強アルカリに対する耐溶解性を備えた材質で形成するものである。   Further, in the method for manufacturing a substrate for a semiconductor device according to the present invention, if necessary, the surface metal layer is formed by plating using a high cyan strong alkali plating solution, and the resist layer is resistant to dissolution against strong alkali. It is formed of a material having properties.

このように本発明によれば、レジスト層を強アルカリで溶解しない材質で形成した上で、表面金属層を高シアン含有のメッキ液によるメッキで形成し、メッキ工程でレジスト層の劣化を防いでレジスト層によるメッキ制限機能を確実に発揮させることにより、金属部の必要な部分のみに適切に高光沢のメッキを施すことができ、表面金属層を光の反射部として使用可能とするなど、基板から半導体装置を得た場合の用途を大きく広げられると共に、レジスト層がメッキ液に冒されることがなく、レジスト層を確実にそのまま残すことができ、半導体装置用基板におけるレジスト層による金属部の保持状態を維持でき、また、装置製造における封止工程での封止材との密着一体化を経て、適切に装置外装の一部として用いることができる。   As described above, according to the present invention, the resist layer is formed of a material that does not dissolve in strong alkali, and the surface metal layer is formed by plating with a plating solution containing high cyan, thereby preventing the resist layer from being deteriorated in the plating process. By reliably demonstrating the plating limiting function of the resist layer, it is possible to appropriately apply high gloss plating only to the necessary part of the metal part, and the surface metal layer can be used as a light reflecting part, etc. As a result, the resist layer is not affected by the plating solution, and the resist layer can be reliably left as it is. The holding state can be maintained, and it can be appropriately used as a part of the exterior of the apparatus through close integration with the sealing material in the sealing process in manufacturing the apparatus.

また、本発明に係る半導体装置の製造方法は、半導体装置用基板に対し、金属部上への半導体素子搭載及び配線、封止材による封止を行い、前記レジスト層を、封止材による封止を経て封止材と密着一体化させた後で、前記金属部の裏面側を覆う母型基板を除去して、装置底部に前記金属部の裏面側が露出した状態を得るものである。   The semiconductor device manufacturing method according to the present invention includes mounting a semiconductor element on a metal part, wiring, and sealing with a sealing material on a semiconductor device substrate, and sealing the resist layer with a sealing material. After the sealing material is tightly integrated with the sealing material, the matrix substrate covering the back surface side of the metal part is removed to obtain a state in which the back surface side of the metal part is exposed at the bottom of the apparatus.

このように本発明によれば、半導体装置用基板における金属部非配置部分に形成したレジスト層を、表面金属層のメッキ後も残し、金属部間にレジスト層を配置したまま封止材で封止して半導体装置を得ることにより、除去されず残されたレジスト層の分だけ廃棄物を減らせると共に、残されたレジスト層が封止材の一部と置き換わる形で装置外装をなすことで、封止材の使用量を低減できる。さらに、レジスト層と金属部との一体化した状態を最後まで維持することにより、母型基板を除去する際に金属部裏面側に装置外装から引離そうとする外力が加わったとしても、封止材と共にレジスト層が金属部の移動を防止し、金属部のずれに伴う半導体装置の歩留り低下を抑えられる。   As described above, according to the present invention, the resist layer formed on the metal part non-arranged portion of the substrate for a semiconductor device is left after the plating of the surface metal layer, and the resist layer is placed between the metal parts and sealed with the sealing material. By stopping and obtaining a semiconductor device, waste can be reduced by the amount of the resist layer left without being removed, and the device exterior can be replaced by replacing the remaining resist layer with a part of the sealing material. The amount of sealing material used can be reduced. Furthermore, by maintaining the integrated state of the resist layer and the metal part to the end, even if an external force is applied to the back side of the metal part when it is removed from the exterior of the metal part when the mother board is removed, sealing is performed. The resist layer together with the stopper prevents the movement of the metal portion, and the yield reduction of the semiconductor device due to the displacement of the metal portion can be suppressed.

また、本発明に係る半導体装置の製造方法は必要に応じて、前記母型基板を銅又は銅合金製とし、封止材による封止後、母型基板をエッチング液で溶解除去するものである。   Further, according to the method for manufacturing a semiconductor device according to the present invention, the mother substrate is made of copper or a copper alloy as necessary, and the mother substrate is dissolved and removed with an etching solution after sealing with a sealing material. .

このように本発明によれば、金属部や半導体素子等の封止材による封止後、銅又は銅合金製の母型基板を溶解除去して、金属部の裏面側が装置底部に露出した状態を得ることにより、母型基板への外力付加を伴わず、母型基板の除去を金属部やレジスト層等の半導体装置側にストレスを与えることなく実行でき、半導体装置における欠陥の発生を防いで歩留りを向上させられる。また、母型基板の除去がエッチング液への浸漬のみで可能となり、装置製造工程を連続的に実行することができ、基板除去工程の自動化、無人化も容易となり、装置の量産に好適である。   As described above, according to the present invention, after sealing with a sealing material such as a metal part or a semiconductor element, the mother board made of copper or copper alloy is dissolved and removed, and the back side of the metal part is exposed at the bottom of the apparatus. Therefore, removal of the mother board can be performed without applying stress to the semiconductor device such as the metal part or resist layer without adding external force to the mother board, thereby preventing the occurrence of defects in the semiconductor device. Yield can be improved. In addition, it is possible to remove the base substrate only by immersing it in an etching solution, the device manufacturing process can be executed continuously, the substrate removal process can be automated and unmanned easily, and it is suitable for mass production of devices. .

本発明の一実施形態に係る半導体装置の断面図及び底面図である。It is sectional drawing and the bottom view of the semiconductor device which concerns on one Embodiment of this invention. 本発明の一実施形態に係る半導体装置用基板の断面図である。It is sectional drawing of the board | substrate for semiconductor devices which concerns on one Embodiment of this invention. 本発明の一実施形態に係る半導体装置用基板におけるレジスト層形成状態説明図である。It is a resist layer formation state explanatory view in the substrate for semiconductor devices concerning one embodiment of the present invention. 本発明の一実施形態に係る半導体装置用基板における金属部形成状態説明図である。It is metal part formation state explanatory drawing in the board | substrate for semiconductor devices which concerns on one Embodiment of this invention. 本発明の一実施形態に係る半導体装置用基板における表面金属層形成状態及び底部側レジスト層除去状態説明図である。It is explanatory drawing of the surface metal layer formation state and bottom side resist layer removal state in the board | substrate for semiconductor devices which concerns on one Embodiment of this invention. 本発明の一実施形態に係る半導体装置用基板を用いた半導体装置製造状態説明図である。It is semiconductor device manufacture state explanatory drawing using the board | substrate for semiconductor devices which concerns on one Embodiment of this invention. 本発明の一実施形態に係る半導体装置における表面金属層での光反射状態説明図である。It is light reflection state explanatory drawing in the surface metal layer in the semiconductor device concerning one embodiment of the present invention. 本発明の一実施形態に係る半導体装置用基板における他の表面金属層形成状態説明図である。It is other surface metal layer formation state explanatory drawing in the board | substrate for semiconductor devices which concerns on one Embodiment of this invention. 本発明の一実施形態に係る半導体装置用基板における他の金属部形成状態及びワイヤ接続状態説明図である。It is another metal part formation state and wire connection state explanatory drawing in the board | substrate for semiconductor devices which concerns on one Embodiment of this invention.

以下、本発明の一実施形態に係る半導体装置用基板を図1ないし図8に基づいて説明する。
前記各図において本実施形態に係る半導体装置1は、半導体素子搭載部11a又は電極部11bとして形成される金属部11と、この金属部11の非配置部分に対応させて形成されるレジスト層12と、金属部11表面にメッキにより高光沢状態で形成される表面金属層13と、金属部11のうち半導体素子搭載部11aに搭載される半導体素子14と、この半導体素子14と金属部11のうちの電極部11bとを電気的に接続するワイヤ15と、半導体素子14やワイヤ15を含む金属部11やレジスト層12の表面側を覆って封止する封止材16とを備える構成である。
Hereinafter, a semiconductor device substrate according to an embodiment of the present invention will be described with reference to FIGS.
In each of the drawings, the semiconductor device 1 according to the present embodiment includes a metal part 11 formed as a semiconductor element mounting part 11a or an electrode part 11b and a resist layer 12 formed corresponding to a non-arranged part of the metal part 11. A surface metal layer 13 formed on the surface of the metal part 11 in a high gloss state by plating, a semiconductor element 14 mounted on the semiconductor element mounting part 11a of the metal part 11, and the semiconductor element 14 and the metal part 11 It is a structure provided with the wire 15 which electrically connects the electrode part 11b of them, and the sealing material 16 which covers and seals the metal element 11 containing the semiconductor element 14 and the wire 15, and the surface side of the resist layer 12. .

半導体装置1は、底部に金属部11の裏面側が電極や放熱パッド等として露出した状態となり(図1(B)参照)、この露出する金属部11の裏面側と、装置外装の一部として現れるレジスト層12の裏面側とが略同一平面上に位置する構成である。半導体装置1の底部以外は、側面は装置外装をなす封止材16とレジスト層12、上面は封止材16のみがそれぞれ現れた状態となる。なお、金属部11の配置によっては、半導体装置1の側面に封止材16やレジスト層12と共に金属部11の側部が現れた状態となることもある。   The semiconductor device 1 is in a state where the back side of the metal part 11 is exposed as an electrode, a heat radiating pad or the like at the bottom (see FIG. 1B), and appears as a part of the back side of the exposed metal part 11 and the exterior of the device. In this configuration, the back side of the resist layer 12 is located on substantially the same plane. Except for the bottom of the semiconductor device 1, the side faces are the sealing material 16 and the resist layer 12 that form the exterior of the device, and the top surface is the state where only the sealing material 16 appears. Depending on the arrangement of the metal part 11, the side part of the metal part 11 may appear on the side surface of the semiconductor device 1 together with the sealing material 16 and the resist layer 12.

この半導体装置1は、製造の効率化を図るために半導体装置用基板10を用いて製造される。半導体装置1の製造に用いられる半導体装置用基板10は、図2に示すように、導電性を有する材質からなる母型基板17と、前記金属部11と、レジスト層12と、表面金属層13とを備える構成である。   The semiconductor device 1 is manufactured using a semiconductor device substrate 10 in order to increase the manufacturing efficiency. As shown in FIG. 2, a semiconductor device substrate 10 used for manufacturing the semiconductor device 1 includes a mother substrate 17 made of a conductive material, the metal portion 11, a resist layer 12, and a surface metal layer 13. It is the structure provided with.

半導体装置用基板10は、母型基板17上に金属部11の非配置部分に対応するレジスト層12が形成された後、電鋳で金属部11を形成され、さらに金属部11表面にメッキにより表面金属層13を形成されることで製造されるものであり、半導体装置製造の際は、この半導体装置用基板10に対し、金属部11表面側への半導体素子14搭載及び配線、封止材16による封止がなされ、封止の後、半導体装置部分から母型基板17を分離除去して半導体装置を得る仕組みである。   The semiconductor device substrate 10 has a resist layer 12 corresponding to the non-arranged portion of the metal portion 11 formed on the base substrate 17, and then the metal portion 11 is formed by electroforming, and the surface of the metal portion 11 is plated by plating. The semiconductor device 14 is manufactured by forming the surface metal layer 13. When the semiconductor device is manufactured, the semiconductor element 14 is mounted on the surface side of the metal portion 11, the wiring, and the sealing material. 16 is used, and after the sealing, the mother substrate 17 is separated and removed from the semiconductor device portion to obtain a semiconductor device.

前記母型基板17は、ステンレス材(SUS430等)やアルミニウム、銅等の導電性の金属板(厚さ約0.1mm)で形成されるものであり、表面側にレジスト層12、金属部11が形成され、また裏面側にレジスト層18、保護フィルム19が配設されて半導体装置用基板10をなし、半導体装置の製造に供される。金属部11の電鋳による形成の際には、この母型基板17を介した通電がなされることで、母型基板17表面のレジスト層12に覆われない通電可能な部分に電鋳で金属部11が形成されることとなる。また、表面金属層13のメッキの際も、電解メッキとする場合には、母型基板17を介して通電がなされる。   The matrix substrate 17 is formed of a conductive metal plate (thickness: about 0.1 mm) such as stainless steel (SUS430, etc.), aluminum, copper or the like, and has a resist layer 12 and a metal portion 11 on the surface side. In addition, a resist layer 18 and a protective film 19 are disposed on the back side to form a substrate 10 for a semiconductor device, which is used for manufacturing a semiconductor device. When the metal part 11 is formed by electroforming, the energization is performed through the matrix substrate 17 so that the energized portion not covered with the resist layer 12 on the surface of the matrix substrate 17 is electroformed. The part 11 will be formed. Also, when the surface metal layer 13 is plated, energization is performed through the matrix substrate 17 when electrolytic plating is used.

半導体装置用基板10を用いた半導体装置の製造工程で、金属部11及びレジスト層12表面側が封止材16で覆われ(図6(B)参照)、母型基板17で金属部11及びレジスト層12を支持しなくても十分な強度が得られたら、母型基板17がこれらから分離除去される(図6(C)参照)。母型基板17がステンレス材の場合には、力を加えて半導体装置側から物理的に引き剥がして除去する方法が採られ、また、母型基板17が銅等の場合、薬液を用いて溶解除去するエッチングの方法が用いられる。エッチングの場合、母型基板17をなす銅等は溶解するが、金属部11のニッケル等の材質は冒されにくい(腐性の少ない)ような選択エッチング性を有するエッチング液を用いるのが好ましい。   In the manufacturing process of the semiconductor device using the semiconductor device substrate 10, the metal part 11 and the resist layer 12 are covered with the sealing material 16 (see FIG. 6B), and the metal part 11 and the resist are covered with the matrix substrate 17. If sufficient strength is obtained without supporting the layer 12, the matrix substrate 17 is separated and removed from these layers (see FIG. 6C). When the mother substrate 17 is made of stainless steel, a method is adopted in which a force is applied to physically remove the substrate 17 from the semiconductor device side, and when the mother substrate 17 is made of copper or the like, it is dissolved using a chemical solution. An etching method for removing is used. In the case of etching, it is preferable to use an etching solution having a selective etching property that dissolves copper or the like forming the base substrate 17 but hardly affects the material such as nickel of the metal part 11 (less corrosive).

この母型基板17が除去されると、半導体装置底部に、金属部11の半導体素子搭載部11a及び電極部11b、並びにレジスト層12の各裏面が同一平面上に露出した状態が得られる。   When the mother substrate 17 is removed, the semiconductor device mounting portion 11a and the electrode portion 11b of the metal portion 11 and the back surfaces of the resist layer 12 are exposed on the same plane at the bottom of the semiconductor device.

前記金属部11は、電鋳に適したニッケルや銅、又はニッケル−コバルト等のニッケル合金からなり、母型基板17上のレジスト層12のない部分に、電鋳で形成される構成である。半導体装置用基板10において、金属部11は、母型基板17表面で、半導体素子搭載部11aとその近傍に複数配置される電極部11bの組合わせを一つの単位として、製造する半導体装置の数だけ前記組合わせが多数整列状態で並べられた形態で形成されることとなる。   The metal part 11 is made of nickel or copper suitable for electroforming, or a nickel alloy such as nickel-cobalt, and is formed by electroforming on a portion of the matrix substrate 17 where the resist layer 12 is not present. In the semiconductor device substrate 10, the metal portion 11 is the number of semiconductor devices to be manufactured on the surface of the base substrate 17 with a combination of the semiconductor element mounting portion 11 a and a plurality of electrode portions 11 b arranged in the vicinity thereof as one unit. Therefore, the combination is formed in a form in which a large number of the combinations are aligned.

この金属部11は、レジスト層12の厚さを越える厚さ(例えば、厚さ約60〜80μm)で、且つ上端周縁にはレジスト層12側に張出した略庇状の張出し部11cを有する形状として形成されるのが好ましい。張出し部11cは、電鋳の際、金属部11をレジスト層12の厚さまで形成した後も電鋳を継続して、金属部の成長を厚さ方向に加えてレジスト層12による制限のない他の向きにも進行させることで、レジスト層12を越えた金属部11上端部からレジスト層12側へ張出した形状として得られるものである。この張出し部11cは、封止材16による封止に伴って、レジスト層12と封止材16で挟まれて固定された状態となる。   The metal portion 11 has a thickness exceeding the thickness of the resist layer 12 (for example, a thickness of about 60 to 80 μm), and a shape having a substantially bowl-shaped protruding portion 11c protruding toward the resist layer 12 on the periphery of the upper end. It is preferable to be formed as The overhanging portion 11c is not limited by the resist layer 12 by continuing electroforming after the metal portion 11 is formed to the thickness of the resist layer 12 during electroforming, and adding growth of the metal portion in the thickness direction. By proceeding also in this direction, a shape projecting from the upper end of the metal part 11 beyond the resist layer 12 to the resist layer 12 side can be obtained. The overhanging portion 11 c is sandwiched and fixed between the resist layer 12 and the sealing material 16 along with the sealing with the sealing material 16.

また、金属部11は、大部分を電鋳に適したニッケルやニッケル合金等で形成されるが、金属部11の裏面側には、半導体装置実装時のハンダ付けを適切に行えるようにするために、電鋳で形成されるニッケル等の主材質部よりハンダぬれ性の良好な金属、例えば金や錫、パラジウム、ハンダ(錫鉛合金)等の薄膜11dが配設される構成である。この薄膜11dの厚さは0.05〜5μm程度とするのが好ましい。   In addition, the metal part 11 is mostly formed of nickel or a nickel alloy suitable for electroforming, but the back surface side of the metal part 11 can be appropriately soldered when the semiconductor device is mounted. In addition, a thin film 11d such as a metal having better solder wettability than a main material portion such as nickel formed by electroforming, such as gold, tin, palladium, solder (tin-lead alloy), or the like is disposed. The thickness of the thin film 11d is preferably about 0.05 to 5 μm.

金属部11形成の際には、あらかじめ薄膜11dが母型基板17上のレジスト層12のない部分にメッキ等で形成された後(図4(B)参照)、この薄膜11d上にさらに電鋳によりニッケル等の主材質部が形成されることとなる。この薄膜11dには、母型基板17のエッチングによる除去の際にエッチング液による金属部11の侵食劣化を防ぐ機能を与えることもでき、その場合、金や銀、鉛の薄膜を配設するのが好ましい。   When the metal part 11 is formed, a thin film 11d is previously formed by plating or the like on a portion without the resist layer 12 on the base substrate 17 (see FIG. 4B), and then electroformed further on the thin film 11d. As a result, a main material portion such as nickel is formed. The thin film 11d can be given a function of preventing erosion degradation of the metal part 11 by the etching solution when the mother substrate 17 is removed by etching. In this case, a thin film of gold, silver, or lead is provided. Is preferred.

なお、この金属部11裏面側の薄膜形成は、前記ハンダ付け対策を目的とするものの場合、電鋳で金属部11主材質部を形成する前に限られるものではなく、半導体装置1の完成後、メッキにより金属部11の露出した裏面側に薄膜を形成するようにしてもかまわない。   The thin film formation on the back surface side of the metal part 11 is not limited to the formation of the main material part of the metal part 11 by electroforming in the case of the purpose of the soldering countermeasure, but after the completion of the semiconductor device 1. Alternatively, a thin film may be formed on the exposed back side of the metal part 11 by plating.

前記レジスト層12は、表面金属層13のメッキで使用する強アルカリのメッキ液に対する耐溶解性を備えた絶縁性材で形成され、母型基板17上にあらかじめ設定される金属部11の非配置部分に対応させて配設され、金属部11及び表面金属層13の形成後も除去されず残されて半導体装置用基板10の一部をなす構成である。また、このレジスト層12は、半導体装置の製造においては、封止材16による封止に伴って封止材16と密着一体化し、最終的に得られる半導体装置1の外装の一部をなす構成である(図1参照)。   The resist layer 12 is formed of an insulating material having resistance to a strong alkaline plating solution used for plating of the surface metal layer 13, and the metal portion 11 which is set in advance on the matrix substrate 17 is not disposed. The semiconductor device 10 is configured to correspond to the portion and is left without being removed even after the formation of the metal portion 11 and the surface metal layer 13 and forms a part of the semiconductor device substrate 10. Further, in the manufacture of a semiconductor device, the resist layer 12 is closely integrated with the sealing material 16 along with the sealing with the sealing material 16 and forms a part of the exterior of the semiconductor device 1 finally obtained. (See FIG. 1).

このレジスト層12は、母型基板17上に金属部11の形成に先立って配設され、詳細には、強アルカリに耐性を有するソルダーレジスト(エポキシ系樹脂)、ポリイミド等の感光性材料を母型基板17に所定の厚さ、例えば約50μmの厚さとなるようにして密着配設し、半導体装置1の金属部11位置に対応する所定パターンのマスクフィルムを載せた状態で、紫外線照射による露光での硬化(図3(C)参照)、非照射部分の感光性材料を除去する現像等の処理を経て、金属部11の非配置部分に対応させた形状で形成される。レジスト層12は、封止材16に匹敵する十分な物理的強度を有しており、封止材16の一部を置換えて半導体装置1の外装の一部として利用しても十分に内部を保護する機能を果し、また母型基板17を半導体装置側から引き剥がすなど力を加えて物理的に除去する場合にも、割れ等の破損もなく金属部11や封止材16との一体化状態を維持することとなる。   This resist layer 12 is disposed on the matrix substrate 17 prior to the formation of the metal portion 11. Specifically, a photosensitive material such as a solder resist (epoxy resin) resistant to strong alkali or polyimide is used as a matrix. Exposure by ultraviolet irradiation with a mask film having a predetermined pattern corresponding to the position of the metal part 11 of the semiconductor device 1 placed in close contact with the mold substrate 17 so as to have a predetermined thickness, for example, about 50 μm. Is formed in a shape corresponding to the non-arranged portion of the metal portion 11 through processing such as curing (see FIG. 3C) and development for removing the photosensitive material in the non-irradiated portion. The resist layer 12 has sufficient physical strength comparable to the encapsulant 16, and even if the resist layer 12 is used as a part of the exterior of the semiconductor device 1 by replacing a part of the encapsulant 16, the resist layer 12 is sufficiently inside. Even when the matrix substrate 17 is physically removed by applying a force such as peeling off the matrix substrate 17 from the semiconductor device side, it is integrated with the metal part 11 and the sealing material 16 without breakage or the like. Will be maintained.

なお、このレジスト層12については、感光性レジストに限られるものではなく、強アルカリに対し変質せず強度の高い塗膜が得られる塗料を、母型基板17上における金属部11の非配置部分に、電着塗装等により必要な塗膜厚さとなるように塗装して形成することもできる。   Note that the resist layer 12 is not limited to a photosensitive resist, and a coating that does not change with respect to strong alkali and can provide a high-strength coating film is not disposed on the matrix substrate 17. In addition, it can be formed by coating so as to have a required coating thickness by electrodeposition coating or the like.

一方、このレジスト層12とは別に、母型基板17の裏面側にも、レジスト層18が形成されると共に、メッキ液への耐性を有した保護フィルム19がこのレジスト層18を覆うように配設される構成である(図4参照)。裏面側のレジスト層18は、保護フィルム19で覆われるので、メッキ液への耐性のない材質でよく、詳細には、硬化状態で表面側のレジスト層12に影響を与えずに溶解除去可能なレジスト材、例えば厚さ約50μmのアルカリ現像タイプの感光性フィルムレジストを熱圧着等により配設し、そのままマスクなしに紫外線照射による露光等の処理を経て、裏面全面にわたり硬化形成されるものとすることができる。なお、この裏面側だけでなく、母型基板17表面側についても、メッキ液への耐性のない材質でレジスト層を形成し、これを覆うように保護フィルムを配設して、全体としてメッキ液への耐性を有するレジスト層とする構成としてもよい。この場合、保護フィルムは金属部の形成前に配設する他、金属部の形成後表面金属層の形成前に配設することもできる。   On the other hand, apart from the resist layer 12, a resist layer 18 is also formed on the back surface side of the mother board 17, and a protective film 19 having resistance to the plating solution is disposed so as to cover the resist layer 18. It is the structure provided (refer FIG. 4). Since the resist layer 18 on the back side is covered with the protective film 19, it may be made of a material that is not resistant to the plating solution. Specifically, it can be dissolved and removed without affecting the resist layer 12 on the front side in the cured state. A resist material, for example, an alkali-development type photosensitive film resist having a thickness of about 50 μm is disposed by thermocompression bonding or the like, and is subjected to treatment such as exposure by ultraviolet irradiation without a mask as it is, and is cured and formed over the entire back surface. be able to. A resist layer is formed of a material that is not resistant to the plating solution not only on the back surface side but also on the surface of the mother board 17, and a protective film is provided to cover the resist layer, so that the plating solution as a whole is formed. It is good also as a structure made into the resist layer which has the tolerance to the. In this case, the protective film may be disposed before the formation of the metal portion, or may be disposed after the formation of the metal portion and before the formation of the surface metal layer.

前記表面金属層13は、配線用のワイヤ15をなす金線等との接合性に優れる金や銀等、また、光沢を付与しやすいアルミニウム等からなり、表面の光沢度がGAM光沢度で1.0以上となる光沢メッキとして形成される。この表面金属層13は、スパッタや蒸着によって形成することもできる。   The surface metal layer 13 is made of gold, silver, or the like that is excellent in bondability with a gold wire or the like that forms the wire 15 for wiring, or aluminum that easily imparts gloss, and the surface gloss is 1 in terms of GAM gloss. It is formed as a glossy plating of 0 or more. The surface metal layer 13 can also be formed by sputtering or vapor deposition.

この表面金属層13は、例えば、各金属部11を母型基板17ごとメッキ浴に投入する等により、金属部11の表面に所定の厚さ、例えば約2.0〜4.0μmの厚さのメッキとして形成される。メッキ浴に用いられるメッキ液は、銀メッキの場合、高シアン強アルカリ(シアン化銀やシアン化銀カリウムの溶液)で且つ光沢剤が含まれており、光沢剤の機能が十分に発揮されて、表面金属層はGAM光沢度で1.0以上の高光沢性を示す銀メッキとして形成される。この表面金属層13のメッキの際、母型基板17の裏面側は保護フィルム19で覆われていることから、メッキの付着やメッキ液によるレジスト溶解等は生じない(図5(A)参照)。   The surface metal layer 13 has a predetermined thickness on the surface of the metal part 11, for example, a thickness of about 2.0 to 4.0 μm, for example, by putting each metal part 11 together with the matrix substrate 17 into a plating bath. It is formed as a plating. In the case of silver plating, the plating solution used in the plating bath is a highly cyan strong alkali (silver cyanide or silver cyanide potassium solution) and contains a brightener, so that the function of the brightener is fully exhibited. The surface metal layer is formed as a silver plating exhibiting a high glossiness of GAM glossiness of 1.0 or more. When the surface metal layer 13 is plated, the back surface side of the matrix substrate 17 is covered with the protective film 19, so that the adhesion of the plating and the dissolution of the resist by the plating solution do not occur (see FIG. 5A). .

なお、この表面金属層13が銀メッキの場合は、強アルカリのメッキ液を用いるが、金メッキの場合は弱酸のメッキ液を用いるなど、メッキの金属に対応するメッキ液を使用することとなる。また、表面金属層13のGAM光沢度は、これを測定可能な装置、例えば、日本電色工業(株)製VSR400等を用いて測定した値を採用することとし、通常、1.0以上の値が高光沢状態をあらわすものとなる。   When the surface metal layer 13 is silver-plated, a strong alkaline plating solution is used. When gold plating is used, a weak acid plating solution is used. For example, a plating solution corresponding to the plating metal is used. The GAM glossiness of the surface metal layer 13 is a value measured using a device capable of measuring this, for example, VSR400 manufactured by Nippon Denshoku Industries Co., Ltd., and is usually 1.0 or more. The value represents a high gloss state.

この表面金属層13のメッキを形成する際は、金属部11がニッケルの場合、メッキが付着しにくいため、通常、表面金属層13のメッキの前にあらかじめ金属部11表面に下地メッキ(銅ストライクや銀ストライク、又は金ストライク)を行い、表面金属層13の金属部11への密着性を高めることが望ましい。   When forming the plating of the surface metal layer 13, if the metal part 11 is nickel, the plating is difficult to adhere. Therefore, usually, before the surface metal layer 13 is plated, the surface of the metal part 11 is preliminarily plated (copper strike). Or silver strike or gold strike) to improve the adhesion of the surface metal layer 13 to the metal portion 11.

また、表面金属層13は、金属部11に張出し部11cが形成される場合、張出し部11cも含む金属部11表面に形成されるが、金属部11で張出し部11cを形成する代りに、図8に示すように、表面金属層23を厚めに形成してレジスト層側への張出し部23aを表面金属層23で形成するようにしてもよく、詳細には、母型基板27上に金属部21をレジスト層22の厚さを超えない程度に形成する一方、金属部21表面への表面金属層23のメッキを厚めに形成して、メッキを成長可能な各方向に進行させ、メッキを金属部21上からレジスト層22側へ張出した形状として形成することができる。   Further, the surface metal layer 13 is formed on the surface of the metal part 11 including the overhang part 11c when the overhang part 11c is formed in the metal part 11, but instead of forming the overhang part 11c with the metal part 11, FIG. As shown in FIG. 8, the surface metal layer 23 may be formed thicker, and the overhanging portion 23a to the resist layer side may be formed by the surface metal layer 23. Specifically, the metal portion is formed on the base substrate 27. 21 is formed so as not to exceed the thickness of the resist layer 22, while the surface metal layer 23 is thickly formed on the surface of the metal portion 21, and the plating is allowed to grow in each direction capable of growing. It can be formed in a shape protruding from the portion 21 toward the resist layer 22 side.

前記半導体素子14は、微細な電子回路が形成されたいわゆるチップであり、金属部11のうち半導体素子搭載部11a上に接着されて搭載される。金等の導電性線材からなる配線(ボンディング)用のワイヤ15が、半導体素子14表面に設けられた電極と、金属部11のうち半導体素子搭載部11aと独立させて形成された電極部11bとにそれぞれ接合され、半導体素子14と電極部11bとを電気的に接続することとなる。   The semiconductor element 14 is a so-called chip in which a fine electronic circuit is formed, and is mounted on the semiconductor element mounting part 11a by being bonded to the metal part 11. A wire 15 for wiring (bonding) made of a conductive wire material such as gold is provided on an electrode provided on the surface of the semiconductor element 14, and an electrode part 11 b formed independently of the semiconductor element mounting part 11 a among the metal part 11. The semiconductor element 14 and the electrode portion 11b are electrically connected to each other.

前記封止材16は、物理的強度の高い熱硬化性エポキシ樹脂等であり、半導体素子14がLED等の発光素子の場合、透光性の材質が用いられ、金属部11表面側の半導体素子14やワイヤ15を覆った状態で封止し、半導体素子14やワイヤ15等の構造的に弱い部分を外部から隔離した保護状態とするものである。   The sealing material 16 is a thermosetting epoxy resin or the like with high physical strength. When the semiconductor element 14 is a light emitting element such as an LED, a translucent material is used, and the semiconductor element on the surface side of the metal part 11 is used. 14 and the wire 15 are covered, and the structurally weak parts such as the semiconductor element 14 and the wire 15 are isolated from the outside.

この封止材16を用いる封止工程は、半導体装置用基板10に対して行われ、母型基板17の表面側における金属部11等のある半導体装置となる範囲を、上型となる金型で覆った上で、この金型と母型基板17の間に硬化前の封止材16を圧入し、封止材16を硬化させることで封止が完了となる。ただし、封止工程では、一つの半導体装置となる半導体素子搭載部11aと複数の電極部11bとの組合わせが多数整列状態のままで一様に封止されるため、半導体装置は封止材16を介して多数つながった状態となっている。   The sealing process using the sealing material 16 is performed on the substrate 10 for a semiconductor device, and a mold that serves as an upper mold is formed in a range of a semiconductor device having the metal portion 11 and the like on the surface side of the mother substrate 17. Then, the sealing material 16 before curing is press-fitted between the mold and the base substrate 17 and the sealing material 16 is cured, thereby completing the sealing. However, in the sealing process, since the combination of the semiconductor element mounting portion 11a and the plurality of electrode portions 11b, which are one semiconductor device, is uniformly sealed while being aligned, the semiconductor device is a sealing material. 16 are connected in a large number.

次に、本実施形態に係る半導体装置用基板及びこれを用いた半導体装置の製造過程について説明する。まず、銅製の母型基板17の両面にレジストを配設する(図3(A)、(B)参照)。母型基板17の表面側には、強アルカリに耐性を有するソルダーレジストやポリイミド等の感光性材料を所定厚さ(例えば約50μm)となるようにして密着配設する。母型基板17の裏面側には、硬化状態で表面側のレジスト層12に影響を与えない弱アルカリ剤で溶解除去可能な感光性レジストを表面側同様に配設するとよい。   Next, the manufacturing process of the semiconductor device substrate according to the present embodiment and the semiconductor device using the same will be described. First, a resist is disposed on both surfaces of the copper mother substrate 17 (see FIGS. 3A and 3B). A photosensitive material such as a solder resist or polyimide resistant to strong alkali is closely attached to the surface of the matrix substrate 17 so as to have a predetermined thickness (for example, about 50 μm). A photosensitive resist that can be dissolved and removed with a weak alkaline agent that does not affect the resist layer 12 on the surface side in the cured state may be disposed on the back side of the matrix substrate 17 in the same manner as the surface side.

そして、母型基板17の表面側の感光性レジストに対しては、半導体装置の金属部位置に対応する所定パターンのマスクフィルム50を載せた状態で、紫外線照射による露光(図3(C)参照)、現像等の処理を経て、金属部の非配置部分に対応させたレジスト層12を硬化形成する(図4(A)参照)。また、裏面側の感光性レジストに対しては、そのまま全面に対する露光等の処理を経て、裏面全面にわたりレジスト層18を硬化形成する(図3(C)参照)とよい。さらに裏面側には、レジスト層18を覆うように、強アルカリへの耐性を有した保護フィルム19を密着配設する(図4(A)参照)とよい。   The photosensitive resist on the surface side of the matrix substrate 17 is exposed by ultraviolet irradiation with a mask film 50 having a predetermined pattern corresponding to the position of the metal part of the semiconductor device (see FIG. 3C). ), A resist layer 12 corresponding to the non-arranged portion of the metal portion is cured and formed through a process such as development (see FIG. 4A). In addition, for the photosensitive resist on the back surface side, the resist layer 18 is preferably cured and formed over the entire back surface through a process such as exposure to the entire surface as it is (see FIG. 3C). Furthermore, a protective film 19 having resistance to strong alkali is preferably disposed in close contact with the back surface so as to cover the resist layer 18 (see FIG. 4A).

レジスト層12、18を形成し、保護フィルム19を配設したら、母型基板17表面のレジスト層12で覆われていない露出部分に対し、必要に応じて公知の表面酸化被膜除去や表面活性化処理を行った後、この露出部分にメッキ等によりハンダぬれ性改善用の金の薄膜11dを例えば0.05〜5μm厚で形成する(図4(B)参照)。そして、この薄膜11d上に、電鋳によりニッケルを積層して金属部11を形成する。   When the resist layers 12 and 18 are formed and the protective film 19 is disposed, the known surface oxide film removal or surface activation is performed on the exposed portion of the surface of the base substrate 17 that is not covered with the resist layer 12 as necessary. After the processing, a gold thin film 11d for improving solder wettability is formed on the exposed portion by plating or the like with a thickness of 0.05 to 5 μm, for example (see FIG. 4B). And on this thin film 11d, nickel is laminated | stacked by electroforming and the metal part 11 is formed.

この金属部11は、レジスト層12の厚さを越える厚さ(例えば、厚さ約60〜80μm)として形成され、金属部11上端周縁にはレジスト層12側に張出した略庇状の張出し部11cも形成される(図4(C)参照)。金属部11は、母型基板17表面において、半導体素子搭載部11aとその近傍に複数配置される電極部11bの組合わせを一つの単位として、製造する半導体装置の数だけ前記組合わせが多数整列状態で並べられた形態で形成されることとなる。   The metal portion 11 is formed to have a thickness exceeding the thickness of the resist layer 12 (for example, a thickness of about 60 to 80 μm), and a substantially bowl-shaped overhang portion that protrudes toward the resist layer 12 at the upper end periphery of the metal portion 11. 11c is also formed (see FIG. 4C). The metal part 11 is arranged on the surface of the base substrate 17 in such a number that the number of semiconductor devices is the same as the number of semiconductor devices to be manufactured, with a combination of the semiconductor element mounting part 11a and a plurality of electrode parts 11b arranged in the vicinity thereof as one unit It will be formed in the form arranged in the state.

所望の厚さ及び形状の金属部11が得られたら、例えば母型基板17ごとメッキ浴に投入することにより、金属部11の表面に高光沢の銀メッキである表面金属層13を所定の厚さ、例えば厚さ約2.0〜4.0μmとなるように形成する(図5(A)参照)。メッキ浴には高シアン含有で強アルカリのメッキ液が用いられるが、レジスト層12は強アルカリに対する十分な耐性を有しているため、変質等が生じることはなく、レジスト層としての機能を維持し、金属部11等必要箇所以外へのメッキ付着を防ぐことができる。また、この表面金属層13のメッキの際、母型基板17の裏面側は保護フィルム19で覆われていることから、メッキの付着やメッキ液によるレジスト層18の溶解等は生じない。   When the metal part 11 having a desired thickness and shape is obtained, the surface metal layer 13 made of high-gloss silver plating is formed on the surface of the metal part 11 by a predetermined thickness by, for example, putting the matrix substrate 17 together with the plating bath. For example, it is formed to have a thickness of about 2.0 to 4.0 μm (see FIG. 5A). The plating bath uses a high-cyanide and strong alkali plating solution, but the resist layer 12 has sufficient resistance to strong alkali, so it does not deteriorate and maintains its function as a resist layer. And plating adhesion to places other than required parts, such as the metal part 11, can be prevented. Further, when the surface metal layer 13 is plated, the back surface side of the matrix substrate 17 is covered with the protective film 19, so that no adhesion of plating or dissolution of the resist layer 18 by the plating solution occurs.

表面金属層13形成後、母型基板17裏面側の保護フィルム19及びレジスト層18を除去すると(図5(B)、(C)参照)、半導体装置製造用基板10が完成する。レジスト層18の除去は、弱アルカリ液による膨潤除去等の方法を用いることができ、この場合、表面側のレジスト層12は強アルカリにも耐えうる耐性を有しているため変化しない。なお、母型基板17裏面側の保護フィルム19及びレジスト層18を除去せず残したまま、半導体装置製造用基板として半導体装置の製造工程に移行させるようにしてもよい。   After the surface metal layer 13 is formed, the protective film 19 and the resist layer 18 on the back side of the matrix substrate 17 are removed (see FIGS. 5B and 5C), whereby the semiconductor device manufacturing substrate 10 is completed. The resist layer 18 can be removed by a method such as swelling removal with a weak alkali solution. In this case, the resist layer 12 on the surface side does not change because it has resistance to strong alkali. Alternatively, the protective film 19 and the resist layer 18 on the back surface side of the mother substrate 17 may be left without being removed, and the semiconductor device manufacturing process may be shifted to the semiconductor device manufacturing process.

続いて、得られた半導体装置製造用基板10を用いた半導体装置の製造について説明すると、まず、半導体装置製造用基板10における金属部11のうち半導体素子搭載部11a上に、半導体素子14を接着しつつ搭載し、さらに、半導体素子14表面の電極と、これに対応する各電極部11bとに、金線等のワイヤ15を接合し、半導体素子14と各電極部11bとを電気的接続状態とする(図6(A)参照)。この配線による電気的接続は、公知の超音波ボンディング装置等により実施される。電極部11bの表面には表面金属層13が形成されているため、ワイヤ15との接合を確実なものとすることができ、接続の信頼性を高められる。   Next, manufacturing of a semiconductor device using the obtained semiconductor device manufacturing substrate 10 will be described. First, the semiconductor element 14 is bonded onto the semiconductor element mounting portion 11a in the metal portion 11 of the semiconductor device manufacturing substrate 10. In addition, a wire 15 such as a gold wire is bonded to the electrode on the surface of the semiconductor element 14 and the corresponding electrode part 11b, and the semiconductor element 14 and each electrode part 11b are electrically connected. (See FIG. 6A). The electrical connection by this wiring is performed by a known ultrasonic bonding apparatus or the like. Since the surface metal layer 13 is formed on the surface of the electrode portion 11b, the bonding with the wire 15 can be ensured, and the connection reliability can be improved.

半導体素子14と各電極部11bとの接続が完了したら、母型基板17の表面側における金属部11等のある半導体装置となる範囲を、熱硬化性エポキシ樹脂等の封止材16で封止し、半導体素子14やワイヤ15を外部から隔離した保護状態とする(図6(B)参照)。詳細には、母型基板17の表面側を上型となるモールド金型に装着し、母型基板17に下型の役割を担わせつつ、モールド金型内に封止材16となる硬化前のエポキシ樹脂を圧入するという過程で封止が実行され、母型基板17上では、一つの半導体装置となる半導体素子搭載部11aと複数の電極部11bとの組合わせが多数整列状態のままで一様に封止され、半導体装置が多数つながった状態で現れることとなる。   When the connection between the semiconductor element 14 and each electrode portion 11b is completed, the range of the semiconductor device such as the metal portion 11 on the surface side of the mother board 17 is sealed with a sealing material 16 such as a thermosetting epoxy resin. Then, the semiconductor element 14 and the wires 15 are protected from the outside (see FIG. 6B). More specifically, the surface side of the base substrate 17 is attached to an upper mold, and the base substrate 17 plays the role of a lower mold, and before the hardening material that becomes the sealing material 16 in the mold. Sealing is performed in the process of press-fitting the epoxy resin, and a large number of combinations of the semiconductor element mounting portion 11a and the plurality of electrode portions 11b, which are one semiconductor device, remain aligned on the mother substrate 17. It is sealed uniformly and appears in a state where a large number of semiconductor devices are connected.

この多数つながった状態の半導体装置が得られたら、母型基板17を除去し、各半導体装置の底部に金属部11の裏面側が露出した状態を得る(図6(C)参照)。銅製である母型基板17の除去には、母型基板17をエッチング液に浸漬して溶解させる方法を用いる。これにより、半導体装置側に過大な力が加わらず、母型基板17の除去に伴う悪影響はない。なお、母型基板に強度及び剥離性に優れるステンレス材等を用いた場合には、母型基板を除去する方法として、半導体装置側から母型基板を物理的に引き剥がして除去する方法を用いることもできる。   When the semiconductor devices connected in a large number are obtained, the base substrate 17 is removed to obtain a state in which the back side of the metal portion 11 is exposed at the bottom of each semiconductor device (see FIG. 6C). For removing the mother substrate 17 made of copper, a method in which the mother substrate 17 is immersed in an etching solution and dissolved is used. Thereby, an excessive force is not applied to the semiconductor device side, and there is no adverse effect associated with the removal of the matrix substrate 17. Note that, when a stainless steel material having excellent strength and peelability is used for the mother board, a method of removing the mother board by physically peeling the mother board from the semiconductor device side is used as a method for removing the mother board. You can also.

母型基板17を除去された半導体装置の底部では、露出する金属部11の裏面側と、残ったレジスト層12の裏面側とが同一平面上に位置する状態となっている。母型基板17の除去後、多数つながった状態の半導体装置を一つ一つ切り離せば、半導体装置1としての完成となる。   At the bottom of the semiconductor device from which the matrix substrate 17 has been removed, the exposed back surface side of the metal portion 11 and the remaining back surface side of the resist layer 12 are in the same plane. After removing the mother substrate 17, a plurality of connected semiconductor devices are separated one by one to complete the semiconductor device 1.

得られた半導体装置1内部において、金属部11の上端周縁を張出し部11cとして略庇状に張り出し形成し、封止材16による封止状態で、この張出し部11cが硬化した封止材16とレジスト層12に挟まれて固定されていることから、樹脂同士で密着し強固に一体化した封止材16とレジスト層12間に張出し部11が食込んで、金属部11に加わる外力に対する抵抗体の役割を果すこととなり、母型基板17にステンレス材等を用い、半導体装置側から母型基板17を物理的に引き剥がして除去する場合など、金属部11裏面側に装置外装から引離そうとする外力が加わっても、張出し部11が金属部11の移動や脱落を妨げ、金属部11の他部分に対するずれ等をなくすことができ、製造時における歩留りを向上させられると共に、半導体装置としての強度を高められ、使用時の耐久性や半導体装置動作の信頼性も高められる。   In the obtained semiconductor device 1, the upper end periphery of the metal part 11 is formed as a projecting part 11 c so as to project in a substantially bowl shape, and the sealing material 16 in which the projecting part 11 c is cured in a sealed state with the sealing material 16 Since it is sandwiched and fixed between the resist layers 12, the overhanging portion 11 bites between the sealing material 16 that is intimately integrated with the resin and firmly integrated with the resist layer 12, and resistance to external force applied to the metal portion 11. When the stainless steel material is used for the mother board 17 and the mother board 17 is physically peeled off from the semiconductor device side and removed, the metal part 11 is separated from the outer surface of the device. Even if an external force is applied, the overhanging portion 11 can prevent the metal portion 11 from moving or dropping, and can eliminate the displacement of the metal portion 11 with respect to other portions, thereby improving the yield during manufacturing. An elevated strength of the semiconductor device, the reliability of the durability and the semiconductor device operation in use is also enhanced.

半導体装置1の半導体素子14がLED等の発光素子であり、且つ封止材16が透光性を有する樹脂材からなる場合、半導体素子14における発光部14aが発光すると、図7に示すように、放射される光が直接封止材16部分を介して装置外部に達する他、高光沢性の表面金属層13で反射した光も封止材16部分を介して装置外部に達することとなり、半導体装置1としての光の放射強度を高めることができる。   When the semiconductor element 14 of the semiconductor device 1 is a light emitting element such as an LED and the sealing material 16 is made of a resin material having translucency, when the light emitting portion 14a in the semiconductor element 14 emits light, as shown in FIG. Besides, the emitted light directly reaches the outside of the device through the sealing material 16 portion, and the light reflected by the highly glossy surface metal layer 13 reaches the outside of the device through the sealing material 16 portion. The light emission intensity of the device 1 can be increased.

このように、本実施形態に係る半導体装置は、半導体装置用基板10における金属部11の形成に先立って金属部11の非配置部分に形成されるレジスト層12が、金属部11表面への表面金属層13のメッキで用いるメッキ液に対する耐性を有することから、メッキ液に対しレジスト層12が変質することなく必要部分以外へのメッキを確実に防ぎつつ、金属部11表面等必要箇所のみに適切に表面金属層13としての高光沢のメッキを施せ、表面金属層13を光の反射部として利用可能となるなど、半導体装置としての応用範囲を広げられる。また、レジスト層12が除去されず残されることで、このレジスト層12の分だけ製造に係る廃棄物を減らせると共に、残されたレジスト層12が封止材16の一部と置き換わる形で装置外装をなすことで、封止材16の使用量も低減できる。さらに、レジスト層12を用いる上でその除去処理を考慮せずに済み、レジスト層12として必要箇所以外への液剤付着等を防ぐ性質に加えて、メッキ液への耐性を有するものであれば、除去処理に適さない材質でも使用でき、レジスト層12をなす材質の選択の自由度を広げられ、コストダウンに繋げられる。   Thus, in the semiconductor device according to the present embodiment, the resist layer 12 formed on the non-arranged portion of the metal portion 11 prior to the formation of the metal portion 11 in the semiconductor device substrate 10 has a surface on the surface of the metal portion 11. Since it has resistance to the plating solution used for plating of the metal layer 13, the resist layer 12 does not deteriorate with respect to the plating solution, and it is suitable for only necessary portions such as the surface of the metal portion 11 while reliably preventing plating on other portions. The high-gloss plating as the surface metal layer 13 is applied to the surface metal layer 13 so that the surface metal layer 13 can be used as a light reflecting portion. Further, since the resist layer 12 is left without being removed, the manufacturing waste can be reduced by the amount of the resist layer 12, and the remaining resist layer 12 can be replaced with a part of the sealing material 16. By making the exterior, the amount of the sealing material 16 used can be reduced. Furthermore, it is not necessary to consider the removal process when using the resist layer 12, and in addition to the property of preventing the liquid agent adhesion and the like other than the necessary portions as the resist layer 12, in addition to having the resistance to the plating solution, A material that is not suitable for the removal process can be used, and the degree of freedom in selecting the material forming the resist layer 12 can be expanded, leading to a reduction in cost.

なお、前記実施形態に係る半導体装置の製造においては、母型基板17上に金属部11とレジスト層12を配設した半導体装置用基板10を用いて半導体装置を製造するようにしているが、この他、金属部の所望位置への形成及び表面金属層となる以外のメッキ付着防止を図れるレジスト層が製造工程で除去されず残って装置外装の一部をなす半導体装置を製造するものであれば、母型基板を用いずに金属部やレジスト層を配設する製造方法を採用してもかまわない。   In the manufacture of the semiconductor device according to the embodiment, the semiconductor device is manufactured using the semiconductor device substrate 10 in which the metal portion 11 and the resist layer 12 are disposed on the mother substrate 17. In addition, a semiconductor device that forms a metal part at a desired position and a resist layer that can prevent plating adhesion other than to become a surface metal layer is not removed in the manufacturing process and forms a part of the device exterior. For example, a manufacturing method in which the metal part and the resist layer are disposed without using the mother substrate may be adopted.

また、前記実施形態に係る半導体装置用基板において、金属部11の表面への表面金属層13としての銀メッキに用いるメッキ液として、高シアン強アルカリの溶液を用いる構成としているが、これに限らず、近年提案されている、有機スルホン酸等の酸、銀の可溶性塩、及びスルフィド系化合物等を含有するメッキ液や、有機スルホン酸等の酸、銀の可溶性塩、及びチオクラウンエーテル化合物等を含有するメッキ液、アルカリ、銀の可溶性塩、亜硫酸のアルカリ塩、及びヒダントイン誘導体等を含有するメッキ液など、非シアン型のメッキ液を用いると共に、必要に応じメッキ液に対応した光沢剤を併用するなどして、GAM光沢度で1.0以上の高光沢性を示す銀メッキを表面金属層13として形成する構成とすることもできる。   In the substrate for a semiconductor device according to the above embodiment, a high cyan strong alkali solution is used as a plating solution used for silver plating as the surface metal layer 13 on the surface of the metal part 11. In addition, recently proposed plating solutions containing acids such as organic sulfonic acids, soluble salts of silver, and sulfide compounds, acids such as organic sulfonic acids, soluble salts of silver, and thiocrown ether compounds, etc. A non-cyan type plating solution such as a plating solution containing alkali, silver, a soluble salt of silver, an alkaline salt of sulfite, and a hydantoin derivative, and a brightener corresponding to the plating solution if necessary. For example, a silver plating exhibiting a high glossiness of 1.0 or more in GAM glossiness may be formed as the surface metal layer 13 by using it together.

また、前記実施形態に係る半導体装置用基板においては、金属部11の表面に表面金属層13として配線用のワイヤ15等との接合性に優れる金や銀等、また、光沢を付与しやすいアルミニウム等の金属を高光沢のメッキで形成する構成としているが、この他、金属部31を、金や銀、アルミニウム等の金属で高光沢の表面を得るように、前記実施形態の表面金属層13と同様の手法で、母型基板37上のレジスト層32に覆われていない露出部分に形成する構成(図9参照)とすることもでき、金属部31表面でも配線用ワイヤ35等との接合を確実にして接続の信頼性を高められると共に、高光沢性の金属部31表面で光を効率よく反射させることができる。   Further, in the substrate for a semiconductor device according to the above embodiment, gold, silver or the like excellent in bondability with the wire 15 for wiring as the surface metal layer 13 on the surface of the metal portion 11, or aluminum which easily gives gloss. In addition, the surface metal layer 13 of the above-described embodiment is used so that the metal portion 31 has a high gloss surface with a metal such as gold, silver, or aluminum. It is also possible to adopt a configuration (see FIG. 9) that is formed on an exposed portion of the base substrate 37 that is not covered with the resist layer 32 by the same technique as described above. And the reliability of the connection can be improved, and the light can be efficiently reflected on the surface of the highly glossy metal part 31.

1 半導体装置
10 半導体装置用基板
11、21、31 金属部
11a 半導体素子搭載部
11b 電極部
11c、23a 張出し部
11d 薄膜
12、22、32 レジスト層
13、23 表面金属層
14 半導体素子
14a 発光部
15、35 ワイヤ
16 封止材
17、27、37 母型基板
18 レジスト層
19 保護フィルム
50 マスクフィルム
DESCRIPTION OF SYMBOLS 1 Semiconductor device 10 Semiconductor device substrate 11, 21, 31 Metal part 11a Semiconductor element mounting part 11b Electrode part 11c, 23a Overhang part 11d Thin film 12, 22, 32 Resist layer 13, 23 Surface metal layer 14 Semiconductor element 14a Light emitting part 15 35 Wire 16 Sealing material 17, 27, 37 Master substrate 18 Resist layer 19 Protective film 50 Mask film

Claims (10)

半導体素子搭載部又は電極部となる金属部を有し、当該金属部表面にメッキにより表面金属層を形成され、金属部表面側への半導体素子搭載及び配線、封止材による封止がなされ、装置底部に前記金属部の裏面側が露出した状態とされる半導体装置において、
前記金属部の非配置部分に対応させて形成されるレジスト層を備え、
前記表面金属層が、表面の光沢度がGAM光沢度で1.0以上となる光沢メッキとして形成され、
前記レジスト層が、前記表面金属層のメッキで使用するメッキ液に対する耐溶解性を備えた絶縁性材で形成されてなり、前記封止材による封止に伴って封止材と密着一体化し、装置外装の一部となることを
特徴とする半導体装置。
It has a metal part to be a semiconductor element mounting part or an electrode part, a surface metal layer is formed by plating on the surface of the metal part, semiconductor element mounting and wiring on the metal part surface side, sealing with a sealing material is performed, In the semiconductor device in which the back side of the metal part is exposed at the bottom of the device,
Comprising a resist layer formed corresponding to the non-arranged part of the metal part,
The surface metal layer is formed as a gloss plating with a surface glossiness of 1.0 or more in terms of GAM glossiness,
The resist layer is formed of an insulating material having resistance to dissolution with respect to a plating solution used for plating of the surface metal layer, and is tightly integrated with the sealing material along with sealing with the sealing material, A semiconductor device characterized by being a part of the device exterior.
前記請求項1に記載の半導体装置において、
前記金属部が、前記レジスト層より厚く、且つ上端周縁に張出し部を有する形状として形成され、
前記張出し部が、封止材による封止に伴ってレジスト層と封止材で挟まれて固定されることを
特徴とする半導体装置。
The semiconductor device according to claim 1,
The metal part is formed as a shape that is thicker than the resist layer and has a protruding part at the upper edge.
The semiconductor device is characterized in that the overhanging portion is sandwiched and fixed between the resist layer and the sealing material along with sealing with the sealing material.
前記請求項1に記載の半導体装置において、
前記金属部が、前記レジスト層以下の厚さとして形成され、
前記表面金属層が、前記レジスト層表面を越える厚さを有し、且つ上端周縁に張出し部を有する形状として形成され、
前記張出し部が、封止材による封止に伴ってレジスト層と封止材で挟まれて固定されることを
特徴とする半導体装置。
The semiconductor device according to claim 1,
The metal part is formed as a thickness of the resist layer or less,
The surface metal layer has a thickness exceeding the surface of the resist layer, and is formed in a shape having an overhang at the upper edge;
The semiconductor device is characterized in that the overhanging portion is sandwiched and fixed between the resist layer and the sealing material along with sealing with the sealing material.
装置底部に半導体素子搭載部又は電極部となる金属部が露出する半導体装置の製造に用いられ、導電性を有する母型基板上に前記金属部及び当該金属部の非配置部分に対応するレジスト層がそれぞれ形成され、前記金属部表面にメッキにより表面金属層を形成されてなる半導体装置用基板において、
前記表面金属層が、表面の光沢度がGAM光沢度で1.0以上となる光沢メッキとして形成され、
前記レジスト層が、前記表面金属層のメッキで使用するメッキ液に対する耐溶解性を備えた絶縁性材で形成されてなることを
特徴とする半導体装置用基板。
Resist layer corresponding to the metal part and the non-arranged part of the metal part on a conductive base substrate used for manufacturing a semiconductor device in which a metal part serving as a semiconductor element mounting part or an electrode part is exposed at the bottom of the apparatus In the substrate for a semiconductor device in which a surface metal layer is formed by plating on the surface of the metal part,
The surface metal layer is formed as a gloss plating with a surface glossiness of 1.0 or more in terms of GAM glossiness,
The substrate for a semiconductor device, wherein the resist layer is made of an insulating material having resistance to dissolution with respect to a plating solution used for plating the surface metal layer.
導電性を有する母型基板上に、金属部の非配置部分に対応するレジスト層を形成した後、電鋳で前記金属部を形成し、さらに当該金属部表面にメッキにより表面金属層を形成して、金属部表面側への半導体素子搭載及び配線が可能な半導体装置用基板を得る半導体装置用基板の製造方法において、
前記表面金属層を、表面の光沢度がGAM光沢度で1.0以上となる光沢メッキで形成すると共に、
前記レジスト層を、前記表面金属層のメッキで使用するメッキ液に対する耐溶解性を備えた絶縁性材であらかじめ形成し、前記金属部及び表面金属層の形成後も除去せずに残すことを
特徴とする半導体装置用基板の製造方法。
After forming a resist layer corresponding to the non-arranged portion of the metal portion on the conductive base substrate, the metal portion is formed by electroforming, and a surface metal layer is formed by plating on the surface of the metal portion. In the method for manufacturing a semiconductor device substrate, a semiconductor device substrate capable of mounting and wiring a semiconductor element on the metal part surface side is obtained.
The surface metal layer is formed by gloss plating with a surface glossiness of GAM glossiness of 1.0 or more,
The resist layer is formed in advance with an insulating material having resistance to dissolution with respect to a plating solution used in plating of the surface metal layer, and is left without being removed after the formation of the metal portion and the surface metal layer. A method for manufacturing a semiconductor device substrate.
前記請求項5に記載の半導体装置用基板の製造方法において、
前記金属部を、前記レジスト層より厚く、且つ上端周縁に張出し部を有する形状として形成することを
特徴とする半導体装置用基板の製造方法。
In the manufacturing method of the board | substrate for semiconductor devices of the said Claim 5,
The method of manufacturing a substrate for a semiconductor device, wherein the metal portion is formed in a shape having a thickness that is thicker than the resist layer and has a protruding portion at an upper end periphery.
前記請求項5に記載の半導体装置用基板の製造方法において、
前記金属部を、前記レジスト層以下の厚さとして形成すると共に、
前記表面金属層を、前記レジスト層表面を越える厚さを有し、且つ上端周縁に張出し部を有する形状として形成することを
特徴とする半導体装置用基板の製造方法。
In the manufacturing method of the board | substrate for semiconductor devices of the said Claim 5,
While forming the metal part as a thickness below the resist layer,
The method for manufacturing a substrate for a semiconductor device, wherein the surface metal layer is formed in a shape having a thickness exceeding the surface of the resist layer and having an overhanging portion at an upper edge.
前記請求項5ないし7のいずれかに記載の半導体装置用基板の製造方法において、
前記表面金属層を、高シアン強アルカリのメッキ液を使用したメッキで形成し、
前記レジスト層を、強アルカリに対する耐溶解性を備えた材質で形成することを
特徴とする半導体装置用基板の製造方法。
In the manufacturing method of the substrate for semiconductor devices according to any one of claims 5 to 7,
The surface metal layer is formed by plating using a high cyan strong alkali plating solution,
A method for manufacturing a substrate for a semiconductor device, wherein the resist layer is formed of a material having resistance to dissolution against strong alkali.
前記請求項4に記載の半導体装置用基板、又は、前記請求項5ないし8のいずれかに記載の半導体装置用基板の製造方法で製造された半導体装置用基板、に対し、金属部上への半導体素子搭載及び配線、封止材による封止を行い、
前記レジスト層を、封止材による封止を経て封止材と密着一体化させた後で、前記金属部の裏面側を覆う母型基板を除去して、装置底部に前記金属部の裏面側が露出した状態を得ることを
特徴とする半導体装置の製造方法。
The semiconductor device substrate according to claim 4 or the semiconductor device substrate manufactured by the method for manufacturing a semiconductor device substrate according to any one of claims 5 to 8, onto the metal portion. Perform semiconductor device mounting and wiring, sealing with sealing material,
After the resist layer is tightly integrated with the sealing material through sealing with a sealing material, the base substrate covering the back side of the metal part is removed, and the back side of the metal part is placed on the bottom of the apparatus. A method for manufacturing a semiconductor device, characterized by obtaining an exposed state.
前記請求項9に記載の半導体装置の製造方法において、
前記母型基板を銅又は銅合金製とし、封止材による封止後、母型基板をエッチング液で溶解除去することを
特徴とする半導体装置の製造方法。
In the manufacturing method of the semiconductor device according to claim 9,
A method of manufacturing a semiconductor device, wherein the mother substrate is made of copper or a copper alloy, and the mother substrate is dissolved and removed with an etching solution after sealing with a sealing material.
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