JP2011044555A - Method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress deterioration in ferroelectric capacitor in a manufacturing step. <P>SOLUTION: A method of manufacturing a semiconductor device includes: forming a capacitor layer having a ferroelectric 120 containing Pb above a semiconductor substrate 100; forming a capacitor having the ferroelectric by processing the capacitor layer by RIE; and heat-treating the capacitor in an atmosphere including the Pb, oxygen, and lead single-substance oxide. Partial pressure of the lead single-substance oxide in the atmosphere during the heat treatment is higher than vapor pressure of the lead single-substance oxide produced with the Pb in the ferroelectric and is lower than vapor pressure of the lead single-substance oxide in the atmosphere. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device having a ferroelectric capacitor.

  As a nonvolatile memory, a ferroelectric memory (FeRAM: Ferroelectric Random Access Memory) using a ferroelectric thin film has been proposed. This FeRAM is obtained by replacing a capacitor portion of a DRAM (Dynamic Random Access Memory) with a ferroelectric.

  FeRAM has the following characteristics and is expected as a next-generation memory.

(1) The writing and erasing operations are fast, and the writing of 100 ns or less is possible as in a DRAM by downsizing the cell.

(2) It is a non-volatile memory and does not require a power supply unlike a static random access memory (SRAM).

(3) The number of rewritable times is large, and over 10 ¹² times of rewriting by devising ferroelectric materials (SBT (SrBi ₂ Ta ₂ O ₉ ), etc.) and electrode materials (IrO _x , RuO _x , SrRuO ₃ etc.) Is possible.

(4) In principle, high density and high integration can be achieved, and an integration degree equivalent to that of DRAM can be obtained.

(5) The internal write voltage can be reduced to about 2 V, and it operates with low power consumption.

(6) Bit rewriting by random access is possible.

In FeRAM, a ferroelectric thin film such as PZT (Pb (Zr _x Ti _1-x O ₃ )), BIT (Bi ₄ Ti ₃ O ₁₂ ), or SBT is used for a capacitor portion. Each material has a crystal structure based on a perovskite structure including an oxygen octahedron. Unlike the conventional Si oxide film, these materials cannot be used because they do not exhibit the characteristic ferroelectricity in the amorphous state. Therefore, a process for crystallization is required. As a process for crystallization, for example, there are a crystallization heat treatment at a high temperature and an in-situ crystallization process at a high temperature. This crystallization step depends on the material, but generally needs to be performed at a temperature of at least 400 ° C. to 700 ° C.

  On the other hand, various methods such as a laser ablation method, a vacuum deposition method, and an MBE (molecular beam epitaxy) method have been studied as a method for forming a ferroelectric thin film. However, there are MOCVD (metal organic chemical vapor deposition) method, sputtering method, and solution method (CSD: Chemical Solution Deposition).

  The characteristics of the ferroelectric capacitor will be described below by taking PZT, which is a typical ferroelectric material, as an example.

  A ferroelectric has spontaneous polarization. This spontaneous polarization has a feature that its direction is reversed by an electric field. Spontaneous polarization also has a polarization value (residual polarization) even when no electric field is applied. This polarization value (direction of polarization) depends on the state before the electric field is zero. That is, the ferroelectric can induce + and − charges on the crystal surface depending on the direction of the applied electric field, and this state corresponds to data “0” and “1” of the memory element, respectively. FeRAM can have the same 1T / 1C (1 transistor / 1 capacitor) structure as DRAM, but at present, a 2T / 2C structure is mainly employed in order to improve reliability.

  Further, as described above, the ferroelectric material used in FeRAM is mainly PZT (Pb thin film, SBT thin film. The former PZT has the following advantages.

(1) The crystallization temperature is about 600 ° C.

(2) The polarization value is large, and the residual polarization value is about ²⁰ μC / cm ² .

(3) Since the coercive electric field, which is the electric field value when the polarization becomes 0 in the hysteresis curve, is relatively small, the polarization can be reversed at a low voltage.

(4) Structural characteristics such as crystallization temperature, grain size, and grain shape, or ferroelectric characteristics such as polarization, coercive electric field, fatigue characteristics, and leakage current can be controlled by the Zr / Ti composition ratio.

(5) Pb called A site is an element such as Sr, Ba, Ca, La, etc., and Zr and Ti called B site are Nb, W, Mg, Co, Fe, Ni, depending on the tolerance of the elements of the perovskite structure. , Mn and the like can be substituted, which greatly affects the crystal structure, structural characteristics, and ferroelectric characteristics.

  PZT has been studied for thinning from an early stage. PZT is a material that was first put into practical use as FeRAM, with many examples of research using techniques such as sputtering and sol-gel.

  A disadvantage of PZT is a decrease in the amount of polarization (fatigue characteristics) that accompanies an increase in the number of writes. The fatigue of the PZT film is mainly caused by oxygen vacancies formed at the interface with the Pt electrode. One of the reasons for the generation of oxygen vacancies is the volatility and ease of diffusion of the Pb element. Since this Pb element becomes PbO when it volatilizes, oxygen deficiency is caused accordingly.

Since Pb is a part of the perovskite structure, when oxygen vacancies are formed, nearby cations and dipoles are formed, causing a decrease in switching charge. On the other hand, since the fatigue characteristics themselves are accelerated by an electric field, a reduction in operating voltage has been proposed. Specifically, fatigue characteristics are improved by using an oxide electrode such as IrO _x in place of the conventionally used Pt electrode.

  However, the FeRAM capacitor using the ferroelectric material described above has the characteristics that oxygen deficiency occurs during the subsequent RIE (Reactive Ion Etching) process even if the characteristics immediately after forming the capacitor film are good. There is a problem of deterioration. This processing damage occurs in the periphery of the capacitor. For this reason, fixed charges are generated in the peripheral portion of the capacitor, and electric field inversion is not performed. Therefore, as the capacitor area is reduced, the ratio of the damaged portion is increased, and the polarization amount and the signal amount are reduced. Thus, oxygen deficiency is an obstacle to high integration of ferroelectric capacitors.

  In order to recover this oxygen deficiency, it has been proposed to perform thermal annealing in oxygen after the RIE process. However, in this annealing, since oxygen is not active at a low temperature of about 300 ° C., an oxygen deficiency recovery effect cannot be obtained. Moreover, although oxygen deficiency can be recovered by raising the temperature to about 600 ° C., PbO evaporates because the vapor pressure of PbO in PZT is high. Thereby, Pb defect | deletion arises and ferroelectricity will be missing. At the same time, oxygen vacancies also occur, resulting in a decrease in signal amount.

  On the other hand, in Patent Documents 1 and 2, PbO is prevented from evaporating by covering PZT with a protective film after the RIE process and performing a heat treatment. However, since the heat treatment is performed through the protective film, recovery of oxygen vacancies in PZT is insufficient.

JP 2007-287804 A JP 2005-183843 A

  The present invention provides a method for manufacturing a semiconductor device capable of suppressing deterioration of a ferroelectric capacitor in a manufacturing process.

  According to a first aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: forming a capacitor layer having a ferroelectric containing Pb above a semiconductor substrate; processing the capacitor layer by RIE; A capacitor is formed, and the capacitor is heat-treated in an atmosphere containing Pb, oxygen, and lead simple oxide. During the heat treatment, the partial pressure of the lead simple oxide in the atmosphere is Pb in the ferroelectric body. Or higher than the vapor pressure of the lead simple substance oxide and less than the vapor pressure of the lead simple substance oxide in the atmosphere.

  According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a capacitor layer having a ferroelectric including Pb above a semiconductor substrate; and processing the capacitor layer to form a capacitor having the ferroelectric. The capacitor is heat-treated in an atmosphere of less than 400 ° C. and containing oxygen plasma.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the semiconductor device which can suppress deterioration of the ferroelectric capacitor in a manufacturing process can be provided.

Sectional drawing which shows the manufacturing process of the semiconductor device which concerns on the 1st Embodiment of this invention. Sectional drawing which shows a manufacturing process following FIG. Sectional drawing which shows a manufacturing process following FIG. Sectional drawing which shows a manufacturing process following FIG. Sectional drawing which shows a manufacturing process following FIG. Sectional drawing which shows a manufacturing process following FIG. Sectional drawing which shows a manufacturing process following FIG. Sectional drawing which shows a manufacturing process following FIG. Sectional drawing which shows a manufacturing process following FIG. Sectional drawing which shows a manufacturing process following FIG. Sectional drawing which shows a manufacturing process following FIG. The graph which shows the vapor pressure curve of PbO of the semiconductor device which concerns on the 1st Embodiment of this invention. Sectional drawing which shows the manufacturing process of the semiconductor device which concerns on the 2nd Embodiment of this invention, and shows the manufacturing process following FIG.

  Embodiments of the present invention will be described below with reference to the drawings. In the drawings, the same parts are denoted by the same reference numerals. In each embodiment, an example applied to a COP (Capacitor On Plug) type FeRAM cell using tungsten as a plug material located under a capacitor will be described.

<First Embodiment>
1 to 11 show a method for manufacturing a semiconductor device according to the first embodiment.

  First, as shown in FIG. 1, for example, a groove (not shown) for element isolation is formed in a P-type silicon substrate (semiconductor substrate) 100. This trench is formed in a region other than the active region of the transistor. Next, for example, a silicon oxide film is buried in the trench, and an STI (Sallow Trench Isolation) 101 serving as an element isolation region is formed.

Next, a transistor for performing a switching operation is formed as follows. First, an oxide film 102 having a thickness of about 6 nm is formed on the entire surface of the semiconductor substrate 100 by, for example, thermal oxidation. Next, an n + type polycrystalline silicon film 103 doped with, for example, arsenic is formed on the entire surface of the oxide film 102. Next, a WSi _x film 104 and a nitride film 105 are sequentially formed on the entire surface of the polycrystalline silicon film 103. Next, the nitride film 105, the WSi _x film 104, and the polycrystalline silicon film 103 are processed by a normal photolithography method and RIE to form a gate electrode. Next, a nitride film is deposited on the entire surface. Thereafter, the nitride film is processed by RIE, and a spacer portion 106 is provided on the side wall of the gate electrode. Next, although details of the process are omitted, source / drain regions 107 are formed on the surface of the semiconductor substrate 100 by impurity ion implantation and heat treatment to complete a transistor.

  Next, as shown in FIG. 2, after an oxide film 108 is deposited on the entire surface by the CVD method, it is planarized by the CMP method. Next, a contact hole 109 communicating with one source / drain region 107 of the transistor is formed in the oxide film 108. After a thin titanium film is deposited on the surface in the contact hole 109 by sputtering or CVD, a TiN film 110 is formed by performing heat treatment in a forming gas. Next, tungsten is deposited on the entire surface by a CVD method. Thereafter, tungsten is removed from the region outside the contact hole 109 by CMP, and tungsten is buried in the contact hole 109 to form the plug 111. Next, a nitride film 112 is deposited on the entire surface by CVD. Next, a contact hole 113 communicating with the other source / drain region 107 of the transistor is formed in the nitride film 112 and the oxide film 108. A TiN film 114 is formed on the surface in the contact hole 113. Thereafter, tungsten is buried in the contact hole 113 to form a plug 115 coupled to a capacitor to be described later.

Next, as shown in FIG. 3, a silicon carbide film 116 having a thickness of about 10 nm is deposited on the entire surface by, eg, sputtering. A Ti film 117 having a thickness of about 3 nm is deposited on the entire surface of the silicon carbide film 116 by, eg, sputtering. Next, an iridium film 118 having a thickness of 30 nm and a first platinum film 119 having a thickness of 20 nm are sequentially formed on the entire surface of the Ti film 117 by sputtering, for example. The iridium film 118 and the first platinum film 119 serve as a lower electrode of the capacitor. Next, a PZT film 120 serving as a capacitor dielectric film is formed on the entire surface of the first platinum film 119 by sputtering. Thereafter, rapid thermal annealing (RTA) is performed in an oxygen atmosphere, and the PZT film 120 is crystallized. Next, a second platinum film 121 serving as an upper electrode of the capacitor is formed on the entire surface of the PZT film 120 by sputtering. Next, a first protective film 122 made of Al ₂ O ₃ having a thickness of about 5 nm is formed on the entire surface of the second platinum film 121 by sputtering. An oxide film 123 serving as a processing mask material is formed on the entire surface of the first protective film 122 by a CVD method.

  Next, as shown in FIG. 4, the oxide film 123 is patterned by photolithography and RIE, and a photoresist (not shown) is removed. Thereafter, using the oxide film 123 as a mask, the first protective film 122, the second platinum film 121, and the PZT film 120 are sequentially etched by RIE.

  Next, heat treatment is performed in an atmosphere containing lead (Pb) and oxygen in order to supplement oxygen deficient in the PZT film 120. Details of this heat treatment step will be described later.

Next, as shown in FIG. 5, a second protective film 124 made of Al ₂ O ₃ is formed directly on the entire surface by, eg, ALD (Atomic Layer Deposition). At this time, the deposition temperature of the second protective film 124 is, for example, 200 ° C., and the film thickness is, for example, 100 ° C.

  Next, as shown in FIG. 6, an oxide film 127 is deposited on the entire surface by, for example, CVD as a processing mask material for the lower electrode. Next, a resist mask 128 is formed on the oxide film 127 in the region where the capacitor is to be formed.

  Next, as shown in FIG. 7, the oxide film 127 is patterned by photolithography using the resist mask 128 and RIE. Thereafter, using the oxide film 127 as a mask, the second protective film 124, the first platinum film 119, the iridium film 118, the titanium film 117, and the silicon carbide film 116 are sequentially patterned by RIE. In this way, a ferroelectric capacitor is completed.

Next, as shown in FIG. 8, a third protective film 129 made of Al ₂ O ₃ is formed on the entire surface by, eg, ALD. At this time, the deposition temperature of the third protective film 129 is, for example, 200 ° C., and the film thickness is, for example, 10 nm. An oxide film 130 having a thickness of about 50 nm is formed on the entire surface of the third protective film 129 by, eg, CVD. A fourth protective film 131 made of Al ₂ O ₃ is formed on the entire surface of the oxide film 130 by, eg, ALD. At this time, the deposition temperature of the third protective film 129 is, for example, 200 ° C., and the film thickness is, for example, 10 nm. Next, an oxide film 132 is deposited on the entire surface by, eg, CVD, and the capacitor is covered. Thereafter, the oxide film 132 is planarized by CMP, and the oxide film 132 is patterned by photolithography and RIE. As a result, a contact hole 133 communicating with the second electrode 121 and a contact hole 134 communicating with the tungsten 111 are simultaneously formed.

Next, as shown in FIG. 9, Al is buried in the contact holes 133 and 134 and planarized by CMP. As a result, plugs 133 ′ and 134 ′ are formed in the contact holes 133 and 134. Next, an oxide film 135 is formed on the entire surface. After the trench is formed in the oxide film 135, Al is buried in the trench, and the first upper wiring 136 connected to the plugs 133 ′ and 134 ′ is formed. Next, an interlayer insulating film 137 is deposited on the entire surface. A via hole (not shown) is formed in the interlayer insulating film 137 by lithography and RIE, and Al is buried in the via hole. Thereafter, Al is flattened and a via 138 is formed. Thereafter, an interlayer insulating film 139 is deposited on the entire surface, Al is embedded in the interlayer insulating film 139, and a second upper wiring 140 connected to the via 138 is formed. Next, an Al ₂ O ₃ film 141 having a thickness of about 10 nm is formed on the second upper wiring 140 by the ALD method in order to prevent damage due to a wiring layer formed later as an upper layer.

Next, as shown in FIG. 10, an interlayer insulating film 142 is formed on the entire surface, and via holes are formed in the interlayer insulating film 142. An Al ₂ O ₃ film 143 is formed on the surface in the via hole, Al is buried in the via hole, and a via 144 is formed. Next, an Al ₂ O ₃ film 145 and an interlayer insulating film 146 are sequentially deposited on the entire surface, and a groove is formed in the Al ₂ O ₃ film 145 and the interlayer insulating film 146. An Al ₂ O ₃ film 147 is formed on the surface in the groove, and a third upper wiring 148 connected to the via 144 is formed. Thereafter, although not shown in the drawing, upper wiring layers are sequentially formed to complete the FeRAM.

  Below, it explains in full detail about the heat processing process of the manufacturing method in this embodiment.

  FIG. 11 is a cross-sectional view of the FeRAM manufacturing process continued from FIG. As shown in FIG. 11, after the first protective film 122, the second platinum film 121, and the PZT film 120 are sequentially etched by RIE, heat treatment is performed in an atmosphere containing Pb and oxygen.

This heat treatment is performed, for example, under the following conditions. First, a solution a in which Pb (DPM) ₂ is dissolved in a butyl acetate solution so as to have a concentration of 0.1 μmol / L is prepared. Next, a solution a having a flow rate of 0.1 ml / min and oxygen having a flow rate of 10 SLM (Standard Liter per Minute) are simultaneously supplied into a furnace heated to 600 ° C. Further, N ₂ having a flow rate of 20 SLM is simultaneously supplied into the furnace as a carrier gas. At this time, the total pressure of the atmosphere in the furnace is set to 500 Pa. The atmosphere in the furnace contains lead simple oxide (for example, PbO), and the partial pressure of PbO in the atmosphere is set to 3 × 10 ⁻⁵ Pa or more and 2 × 10 ⁻³ Pa or less. Heat treatment is performed for 1 hour under these conditions.

When the inside of the furnace is heated to 500 ° C., similarly to the case of 600 ° C., the solution a, oxygen and N ₂ are simultaneously supplied into the furnace. At this time, the partial pressure of PbO in the atmosphere is set to 2 × 10 ⁻⁷ Pa or more and within 1 × 10 ⁻⁵ Pa by adjusting the total pressure of the atmosphere in the furnace and the flow rate of the solution a and oxygen. . Here, the flow rate is the same as that at 600 ° C., and the total pressure of the atmosphere in the furnace is 200 Pa. Heat treatment is performed for 1 hour under these conditions.

  In addition, the heat treatment process in the present embodiment is not limited to the above conditions. Hereinafter, the conditions in the heat treatment step will be described with reference to FIG.

FIG. 12 shows a vapor pressure curve of PbO (see Solid State Communications, Vol. 7, pp. 41-45, 1969, PbO VAPOR PRESSURE IN THE Pb (Ti1-xZrx) O3 SYSTEM). In FIG. 12, A shows the vapor pressure curve of PbO produced by Pb contained in PZT (when Pb (Zr _x Ti _1-x O ₃ ) is x = 0), and B is a general PbO simple substance. 2 shows a vapor pressure curve of PbO in (in this embodiment, a vapor pressure curve of PbO in an atmosphere containing PbO used for heat treatment). C represents a vapor pressure curve of PbO generated by Pb contained in PZT (when Pb (Zr _x Ti _1-x O ₃ ) is other than x = 0). These vapor pressure curves A, B and C are represented by the following equations (1), (2) and (3), respectively.

logp (Pa) =-(13970 / T) +11.45 (1)
logp (Pa) = − (13000 / T) +12.86 (2)
logp (Pa) =-(14286 / T) +12.29 (3)
As shown in FIG. 12, at the same temperature, the vapor pressure of PbO generated by Pb contained in PZT is smaller than the vapor pressure of PbO in the atmosphere.

  In order to replenish oxygen vacancies in the PZT film 120 and prevent evaporation of PbO from the PZT film 120, the partial pressure of PbO in the atmosphere in the furnace where the heat treatment is performed is the vapor pressure of PbO generated by Pb in the PZT film 120. It is necessary to be above. That is, by setting the partial pressure of PbO in the atmosphere in the heat treatment step to be equal to or higher than the vapor pressure of PbO generated by Pb in the PZT film 120, PbO generated by Pb in the PZT film 120 exists as a solid. Thereby, evaporation of PbO from the PZT film 120 can be prevented.

  However, if the partial pressure of PbO in the atmosphere in the furnace becomes too large, it will become larger than the vapor pressure of PbO in the atmosphere. When the partial pressure of PbO in the atmosphere becomes larger than the vapor pressure of PbO in the atmosphere, PbO deposition starts on the capacitor (PbO solidification), causing problems such as an increase in leakage current and subsequent processing abnormality. In order to avoid this, the partial pressure of PbO in the atmosphere needs to be equal to or lower than the vapor pressure of PbO in the atmosphere. That is, by setting the partial pressure of PbO in the atmosphere in the heat treatment step to be equal to or lower than the vapor pressure of PbO in the atmosphere, PbO in the atmosphere exists as a gas.

  For these reasons, the partial pressure of PbO in the atmosphere in the heat treatment step needs to be not less than the vapor pressure of PbO generated by Pb in the PZT film 120 and not more than the vapor pressure of PbO in the atmosphere. That is, in FIG. 12, it is only necessary to perform the heat treatment in the region above the vapor pressure curve A and under the region below the vapor pressure curve B.

As described above, in FIG. 12, C indicates the vapor pressure curve of PbO contained in PZT when PZT (Pb (Zr _x Ti _1-x O ₃ )) is other than x = 0. When PZT (Pb (Zr _x Ti _1-x O ₃ )) is other than x = 0, that is, when Zr is included, the same effect can be expected by setting the condition above the vapor pressure curve A. However, it is more desirable that the conditions are higher than the vapor pressure curve C.

  In addition, the temperature in the heat treatment step is set to about 500 ° C. to 700 ° C. in order to activate oxygen and not deteriorate the device characteristics.

  According to the first embodiment, in the FeRAM manufacturing process, after the PZT film 120 is etched, heat treatment is performed in an atmosphere containing Pb and oxygen. As a result, oxygen supplementation can be performed for oxygen vacancies in the PZT film 120 generated by the RIE or plasma CVD process. Furthermore, by performing heat treatment in an atmosphere containing not only oxygen but also Pb, Pb escape from the PZT film 120 can be suppressed. Therefore, it is possible to suppress the deterioration of the characteristics around the capacitor, and the ferroelectric capacitor can be miniaturized and highly integrated.

  In the present embodiment, the heat treatment is performed before forming the protective film 124 or the like on the PZT film 120, that is, immediately after the PZT film 120 is processed. As a result, oxygen replenishment can be performed directly on the exposed PZT film 120, so that efficient and sufficient recovery of oxygen deficiency can be achieved.

  On the other hand, if the partial pressure of PbO in the atmosphere in the heat treatment is small, the suppression of Pb escape becomes insufficient. Conversely, if the partial pressure of PbO becomes too large, the PbO in the atmosphere solidifies and deposits on the capacitor. The characteristics will deteriorate. For this reason, this problem can be avoided by controlling the partial pressure of PbO in the atmosphere to be equal to or higher than the vapor pressure of PbO generated by Pb in PZT and equal to or lower than the vapor pressure of PbO in the atmosphere.

<Second Embodiment>
In the first embodiment, oxygen supplementation is performed while preventing evaporation of PbO from PZT by performing heat treatment in an atmosphere containing Pb and oxygen after etching the PZT. In contrast, the second embodiment is an example in which heat treatment is performed in an atmosphere containing oxygen plasma after etching of PZT. In the present embodiment, description of the same points as in the first embodiment will be omitted, and different points will be described in detail.

  Below, the heat treatment process of the manufacturing method in the present embodiment will be described.

FIG. 13 is a cross-sectional view of the FeRAM manufacturing process continued from FIG. As shown in FIG. 13, the present embodiment is different from the first embodiment in that heat treatment is performed in an atmosphere containing oxygen plasma after PZT is etched. That is, after the first protective film 122, the second platinum film 121, and the PZT film 120 are sequentially etched by RIE, a heat treatment is performed in an atmosphere containing oxygen plasma, so that oxygen supplementation for oxygen vacancies in the PZT film 120 is performed. Can do. Thereafter, as shown in FIG. 5, a second protective film 124 made of Al ₂ O ₃ is formed on the entire surface by, eg, ALD.

  This heat treatment is performed, for example, under the following conditions. With the substrate temperature set to less than 400 ° C., oxygen with a flow rate of 100 sccm (standard cubic centimeters per minute) and Ar with a flow rate of 1000 sccm are supplied. At this time, the total pressure is maintained at 3 Pa or more. In this state, oxygen plasma is generated by introducing a microwave of 0.3 to 1 KW. Here, the use of a microwave having a wavelength smaller than that of RF has an effect of reducing plasma damage to the device. Radical oxygen is generated from this oxygen plasma, and oxygen is introduced from the side surface of the PZT film 120. Under these conditions, heat treatment is performed in the range of 10 to 100 seconds.

  In the present embodiment, oxygen in the atmosphere exists as oxygen ions. Therefore, by applying a positive bias to the semiconductor substrate 100 depending on the shape, oxygen ions that are negative ions can be drawn. Thereby, the oxygen replenishment of the taper part (side part) of the PZT film 120 can be strengthened. In this case, the applied bias is appropriately selected in the range of + 5V to + 100V.

  According to the second embodiment, in the FeRAM manufacturing process, after the PZT film 120 is etched, heat treatment is performed in an atmosphere containing oxygen plasma. By using oxygen plasma, oxygen reactivity becomes high, and oxygen replenishment can be performed on the PZT film 120 at a low temperature of less than 400 ° C. In this way, by performing at a low temperature of less than 400 ° C., evaporation of PbO from the PZT film 120 can be suppressed. Therefore, it is possible to suppress the deterioration of the characteristics around the capacitor, and the ferroelectric capacitor can be miniaturized and highly integrated.

  In the first and second embodiments, the material and forming method of each film are not limited to this.

  For example, it has been confirmed that iridium or iridium oxide is effective as a capacitor material. As conditions for forming the iridium electrode, for example, the film is formed by DC (direct current) sputtering using an iridium target with a power of 0.2 KW to 3 KW and a pressure of 0.5 Pa to 2 Pa for 60 seconds. Thereby, for example, an iridium electrode having a thickness of 100 nm is formed. As the conditions for forming the iridium oxide electrode, for example, the film is formed for 90 seconds by chemical sputtering using an iridium target with a power of 0.2 to 2 Kw and a pressure of 0.5 to 2 Pa. Thereby, for example, an iridium oxide electrode having a film thickness of 100 nm is formed.

In addition, as a method for forming the ferroelectric PZT, for example, a CVD method using Pb (DPM) ₂ , Ti (iOPr) ₂ (DPM) ₂ , Zr (DPM) ₄ or the like as a raw material is also effective. .

  In addition, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the invention when it is practiced. For example, the present invention can be applied not only to FeRAM but also to a DRAM having a high dielectric capacitor. Furthermore, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. For example, even if some constituent requirements are deleted from all the constituent requirements shown in the embodiment, the problem described in the column of the problem to be solved by the invention can be solved, and the effect described in the column of the effect of the invention Can be obtained as an invention.

  DESCRIPTION OF SYMBOLS 100 ... Semiconductor substrate, 118 ... Iridium film | membrane, 119 ... 1st platinum film | membrane, 120 ... PZT film | membrane, 121 ... 2nd platinum film | membrane, 122 ... 1st protective film.

Claims (7)

Forming a capacitor layer having a ferroelectric including Pb above the semiconductor substrate;
Processing the capacitor layer by RIE to form a capacitor having the ferroelectric;
Heat treating the capacitor in an atmosphere containing Pb, oxygen, and lead simple oxides;
During the heat treatment, the partial pressure of the lead simple oxide in the atmosphere is equal to or higher than the vapor pressure of the lead simple oxide generated by Pb in the ferroelectric body, and the vapor of the lead simple oxide in the atmosphere. The manufacturing method of the semiconductor device characterized by the above-mentioned. Exposing the ferroelectric when forming the capacitor;
The heat treatment is performed on the exposed ferroelectric;
The method of manufacturing a semiconductor device according to claim 1, wherein a protective film is formed directly on the capacitor after the heat treatment. During the heat treatment, the partial pressure of the lead simple oxide in the atmosphere is 3 × 10 ⁻⁵ Pa or more and 2 × 10 ⁻³ Pa or less at 600 ° C., and 2 × at 500 ° C. The method for manufacturing a semiconductor device according to claim 1, wherein the method is 10 ⁻⁷ Pa or more and 1 × 10 ⁻⁵ Pa or less. Forming a capacitor layer having a ferroelectric including Pb above the semiconductor substrate;
Processing the capacitor layer to form a capacitor having the ferroelectric;
Heat treating the capacitor in an atmosphere of less than 400 ° C. and containing oxygen plasma;
A method for manufacturing a semiconductor device.   The method of manufacturing a semiconductor device according to claim 4, wherein a protective film is formed on the capacitor after the heat treatment.   6. The method of manufacturing a semiconductor device according to claim 5, wherein the oxygen plasma is generated by microwaves.   The method of manufacturing a semiconductor device according to claim 4, wherein a positive bias is applied to the semiconductor substrate during the heat treatment.

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