JP2011023676A - Method of manufacturing printed wiring board - Google Patents

Method of manufacturing printed wiring board Download PDF

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JP2011023676A
JP2011023676A JP2009169707A JP2009169707A JP2011023676A JP 2011023676 A JP2011023676 A JP 2011023676A JP 2009169707 A JP2009169707 A JP 2009169707A JP 2009169707 A JP2009169707 A JP 2009169707A JP 2011023676 A JP2011023676 A JP 2011023676A
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masking tape
conductive paste
via hole
printed wiring
wiring board
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JP5287570B2 (en
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Yoshito Hotta
良人 堀田
Yoshina Miyazaki
芳奈 宮崎
Shuichiro Yasuda
周一郎 安田
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Dexerials Corp
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Sony Chemical and Information Device Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a printed wiring board excelling in workability, high in manufacturing efficiency, allowing via holes for executing inter-layer connection to be made adjacent to each other, and allowing a high-density wiring pattern. <P>SOLUTION: A masking tape 20 is stuck to a surface of copper foil 13 on one side of a board 12, and openings 24, 26 are formed on the masking tape 20 and the meta foil 13 on the surface with the masking tape 20 laminated thereon. Via holes 16 are formed on the board 12, desmear treatment is performed by irradiating the via holes 16 with plasma, and the masking tape 20 stuck on the side with the openings of the via holes 16 formed is irradiated with plasma. The masking tape 20 around the via holes 16 is etched up to a predetermined thickness. Conductive paste 18 is filled in the via holes 20, the masking tape 20 is peeled off, and the conductive paste 18 is thermally pressed to electrically connect circuit wires 13a, 14a formed by interposing the board 12 with each other. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

この発明は、複数の回路配線が絶縁層を挟んで積層され、各層の回路配線がビアホールの層間接続部を介して接続されるプリント配線板の製造方法に関する。   The present invention relates to a method of manufacturing a printed wiring board in which a plurality of circuit wirings are stacked with an insulating layer interposed therebetween, and the circuit wirings of each layer are connected via interlayer connection portions of via holes.

従来、多層プリント配線板において絶縁性の基板で絶縁された各回路配線を電気的に接続するため、内部に導電材が設けられたビアホールが絶縁性の基板を貫通して形成されている。この層間接続には、基板に形成されたビアホール内に、銅メッキや導電性ペーストを充填する方法が用いられている。特に、導電性ペーストを用いた層間接続構造は、製造時の環境負荷が小さく製造方法も簡易である点で優れている。   Conventionally, in order to electrically connect each circuit wiring insulated by an insulating substrate in a multilayer printed wiring board, a via hole having a conductive material provided therein is formed through the insulating substrate. For this interlayer connection, a method is used in which a via hole formed in the substrate is filled with copper plating or conductive paste. In particular, the interlayer connection structure using the conductive paste is excellent in that the environmental load during manufacturing is small and the manufacturing method is simple.

導電性ペーストを用いた層間接続方法は、図２に示すように、例えばポリイミド等の基板１の両面に銅箔２，３が貼付された両面銅張り板４の表面側の銅箔２に、ＰＥＴ等のマスキングテープ５を貼り付け（図２（ａ））、銅箔２の所定位置にＵＶレーザ光等を用いてビアホール６を形成する（図２（ｂ））。この後、ビアホール６内をデスミア処理する。そして、マスキングテープ５の表面に導電性ペースト８を載せ、導電性ペースト８をスキージ９によりマスキングテープ５の表面を摺動させ、ビアホール６内に導電性ペースト８を充填する（図２（ｃ））。この後、導電性ペースト８を仮硬化させる。そして、マスキングテープ５を剥がして（図２（ｄ））、ビアホール６内に導電性ペースト８が充填された基板１を所定温度で熱プレスし、導電性ペースト８による層間接続構造を形成する。この層間接続構造の形状は、導電性ペースト８の余分な分、即ちマスキングテープ５の厚み分だけ銅箔２の開口部から突出し、熱プレスによりリベット形状に広がり、ビアホール６の開口径よりも大きな直径の広がり部８ａを形成している（図２（ｅ））。   As shown in FIG. 2, the interlayer connection method using the conductive paste is, for example, on the copper foil 2 on the surface side of the double-sided copper-clad plate 4 in which the copper foils 2 and 3 are pasted on both sides of the substrate 1 such as polyimide. A masking tape 5 such as PET is affixed (FIG. 2A), and via holes 6 are formed at predetermined positions on the copper foil 2 using UV laser light or the like (FIG. 2B). Thereafter, the desmear process is performed in the via hole 6. Then, the conductive paste 8 is placed on the surface of the masking tape 5, and the conductive paste 8 is slid on the surface of the masking tape 5 with the squeegee 9 to fill the via hole 6 with the conductive paste 8 (FIG. 2C). ). Thereafter, the conductive paste 8 is temporarily cured. Then, the masking tape 5 is peeled off (FIG. 2D), and the substrate 1 filled with the conductive paste 8 in the via hole 6 is hot-pressed at a predetermined temperature to form an interlayer connection structure with the conductive paste 8. The shape of this interlayer connection structure protrudes from the opening of the copper foil 2 by the excess amount of the conductive paste 8, ie, the thickness of the masking tape 5, spreads into a rivet shape by hot pressing, and is larger than the opening diameter of the via hole 6 A widening portion 8a having a diameter is formed (FIG. 2 (e)).

ここで、デスミア処理には、特許文献１に開示されているように、プラズマによるドライエッチングや過マンガン塩素系のデスミア液によりウエットデスミア処理等がある。プラズマによるデスミア処理は、ビアホールを形成したフレキシブル基板等を真空装置内に入れて、プラズマを発生させ、ビアホールの加工残渣等を除去処理するものである。   Here, as disclosed in Patent Document 1, the desmear treatment includes dry etching using plasma, wet desmear treatment using a permanganese chlorine-based desmear solution, and the like. In the desmear process using plasma, a flexible substrate or the like in which a via hole is formed is placed in a vacuum apparatus, plasma is generated, and a processing residue and the like of the via hole are removed.

特開２００４−２５３６５２号公報Japanese Patent Laid-Open No. 2004-253652

上記従来のプリント配線板の製造方法では、マスキングテープ５を剥離した状態で導電性ペースト８はそのマスキングテープ５の厚さ分だけ基板１又は銅箔２から突出している。そして、この後、熱プレスにより導電性ペースト８は押しつぶされて硬化し、基板１から突出した部分は円形に広がってリベット形状に形成され、導電性ペースト８の広がり部８ａとなって、銅箔２と接続する。広がり部８ａの大きさは、マスキングフィルム５の厚さ分だけ余分に充填された導電性ペースト８が、円形に広がったものであり、多少の広がりは、電気的導通性能を向上させ、好ましい。しかし、広がり部８ａが広がりすぎると、図２（ｅ）に示すように、隣接したビアホール６の導電性ペースト８と接続してショートしてしまう場合があった。特に、近年の高密度配線においては、より効率的な配線が求められ、ビアホール間の間隔も狭くなってきている。   In the conventional method for producing a printed wiring board, the conductive paste 8 protrudes from the substrate 1 or the copper foil 2 by the thickness of the masking tape 5 with the masking tape 5 peeled off. Thereafter, the conductive paste 8 is crushed and hardened by hot pressing, and the portion protruding from the substrate 1 spreads in a circle and is formed into a rivet shape, forming a widened portion 8a of the conductive paste 8, and a copper foil. 2 is connected. The size of the expanded portion 8a is such that the conductive paste 8 filled in excess by the thickness of the masking film 5 expands in a circular shape, and a slight expansion is preferable because it improves the electrical conduction performance. However, if the widened portion 8a is excessively widened, as shown in FIG. 2E, the conductive paste 8 in the adjacent via hole 6 may be connected and short-circuited. In particular, in recent high-density wiring, more efficient wiring is required, and the interval between via holes is becoming narrower.

そこで、マスキングテープ５を薄くすれば、このような問題は解決されるが、薄いマスキングテープ５は供給量が少なく高価であり、薄いため剛性がなく、折れやシワが発生しやすく、貼り付け等のための取り扱いがきわめて難しいものである。取り扱い性を考えると、厚いマスキングテープ５の方が良いが、上述のようにマスキングテープ５の厚み分だけ余分な導電性ペースト８が存在し、ビアホール６の周囲に大きく広がると言う問題があり、この相反する問題がプリント配線板の高密度化と作業効率の向上の妨げにもなっていた。   Therefore, if the masking tape 5 is thinned, such a problem can be solved. However, the thin masking tape 5 has a small supply amount and is expensive, and since it is thin, it does not have rigidity and is likely to bend and wrinkle. Handling is extremely difficult. In consideration of handling, the thick masking tape 5 is better, but there is a problem that there is an excess conductive paste 8 corresponding to the thickness of the masking tape 5 as described above, and it spreads widely around the via hole 6. This conflicting problem has also hindered the increase in the density of printed wiring boards and the improvement of work efficiency.

この発明は、上記背景技術に鑑みて成されたもので、作業性が良く製造効率が高く、層間接続を行うビアホールの近接化を可能にし、高密度な配線パターンを可能にするプリント配線板の製造方法を提供することを目的とする。   The present invention has been made in view of the above-described background art, and is a printed wiring board that has good workability, high manufacturing efficiency, enables close proximity of via holes for interlayer connection, and enables high-density wiring patterns. An object is to provide a manufacturing method.

この発明は、基板表面に銅箔等の金属箔による回路配線が形成され、前記基板には導電性ペーストが充填されるビアホールを設けて、前記基板を挟んで形成された前記回路配線を電気的に接続するプリント配線板の製造方法であって、前記基板の一方の側の金属箔表面にマスキングテープを貼り付け、前記マスキングテープが積層された面に、前記マスキングテープ及び金属箔に開口部を形成するとともに、前記基板に前記ビアホールを形成し、この後、前記ビアホールにプラズマを照射してデスミア処理し、さらに、前記ビアホールの開口部が形成された側に貼付された前記マスキングテープに前記プラズマを照射して、少なくとも前記ビアホール周辺のマスキングテープを所定厚さまでエッチングし、この後、前記ビアホール内に導電性ペーストを充填し、前記マスキングテープを剥離して、前記導電性ペーストを熱プレスし、前記基板を挟んで形成される回路配線を電気的に接続可能にするプリント配線板の製造方法である。   In the present invention, a circuit wiring is formed by a metal foil such as a copper foil on the surface of the substrate, and a via hole filled with a conductive paste is provided on the substrate so that the circuit wiring formed with the substrate interposed therebetween is electrically connected. A method of manufacturing a printed wiring board to be connected to a mask, wherein a masking tape is attached to a surface of a metal foil on one side of the substrate, and an opening is formed in the masking tape and the metal foil on a surface on which the masking tape is laminated. And forming the via hole in the substrate, and then applying desmear treatment by irradiating the via hole with plasma, and further applying the plasma to the masking tape attached to the side where the opening of the via hole is formed. And at least the masking tape around the via hole is etched to a predetermined thickness, and then the conductive material is formed in the via hole. Filled with paste, and peeling off the masking tape, the conductive paste was heat-pressed, a manufacturing method of the printed wiring board to electrically connectable to the circuit wiring to be formed across the substrate.

前記マスキングテープの前記ビアホールの開口部周辺に照射するプラズマ照射時間は、前記デスミア処理時間よりも長いものである。さらに、エッチングされた前記マスキングテープの厚さは、前記導電性ペーストの前記熱プレスにより前記金属箔上に形成される広がり部が、隣接するビアホールの導電性ペーストの広がり部と接触しない大きさに形成される厚さである。前記ビアホールに設けられた前記導電性ペーストは、前記熱プレスによりリベット形状に形成されるものである。   The plasma irradiation time applied to the periphery of the opening of the via hole of the masking tape is longer than the desmear processing time. Further, the thickness of the etched masking tape is set such that the expanded portion formed on the metal foil by the hot pressing of the conductive paste does not contact the expanded portion of the conductive paste in the adjacent via hole. The thickness to be formed. The conductive paste provided in the via hole is formed into a rivet shape by the hot pressing.

また、前記マスキングテープは、例えば１０μｍ以下にエッチングするものである。前記基板は例えばポリイミドであっても良く、両面に銅箔が貼られた両面銅貼り板から成るものである。   Moreover, the said masking tape etches to 10 micrometers or less, for example. The substrate may be polyimide, for example, and is composed of a double-sided copper-clad plate with copper foils affixed on both sides.

この発明のプリント配線板の製造方法によれば、比較的厚く剛性のあるマスキングテープを基板に貼り付けることができ、マスキングテープの取り扱いが容易であり、製造工程での歩留まりがよい。また、マスキングテープをプラズマによりエッチングして薄くした後、ビアホールに導電性ペーストを充填するので、余分な導電性ペーストがビアホールからはみ出して大きく広がることがなく、最小限の導電性ペーストにより層間接続を図ることができる。   According to the printed wiring board manufacturing method of the present invention, a relatively thick and rigid masking tape can be affixed to the substrate, the masking tape can be easily handled, and the yield in the manufacturing process is good. In addition, since the masking tape is thinned by etching with plasma, the via hole is filled with the conductive paste, so that the excess conductive paste does not protrude from the via hole and spread widely, and the interlayer connection can be made with the minimum conductive paste. Can be planned.

この発明の一実施形態のプリント配線板の製造工程を示した概略断面図である。It is the schematic sectional drawing which showed the manufacturing process of the printed wiring board of one Embodiment of this invention. 従来のプリント配線板の製造工程を示した概略断面図である。It is the schematic sectional drawing which showed the manufacturing process of the conventional printed wiring board.

以下、この発明のプリント配線板の一実施形態について、図１を基にして説明する。この実施形態のプリント配線板１０は、基板１２の両面に、金属箔である銅箔１３，１４から成る回路配線１３ａ，１４ａが形成されている。基板１２は、ポリイミド等の絶縁性の基板から成り、その両面に銅箔１３，１４が貼り付けたものである。基板１２の表裏面の銅箔１３，１４は、後述する工程を経て、所定の回路パターンに形成され、回路配線１３ａ，１４ａを構成している。   Hereinafter, an embodiment of a printed wiring board according to the present invention will be described with reference to FIG. In the printed wiring board 10 of this embodiment, circuit wirings 13 a and 14 a made of copper foils 13 and 14 that are metal foils are formed on both surfaces of a substrate 12. The board | substrate 12 consists of insulating board | substrates, such as a polyimide, and the copper foils 13 and 14 are affixed on both surfaces. The copper foils 13 and 14 on the front and back surfaces of the substrate 12 are formed in a predetermined circuit pattern through steps described later, and constitute circuit wirings 13a and 14a.

基板１２には、表裏の回路配線１３ａ，１４ａ間を電気的に接続するためのビアホール１６が形成され、導電性ペースト１８による層間接続部材により、表裏の回路配線１３ａ，１４ａが接続されている。   Via holes 16 for electrically connecting the front and back circuit wirings 13 a and 14 a are formed in the substrate 12, and the front and back circuit wirings 13 a and 14 a are connected by an interlayer connection member made of a conductive paste 18.

ここで、充填する導電性ペースト１８は、熱可塑性樹脂中に高融点金属と低融点金属の金属粒子が混合され、後の加熱処理で合金化するものである。例えば、高融点金属は、少なくとも銅を含み、銅単体の粒子、又は銅と金、銀、亜鉛、及びニッケルの内１つ以上の金属とを含む合金の粒子である。また、これら金属粒子の表面は、金、銀、亜鉛、又はニッケル、又はそれらの合金がメッキ等により被覆されていてもよい。これらの金属粒子の平均粒径は、約１〜１０μｍ例えば６μｍである。また、低融点金属は、Ｓｎ、又はＳｎを含む合金（例えば、ハンダ）の粒子である。ハンダとしては、Ｓｎ−Ｃｕ系ハンダ、Ｓｎ−Ａｇ系ハンダ、Ｓｎ−Ａｇ−Ｃｕ系ハンダ、これらにＩｎ、Ｚｎ、Ｂｉのいずれか一つ以上を添加し、さらに適宜混合して用いても良い。導電性ペースト１８のバインダ樹脂は、熱可塑性樹脂であり、例えば、ポリエステル、ポリオレフィン、ポリアミド、ポリアミドイミド、ポリエーテルイミド、ポリフェニレンエーテル、ポリフェニレンスルフィド、ポリビニルブチラールなどの樹脂、その他、エポキシ樹脂、アクリル樹脂等を好適に用いることが出来る。   Here, the conductive paste 18 to be filled is obtained by mixing metal particles of a high melting point metal and a low melting point metal in a thermoplastic resin and alloying it by a subsequent heat treatment. For example, the refractory metal includes at least copper, and is a particle of copper alone or an alloy particle including copper and one or more metals of gold, silver, zinc, and nickel. The surfaces of these metal particles may be coated with gold, silver, zinc, nickel, or an alloy thereof by plating or the like. The average particle diameter of these metal particles is about 1 to 10 μm, for example 6 μm. The low melting point metal is Sn or an alloy (for example, solder) particles containing Sn. As the solder, Sn-Cu solder, Sn-Ag solder, Sn-Ag-Cu solder, any one or more of In, Zn, and Bi may be added to these solders, and further mixed as appropriate. . The binder resin of the conductive paste 18 is a thermoplastic resin, for example, a resin such as polyester, polyolefin, polyamide, polyamideimide, polyetherimide, polyphenylene ether, polyphenylene sulfide, polyvinyl butyral, and the like, epoxy resin, acrylic resin, and the like. Can be suitably used.

次に、この実施形態のプリント配線板１０製造方法について、図１を基にして説明する。先ず、図１（ａ）に示すように、ポリイミド等の絶縁性樹脂のフィルムを基板とした両面銅張り板２２の、銅箔１３が形成された一側面側にマスキングテープ２０を貼り付ける。マスキングテープ２０は、ＰＥＴフィルムに粘着剤が塗布されたものである。マスクキングテープ２０のラミネート方法としては、例えば真空ラミネート法がある。マスキングテープ２０は、回路が未形成の銅箔１３に直接貼り付けられるので、表面が均一で凹凸や段差がなく、容易に良好に貼り付け可能である。   Next, the manufacturing method of the printed wiring board 10 of this embodiment is demonstrated based on FIG. First, as shown in FIG. 1A, a masking tape 20 is affixed to one side surface of a double-sided copper-clad plate 22 on which a copper foil 13 is formed, using an insulating resin film such as polyimide as a substrate. The masking tape 20 is obtained by applying an adhesive to a PET film. As a method for laminating the masking tape 20, for example, there is a vacuum laminating method. Since the masking tape 20 is directly affixed to the copper foil 13 with no circuit formed thereon, it can be easily and satisfactorily affixed with a uniform surface and no irregularities or steps.

次に、両面銅張り板２２に、マスキングテープ２０側からレーザ光を照射し、マスキングテープ２０に開口部２４を形成するとともに、同時に銅箔１３にも開口部２６を形成する。さらに、基板１２にビアホール１６を形成する（図１（ｂ））。このレーザ加工は、カッパーダイレクト法と言われる、公知の方法でありエキシマレーザ等のＵＶレーザや、ＣＯ２レーザやＹＡＧレーザ等も用いる。なお、レーザ光による開口部の形成は、銅箔１３と基板１２に別々にレーザ光を照射して開口部を形成しても良い。 Next, the double-sided copper-clad plate 22 is irradiated with laser light from the masking tape 20 side to form an opening 24 in the masking tape 20 and simultaneously form an opening 26 in the copper foil 13. Further, a via hole 16 is formed in the substrate 12 (FIG. 1B). This laser processing is a known method called a copper direct method, and uses a UV laser such as an excimer laser, a CO 2 laser, a YAG laser, or the like. Note that the opening may be formed by irradiating the copper foil 13 and the substrate 12 with laser light separately.

この後、ビアホール１６内をデスミア処理する。デスミア処理は、ビアホール１６を形成した基板１２を真空装置内に入れて、プラズマを発生させ、ビアホール１６内の加工残渣等を除去処理するものである。さらに、マスキングテープ２０の開口部２０ａが形成された側に、プラズマを照射して、基板１２の貼付されたマスキングテープ２０全体、又は少なくともビアホール１６周辺のマスキングテープ２０を、所定厚さまでプラズマによりドライエッチングする。このプラズマによるエッチングは、例えば３分間で１μｍ程度の速さで進行するもので、プラズマの暴露時間を制御することにより、ミクロン単位でマスキングテープ２０の厚さを制御することができる。例えば、ビアホール１６の周辺のマスキングテープ２０の厚みを、当初の１４μｍから１０μｍに薄くする（図１（ｃ））。   Thereafter, desmear processing is performed in the via hole 16. In the desmear process, the substrate 12 on which the via hole 16 is formed is placed in a vacuum apparatus, plasma is generated, and processing residues and the like in the via hole 16 are removed. Further, the side of the masking tape 20 where the opening 20a is formed is irradiated with plasma, and the entire masking tape 20 to which the substrate 12 is adhered, or at least the masking tape 20 around the via hole 16 is dried to a predetermined thickness by plasma. Etch. This etching by plasma proceeds at a speed of about 1 μm in 3 minutes, for example, and the thickness of the masking tape 20 can be controlled in units of microns by controlling the plasma exposure time. For example, the thickness of the masking tape 20 around the via hole 16 is reduced from the initial 14 μm to 10 μm (FIG. 1C).

この後、図１（ｄ）に示すように、導電性ペースト１８をビアホール１６内に充填する。充填方法は、マスキングテープ２０の表面に導電性ペースト１８を載せて、スキージ１９により導電性ペースト１８を摺動させ、ビアホール６内に導電性ペースト１８を直接に充填する。その他、スクリーン印刷、インクジェット印刷等の印刷方法が使用できる。   Thereafter, as shown in FIG. 1D, a conductive paste 18 is filled in the via hole 16. In the filling method, the conductive paste 18 is placed on the surface of the masking tape 20, the conductive paste 18 is slid by the squeegee 19, and the conductive paste 18 is directly filled in the via hole 6. In addition, printing methods such as screen printing and inkjet printing can be used.

次に、図１（ｅ）に示すように、マスキングテープ２０を剥離し、両面銅張り板２２を熱プレスして導電性ペースト１８を溶融・硬化させて、導電性ペースト１８による層間接続構造を形成し、銅箔１３，１４間の電気的接続を図る（図１（ｆ））。この実施形態では、マスキングテープ２０を剥離した状態で導電性ペースト１８は、薄くしたマスキングテープ２０の厚さ分だけ銅箔１３の開口部２６から突出している。従って、熱プレスにより導電性ペースト１８は広がり部１８ａを有してリベット形状に押しつぶされるが、導電性ペースト１８の広がり部１８ａの直径は小さいものであり、隣接するビアホールの導電性ペーストの広がり部と接触しない大きさである。従って、エッチングされたマスキングテープ２０の厚さは、導電性ペースト１８の熱プレスにより形成される広がり部１８ａが、隣接するビアホールの導電性ペーストの広がり部と接触しない大きさである。   Next, as shown in FIG. 1 (e), the masking tape 20 is peeled off, the double-sided copper-clad plate 22 is hot-pressed to melt and cure the conductive paste 18, and an interlayer connection structure using the conductive paste 18 is formed. Then, electrical connection is made between the copper foils 13 and 14 (FIG. 1 (f)). In this embodiment, the conductive paste 18 protrudes from the opening 26 of the copper foil 13 by the thickness of the thinned masking tape 20 with the masking tape 20 peeled off. Therefore, although the conductive paste 18 is crushed into a rivet shape by the hot press with the expanded portion 18a, the expanded portion 18a of the conductive paste 18 has a small diameter, and the expanded portion of the conductive paste in the adjacent via hole. It is the size which does not touch. Therefore, the thickness of the etched masking tape 20 is such that the expanded portion 18a formed by hot pressing the conductive paste 18 does not contact the expanded portion of the conductive paste in the adjacent via hole.

その後、回路配線１３ａ，１４ａを形成する表裏面の銅箔１３，１４に、エッチングレジストのドライフィルムを貼り付け、所定の回路パターンに露光してエッチングし、図１（ｆ）に示すように、回路配線１３ａ，１４ａを形成する。以上の工程を経て、両面銅張り板２２の両面の回路配線１３ａ，１４ａが層間接続されたプリント配線板１０が形成される。   Thereafter, a dry film of an etching resist is pasted on the copper foils 13 and 14 on the front and back surfaces forming the circuit wirings 13a and 14a, exposed to a predetermined circuit pattern and etched, as shown in FIG. Circuit wirings 13a and 14a are formed. Through the above steps, the printed wiring board 10 in which the circuit wirings 13a and 14a on both sides of the double-sided copper-clad board 22 are interlayer-connected is formed.

この実施形態のプリント配線板１０によれば、導電性ペースト１８による層間接続部材の、ビアホール１６の周縁での広がりを最小限に抑えることができ、ビアホール１６間のピッチを小さくして、回路配線の高密度化を図ることができる。また、マスキングテープ２０の貼付時には、厚めのマスキングテープ２０を用いることができ、取り扱い性が良く、製造工程の歩留まりがよい。   According to the printed wiring board 10 of this embodiment, the spread of the interlayer connection member due to the conductive paste 18 at the periphery of the via hole 16 can be minimized, the pitch between the via holes 16 can be reduced, and the circuit wiring can be reduced. The density can be increased. Further, when the masking tape 20 is applied, a thicker masking tape 20 can be used, and the handleability is good and the yield of the manufacturing process is good.

なお、この発明のプリント配線板の製造方法は、上記実施形態に限定されるものではなく、導電性ペーストやマスキングテープ、基板等の材料は適宜設定可能なものである。   In addition, the manufacturing method of the printed wiring board of this invention is not limited to the said embodiment, Materials, such as an electrically conductive paste, a masking tape, a board | substrate, can be set suitably.

１０ プリント配線板
１２ 基板
１３，１４ 銅箔
１３ａ，１４ａ 回路配線
１６ビアホール
１８ 導電性ペースト
１８ａ 広がり部
２０ マスキングテープ
２２ 両面銅張り板
２４，２６ 開口部 DESCRIPTION OF SYMBOLS 10 Printed wiring board 12 Board | substrates 13 and 14 Copper foil 13a, 14a Circuit wiring 16 Via hole 18 Conductive paste 18a Spreading part 20 Masking tape 22 Double-sided copper-clad board 24, 26 Opening part

Claims (5)

基板表面に金属箔による回路配線が形成され、前記基板には導電性ペーストが充填されるビアホールを設けて、前記基板を挟んで形成された前記回路配線を電気的に接続するプリント配線板の製造方法において、
前記基板の一方の側の金属箔表面にマスキングテープを貼り付け、前記マスキングテープが積層された面に、前記マスキングテープ及び金属箔に開口部を形成するとともに、前記基板に前記ビアホールを形成し、この後、前記ビアホールにプラズマを照射してデスミア処理し、さらに、前記ビアホールの開口部が形成された側に貼付された前記マスキングテープに前記プラズマを照射して、少なくとも前記ビアホール周辺のマスキングテープを所定厚さまでエッチングし、この後、前記ビアホール内に導電性ペーストを充填し、前記マスキングテープを剥離して、前記導電性ペーストを熱プレスし、前記基板を挟んで形成される回路配線を電気的に接続することを特徴とするプリント配線板の製造方法。 Manufacturing a printed wiring board in which circuit wiring is formed by a metal foil on the surface of the substrate, and via holes filled with conductive paste are provided in the substrate to electrically connect the circuit wiring formed with the substrate interposed therebetween. In the method
Attaching a masking tape to the metal foil surface on one side of the substrate, forming an opening in the masking tape and the metal foil on the surface on which the masking tape is laminated, and forming the via hole in the substrate, Thereafter, the via hole is irradiated with plasma to be desmeared, and further, the plasma is applied to the masking tape attached to the side where the opening of the via hole is formed, so that at least a masking tape around the via hole is formed. After etching to a predetermined thickness, the via hole is filled with a conductive paste, the masking tape is peeled off, the conductive paste is hot pressed, and the circuit wiring formed across the substrate is electrically connected A method for manufacturing a printed wiring board, comprising: connecting to a printed wiring board. 前記マスキングテープの前記ビアホールの開口部周辺に照射するプラズマ照射時間は、前記デスミア処理時間よりも長いものである請求項１記載のプリント配線板の製造方法。   The method for manufacturing a printed wiring board according to claim 1, wherein a plasma irradiation time applied to the periphery of the opening of the via hole of the masking tape is longer than the desmear processing time. エッチングされた前記マスキングテープの厚さは、前記導電性ペーストの前記熱プレスにより前記金属箔上に形成される広がり部が、隣接するビアホールの導電性ペーストの広がり部と接触しない大きさに形成される厚さである請求項１記載のプリント配線板の製造方法。   The thickness of the etched masking tape is formed such that the expanded portion formed on the metal foil by the hot pressing of the conductive paste does not contact the expanded portion of the conductive paste in the adjacent via hole. The method for manufacturing a printed wiring board according to claim 1, wherein the printed wiring board is thick. 前記ビアホールに設けられた前記導電性ペーストは、前記熱プレスによりリベット形状に形成される請求項３記載のプリント配線板の製造方法。   The printed wiring board manufacturing method according to claim 3, wherein the conductive paste provided in the via hole is formed into a rivet shape by the hot pressing. 前記基板はポリイミドであり、両面に銅箔が貼られた両面銅貼り板から成る請求項１記載のプリント配線板の製造方法。
The method for manufacturing a printed wiring board according to claim 1, wherein the substrate is made of polyimide and comprises a double-sided copper-clad board having copper foils affixed on both sides.
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CN113543493A (en) * 2021-07-12 2021-10-22 上海嘉捷通电路科技股份有限公司 Preparation method of Z-direction interconnection printed circuit board
JP7048877B2 (en) 2017-09-22 2022-04-06 日亜化学工業株式会社 Manufacturing method of multilayer board and manufacturing method of component mounting board

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JP2001160669A (en) * 1999-12-02 2001-06-12 Ibiden Co Ltd Printed board with conductive bump and manufacturing method of printed board
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JP2007281336A (en) * 2006-04-11 2007-10-25 Fujikura Ltd Method of manufacturing double sided printed wiring board and multilayer printed wiring board
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JP2001160669A (en) * 1999-12-02 2001-06-12 Ibiden Co Ltd Printed board with conductive bump and manufacturing method of printed board
JP2004158651A (en) * 2002-11-06 2004-06-03 Murata Mfg Co Ltd Manufacturing method of resin substrate, resin multilayer substrate, and resin substrate
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Publication number Priority date Publication date Assignee Title
JP7048877B2 (en) 2017-09-22 2022-04-06 日亜化学工業株式会社 Manufacturing method of multilayer board and manufacturing method of component mounting board
CN113543493A (en) * 2021-07-12 2021-10-22 上海嘉捷通电路科技股份有限公司 Preparation method of Z-direction interconnection printed circuit board

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