JP2010282980A - Electro-optical device and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide: an electro-optical device capable of suppressing permeation of oxygen, moisture or the like from a base body side where a circuit part for driving a light-emitting element is formed; a method of manufacturing an electro-optical device; and an electronic equipment. <P>SOLUTION: The electro-optical device 1 is provided, on a base body 200, with: a plurality of first electrodes 23; bank structures 25, 221 having a plurality of openings 221a corresponding to formation positions of the first electrodes; an electro-optical layer 60 arranged for each opening 221a; a second electrode 50 covering the bank structures, 25, 221 and the electro-optical layers 60; and a sealing layer 30 or a sealing member 40 covering the second electrode 50. The bank structures 25, 221 are formed of inorganic insulating layers 25 and organic bank layers 221 arranged on the inorganic insulating layers 25, the inorganic layers to be in contact with either the sealing layer 30 or the sealing member 40 at an outer peripheral part of the base body 200. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an electro-optical device, a manufacturing method thereof, and an electronic apparatus including the electro-optical device.

In the field of electro-optical devices, improvement in durability against oxygen, moisture, and the like is a problem. For example, in an organic electroluminescence (hereinafter abbreviated as “organic EL”) display device which is an example of the electro-optical device, an electro-optical material (organic EL material, hole injection injection material, Non-light-emitting region called dark spot occurs due to deterioration of electron injection material, etc.) due to oxygen, moisture, etc., or decrease in conductivity due to oxygen, moisture, etc. of the cathode, and the lifetime of the light-emitting element is shortened There is.
In order to solve such problems, a method (can sealing) has been adopted in which a glass or metal lid is attached to a substrate of a display device to seal moisture or the like. In recent years, inorganic compound thin films (sealing films) such as silicon nitride, silicon oxide, and ceramics, which are transparent and have excellent gas barrier properties, are formed on the light emitting elements in order to cope with the increase in size and thickness of display devices. A technique called thin film sealing for forming a film by a high density plasma film forming method (for example, ion plating, ECR plasma sputtering, ECR plasma CVD, surface wave plasma CVD, ICP-CVD, or the like) is used.

JP 2002-231443 A

By the above-described can sealing or thin film sealing, the light emitting element is prevented from coming into contact with oxygen, moisture, or the like, and deterioration of the light emitting element is prevented.
However, since a layer formed of an organic resin material exists on a substrate that is in contact with a glass or metal lid or a thin film, that is, a base on which a circuit portion for driving a light emitting element is formed, in the long term, oxygen And moisture will permeate through this layer. For this reason, there exists a problem that a light emitting element deteriorates gradually and cannot maintain vivid light emission for a long time.

  The present invention has been made in view of the circumstances described above, and is an electric device that can suppress the transmission of oxygen, moisture, and the like from the substrate side on which a circuit unit for driving the light emitting element is formed, and can prevent deterioration of the light emitting element. An object is to provide an optical device, a method for manufacturing an electro-optical device, and an electronic apparatus.

The electro-optical device, the electro-optical device manufacturing method, and the electronic apparatus according to the present invention employ the following means in order to solve the above problems.
According to a first aspect of the present invention, a plurality of first electrodes, a bank structure having a plurality of openings corresponding to positions where the first electrodes are formed on the substrate, an electro-optic layer disposed in each of the openings, In an electro-optical device having a second electrode that covers a bank structure and an electro-optical layer, and a sealing layer or a sealing member that covers the second electrode, the bank structure is disposed on the inorganic insulating layer and the inorganic insulating layer And an inorganic insulating layer is formed so as to be in contact with the sealing layer or the sealing member at the outer peripheral portion of the substrate. According to this invention, since the sealing layer or the sealing member and the inorganic insulating layer that partitions the first electrode and the electro-optical layer are in contact with each other at the outer peripheral portion of the base, the base is transmitted through the first electrode and the inorganic insulating layer. Oxygen, moisture, etc. are blocked. Thereby, deterioration of the light emitting element can be prevented.

  In addition, on a substrate having a plurality of inorganic insulating layers, a plurality of first electrodes, a bank structure having a plurality of openings corresponding to the positions where the first electrodes are formed, and an electro-optic disposed in each of the openings In an electro-optical device having a layer, a second electrode that covers the bank structure and the electro-optical layer, and a sealing layer or a sealing member that covers the second electrode, the sealing layer or the sealing member is an outer peripheral portion of the substrate. In FIG. 2, the layer is formed so as to be in contact with any one of the plurality of inorganic insulating layers. According to this invention, since the inorganic insulating layer formed on the outer peripheral portion of the substrate is in contact with the sealing layer or the sealing member, the organic bank layer and the electro-optical layer are not exposed, and moisture and oxygen in the external environment are removed. Cut off. Thereby, deterioration of the light emitting element can be prevented.

Further, in the case where the plurality of inorganic insulating layers are any of the layers formed in the order of the base protective layer, the gate insulating layer, the first interlayer insulating layer, and the second interlayer insulating layer on the base, they are formed on the base. By forming any one of the plurality of layers with an inorganic material such as a silicon compound having a high gas barrier property, it is possible to easily prevent oxygen, moisture, and the like from permeating into the substrate, and to prevent deterioration of the light emitting element. be able to.
Further, in the case where an organic flattening layer is formed on the first interlayer insulating layer or the second interlayer insulating layer to flatten the circuit forming surface formed on the substrate, the organic flat layer includes the first electrode, Since the inorganic insulating layer that partitions the first electrode is flattened, the sealing property by the first electrode and the inorganic insulating layer can be improved, and the formation accuracy of the electro-optic layer can be further improved.
The inorganic insulating layer is in contact with any one of the base protective layer, the gate insulating layer, the first interlayer insulating layer, and the second interlayer insulating layer in a region outside the display region made of the electro-optic layer. In this case, oxygen, moisture, etc. transmitted through the substrate are blocked by any of the inorganic insulating layer, the base protective layer, the gate insulating layer, the first interlayer insulating layer, and the second interlayer insulating layer. Thereby, deterioration of the light emitting element can be prevented.
Further, in the case of including an organic flat layer for flattening a recess formed on a contact hole connecting the first electrode and the circuit portion, the bank structure and the second electrode covering the bank structure and the sealing layer are applied. Since stress can be relieved, sealing performance can be improved.

  According to a second aspect of the invention, a plurality of first electrodes, a bank structure having a plurality of openings corresponding to positions where the first electrodes are formed on the substrate, an electro-optic layer disposed in each of the openings, In a method of manufacturing an electro-optical device having a second electrode that covers a bank structure and an electro-optical layer, and a sealing layer or a sealing member that covers the second electrode, the inorganic insulating layer that partitions the first electrode is formed on the substrate. Forming a bank structure by forming an organic bank layer on the inorganic insulating layer and forming a bank structure on the inorganic insulating layer; and forming a sealing layer or a sealing member in contact with the inorganic insulating layer at the outer peripheral portion of the substrate And a process. According to this invention, since the sealing layer or the sealing member and the inorganic insulating layer that partitions the first electrode and the electro-optical layer are in contact with each other at the outer peripheral portion of the base, the base is transmitted through the first electrode and the inorganic insulating layer. Oxygen, moisture, etc. are blocked. Thereby, deterioration of the light emitting element can be prevented.

  In addition, on a substrate having a plurality of inorganic insulating layers, a plurality of first electrodes, a bank structure having a plurality of openings corresponding to the positions where the first electrodes are formed, and an electro-optic disposed in each of the openings In a method for manufacturing an electro-optical device having a layer, a second electrode that covers the bank structure and the electro-optical layer, and a sealing layer or a sealing member that covers the second electrode, A step of forming a sealing layer or a sealing member so as to be in contact with any one of the insulating layers is provided. According to this invention, since the plurality of inorganic insulating layers formed on the outer peripheral portion of the substrate are in contact with the sealing layer or the sealing member, the inorganic insulating layer prevents oxygen, moisture, and the like from permeating into the substrate. Is done. Thereby, deterioration of the light emitting element can be prevented.

Further, in the case of the step having an organic flattening layer for flattening the circuit portion formed on the substrate, the first electrode and the inorganic insulating layer partitioning the first electrode are flattened by the organic flat layer. Therefore, the sealing performance by the first electrode and the inorganic insulating layer can be improved.
In addition, the step of forming the first electrode on the contact hole connecting the first electrode and the circuit portion, and applying the organic insulating material to the concave portion on the first electrode by a droplet discharge method, the concave portion is flattened. The step of forming the organic flat layer to be formed can relieve the stress applied to the bank structure and the second electrode covering the bank structure and the sealing layer, so that the sealing property can be improved. .

  In a third aspect of the invention, the electronic apparatus includes the electro-optical device manufactured by the electro-optical device of the first invention or the manufacturing method of the second invention. According to the present invention, moisture or the like does not pass through the substrate and reach the electroluminescent layer, and the deterioration of the luminescent layer is prevented. Therefore, an electronic device that can display a vivid image for a long time can be obtained.

FIG. 11 illustrates a wiring structure of an EL display device. FIG. 9 is a schematic diagram illustrating a configuration of an EL display device. Sectional drawing which follows the AB line | wire of FIG. Sectional drawing which follows the CD line | wire of FIG. The expanded sectional view which shows a circuit part. The figure which shows the manufacturing method of EL display apparatus in order of a process. The figure which shows the process of following FIG. The figure which shows the process of following FIG. The figure which shows the process of following FIG. The figure which shows the process following FIG. The figure which shows the process following FIG. The figure which shows the case where a base protective layer or a gate insulating layer, and a gas barrier layer are made to contact. The figure which shows the case where a sealing member is provided. FIG. 9 illustrates an electronic device.

Hereinafter, embodiments of an electro-optical device, a method for manufacturing the electro-optical device, and an electronic apparatus according to the present invention will be described with reference to the drawings.
As an electro-optical device, an EL display device using an electroluminescent material as an example of an electro-optical material, in particular, an organic electroluminescence (EL) material will be described.
FIG. 1 is a diagram showing a wiring structure of the EL display device 1. The EL display device 1 is an active matrix EL display device using a thin film transistor (hereinafter abbreviated as TFT) as a switching element.

As shown in FIG. 1, the EL display device (electro-optical device) 1 includes a plurality of scanning lines 101, a plurality of signal lines 102 extending in a direction perpendicular to each scanning line 101, and each signal line 102. And a plurality of power supply lines 103 extending in parallel with each other, and a pixel region X is provided in the vicinity of each intersection of the scanning line 101 and the signal line 102.
A data line driving circuit 100 including a shift register, a level shifter, a video line, and an analog switch is connected to the signal line 102. Further, a scanning line driving circuit 80 including a shift register and a level shifter is connected to the scanning line 101.

  Further, in each of the pixel regions X, a switching TFT 112 to which a scanning signal is supplied to the gate electrode via the scanning line 101 and a holding capacitor for holding a pixel signal supplied from the signal line 102 via the switching TFT 112 113, a driving TFT 123 to which a pixel signal held by the holding capacitor 113 is supplied to a gate electrode, and a pixel into which a driving current flows from the power supply line 103 when electrically connected to the power supply line 103 via the driving TFT 123 An electro-optic layer 110 sandwiched between the electrode (first electrode) 23 and the pixel electrode 23 and the cathode (second electrode) 50 is provided. The pixel electrode 23, the cathode 50, and the electro-optic layer 110 constitute a light emitting element (organic EL element).

  According to this EL display device 1, when the scanning line 101 is driven and the switching TFT 112 is turned on, the potential of the signal line 102 at that time is held in the holding capacitor 113, and depending on the state of the holding capacitor 113, The on / off state of the driving TFT 123 is determined. Then, a current flows from the power supply line 103 to the pixel electrode 23 via the channel of the driving TFT 123, and further a current flows to the cathode 50 via the electro-optic layer 110. The organic light emitting layer 60 (see FIG. 3) included in the electro-optic layer 110 emits light according to the amount of current flowing therethrough.

Next, a specific configuration of the EL display device 1 will be described with reference to FIGS.
As shown in FIG. 2, the EL display device 1 includes a pixel electrode in which a substrate 20 having electrical insulation and pixel electrodes connected to switching TFTs (not shown) are arranged in a matrix on the substrate 20. An area (not shown), a power line (not shown) arranged around the pixel electrode area and connected to each pixel electrode, and a pixel portion 3 having a substantially rectangular shape in plan view located at least on the pixel electrode area (In the dashed-dotted line frame in FIG. 2).
In the present invention, the substrate 20 and the switching TFT and various circuits formed on the substrate 20 as will be described later, and an interlayer insulating film are referred to as a base. (Indicated by reference numeral 200 in FIGS. 3 and 4)

The pixel unit 3 includes a real display area 4 in the center (inside the two-dot chain line in FIG. 2) and a dummy area 5 (area between the one-dot chain line and the two-dot chain line) arranged around the real display area 4. It is divided into.
In the actual display area 4, display areas R, G, and B each having a pixel electrode are arranged in a matrix so as to be separated from each other in the AB direction and the CD direction.
Further, scanning line drive circuits 80 and 80 are arranged on both sides of the actual display area 4 in FIG. These scanning line drive circuits 80 and 80 are arranged below the dummy region 5.

  Further, an inspection circuit 90 is arranged above the actual display area 4 in FIG. The inspection circuit 90 is a circuit for inspecting the operating state of the EL display device 1 and includes, for example, inspection information output means (not shown) for outputting the inspection result to the outside, and is displayed during manufacture or at the time of shipment. The apparatus is configured to be able to inspect the quality and defect of the apparatus. The inspection circuit 90 is also disposed below the dummy area 5.

  The scanning line driving circuit 80 and the inspection circuit 90 are applied with a driving voltage from a predetermined power supply unit via the driving voltage conducting unit 310 (see FIG. 3) and the driving voltage conducting unit 340 (see FIG. 4). Composed. Further, the drive control signal and drive voltage to the scanning line drive circuit 80 and the inspection circuit 90 are supplied from a predetermined main driver for controlling the operation of the EL display device 1 and the drive control signal conduction unit 320 (see FIG. 3) and Transmission and application are performed via the drive voltage conduction unit 350 (see FIG. 4). The drive control signal in this case is a command signal from a main driver or the like related to control when the scanning line drive circuit 80 and the inspection circuit 90 output signals.

In addition, as shown in FIGS. 3 and 4, the EL display device 1 has a large number of light-emitting elements (organic EL elements) each including a pixel electrode 23, an organic light-emitting layer 60, and a cathode 50 on a base 200. And a gas barrier layer 30 is formed.
The main layer of the electro-optic layer 110 is the organic light emitting layer 60 (electroluminescence layer), but a hole injection layer, a hole transport layer, an electron injection layer, an electron between two electrodes sandwiched between the layers. A transport layer, a hole blocking layer (hole blocking layer), and an electron blocking layer (electron blocking layer) may be provided.

  In the case of a so-called top emission type EL display device, the substrate 20 constituting the base body 200 is configured to extract emitted light from the gas barrier layer 30 side, which is the opposite side of the substrate 20, so that either a transparent substrate or an opaque substrate is used. Can also be used. Examples of opaque substrates include ceramics such as alumina and metal sheets such as stainless steel that have been subjected to insulation treatment such as surface oxidation, and thermosetting resins and thermoplastic resins in consideration of impact resistance and weight reduction Further, the film (plastic film) or the like may be used.

A circuit unit 11 including a driving TFT 123 for driving the pixel electrode 23 and the like is formed on the substrate 20, and a large number of light emitting elements (organic EL elements) are provided thereon. As shown in FIGS. 3 and 4, the light emitting element includes a pixel electrode 23 that functions as an anode, a hole transport layer 70 that injects / transports holes from the pixel electrode 23, and one of electro-optic materials. An organic light emitting layer 60 including a certain organic EL material and a cathode 50 are sequentially formed.
Based on such a configuration, the light emitting element emits light by combining holes injected from the hole transport layer 70 and electrons from the cathode 50 in the organic light emitting layer 60.

Since the pixel electrode 23 is a top emission type in this embodiment, it does not need to be transparent, and is therefore formed of an appropriate conductive material.
As a material for forming the hole transport layer 70, for example, a polythiophene derivative, a polypyrrole derivative, or a doped body thereof is used. Specifically, a dispersion of 3,4-polyethylenediosithiophene / polystyrene sulfonic acid (PEDOT / PSS) or the like is used.

As a material for forming the organic light emitting layer 60, a known light emitting material capable of emitting fluorescence or phosphorescence can be used. Specifically, (poly) fluorene derivative (PF), (poly) paraphenylene vinylene derivative (PPV), polyphenylene derivative (PP), polyparaphenylene derivative (PPP), polyvinylcarbazole (PVK), polythiophene derivative, polymethyl Polysilanes such as phenylsilane (PMPS) are preferably used.
In addition, these polymer materials include polymer materials such as perylene dyes, coumarin dyes, rhodamine dyes, rubrene, perylene, 9,10-diphenylanthracene, tetraphenylbutadiene, Nile red, coumarin 6, and quinacridone. It can also be used by doping a low molecular weight material such as.
In addition, it replaces with the polymeric material mentioned above, a conventionally well-known low molecular material can also be used.
Further, if necessary, an electron injection layer made of a metal or a metal compound mainly composed of calcium, magnesium, lithium, sodium, strontium, barium, or cesium may be formed on the organic light emitting layer 60. .

In the present embodiment, the hole transport layer 70 and the organic light emitting layer 60 include the inorganic insulating layer (bank structure) 25 formed in a lattice shape on the base 200 and the organic as shown in FIGS. The hole transport layer 70 and the organic light emitting layer 60 which are surrounded by the bank layer (bank structure) 221 and surrounded by the bank layer (bank structure) 221 are element layers constituting a single light emitting element (organic EL element).
As shown in FIGS. 3 and 4, the inorganic insulating layer 25 has an area larger than the total area of the actual display region 4 and the dummy region 5 and is formed so as to cover the outer peripheral portion of the base body 200.

  As shown in FIGS. 3 and 4, the cathode 50 is formed on the base body 200 so as to cover the upper surfaces of the organic light emitting layer 60 and the organic bank layer 221 and the wall surface forming the outer portion of the organic bank layer 221. It is a thing. The cathode 50 is connected to the cathode wiring 202 formed on the outer periphery of the substrate 200 outside the organic bank layer 221 as shown in FIG. A flexible substrate 203 is connected to the cathode wiring 202, whereby the cathode 50 is connected to a driving IC (driving circuit) (not shown) on the flexible substrate 203 via the cathode wiring 202. Similarly to the cathode wiring 202, the scanning line drive circuit 80 is connected to a drive IC (drive circuit) (not shown) on the flexible substrate 203 through the drive voltage conduction unit 310 and the drive control signal conduction unit 320.

  As a material for forming the cathode 50, since this embodiment is a top emission type, it needs to be light transmissive, and therefore, a transparent conductive material is used. As the transparent conductive material, ITO (Indium Tin Oxide: Indium Tin Oxide) is suitable, but other than this, for example, indium oxide / zinc oxide based amorphous transparent conductive film (Indium Zinc Oxide: IZO / I-Zet) Oh (registered trademark)), aluminum zinc oxide (AZO), or the like can be used. In the present embodiment, ITO is used.

  A cathode protective layer (not shown) may be formed on the upper layer of the cathode 50. The cathode protective layer is a layer provided to prevent the cathode 50 from being corroded during the manufacturing process, and is formed of an inorganic compound such as a silicon compound or a metal compound. By covering the cathode 50 with a cathode protective layer made of an inorganic compound, corrosion due to contact of oxygen, moisture, organic material, or the like with the cathode 50 can be satisfactorily prevented. The cathode protective layer is formed to a thickness of about 10 nm to 300 nm.

On the cathode 50, a gas barrier layer (sealing layer) 30 that is wider than the organic bank layer 221 and covers the cathode 50 is provided. The gas barrier layer 30 is formed up to the outer periphery of the substrate 200 and is in contact with the inorganic insulating layer 25.
The gas barrier layer 30 is for preventing oxygen and moisture from entering inside thereof, thereby preventing the entry of oxygen and moisture into the cathode 50 and the organic light emitting layer 60, and the cathode 50 and The organic light emitting layer 60 is prevented from being deteriorated.
The gas barrier layer 30 is made of, for example, an inorganic compound, and is preferably formed of a silicon compound, that is, silicon nitride, silicon oxynitride, silicon oxide, or the like by a high-density plasma film forming method. However, other than silicon compounds, for example, alumina, tantalum oxide, titanium oxide, and other ceramics may be used.

The gas barrier layer 30 may have a two-layer structure of, for example, silicon nitride and silicon nitride oxide or a structure in which a silicon compound is included and laminated with different materials such as ITO and silicon oxynitride. By forming the base layer made of the inorganic compound in this way, the adhesion can be improved, the stress can be relaxed, and the denseness of the gas barrier layer made of the silicon compound can be improved.
Furthermore, an organic intermediate layer made of an organic material may be formed as a base layer of the gas barrier layer. This relieves concentrated stress generated by the bumps on the organic bank layer and protrusions such as particles adhering during the process. It is mainly diluted with an organic solvent and applied and dried by a WET process such as slit coating. To a thickness of 1 to 10 μm.

The thickness of the gas barrier layer 30 is preferably 10 nm or more and 500 nm or less. If it is less than 10 nm, through holes may be partially formed due to film defects or film thickness variations, and the gas barrier property may be impaired. If it exceeds 500 nm, cracks due to stress occur. This is because it may occur.
In addition, since the top emission type is used in the present embodiment, the gas barrier layer 30 needs to have translucency. Therefore, by adjusting the material and film thickness appropriately, the light beam in the visible light region can be obtained in the present embodiment. The transmittance is set to 80% or more, for example.

Furthermore, a protective layer 204 that covers the gas barrier layer 30 may be provided outside the gas barrier layer 30 (see FIG. 11). The protective layer 204 includes an adhesive layer 205 and a surface protective layer 206 provided on the gas barrier layer 30 side.
The adhesive layer 205 fixes the surface protective layer 206 on the gas barrier layer 30 and has a buffer function against mechanical shock from the outside. For example, a resin such as urethane, acrylic, epoxy, and polyolefin It is formed of an adhesive made of a material that is softer and has a lower glass transition point than the surface protective layer 206 described later. In addition, it is preferable to add a silane coupling agent or an alkoxysilane to such an adhesive, so that the adhesion between the formed adhesive layer 205 and the gas barrier layer 30 is improved. Therefore, the shock absorbing function against mechanical shock is increased.
In particular, when the gas barrier layer 30 is formed of a silicon compound, the adhesion to the gas barrier layer 30 can be improved by a silane coupling agent or alkoxysilane, and thus the gas barrier property of the gas barrier layer 30 is improved. be able to.

The surface protective layer 206 is provided on the adhesive layer 205 and constitutes the surface side of the protective layer 204, and has functions such as pressure resistance, wear resistance, external light antireflection, gas barrier properties, and ultraviolet blocking properties. A layer comprising at least one of the following. Specifically, it is formed by a plastic film or the like in which a DLC (diamond like carbon) layer, a silicon oxide layer, a titanium oxide layer or the like is coated on a glass substrate or the outermost surface.
In the EL display device of this example, when the top emission type is used, both the surface protective layer 206 and the adhesive layer 205 need to be translucent, but when the bottom emission type is used, this is necessary. There is no.

A circuit unit 11 is provided below the light emitting element as shown in FIG.
The circuit unit 11 is formed on the substrate 20 and constitutes the base body 200. That is, a base protective layer 281 mainly composed of SiO ₂ is formed on the surface of the substrate 20, and a silicon layer 241 is formed thereon. A gate insulating layer 282 mainly composed of SiO ₂ and / or SiN is formed on the surface of the silicon layer 241.

In addition, a region of the silicon layer 241 that overlaps with the gate electrode 242 with the gate insulating layer 282 interposed therebetween is a channel region 241a. The gate electrode 242 is a part of the scanning line 101 (not shown). On the other hand, on the surface of the gate insulating layer 282 covering the silicon layer 241 and forming the gate electrode 242, a mixed gas of monosilane and dinitrogen monoxide or TEOS (tetraethoxysilane, Si (OC ₂ The first interlayer insulating layer 283 mainly composed of a silicon compound such as silicon oxide or silicon nitride is formed by a plasma CVD method using H ₅ ) ₄ ), oxygen, disilane, ammonia, or the like.

  Further, in the silicon layer 241, a low concentration source region 241b and a high concentration source region 241S are provided on the source side of the channel region 241a, while a low concentration drain region 241c and a high concentration drain are provided on the drain side of the channel region 241a. The region 241D is provided to form a so-called LDD (Light Doped Drain) structure. Among these, the high-concentration source region 241S is connected to the source electrode 243 through a contact hole 243a that opens over the gate insulating layer 282 and the first interlayer insulating layer 283. The source electrode 243 is configured as a part of the above-described power supply line 103 (see FIG. 1, extending in the direction perpendicular to the paper surface at the position of the source electrode 243 in FIG. 5). On the other hand, the high-concentration drain region 241D is connected to the drain electrode 244 made of the same layer as the source electrode 243 through a contact hole 244a that opens through the gate insulating layer 282 and the first interlayer insulating layer 283.

The upper layer of the first interlayer insulating layer 283 on which the source electrode 243 and the drain electrode 244 are formed is a second interlayer insulating mainly composed of a silicon compound having a gas barrier property such as silicon nitride, silicon oxide, or silicon oxynitride. Covered by layer 284. The second interlayer insulating layer 284 includes, for example, a silicon compound layer such as silicon nitride (SiN) or silicon oxide (SiO ₂ ) and a wiring flattening layer such as acrylic resin. A pixel electrode 23 made of ITO is formed on the surface of the second interlayer insulating layer 284 and is connected to the drain electrode 244 through a contact hole 23 a provided in the second interlayer insulating layer 284. That is, the pixel electrode 23 is connected to the high concentration drain region 241D of the silicon layer 241 through the drain electrode 244.

  Further, as shown in FIG. 5, when the pixel electrode 23 is formed on the contact hole 23a, a concave portion 295 due to the shape of the contact hole 23a remains. Therefore, an organic flat layer 296 is formed on the recess 295, and the recess 295 is filled and flattened. As the organic flat layer 296, an acrylic resin, an organic silicon compound, or the like is preferable. Thus, by flattening the base of the organic bank layer 221, the upper surface of the gas barrier layer 30 covering the organic bank layer 221 can be flattened to improve the sealing performance.

  Note that TFTs (driving circuit TFTs) included in the scanning line driving circuit 80 and the inspection circuit 90, that is, N-channel type or P-channel type TFTs constituting an inverter included in the shift register among these driving circuits, for example. The structure is the same as that of the driving TFT 123 except that it is not connected to the pixel electrode 23.

The pixel electrode 23 and the above-described inorganic insulating layer 25 and organic bank layer 221 are provided on the surface of the second interlayer insulating layer 284 on which the pixel electrode 23 is formed. The inorganic insulating layer 25 is made of an inorganic material such as SiO ₂ , and the organic bank layer 221 is made of an organic material such as acrylic resin or polyimide. On the pixel electrode 23, the hole transport layer 70, the organic light emitting layer 60, and the opening 25 a provided in the inorganic insulating layer 25 and the opening 221 a surrounded by the organic bank layer 221 are provided. Are stacked in this order.
The layers up to the second interlayer insulating layer 284 on the substrate 20 described above constitute the circuit unit 11.

  Here, in the EL display device 1 of the present embodiment, each organic light emitting layer 60 is formed so that the light emission wavelength bands correspond to the three primary colors of light in order to perform color display. For example, as the organic light emitting layer 60, a red organic light emitting layer 60R whose emission wavelength band corresponds to red, a green organic light emitting layer 60G corresponding to green, and a blue organic light emitting layer 60B corresponding to blue correspond to each. One pixel is provided in the display areas R, G, and B, and performs color display using these display areas R, G, and B. In addition, a BM (black matrix) (not shown) in which metallic chromium is formed by sputtering or the like is formed between the organic bank layer 221 and the inorganic insulating layer 25 at the boundary of each color display region.

Next, an example of a method for manufacturing the EL display device 1 according to the present embodiment will be described with reference to FIGS. Each of the cross-sectional views shown in FIGS. 6 to 8 corresponds to the cross-sectional view taken along the line AB in FIG.
In the present embodiment, the EL display device 1 as an electro-optical device is a top emission type.

  First, as shown in FIG. 6A, a base protective layer 281 is formed on the surface of the substrate 20. Next, after an amorphous silicon layer 501 is formed on the base protective layer 281 using an ICVD method, a plasma CVD method, or the like, crystal grains are grown by a laser annealing method or a rapid heating method to form a polysilicon layer.

  Next, as shown in FIG. 6B, the polysilicon layer is patterned by a photolithography method to form island-like silicon layers 241, 251 and 261. Among these, the silicon layer 241 is formed in the display region and constitutes a driving TFT 123 connected to the pixel electrode 23, and the silicon layers 251 and 261 are P-channel type included in the scanning line driving circuit 80. And N-channel type TFTs (driving circuit TFTs).

  Next, the gate insulating layer 282 is formed of a silicon oxide film having a thickness of about 30 nm to 200 nm on the entire surface of the silicon layers 241, 251 and 261, and the base protective layer 281 by plasma CVD, thermal oxidation, or the like. Here, when the gate insulating layer 282 is formed by utilizing the thermal oxidation method, the silicon layers 241, 251 and 261 are also crystallized, and these silicon layers can be made into polysilicon layers.

When channel doping is performed on the silicon layers 241, 251 and 261, for example, boron ions are implanted at a dose of about 1 × 10 ¹² / cm ² at this timing. As a result, the silicon layers 241, 251 and 261 are low-concentration P-type silicon layers having an impurity concentration (calculated from the impurities after activation annealing) of about 1 × 10 ¹⁷ / cm ³ .

Next, an ion implantation selection mask is formed in a part of the channel layer of the P-channel TFT and the N-channel TFT, and in this state, phosphorus ions are ion-implanted at a dose of about 1 × 10 ¹⁵ / cm ² . As a result, high concentration impurities are introduced into the patterning mask in a self-aligned manner, and as shown in FIG. 6C, the high concentration source regions 241S and 261S and the high concentration drain region are formed in the silicon layers 241 and 261. 241D and 261D are formed.

  Next, as shown in FIG. 6C, a gate electrode forming conductive layer 502 made of a metal film such as doped silicon, a silicide film, or an aluminum film, a chromium film, or a tantalum film is formed on the entire surface of the gate insulating layer 282. Form. The thickness of the conductive layer 502 is approximately 500 nm. Thereafter, as shown in FIG. 6D, a gate electrode 252 for forming a P-channel type driving circuit TFT, a gate electrode 242 for forming a pixel TFT, and an N-channel type driving circuit TFT are formed by patterning. A gate electrode 262 to be formed is formed. Further, the drive control signal conducting portion 320 (350) and the first layer 121 of the cathode power supply wiring are also formed at the same time. In this case, the drive control signal conducting portion 320 (350) is disposed in the dummy region 5.

Subsequently, as shown in FIG. 6 (d), using the gate electrodes 242, 252, and 262 as a mask, phosphorus ions are ion-implanted with respect to the silicon layers 241, 251, and 261 at a dose of about 4 × 10 ¹³ / cm ^2. inject. As a result, low-concentration impurities are introduced in a self-aligned manner with respect to the gate electrodes 242, 252 and 262, and as shown in FIG. 6 (d), the low-concentration source regions 241b and 261b in the silicon layers 241 and 261, and Low concentration drain regions 241c and 261c are formed. In addition, low concentration impurity regions 251S and 251D are formed in the silicon layer 251.

Next, as shown in FIG. 7E, an ion implantation selection mask 503 that covers a portion other than the P-channel type driver circuit TFT 252 is formed. Using this ion implantation selection mask 503, boron ions are implanted into the silicon layer 251 at a dose of about 1.5 × 10 ¹⁵ / cm ² . As a result, the gate electrode 252 constituting the TFT for the P-channel driver circuit also functions as a mask, so that the silicon layer 251 is doped with a high concentration impurity in a self-aligning manner. Therefore, the low-concentration impurity regions 251S and 251D are counter-doped and become source and drain regions of a P-type channel type driver circuit TFT.

  Next, as shown in FIG. 7 (f), a first interlayer insulating layer 283 is formed over the entire surface of the substrate 20, and the first interlayer insulating layer 283 is patterned by using a photolithography method, whereby the source of each TFT. A contact hole C is formed at a position corresponding to the electrode and the drain electrode.

  Next, as shown in FIG. 7G, a conductive layer 504 made of a metal such as aluminum, chromium, or tantalum is formed so as to cover the first interlayer insulating layer 283. The thickness of the conductive layer 504 is approximately 200 nm to 800 nm. Thereafter, in the conductive layer 504, a region 240a where the source electrode and the drain electrode of each TFT are to be formed, a region 310a where the driving voltage conducting portion 310 (340) is to be formed, and a second layer of the cathode power supply wiring are formed. A patterning mask 505 is formed so as to cover the region 122a to be formed, and the conductive layer 504 is patterned to form source electrodes 243, 253, 263, and drain electrodes 244, 254, 264 shown in FIG. To do.

  Next, as shown in FIG. 8I, a second interlayer insulating layer 284 is formed to cover the first interlayer insulating layer 283 on which these are formed. The second interlayer insulating layer 284 is preferably formed to a thickness of about 1 to 2 μm.

Next, as shown in FIG. 8J, a portion of the second interlayer insulating layer 284 corresponding to the drain electrode 244 of the driving TFT is removed by etching to form a contact hole 23a. Thereafter, a conductive film to be the pixel electrode 23 is formed so as to cover the entire surface of the substrate 20 on which the circuit portion 11 is formed.
Then, by patterning this transparent conductive film, as shown in FIG. 9 (k), a pixel electrode 23 that is electrically connected to the drain electrode 244 through the contact hole 23a of the second interlayer insulating layer 284 is formed, and at the same time, a dummy An area dummy pattern 26 is also formed.
3 and 4, the pixel electrode 23 and the dummy pattern 26 are collectively referred to as the pixel electrode 23. The dummy pattern 26 is configured not to be connected to the lower metal wiring via the second interlayer insulating layer 284. That is, the dummy pattern 26 is arranged in an island shape and has substantially the same shape as the shape of the pixel electrode 23 formed in the actual display region. Of course, the structure may be different from the shape of the pixel electrode 23 formed in the display region. In this case, the dummy pattern 26 includes at least one located above the drive voltage conduction unit 310 (340).

Next, as shown in FIG. 9L, an inorganic insulating layer 25 that is an insulating layer is formed on the pixel electrode 23, the dummy pattern 26, and the second interlayer insulating film. In the pixel electrode 23, the inorganic insulating layer 25 is formed in such a manner that a part of the pixel electrode 23 is opened, and holes can be transferred from the pixel electrode 23 in the opening 25a (see also FIG. 3). On the contrary, in the dummy pattern 26 in which the opening 25a is not provided, the inorganic insulating layer 25, which is an insulating layer, serves as a hole movement blocking layer and no hole movement occurs.
Subsequently, in the inorganic insulating layer 25, a BM (black matrix) (not shown) is formed in a concave portion formed between two different pixel electrodes 23. Specifically, a film is formed on the concave portion of the inorganic insulating layer 25 by sputtering using metallic chromium.
An organic flat layer 296 is formed in the recess 295 (see FIG. 5) due to the shape of the contact hole 23a. The organic flat layer 296 is made of polyhydric alcohol (polyvinyl alcohol), acrylic resin (polyvinyl acetate), polyvinyl acrylate), or an organic silicon compound (tetraethoxysilane (TEOS), aninopropyltrimethoxysilane, etc.) in water or alcohol. Then, the film is dissolved and applied by a droplet discharge method such as an ink jet method.

  Then, as shown in FIG. 9 (m), an organic bank layer 221 is formed so as to cover a predetermined position of the inorganic insulating layer 25, specifically, the BM described above. As a specific method for forming the organic bank layer, for example, an organic layer is formed by applying a resist such as acrylic resin or polyimide dissolved in a solvent by various coating methods such as spin coating or dip coating. The constituent material of the organic layer may be any material as long as it does not dissolve in the ink solvent described later and is easily patterned by etching or the like.

Further, the organic layer is patterned using a photolithography technique and an etching technique, and an opening 221a is formed in the organic layer, thereby forming an organic bank layer 221 having a wall surface in the opening 221a.
In this case, the organic bank layer 221 includes at least the one located above the drive control signal conducting unit 320.

  Next, a region showing lyophilicity and a region showing liquid repellency are formed on the surface of the organic bank layer 221. In the present embodiment, each region is formed by plasma processing. Specifically, the plasma treatment is performed by a preheating step, and the upper surface of the organic bank layer 221, the wall surface of the opening 221a, the electrode surface 23c of the pixel electrode 23, and the upper surface of the inorganic insulating layer 25 are made lyophilic. And an ink repellent process for making the upper surface of the organic bank layer 221 and the wall surface of the opening 221a liquid repellent, and a cooling process.

That is, the base material (substrate 20 including a bank or the like) is heated to a predetermined temperature, for example, about 70 to 80 ° C., and then plasma treatment using oxygen as a reactive gas in an atmospheric atmosphere (O ₂ plasma treatment) as an ink-philic process. I do. Next, as an ink repellent process, plasma treatment using CF ₄ as a reactive gas (CF ₄ plasma treatment) is performed in an air atmosphere, and then the substrate heated for the plasma treatment is cooled to room temperature. In addition, lyophilicity and liquid repellency are imparted to predetermined locations.

In this CF ₄ plasma treatment, the electrode surface 23c of the pixel electrode 23 and the inorganic insulating layer 25 are also somewhat affected, but ITO that is a material of the pixel electrode 23 and SiO that is a constituent material of the inorganic insulating layer 25. ₂ , TiO _{2 and the} like have poor affinity for fluorine, so that the hydroxyl group imparted in the ink-philic process is not substituted with the fluorine group, and the lyophilic property is maintained.

  Next, the hole transport layer 70 is formed by a hole transport layer forming step. In this hole transport layer forming step, for example, a hole transport layer material is applied on the electrode surface 23c by a droplet discharge method such as an ink jet method or a slit coat method, and then a drying process and a heat treatment are performed. A hole transport layer 70 is formed on 23. When the hole transport layer material is selectively applied by, for example, an ink jet method, first, an ink jet head (not shown) is filled with the hole transport layer material, and a discharge nozzle of the ink jet head is formed on the inorganic insulating layer 25. The liquid droplets whose liquid amount per one droplet is controlled from the discharge nozzle while the ink jet head and the base material (substrate 20) are moved relative to each other are opposed to the electrode surface 23c located in the opening 25a. To discharge. Next, the discharged droplets are dried and the hole transport layer 70 is formed by evaporating the dispersion medium and the solvent contained in the hole transport layer material.

Here, the liquid droplets discharged from the discharge nozzle spread on the electrode surface 23 c that has been subjected to the lyophilic treatment, and are filled in the opening 25 a of the inorganic insulating layer 25. On the other hand, droplets are repelled and do not adhere to the upper surface of the organic bank layer 221 that has been subjected to ink repellent treatment. Therefore, even if the liquid droplet is deviated from the predetermined discharge position and is discharged onto the upper surface of the organic bank layer 221, the upper surface is not wetted by the liquid droplet, and the repelled liquid droplet is the opening 25a of the inorganic insulating layer 25. Roll in.
In addition, after this hole transport layer formation process, in order to prevent the oxidation of the hole transport layer 70 and the organic light emitting layer 60, it is preferable to carry out in inert gas atmospheres, such as nitrogen atmosphere and argon atmosphere.

Next, the organic light emitting layer 60 is formed by the light emitting layer forming step. In this light emitting layer forming step, the light emitting layer forming material is ejected onto the hole transport layer 70 by, for example, an ink jet method, and then subjected to a drying process and a heat treatment, whereby the inside of the opening 221a formed in the organic bank layer 221 is formed. Then, the organic light emitting layer 60 is formed. In this light emitting layer forming step, a nonpolar solvent that is insoluble in the hole transporting layer 70 is used as a solvent used for the light emitting layer forming material in order to prevent re-dissolution of the hole transporting layer 70.
In this light emitting layer forming step, for example, a blue (B) light emitting layer forming material is selectively applied to a blue display region by an inkjet method, dried, and then similarly treated with green (G) and red (R ) Is also selectively applied to the display area and dried.
Further, if necessary, an electron injection layer made of a metal or a metal compound mainly composed of calcium, magnesium, lithium, sodium, strontium, barium, or cesium is deposited on the organic light emitting layer 60 as described above. It may be formed by a method or the like.

Next, as shown in FIG. 10 (n), the cathode 50 is formed by the cathode layer forming step. In this cathode layer forming step, for example, ITO is formed into a cathode 50 by a vapor phase growth method such as a high density plasma growth method. At this time, the cathode 50 is formed so as to cover not only the upper surfaces of the organic light emitting layer 60 and the organic bank layer 221 but also the wall surface forming the outer portion of the organic bank layer 221. .
When forming a cathode protective layer on the cathode 50, titanium oxide, silicon oxynitride, or the like is formed on the cathode 50 by a vapor phase growth method such as a high-density plasma growth method.

Next, as shown in FIG. 10 (o), the gas barrier layer 30 is formed so as to cover all the portions of the cathode 50 exposed on the substrate 200.
Here, as a method of forming the gas barrier layer 30, a silicon compound such as silicon oxynitride is formed by a high density plasma growth method.

  In addition, as described above, the gas barrier layer 30 may be formed as a single layer using a silicon compound, or two or more layers of silicon compounds or layers different from silicon compounds, for example, that improve flatness. It may be formed by laminating a plurality of layers in combination with each other, and further, although it is formed as a single layer, it may be formed so that its composition is changed continuously or discontinuously in the film thickness direction. .

Then, as shown in FIG. 11 (p), a protective layer 204 including an adhesive layer 205 and a surface protective layer 206 is provided on the gas barrier layer 30. The adhesive layer 205 is applied substantially uniformly on the gas barrier layer 30 by a screen printing method, a slit coating method, or the like, and the surface protective layer 206 is bonded thereon.
If the protective layer 204 is provided on the gas barrier layer 30 in this manner, the surface protective layer 206 has functions such as pressure resistance, wear resistance, antireflection, gas barrier property, and ultraviolet blocking property. The organic light emitting layer 60, the cathode 50, and also the gas barrier layer can be protected by the surface protective layer 206, and thus the life of the light emitting element can be extended.
In addition, since the adhesive layer 205 exhibits a buffering function against mechanical impact, when mechanical impact is applied from the outside, the mechanical impact on the gas barrier layer 30 and the light emitting element inside the gas barrier layer 30 is alleviated. It is possible to prevent functional deterioration of the light-emitting element due to mechanical impact.

As described above, the EL display device 1 is formed.
In such an EL display device 1, the inorganic insulating layer 25 partitioning the pixel electrode 23 and the gas barrier layer 30 are in contact with each other at the outer peripheral portion of the substrate 200, so that the substrate 200 is covered by the pixel electrode 23 or the inorganic insulating layer 25. Oxygen, moisture, etc. that permeate are blocked. Thereby, deterioration of the organic light emitting layer 60 can be prevented.

In the above-described embodiment, the top emission type EL display device 1 has been described as an example. However, the present invention is not limited to this, and the bottom emission type also emits emitted light on both sides. Applicable to types.
In the case of a bottom emission type or a type that emits emitted light on both sides, the switching TFT 112 and the driving TFT 123 formed on the substrate 200 are not directly under the light emitting element, but are provided with the inorganic insulating layer 25 and the organic bank. It is preferable to form the layer 221 directly below the layer 221 to increase the aperture ratio.
In the EL display device 1, the first electrode in the present invention functions as an anode and the second electrode functions as a cathode, but these are reversed to make the first electrode a cathode and the second electrode an anode. It may be configured to function as each. However, in that case, it is necessary to replace the formation positions of the organic light emitting layer 60 and the hole transport layer 70.

In the above-described embodiment, the materials of the first interlayer insulating layer 283 and the second interlayer insulating layer 284 have not been described. However, even if formed by an organic resin material, an inorganic insulating material such as SiN or SiO ₂ is used. It may be formed. Since the organic resin material is formed by a WET process such as spin coating or slit coating, the flatness can be improved, and it is preferably used after a TFT or a wiring is formed. For example, the organic flat layer 291 may be used as the second interlayer insulating layer between the first interlayer insulating layer 283 and the inorganic insulating layer 25, and is formed between the second interlayer insulating layer 284 and the inorganic insulating layer 25. May be. Furthermore, the organic flat layer 291 may be provided above the region where the driving TFT 123 is formed in the first interlayer insulating layer 283, and the second interlayer insulating layer 284 may be formed in the other region (outer peripheral portion).
The organic flat layer 291 is a layer provided to flatten the upper surface of the driving TFT 123, and is formed of, for example, an acrylic resin material. Then, the upper surface of the driving TFT 123 is flattened by the organic flat layer 291 so that the pixel electrode 23 and the inorganic insulating layer 25 formed on the organic flat layer 291 are flattened, and the sealing performance of these layers is improved. The improvement and the formation accuracy of the organic light emitting layer by the inkjet method can be improved.

Further, the case where the inorganic insulating layer 25 that partitions the pixel electrode 23 and the gas barrier layer 30 are in contact with each other at the outer peripheral portion of the substrate 200 has been described. However, as shown in FIG. Alternatively, any of the gate insulating layers 282 may be exposed and the gas barrier layer 30 may be coated thereon. When the first interlayer insulating layer 283 and the second interlayer insulating layer 284 are formed of an inorganic insulating material, the gas barrier layer 30 is coated on the first interlayer insulating layer 283 or the second interlayer insulating layer 284. Also good.
As described above, when any of the first interlayer insulating layer 283, the second interlayer insulating layer 284, the base protective layer 281 and the gate insulating layer 282 made of an inorganic material is in contact with the gas barrier layer 30, the organic light emitting layer 60 It is sealed, and deterioration due to oxygen, moisture, etc. can be prevented for a long time.

In the embodiment described above, a sealing member 40 may be used as shown in FIG. 13 instead of the gas barrier layer 30. In FIG. 13, the sealing member 40 is disposed on the second interlayer insulating layer 284 made of an inorganic insulating material via the adhesive layer 41.
When the sealing member 40 is used, since it becomes a so-called bottom emission type EL display device in which emitted light is extracted from the substrate 20 side, for example, a transparent or translucent substrate needs to be employed as the substrate 20. . Specific examples include glass, quartz, and resin (plastic and plastic film), and a glass substrate is particularly preferably used.

  In the above-described embodiment, the example in which the EL display device 1 is applied to the electro-optical device has been described. However, the present invention is not limited to this, and the second electrode is basically provided outside the substrate. As long as it is an electro-optical device of any form, it can be applied.

Next, the electronic apparatus of the present invention will be described. The electronic apparatus has the above-described EL display device (electro-optical device) 1 as a display unit, and specifically, the one shown in FIG.
FIG. 14A is a perspective view showing an example of a mobile phone. In FIG. 14A, the mobile phone 1000 includes a display unit 1001 using the EL display device 1 described above.
FIG. 14B is a perspective view showing an example of a wristwatch type electronic device. In FIG. 14B, a timepiece (electronic device) 1100 includes a display unit 1101 using the EL display device 1 described above.
FIG. 14C is a perspective view illustrating an example of a portable information processing apparatus such as a word processor or a personal computer. In FIG. 14C, the information processing apparatus (electronic device) 1200 includes an input unit 1202 such as a keyboard, a display unit 1206 using the EL display device 1 described above, and an information processing apparatus main body (housing) 1204.
FIG. 14D is a perspective view showing an example of a thin large-screen television. 14D, a thin large-screen TV (electronic device) 1300 includes a thin large-screen TV main body (housing) 1302, an audio output unit 1304 such as a speaker, and a display unit 1306 using the EL display device 1 described above. Prepare.
Each of the electronic devices illustrated in FIGS. 14A to 14C includes the display units (electro-optical devices) 1001, 1101, and 1206 each including the EL display device 1 described above, and thus the EL that constitutes the display unit. The life of the light emitting element of the display device is extended.
14D applies the present invention in which the EL display device 1 can be sealed regardless of the area of the display portion (electro-optical device) 1306, which is larger than the conventional one. A display unit having an area (for example, a diagonal of 20 inches or more) is provided.

  DESCRIPTION OF SYMBOLS 1 Display apparatus (electro-optical apparatus), 23 Pixel electrode (1st electrode), 23a Contact hole, 25 Inorganic insulating layer (bank structure), 30 Gas barrier layer (sealing layer), 40 Sealing member, 50 Cathode (1st) 2 electrodes), 60 organic light emitting layer, 110 electro-optic layer, 200 substrate, 221 organic bank layer (bank structure), 221a opening, 221a opening, 281 ground protection layer, 282 gate insulating layer, 283 1st interlayer insulation Layer, 284 second interlayer insulating layer, 291 organic flat layer, 295 recess, 296 organic flat layer, 1000 mobile phone (electronic device), 1100 watch (electronic device), 1200 information processing device (electronic device), 1300 thin large screen TV (electronic equipment), 1001, 1101, 1206, 1306 Display (electro-optics) Location).

Claims (11)

A plurality of first electrodes on the substrate;
A bank structure provided on at least a part of the base and the plurality of first electrodes, and having a plurality of openings corresponding to the formation positions of the plurality of first electrodes;
An electro-optic layer disposed in each of the openings;
A second electrode covering at least a part of the bank structure and the electro-optic layer;
A sealing layer that contacts at least the end of the second electrode and covers the second electrode;
The sealing layer is made of an inorganic material,
The bank structure includes an inorganic insulating layer and an organic bank layer provided on at least a part of the inorganic insulating layer,
The electro-optical device, wherein the inorganic insulating layer is provided from the end of the second electrode to the outside and is in contact with the sealing layer. A plurality of first electrodes on the substrate;
An inorganic insulating layer provided on at least a part of the base and the plurality of first electrodes, and having a plurality of openings corresponding to positions where the plurality of first electrodes are formed;
An organic bank layer provided at least in part on the inorganic insulating layer;
An electro-optic layer disposed in each of the openings;
A second electrode covering the organic bank layer and the electro-optic layer;
A sealing layer that contacts at least the end of the second electrode and covers the second electrode;
The sealing layer is made of an inorganic material,
The electro-optical device, wherein the inorganic insulating layer is provided from the end of the second electrode to the outside and is in contact with the sealing layer. An inorganic insulating layer on the substrate;
An organic bank layer provided at least in part on the inorganic insulating layer;
A first electrode provided corresponding to each of the plurality of openings provided by the organic bank layer;
An electro-optic layer disposed on the first electrode;
A second electrode covering the organic bank layer and the electro-optic layer;
A sealing layer that contacts at least the end of the second electrode and covers the second electrode;
The sealing layer is made of an inorganic material,
The electro-optical device, wherein the inorganic insulating layer is provided from the end of the second electrode to the outside and is in contact with the sealing layer. The base includes a transistor electrically connected to the pixel electrode;
A contact portion connecting the pixel electrode and the transistor is provided at a position overlapping the inorganic insulating layer and the organic bank layer in a plane,
4. The electro-optical device according to claim 1, wherein an organic flat layer is provided between the inorganic insulating layer and the organic bank layer in the contact portion. 5. The region provided with the inorganic insulating layer and the organic bank layer has an actual display region that contributes to display, and a dummy region that does not contribute to display,
5. The electro-optical device according to claim 1, wherein the inorganic insulating layer does not have the opening in the dummy region. The plurality of first electrodes are electrically connected to a power line that supplies current to the first electrode,
The first electrode provided in the actual display area is electrically connected to the power line,
The electro-optical device according to claim 5, wherein the first electrode provided in the dummy region is not electrically connected to the power supply line. A bank structure having a plurality of first electrodes on a base, and a plurality of openings provided on at least a part of the base and the plurality of first electrodes, and corresponding to positions where the plurality of first electrodes are formed. An electro-optic layer disposed in each of the openings, a second electrode that covers at least a part of the bank structure and the electro-optic layer, and at least an end of the second electrode in contact with the first electrode. A sealing layer made of an inorganic material covering two electrodes, and a method for manufacturing an electro-optical device,
Forming the bank structure by forming an organic bank layer on at least a part of the inorganic insulating layer formed so as to be provided outside the end of the second electrode; and
Forming the sealing layer so as to be in contact with the inorganic insulating layer outside the end portion of the second electrode. A plurality of first electrodes on the base, and an inorganic insulating layer provided on at least a part of the base and the plurality of first electrodes, and having a plurality of openings corresponding to positions where the plurality of first electrodes are formed An organic bank layer provided on at least a part of the inorganic insulating layer, an electro-optic layer disposed in each of the openings, a second electrode covering the organic bank layer and the electro-optic layer, and at least A sealing layer made of an inorganic material in contact with an end of the second electrode and covering the second electrode,
Forming an inorganic insulating layer formed so as to be provided outside from an end of the second electrode, and forming an organic bank layer on at least a part of the inorganic insulating layer;
Forming the sealing layer so as to be in contact with the inorganic insulating layer outside the end portion of the second electrode. An inorganic insulating layer on the substrate; an organic bank layer provided at least in part on the inorganic insulating layer; a first electrode provided corresponding to each of the plurality of openings provided by the organic bank layer; An electro-optic layer disposed on the first electrode; a second electrode that covers the organic bank layer and the electro-optic layer; and an inorganic material that is in contact with at least an end portion of the second electrode and covers the second electrode. A method of manufacturing an electro-optical device having a sealing layer comprising:
Forming an inorganic insulating layer formed so as to be provided outside from an end of the second electrode, and forming an organic bank layer on at least a part of the inorganic insulating layer;
Forming the sealing layer so as to be in contact with the inorganic insulating layer outside the end portion of the second electrode. The substrate includes a transistor electrically connected to the first electrode;
Forming the inorganic insulating layer on a contact portion connecting the first electrode and the transistor;
The method further comprises: applying an organic insulating material onto the inorganic insulating layer of the contact portion by a droplet discharge method to form an organic flat layer to be flattened. A method for manufacturing an electro-optical device according to one item.   An electro-optical device according to any one of claims 1 to 6, or an electro-optical device manufactured by the manufacturing method according to any one of claims 7 to 10. Electronic equipment.

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