JP4428005B2 - Electro-optical device, method of manufacturing electro-optical device, and electronic apparatus - Google Patents

Description

  The present invention relates to an electro-optical device, a manufacturing method thereof, and an electronic apparatus including the electro-optical device.

In the field of electro-optical devices, improvement in durability against oxygen, moisture, and the like is a problem. For example, in an organic electroluminescence (hereinafter abbreviated as “organic EL”) display device which is an example of the electro-optical device, an electro-optical material (organic EL material, hole injection injection material, Non-light-emitting region called dark spot occurs due to deterioration of electron injection material, etc.) due to oxygen, moisture, etc., or decrease in conductivity due to oxygen, moisture, etc. of the cathode, and the lifetime of the light-emitting element is shortened There is.
In order to solve such a problem, a method of sealing moisture or the like by attaching a glass or metal lid to a substrate of a display device has been adopted. In recent years, in order to cope with an increase in size and weight of a display device, a thin film of silicon nitride, silicon oxide, ceramics, etc., which is transparent and has excellent gas barrier properties, is formed on a light emitting element by a high-density plasma deposition method ( For example, a technique called thin film sealing in which a film is formed by ion plating, ECR plasma sputtering, ECR plasma CVD, surface wave plasma CVD, ICP-CVD, or the like is used.
Japanese Patent Laid-Open No. 2001-284041

However, since the thin layer formed by the above-described technique is a dense and extremely hard film, if there are irregularities or steep steps on the surface on which the thin layer is coated, external stress is applied to the formed thin layer. However, there is a problem that cracks and peeling occur, and the blocking performance is reduced. In particular, when a partition called a bank is provided to divide a plurality of light-emitting layers, the surface on which the thin layer is coated becomes uneven because of the presence of the bank, which is a particular problem.
In addition, since the inorganic oxide forming the cathode is a material having a high resistance value and is formed as a thin film, there is a problem that the cathode has a structure in which it is difficult to conduct electricity.

  The present invention has been made in view of the circumstances described above, and reduces the resistance of the cathode and forms a thin layer having a gas barrier property, and flattens the base of the thin layer to relieve stress concentration on the thin layer. It is an object of the present invention to provide an electro-optical device, a manufacturing method thereof, and an electronic apparatus.

The electro-optical device, the electro-optical device manufacturing method, and the electronic apparatus according to the present invention employ the following means in order to solve the above problems.
According to a first aspect of the present invention, a plurality of first electrodes, a bank layer having a plurality of openings corresponding to positions where the first electrodes are formed, and an electro-optic layer disposed in each of the openings, A second electrode covering the bank layer and the electro-optic layer; a buffer layer laminated on the second electrode and having a substantially flat upper surface; and covering the buffer layer and being electrically connected to the second electrode. A conductive layer that covers the second electrode and the buffer layer, extends to the outside of the second electrode, and is in contact with the substrate outside the second electrode. I did it.
According to a first aspect of the present invention, a plurality of first electrodes, a bank structure having a plurality of openings corresponding to positions where the first electrodes are formed on the substrate, an electro-optic layer disposed in each of the openings, An electro-optical device having a bank structure and a second electrode that covers the electro-optical layer, a buffer layer that covers the second electrode and has a substantially flat upper surface, and covers the buffer layer and is electrically connected to the second electrode. And a conductive layer. According to the present invention, the buffer layer relieves the stress generated by the warp or volume change generated from the substrate side. Therefore, peeling of the second electrode from the unstable bank structure can be prevented. In addition, since the upper surface of the buffer layer is substantially flattened, the conductive layer made of a hard film formed on the buffer layer is flattened, so that there is no portion where stress is concentrated on the conductive layer. Thereby, generation | occurrence | production of the crack to a conductive layer can be prevented. Furthermore, since the conductive layer is electrically connected to the second electrode, the resistance of the second electrode can be reduced, power consumption can be reduced, and heat generation can be suppressed.

In addition, when a protective layer for preventing corrosion of the second electrode is provided between the second electrode and the buffer layer, corrosion of the second cathode can be prevented during the manufacturing process, and the second cathode is good. High conductivity can be maintained.
In addition, when the conductive layer has gas barrier properties, the second electrode and the light emitting layer can be protected from oxygen, moisture, and the like.
Further, in the case where the buffer layer is provided with a contact hole for conducting the conductive layer and the second electrode, the contact point between the conductive layer and the second electrode is increased, so that the conductivity between the conductive layer and the second electrode is improved. Further, the resistance of the second electrode can be reduced.
Further, in the case where the contact hole is provided in the upper part of the bank structure, the light path of the light generated from the light emitting layer is not blocked, so that good light emitting performance can be maintained.
In addition, in the case where the wall surface forming the opening in the bank structure is formed so as to have an angle of 110 to 170 degrees with respect to the base body, the light emitting layer is easily disposed in the opening, so that the light emitting layer is improved. Can be formed.
Further, when the wall surface forming the opening in the bank structure is formed so that at least the surface thereof has liquid repellency, the light emitting layer can be reliably disposed in the opening.
Further, in the case where the buffer layer covers a wider area than the bank structure so that the bank structure is not exposed, the uneven shape formed on the surface of the second electrode due to the influence of the bank structure is not leaked. It can be flattened.
If the conductive layer covers a wider area than the buffer layer so that the buffer layer is not exposed, the gas barrier layer can be planarized over substantially the entire surface.
Further, in the case where the conductive layer and / or the protective layer are formed so as to be in contact with the insulating layer on the outer peripheral portion of the substrate, the second electrode can be shielded from moisture and the like.
In the case where the protective layer or the protective layer and the conductive layer are formed so as to be in contact with each other at the outer peripheral portion of the substrate, the second electrode can be almost completely shielded from moisture and the like, and the conductive layer and the protective layer Alternatively, conductivity with the protective layer can be ensured.
The second electrode covers the bank layer, extends to the outside of the bank layer, and is in contact with the base body on the outside of the bank layer.
The second electrode and the conductive layer extend to the outside of the buffer layer and are in contact with each other in the outer peripheral region of the buffer layer.
In addition, a second electrode wiring is provided on the outer peripheral portion of the base, and the second electrode wiring is connected to the second electrode outside the bank layer.
The second electrode is in contact with the second electrode wiring and the conductive layer in an outer peripheral region of the buffer layer.
Further, a protective layer that covers the conductive layer is provided on the conductive layer, and an adhesive layer that bonds the conductive layer and the protective layer is provided between the conductive layer and the protective layer. Yes.

According to a second aspect of the present invention, a plurality of first electrodes, a bank layer having a plurality of openings corresponding to positions where the first electrodes are formed, and an electro-optic layer disposed in each of the openings, And a second electrode covering the bank layer and the electro-optic layer, and a step of disposing a buffer layer on the second electrode and forming a substantially flat upper surface by a wet process; A conductive layer that is electrically connected to the second electrode on the buffer layer, covers the entire surface of the second electrode and the buffer layer, and extends to the outside of the second electrode, and on the outside of the second electrode, And a step of forming the substrate so as to be in contact with the substrate.
According to a second aspect of the invention, a plurality of first electrodes, a bank structure having a plurality of openings corresponding to positions where the first electrodes are formed on the substrate, an electro-optic layer disposed in each of the openings, In a method of manufacturing an electro-optical device having a bank structure and a second electrode covering the electro-optical layer, a step of disposing a buffer layer on the second electrode by a wet process and forming a substantially flat upper surface; And a step of forming a conductive layer electrically connected to the second electrode. According to this invention, the buffer layer relieves stress generated by warpage or volume change generated from the substrate side. Therefore, peeling of the second electrode from the unstable bank structure can be prevented. In addition, since the upper surface of the buffer layer is substantially flattened, the conductive layer made of a hard film formed on the buffer layer is flattened, so that there is no portion where stress is concentrated on the conductive layer. Thereby, generation | occurrence | production of the crack to a conductive layer can be prevented. Furthermore, since the conductive layer is electrically connected to the second electrode, the resistance of the second electrode can be reduced, power consumption can be reduced, and heat generation can be suppressed.

  According to a third aspect of the invention, the electronic apparatus includes the electro-optical device of the first invention or the electro-optical device obtained by the manufacturing method of the second invention. According to the present invention, the gas barrier layer is not peeled off or cracks are generated, so that deterioration of the light emitting layer due to moisture or the like is prevented. Therefore, an electronic device that can display a vivid image for a long time can be obtained.

Hereinafter, embodiments of an electro-optical device, a method for manufacturing the electro-optical device, and an electronic apparatus according to the present invention will be described with reference to the drawings.
As an electro-optical device, an EL display device using an electroluminescent material as an example of an electro-optical material, in particular, an organic electroluminescence (EL) material will be described.
FIG. 1 is a diagram showing a wiring structure of the EL display device 1. The EL display device 1 is an active matrix EL display device using a thin film transistor (hereinafter abbreviated as TFT) as a switching element.

As shown in FIG. 1, the EL display device (electro-optical device) 1 includes a plurality of scanning lines 101, a plurality of signal lines 102 extending in a direction perpendicular to each scanning line 101, and each signal line 102. And a plurality of power supply lines 103 extending in parallel with each other, and a pixel region X is provided in the vicinity of each intersection of the scanning line 101 and the signal line 102.
A data line driving circuit 100 including a shift register, a level shifter, a video line, and an analog switch is connected to the signal line 102. Further, a scanning line driving circuit 80 including a shift register and a level shifter is connected to the scanning line 101.

  Further, in each pixel region X, a switching TFT 112 to which a scanning signal is supplied to the gate electrode via the scanning line 101 and a pixel signal to be supplied from the signal line 102 via the switching TFT 112 are held. A capacitor 113, a driving TFT 123 to which a pixel signal held by the holding capacitor 113 is supplied to the gate electrode, and driving from the power line 103 when electrically connected to the power line 103 through the driving TFT 123 A pixel electrode (electrode) 23 into which current flows and a functional layer 110 sandwiched between the pixel electrode 23 and the cathode (electrode) 50 are provided. The pixel electrode 23, the cathode 50, and the functional layer 110 constitute a light emitting element (organic EL element).

  According to the EL display device 1, when the scanning line 101 is driven and the switching TFT 112 is turned on, the potential of the signal line 102 at that time is held in the holding capacitor 113, and according to the state of the holding capacitor 113. The on / off state of the driving TFT 123 is determined. Then, current flows from the power supply line 103 to the pixel electrode 23 through the channel of the driving TFT 123, and further current flows to the cathode 50 through the functional layer 110. The functional layer 110 emits light according to the amount of current flowing through it.

Next, a specific configuration of the EL display device 1 will be described with reference to FIGS.
As shown in FIG. 2, the EL display device 1 includes a pixel electrode in which a substrate 20 having electrical insulation and pixel electrodes connected to switching TFTs (not shown) are arranged in a matrix on the substrate 20. An area (not shown), a power line (not shown) arranged around the pixel electrode area and connected to each pixel electrode, and a pixel portion 3 having a substantially rectangular shape in plan view located at least on the pixel electrode area (In the dashed-dotted line frame in FIG. 2).
In the present invention, the substrate 20 and the switching TFT and various circuits formed on the substrate 20 as will be described later, and an interlayer insulating film are referred to as a base. (Indicated by reference numeral 200 in FIGS. 3 and 4)

The pixel unit 3 includes a real display area 4 in the center (inside the two-dot chain line in FIG. 2) and a dummy area 5 (area between the one-dot chain line and the two-dot chain line) arranged around the real display area 4. It is divided into.
In the actual display area 4, display areas R, G, and B each having a pixel electrode are arranged in a matrix so as to be separated from each other in the AB direction and the CD direction.
Further, scanning line drive circuits 80 and 80 are arranged on both sides of the actual display area 4 in FIG. These scanning line drive circuits 80 and 80 are arranged below the dummy region 5.

  Further, an inspection circuit 90 is arranged above the actual display area 4 in FIG. The inspection circuit 90 is a circuit for inspecting the operating state of the EL display device 1 and includes, for example, inspection information output means (not shown) for outputting the inspection result to the outside, and is displayed during manufacture or at the time of shipment. The apparatus is configured to be able to inspect the quality and defect of the apparatus. The inspection circuit 90 is also disposed below the dummy area 5.

  The scanning line driving circuit 80 and the inspection circuit 90 are applied with a driving voltage from a predetermined power supply unit via the driving voltage conducting unit 310 (see FIG. 3) and the driving voltage conducting unit 340 (see FIG. 4). Composed. Further, the drive control signal and drive voltage to the scanning line drive circuit 80 and the inspection circuit 90 are supplied from a predetermined main driver for controlling the operation of the EL display device 1 and the drive control signal conduction unit 320 (see FIG. 3) and Transmission and application are performed via the drive voltage conduction unit 350 (see FIG. 4). The drive control signal in this case is a command signal from a main driver or the like related to control when the scanning line drive circuit 80 and the inspection circuit 90 output signals.

In addition, as shown in FIGS. 3 and 4, the EL display device 1 has a large number of light-emitting elements (organic EL elements) each including a pixel electrode 23, a light-emitting layer 60, and a cathode 50 on a substrate 200, and these are further formed. A buffer layer 210, a conductive layer 30 and the like are formed so as to cover them.
The light emitting layer 60 is typically a light emitting layer (electroluminescence layer), and includes a carrier injection layer or a carrier transport layer such as a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer. thing. Furthermore, a hole blocking layer (hole blocking layer) and an electron blocking layer (electron blocking layer) may be provided.

  In the case of a so-called top emission type EL display device, the substrate 20 constituting the base body 200 is configured to extract emitted light from the conductive layer 30 side that is the opposite side of the substrate 20, so that either a transparent substrate or an opaque substrate is used. Can also be used. Examples of opaque substrates include ceramics such as alumina, metal sheets such as stainless steel that have been subjected to insulation treatment such as surface oxidation, thermosetting resins and thermoplastic resins, and films thereof (plastic films). It is done.

  In the case of a so-called bottom emission type EL display device, since the emitted light is extracted from the substrate 20 side, a transparent or semi-transparent substrate 20 is employed. For example, glass, quartz, resin (plastic, plastic film) and the like can be mentioned, and a glass substrate is particularly preferably used. In the present embodiment, a top emission type in which emitted light is extracted from the conductive layer 30 side, and therefore, the above-described opaque substrate, for example, an opaque plastic film, is used as the substrate 20.

A circuit unit 11 including a driving TFT 123 for driving the pixel electrode 23 and the like is formed on the substrate 20, and a large number of light emitting elements (organic EL elements) are provided thereon. As shown in FIG. 5, the light emitting element includes a pixel electrode 23 that functions as an anode, a hole transport layer 70 that injects / transports holes from the pixel electrode 23, and an organic EL that is one of electro-optic materials. The light-emitting layer 60 including the substance and the cathode 50 are sequentially formed.
Based on such a configuration, the light emitting element emits light by combining holes injected from the hole transport layer 70 and electrons from the cathode 50 in the light emitting layer 60.

Since the pixel electrode 23 is a top emission type in this embodiment, it does not need to be transparent, and is therefore formed of an appropriate conductive material.
As a material for forming the hole transport layer 70, for example, a polythiophene derivative, a polypyrrole derivative, or a doped body thereof is used. Specifically, 3,4-polyethylenediosithiophene / polystyrene sulfonic acid (PEDOT / PSS) dispersion, that is, 3,4-polyethylenediosithiophene is dispersed in polystyrene sulfonic acid as a dispersion medium. A dispersion in which water is dispersed in water is used.

As a material for forming the light emitting layer 60, a known light emitting material capable of emitting fluorescence or phosphorescence can be used. Specifically, (poly) fluorene derivative (PF), (poly) paraphenylene vinylene derivative (PPV), polyphenylene derivative (PP), polyparaphenylene derivative (PPP), polyvinylcarbazole (PVK), polythiophene derivative, polymethyl Polysilanes such as phenylsilane (PMPS) are preferably used.
In addition, these polymer materials include polymer materials such as perylene dyes, coumarin dyes, rhodamine dyes, rubrene, perylene, 9,10-diphenylanthracene, tetraphenylbutadiene, Nile red, coumarin 6, and quinacridone. It can also be used by doping a low molecular weight material such as.
In addition, it replaces with the polymeric material mentioned above, a conventionally well-known low molecular material can also be used.
In addition, an electron injection layer may be formed on the light emitting layer 60 as necessary.

In the present embodiment, the hole transport layer 70 and the light emitting layer 60 are composed of the lyophilic control layer 25 and the organic bank layer 221 formed in a lattice shape on the substrate 200 as shown in FIGS. The hole transport layer 70 and the light emitting layer 60 surrounded by the element layer are element layers constituting a single light emitting element (organic EL element).
Note that the angle θ of each wall surface of the opening 221a of the organic bank layer 221 with respect to the surface of the base body 200 is 110 degrees or more and 170 degrees or less (see FIG. 5). The reason for this angle is to facilitate the arrangement of the light emitting layer 60 in the opening 221a when the light emitting layer 60 is formed by a wet process.

  As shown in FIGS. 3 to 5, the cathode 50 has a larger area than the total area of the actual display region 4 and the dummy region 5, and is formed so as to cover each, and the light emitting layer 60 and the organic bank layer 221. These are formed on the substrate 200 so as to cover the upper surface of the substrate and the wall surface forming the outer portion of the organic bank layer 221. The cathode 50 is connected to the cathode wiring 202 formed on the outer periphery of the substrate 200 outside the organic bank layer 221 as shown in FIG. A flexible substrate 203 is connected to the cathode wiring 202, whereby the cathode 50 is connected to a driving IC (driving circuit) (not shown) on the flexible substrate 203 via the cathode wiring 202.

  As a material for forming the cathode 50, since this embodiment is a top emission type, it needs to be light transmissive, and therefore, a transparent conductive material is used. As the transparent conductive material, ITO (Indium Tin Oxide: Indium Tin Oxide) is preferable. O) (registered trademark) or the like can be used. A material generally used for the cathode, such as aluminum, silver, and magnesium, may be formed as a thin film having a thickness of 100 nm or less to form a translucent electrode. In the present embodiment, ITO is used.

  A cathode protective layer 55 may be formed on the upper layer portion of the cathode 50. The cathode protective layer 55 is a layer provided to prevent the cathode 50 from being corroded during the manufacturing process, and is an inorganic compound such as ITO, ICO (indium cerium oxide), IZO (registered trademark), silicon. Formed by the compound. By covering the cathode 50 with the cathode protective layer 55 made of an inorganic compound, it is possible to satisfactorily prevent oxygen and the like from entering the cathode 50 made of an inorganic oxide. The cathode protective layer 55 is formed to a thickness of about 10 nm to 300 nm up to the insulating layer 284 on the outer peripheral portion of the substrate 200.

A buffer layer 210 is provided on the cathode 50 so as to cover a portion other than the outer portion of the cathode 50 in a wider range than the organic bank layer 221. The buffer layer 210 is disposed so as to fill the convex and concave portions of the cathode 50 formed into a convex and concave shape due to the influence of the shape of the organic bank layer 221, and the upper surface thereof is formed to be substantially flat.
The buffer layer 210 has a function of relieving the warp generated from the substrate 200 side and the stress generated by the volume change and preventing the cathode 50 from peeling from the unstable organic bank layer 221. Further, since the upper surface of the buffer layer 210 is substantially flattened, the conductive layer 30 made of a hard film formed on the buffer layer 210 is also flattened, so that there is no portion where stress is concentrated. The generation of cracks to 30 is prevented.
As the buffer layer 210, a polymer material having lipophilicity and low water absorption, for example, polyolefin or polyether is preferable. Alternatively, an organosilicon polymer obtained by hydrolyzing and condensing alkoxysilane such as methyltrimethoxysilane may be used. Furthermore, by using a polymer containing a silicon compound such as a silane coupling agent, the adhesion at the interface between the cathode 50 and the conductive layer 30 can be improved.
A contact hole 212 is preferably provided on the upper surface of the organic bank layer 221 in the buffer layer 210, that is, on a portion other than the opening 211 a. In the contact hole 212, since the conductive layer 30 described later is formed, the cathode 50 and the conductive layer 30 become conductive, so that the wiring resistance of the cathode 50 is reduced. The contact hole has an opening shape such as a circle, an ellipse, or a rectangle. In order to make it easier for the conductive layer 30 to enter the contact hole 212, it is desirable to form the upper side of the contact hole 212 in a larger opening than the lower side.

Further, the conductive layer 30 is provided on the buffer layer 210 so as to cover a portion of the buffer layer 210 exposed on the base body 200. Then, the conductive layer 30 is formed up to the insulating layer 284 on the outer peripheral portion of the substrate 200. Note that the cathode protective layer 55 may be contacted on the insulating layer 284.
Since the conductive layer 30 has conductivity and is connected to the cathode 50, a current flows together with the cathode 50. Thereby, the conductive efficiency of the cathode 50 is improved, and the resistance of the cathode 50 is reduced.
The conductive layer 30 has a gas barrier property to prevent oxygen and moisture from entering the inside of the EL display device 1, thereby preventing oxygen and moisture from entering the cathode 50 and the light emitting layer 60. Deterioration of the cathode 50 and the light emitting layer 60 due to oxygen and moisture is suppressed.

As a material for forming the conductive layer 30, since this embodiment is a top emission type, it needs to be light transmissive. Therefore, like the cathode 50, a transparent conductive material such as ITO, IZO, ICO, etc. (Indium cerium oxide) is used.
Thus, when the conductive layer 30 is formed of a metal oxide, the adhesion between the conductive layer 30 and the cathode 50 is improved and the conductivity is improved particularly when the cathode 50 is formed of ITO. Furthermore, the conductive layer 30 becomes a dense layer having no defects, and the barrier property against oxygen and moisture becomes better.
Further, the thickness of the conductive layer 30 is preferably 10 nm or more and 500 nm or less. If it is less than 10 nm, through holes may be partially formed due to film defects or film thickness variations, and the gas barrier property may be impaired. If it exceeds 500 nm, cracks due to stress occur. This is because it may occur.

Further, a protective layer 204 that covers the conductive layer 30 is provided outside the conductive layer 30 (see FIG. 8). The protective layer 204 includes an adhesive layer 205 and a surface protective layer 206 provided on the conductive layer 30 side.
The adhesive layer 205 fixes the surface protective layer 206 on the conductive layer 30 and has a buffer function against mechanical shock from the outside. For example, a resin such as urethane, acrylic, epoxy, and polyolefin Thus, it is formed of an adhesive made of a material that is softer and has a lower glass transition point than the surface protective layer 206 described later. Note that it is preferable to add a silane coupling agent or alkoxysilane to such an adhesive, and in this way, the adhesion between the formed adhesive layer 205 and the conductive layer 30 is improved. Therefore, the shock absorbing function against mechanical shock is increased.

The surface protective layer 206 is provided on the adhesive layer 205 and constitutes the surface side of the protective layer 204, and has functions such as pressure resistance, wear resistance, external light antireflection, gas barrier properties, and ultraviolet blocking properties. A layer comprising at least one of the following. Specifically, it is formed of a polymer layer (plastic film), a DLC (diamond-like carbon) layer, glass or the like.
In the EL display device of this example, when the top emission type is used, both the surface protective layer 206 and the adhesive layer 205 need to be translucent, but when the bottom emission type is used, this is necessary. There is no.

A circuit unit 11 is provided below the light emitting element as shown in FIG. The circuit unit 11 is formed on the substrate 20 and constitutes the base body 200. That is, a base protective layer 281 mainly composed of SiO ₂ is formed on the surface of the substrate 20, and a silicon layer 241 is formed thereon. A gate insulating layer 282 mainly composed of SiO ₂ and / or SiN is formed on the surface of the silicon layer 241.

In addition, a region of the silicon layer 241 that overlaps with the gate electrode 242 with the gate insulating layer 282 interposed therebetween is a channel region 241a. The gate electrode 242 is a part of the scanning line 101 (not shown). On the other hand, a first interlayer insulating layer 283 mainly composed of SiO ₂ is formed on the surface of the gate insulating layer 282 that covers the silicon layer 241 and on which the gate electrode 242 is formed.

  Further, in the silicon layer 241, a low concentration source region 241b and a high concentration source region 241S are provided on the source side of the channel region 241a, while a low concentration drain region 241c and a high concentration drain are provided on the drain side of the channel region 241a. The region 241D is provided to form a so-called LDD (Light Doped Drain) structure. Among these, the high-concentration source region 241S is connected to the source electrode 243 through a contact hole 243a that opens over the gate insulating layer 282 and the first interlayer insulating layer 283. The source electrode 243 is configured as a part of the above-described power supply line 103 (see FIG. 1, extending in the direction perpendicular to the paper surface at the position of the source electrode 243 in FIG. 5). On the other hand, the high-concentration drain region 241D is connected to the drain electrode 244 made of the same layer as the source electrode 243 through a contact hole 244a that opens through the gate insulating layer 282 and the first interlayer insulating layer 283.

The upper layer of the first interlayer insulating layer 283 on which the source electrode 243 and the drain electrode 244 are formed is covered with a second interlayer insulating layer 284 mainly composed of, for example, an acrylic resin component. The second interlayer insulating layer 284 can be made of a material other than an acrylic insulating film, such as SiN or SiO ₂ . A pixel electrode 23 made of ITO is formed on the surface of the second interlayer insulating layer 284 and is connected to the drain electrode 244 through a contact hole 23 a provided in the second interlayer insulating layer 284. That is, the pixel electrode 23 is connected to the high concentration drain region 241D of the silicon layer 241 through the drain electrode 244.

  Note that TFTs (driving circuit TFTs) included in the scanning line driving circuit 80 and the inspection circuit 90, that is, N-channel type or P-channel type TFTs constituting an inverter included in the shift register among these driving circuits, for example. The structure is the same as that of the driving TFT 123 except that it is not connected to the pixel electrode 23.

On the surface of the second interlayer insulating layer 284 on which the pixel electrode 23 is formed, the pixel electrode 23, the lyophilic control layer 25 and the organic bank layer 221 described above are provided. The lyophilic control layer 25 is mainly made of a lyophilic material such as SiO ₂ , and the organic bank layer 221 is made of acrylic or polyimide. Then, on the pixel electrode 23, the hole transport layer 70 and the light emitting layer 60 are formed inside the opening 25 a provided in the lyophilic control layer 25 and the opening 221 a surrounded by the organic bank layer 221. Are stacked in this order. In addition, “lyophilic” of the lyophilic control layer 25 in this embodiment means that the lyophilic property is higher than at least materials such as acrylic and polyimide constituting the organic bank layer 221. .
The layers up to the second interlayer insulating layer 284 on the substrate 20 described above constitute the circuit unit 11.

  Here, in the EL display device 1 of the present embodiment, each light emitting layer 60 is formed so that the light emission wavelength bands correspond to the three primary colors of light in order to perform color display. For example, as the light emitting layer 60, a red light emitting layer 60R whose light emission wavelength band corresponds to red, a green light emitting layer 60G corresponding to green, and a blue organic EL layer 60B corresponding to blue, respectively, are displayed. , G, and B, one pixel that performs color display is configured with the display regions R, G, and B. Further, a BM (black matrix) (not shown) in which metallic chromium is formed by sputtering or the like is formed between the organic bank layer 221 and the lyophilic control layer 25 at the boundary of each color display region.

Next, an example of a method for manufacturing the EL display device 1 according to the present embodiment will be described with reference to FIGS. Each of the cross-sectional views shown in FIGS. 6 and 7 corresponds to the cross-sectional view taken along the line AB in FIG.
In this embodiment, the EL display device 1 as an electro-optical device is a top emission type, and the process of forming the circuit portion 11 on the surface of the substrate 20 is not different from the conventional technique. Description is omitted.

First, as shown in FIG. 6A, a conductive film to be the pixel electrode 23 is formed so as to cover the entire surface of the substrate 20 on which the circuit portion 11 is formed, and this transparent conductive film is further patterned. Thus, the pixel electrode 23 that is electrically connected to the drain electrode 244 through the contact hole 23a of the second interlayer insulating layer 284 is formed, and at the same time, the dummy pattern 26 in the dummy region is also formed.
3 and 4, the pixel electrode 23 and the dummy pattern 26 are collectively referred to as the pixel electrode 23. The dummy pattern 26 is configured not to be connected to the lower metal wiring via the second interlayer insulating layer 284. That is, the dummy pattern 26 is arranged in an island shape and has substantially the same shape as the shape of the pixel electrode 23 formed in the actual display region. Of course, the structure may be different from the shape of the pixel electrode 23 formed in the display region. In this case, the dummy pattern 26 includes at least one located above the drive voltage conduction unit 310 (340).

  Next, as shown in FIG. 6B, a lyophilic control layer 25, which is an insulating layer, is formed on the pixel electrode 23, the dummy pattern 26, and the second interlayer insulating film. In the pixel electrode 23, the lyophilic control layer 25 is formed so as to partially open, and holes can be transferred from the pixel electrode 23 in the opening 25a (see also FIG. 3). On the contrary, in the dummy pattern 26 in which the opening 25a is not provided, the insulating layer (lyophilic control layer) 25 serves as a hole movement shielding layer and does not cause hole movement. Subsequently, in the lyophilic control layer 25, a BM (black matrix) (not shown) is formed in a concave portion formed between two different pixel electrodes 23. Specifically, the concave portion of the lyophilic control layer 25 is formed by sputtering using metallic chromium.

  Then, as shown in FIG. 6C, an organic bank layer 221 is formed so as to cover a predetermined position of the lyophilic control layer 25, specifically, the BM described above. As a specific method for forming the organic bank layer, for example, an organic layer is formed by applying a resist in which a resist such as an acrylic resin or a polyimide resin is dissolved in a solvent by various coating methods such as a spin coating method or a dip coating method. . The constituent material of the organic layer may be any material as long as it does not dissolve in the ink solvent described later and is easily patterned by etching or the like.

Further, the organic layer is patterned using a photolithography technique and an etching technique to form an opening 221a in the organic layer, thereby forming an organic bank layer 221 having a wall surface in the opening 221a. Here, the wall surface forming the opening 221 is formed such that the angle θ with respect to the surface of the base body 200 is 110 degrees or more and 170 degrees or less.
In this case, the organic bank layer 221 includes at least the one located above the drive control signal conducting unit 320.

  Next, a region showing lyophilicity and a region showing liquid repellency are formed on the surface of the organic bank layer 221. In the present embodiment, each region is formed by plasma processing. Specifically, in the plasma treatment, the upper surface of the organic bank layer 221, the wall surface of the opening 221a, the electrode surface 23c of the pixel electrode 23, and the upper surface of the lyophilic control layer 25 are made lyophilic, respectively. The ink making step includes an ink repellent step, an ink repellent step for making the upper surface of the organic bank layer 221 and the wall surface of the opening 221a liquid repellent, and a cooling step.

That is, a base material (substrate 20 including a bank or the like) is heated to a predetermined temperature, for example, about 70 to 80 ° C., and then plasma treatment using oxygen as a reactive gas in an atmospheric atmosphere (O ₂ plasma treatment) as an ink-philic step. I do. Next, as an ink repellent process, a plasma process using CF ₄ as a reaction gas (CF ₄ plasma process) is performed in an air atmosphere, and then the substrate heated for the plasma process is cooled to room temperature. In addition, lyophilicity and liquid repellency are imparted to predetermined locations.

In this CF ₄ plasma treatment, the electrode surface 23c of the pixel electrode 23 and the lyophilic control layer 25 are somewhat affected, but the structure of the ITO that is the material of the pixel electrode 23 and the lyophilic control layer 25. Since materials such as SiO ₂ and TiO ₂ have poor affinity for fluorine, the hydroxyl group imparted in the ink-philic process is not substituted with the fluorine group, and the lyophilic property is maintained.

  Next, the hole transport layer 70 is formed by a hole transport layer forming step. In this hole transport layer forming step, for example, a hole transport layer material is applied onto the electrode surface 23c by a droplet discharge method such as an ink jet method or a spin coating method, and then a drying process and a heat treatment are performed. A hole transport layer 70 is formed on 23. When the hole transport layer material is selectively applied by, for example, the ink jet method, first, the hole transport layer material is filled in the ink jet head (not shown), and the discharge nozzle of the ink jet head is placed in the lyophilic control layer 25 Opposite the electrode surface 23c located in the formed opening 25a and moving the ink jet head and the base material (substrate 20) relative to each other, the liquid droplets whose liquid amount per droplet is controlled from the discharge nozzle It discharges to the surface 23c. Next, the discharged droplets are dried and the hole transport layer 70 is formed by evaporating the dispersion medium and the solvent contained in the hole transport layer material.

Here, the droplets ejected from the ejection nozzle spread on the electrode surface 23c that has been subjected to the lyophilic treatment, and are filled in the opening 25a of the lyophilic control layer 25. On the other hand, droplets are repelled and do not adhere to the upper surface of the organic bank layer 221 that has been subjected to ink repellent treatment. Therefore, even if the droplet is deviated from the predetermined discharge position and discharged onto the upper surface of the organic bank layer 221, the upper surface is not wetted by the droplet, and the repelled droplet is opened in the lyophilic control layer 25. Roll into part 25a.
In addition, after this hole transport layer formation process, in order to prevent the oxidation of the hole transport layer 70 and the light emitting layer 60, it is preferable to carry out in inert gas atmospheres, such as nitrogen atmosphere and argon atmosphere.

Next, the light emitting layer 60 is formed by the light emitting layer forming step. In this light emitting layer forming step, the light emitting layer forming material is ejected onto the hole transport layer 70 by, for example, an ink jet method, and then subjected to a drying process and a heat treatment, whereby the inside of the opening 221a formed in the organic bank layer 221 is formed. The light emitting layer 60 is formed. In this light emitting layer forming step, a nonpolar solvent that is insoluble in the hole transporting layer 70 is used as a solvent used for the light emitting layer forming material in order to prevent re-dissolution of the hole transporting layer 70.
In this light emitting layer forming step, for example, a blue (B) light emitting layer forming material is selectively applied to a blue display region by an inkjet method, dried, and then similarly treated with green (G) and red (R ) Is also selectively applied to the display area and dried.
If necessary, an electron injection layer may be formed on the light emitting layer 60 as described above.

Next, as shown in FIG. 7D, the cathode 50 is formed by the cathode layer forming step. In this cathode layer forming step, for example, ITO is formed by physical vapor deposition such as vapor deposition to form the cathode 50. At this time, the cathode 50 is formed so as to cover not only the upper surfaces of the light emitting layer 60 and the organic bank layer 221 but also the wall surface forming the outer portion of the organic bank layer 221.
When the cathode protective layer 55 is formed on the cathode 50, silicon oxide or the like is formed on the cathode 50 by a physical vapor deposition method such as an evaporation method.

Next, as shown in FIG. 7E, the buffer layer 210 is formed by a coating method, that is, a wet process. For example, in the case of forming by an ink jet method, first, a buffer layer material is filled in an ink jet head (not shown), the discharge nozzle of the ink jet head is made to face the cathode 50, and the ink jet head and the substrate (substrate 20) are relative to each other. While being moved, a droplet with a controlled liquid amount per droplet is ejected from the ejection nozzle to the cathode 50. Next, the discharged droplets are dried, and the buffer layer 210 is formed by evaporating the dispersion medium and solvent contained in the buffer layer material.
Further, the buffer layer material may be applied by a slit coat (or curtain coat) method. Further, in order to form the contact hole 212 simultaneously with the buffer layer 210, the buffer layer 210 may be formed by a screen printing method. Further, the contact hole 212 may be formed by applying a photoresist to the buffer layer 210 after the formation.

Next, as shown in FIG. 7G, the conductive layer 30 is formed so as to cover the cathode 50 and the buffer layer 210, that is, to cover all portions of the cathode 50 exposed on the substrate 200. As a result, the cathode 50 and the conductive layer 30 are connected at the outer peripheral portion of the cathode 50 and the contact hole 212 portion.
Here, as a method for forming the conductive layer 30, a film is first formed by a physical vapor deposition method such as a sputtering method or an ion plating method, and then a chemical vapor deposition method such as a plasma CVD method is used. It is preferable to form a film. Physical vapor deposition methods such as sputtering and ion plating generally provide a film with relatively good adhesion even to a heterogeneous substrate surface, but the resulting film is agglomerated and has defects. There are drawbacks such as being easy to form and a film having a large stress. Chemical vapor deposition, on the other hand, provides a dense and good film quality with few stresses and excellent step coverage, but generally provides adhesion and film-forming properties to a different substrate surface. There is a drawback that it is difficult. Therefore, for the initial film formation, a physical vapor deposition method is adopted, for example, half or more of the required film thickness is formed, and the chemical vapor deposition method is used in the later film formation, By making up for defects in the formed film, the conductive layer 30 having excellent gas barrier properties (barrier properties against oxygen and moisture) as a whole can be formed in a relatively short time.

In addition, the conductive layer 30 may be formed as a single layer using the same material, or may be formed by laminating a plurality of layers using different materials. The composition may be formed so as to change continuously or discontinuously in the film thickness direction.
When a plurality of layers are stacked with different materials, for example, as described above, the inner layer (layer on the cathode 50 side) formed by physical vapor deposition is a metal oxide, and chemical vapor deposition is performed. The outer layer formed by the method is preferably silicon oxynitride or silicon oxide.

Furthermore, when the inner layer is formed by physical vapor deposition, the amount of oxygen supplied into the film forming apparatus is initially reduced, and thereafter, the conductive layer 30 is formed by increasing continuously or discontinuously. The oxygen concentration inside may be formed to be lower on the cathode 50 side (inner side) and higher on the outer side.
The conductive layer 30 may be formed by a single film formation method. In this case, the conductive layer 30 is formed so that the oxygen concentration is lowered on the cathode 50 side (inside) as described above. It is preferable to do this.

Then, as shown in FIG. 8, a protective layer 204 including an adhesive layer 205 and a surface protective layer 206 is provided on the conductive layer 30. The adhesive layer 205 is applied substantially uniformly on the conductive layer 30 by a slit coat method or the like, and the surface protective layer 206 is bonded thereon.
When the protective layer 204 is provided on the conductive layer 30 in this way, the surface protective layer 206 has functions such as pressure resistance, wear resistance, antireflection, gas barrier properties, and ultraviolet blocking properties. The light emitting layer 60, the cathode 50, and also the gas barrier layer can be protected by the surface protective layer 206, and thus the life of the light emitting element can be extended.
Further, since the adhesive layer 205 exhibits a buffering function against mechanical shock, when mechanical shock is applied from the outside, the mechanical shock to the conductive layer 30 and the light emitting element inside thereof is reduced, and this mechanical It is possible to prevent functional deterioration of the light-emitting element due to mechanical impact.

As described above, the EL display device 1 is formed.
In such an EL display device 1, the buffer layer 210 that covers the cathode 50 and has a substantially flat upper surface is disposed between the cathode 50 and the conductive layer 30. The stress generated by the warp and volume change generated from the 200 side can be relieved, and peeling of the cathode 50 from the unstable organic bank layer 221 can be prevented.
Furthermore, since the upper surface of the buffer layer 210 is substantially flattened, the conductive layer 30 made of a hard film formed on the buffer layer 210 is flattened, so that there is no portion where stress concentrates on the conductive layer 30. Thereby, generation | occurrence | production of the crack to the conductive layer 30 can be prevented.
Further, since the conductive layer 30 is electrically connected to the cathode 50, the resistance of the cathode 50 can be reduced, power consumption can be reduced, and heat generation can be suppressed.

  In the above-described embodiment, the top emission type EL display device 1 has been described as an example. However, the present invention is not limited to this, and the bottom emission type also emits emitted light on both sides. Applicable to types.

Further, in the case of a bottom emission type or a type that emits emitted light on both sides, the switching TFT 112 and the driving TFT 123 formed on the base 200 are not directly under the light emitting element, but the lyophilic control layer 25 and It is preferable to increase the aperture ratio by forming the organic bank layer 221 directly below.
In the EL display device 1, the first electrode in the present invention functions as an anode and the second electrode functions as a cathode, but these are reversed to make the first electrode a cathode and the second electrode an anode. It may be configured to function as each. However, in that case, the formation positions of the light emitting layer 60 and the hole transport layer 70 need to be switched.

  In this embodiment, the EL display device 1 is applied to the electro-optical device. However, the present invention is not limited to this, and the second electrode is basically provided outside the substrate. Any type of electro-optical device can be applied.

Next, the electronic apparatus of the present invention will be described. The electronic apparatus has the above-described EL display device (electro-optical device) 1 as a display unit, and specifically, the one shown in FIG.
FIG. 9A is a perspective view showing an example of a mobile phone. In FIG. 9A, a mobile phone 1000 includes a display unit 1001 using the EL display device 1 described above.
FIG. 9B is a perspective view illustrating an example of a wristwatch type electronic device. In FIG. 9B, a timepiece 1100 includes a display unit 1101 using the EL display device 1 described above.
FIG. 9C is a perspective view showing an example of a portable information processing apparatus such as a word processor or a personal computer. In FIG. 9C, the information processing apparatus 1200 includes an input unit 1201 such as a keyboard, a display unit 1202 using the EL display device 1 described above, and an information processing apparatus body (housing) 1203.
Each of the electronic devices shown in FIGS. 9A to 9C includes the display units 1001, 1101, and 1202 each including the EL display device (electro-optical device) 1 described above. The life of the light emitting element of the display device is extended.

The figure which shows the wiring structure of EL display apparatus Schematic diagram showing the structure of an EL display device Sectional drawing which follows the AB line of FIG. Sectional drawing which follows the CD line of FIG. 3 is an enlarged cross-sectional view of the main part of FIG. The figure which shows the manufacturing method of EL display apparatus in order of a process The figure which shows the process of following FIG. The figure which shows the process of following FIG. Illustration showing electronic devices

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Display apparatus (electro-optical apparatus), 23 Pixel electrode (1st electrode), 30 Conductive layer, 50 Cathode (2nd electrode), 55 Cathode protective layer (protective layer), 60 Light emitting layer (electro-optical layer), 200 Base | substrate , 210 buffer layer, 221 organic bank layer (bank structure), 221a opening, 1000 mobile phone (electronic device), 1100 watch (electronic device), 1200 information processing device (electronic device), 1001, 1101, 1202 display unit (Electro-optical device)

Claims (17)

On the substrate,
A plurality of first electrodes;
A bank layer having a plurality of openings corresponding to the formation position of the first electrode;
An electro-optic layer disposed in each of the openings;
A second electrode covering the bank layer and the electro-optic layer;
A buffer layer laminated on the second electrode and having a substantially flat upper surface;
A conductive layer that covers the buffer layer and is electrically connected to the second electrode ;
The electro-optical device , wherein the conductive layer covers the second electrode and the buffer layer, extends to the outside of the second electrode, and is in contact with the base on the outside of the second electrode .   2. The electro-optical device according to claim 1, wherein the second electrode covers the bank layer, extends to the outside of the bank layer, and is in contact with the base on the outside of the bank layer.   3. The electro-optical device according to claim 1, wherein the second electrode and the conductive layer extend to the outside of the buffer layer and are in contact with each other in an outer peripheral region of the buffer layer. A second electrode wiring is provided on the outer periphery of the base body,
  4. The electro-optical device according to claim 1, wherein the second electrode wiring is connected to the second electrode outside the bank layer. 5.   The electro-optical device according to claim 4, wherein the second electrode is in contact with the second electrode wiring and the conductive layer in an outer peripheral region of the buffer layer.   A protective layer covering the conductive layer is provided on the conductive layer,
  6. The electro-optical device according to claim 1, wherein an adhesive layer that bonds the conductive layer and the protective layer is provided between the conductive layer and the protective layer. . Wherein between the second electrode and the buffer layer, an electro-optical device according to any one of claims 1 to 6, characterized in that the second electrode protective layer is provided. The electro-optical device according to claim 7 , wherein the conductive layer and / or the second electrode protective layer is formed so as to contact an insulating layer on an outer peripheral portion of the base. Wherein the second electrode protective layer and the conductive layer, an electro-optical device according to claim 7 or 8, characterized in that it is formed so as to contact the outer peripheral portion of the substrate. The buffer layer, the so bank layer is not exposed, the electro-optical device according to any one of claims 1 to 9, characterized in that covers a wider range than the bank layer. Wherein the buffer layer, an electro-optical device according to any one of claims 1 to 10, characterized in that contact holes for electrically connecting the second electrode and the conductive layer is provided. The electro-optical device according to claim 11 , wherein the contact hole is provided in an upper part of the bank layer . Wall surface forming said opening in said bank layer, an electro-optic according to any one of claims 1 to 12, characterized in that it is formed to have an angle of 170 degrees from the substrate and 110 degrees apparatus. The electro-optical device according to any one of claims 1 to 13, wherein a wall surface forming the opening in the bank layer is formed so that at least a surface thereof has liquid repellency. The conductive layer, an electro-optical device according to any one of claims 1 to 14 characterized by having a gas barrier property. On the substrate, a plurality of first electrodes, a bank layer having a plurality of openings corresponding to the positions where the first electrodes are formed, an electro-optic layer disposed in each of the openings, the bank layer, and the bank layer In a method for manufacturing an electro-optical device having a second electrode covering the electro-optical layer,
Disposing a buffer layer on the second electrode by a wet process and forming a substantially flat upper surface;
A conductive layer electrically connected to the second electrode on the buffer layer; covers the entire surface of the second electrode and the buffer layer; and extends to the outside of the second electrode so as to be outside the second electrode. And a method of manufacturing the electro-optical device. An electro-optical device, or an electronic apparatus, characterized in that it comprises an electro-optical device obtained by the production method according to claim 16 as claimed in any one of claims 1 to 15.

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