JP2010278379A - Wiring board and method of manufacturing the same - Google Patents

Wiring board and method of manufacturing the same Download PDF

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JP2010278379A
JP2010278379A JP2009131905A JP2009131905A JP2010278379A JP 2010278379 A JP2010278379 A JP 2010278379A JP 2009131905 A JP2009131905 A JP 2009131905A JP 2009131905 A JP2009131905 A JP 2009131905A JP 2010278379 A JP2010278379 A JP 2010278379A
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conductor
insulating layer
surface side
plane
wiring board
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Yuki Yamamoto
祐樹 山本
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board which is greatly improved in electric connection reliability of an in-plane conductor on one and the other principal surface sides of an insulating layer, and a method of manufacturing the same. <P>SOLUTION: A first in-plane conductor part 3 forming an in-plane conductor on the one principal surface side of the insulating layer 2, a second in-plane conductor part 4 forming an in-plane conductor on the other principal surface side of the insulating layer 2, and an interlayer conductor part 5 as an interlayer connector electrically connecting both the in-plane conductor parts 3 and 4 are successively formed by processing copper foils 6 as conductive members of the same material. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

本発明は、絶縁層の一方、他方の主面側の面内導体を層間接続体(貫通ビア等)により電気的に接続した構造の配線基板およびその製造方法に関し、詳しくは、前記面内導体間の電気的特性を飛躍的に改善する層間接続構造および、該層間接続構造を備えた配線基板の製造方法に関する。   The present invention relates to a wiring board having a structure in which an in-plane conductor on one of the other main surfaces of an insulating layer is electrically connected by an interlayer connector (through via or the like), and a method of manufacturing the same. The present invention relates to an interlayer connection structure that drastically improves the electrical characteristics between them, and a method of manufacturing a wiring board having the interlayer connection structure.

従来、絶縁層の両面に配線パターンが形成された配線基板(両面配線基板)や、この配線基板上に部品を実装して絶縁層で覆った構造の多層基板を形成する場合、配線基板は、貫通ビア等の層間接続体を用いて、例えば図7に示すように製造される。   Conventionally, when a wiring board having a wiring pattern formed on both sides of an insulating layer (double-sided wiring board) or a multilayer board having a structure in which components are mounted on this wiring board and covered with an insulating layer is formed, For example, it is manufactured as shown in FIG. 7 using an interlayer connector such as a through via.

図7(a)〜(e)は従来の両面の配線基板(2層回路基板)の製造方法を示す断面図であり、まず、シート810を片面に張り付けたガラスエポキシ基板などの絶縁基板820の所定の個所に貫通孔830を形成し、その絶縁基板820の下面に第1の銅箔840を接着する(図7(a))。次に貫通孔830に導電性ペースト850を充填する(図7(b))。このとき、導電性ペースト850はシート810を印刷マスクとして印刷することにより充填される。次に絶縁基板820からシート810を剥離する(図7(c))。このとき、貫通孔830の上部にはシート810の厚みに依存する量の導電性ペースト850が絶縁基板820の表面以上に盛り上がった形状で残ることがある。次に絶縁基板820の上面に第2の銅箔860を張り付けた後、絶縁基板820と第2の銅箔860とを本接着するとともに、導電性ペースト850を硬化する(図7(d))。次に第1の銅箔840および第2の銅箔860を選択的にエッチングして第1の回路パターン870aおよび第2の回路パターン870bを形成する(図7(e))。このようにして、第1の回路パターン870aと第2の回路パターン870bとが貫通孔830に充填された導電性ペースト850によって電気的に接続され、両面の配線基板(2層配線回路基板)880が製造される。(例えば、特許文献1(段落[0002]−[0004]、図8等)参照)。   FIGS. 7A to 7E are cross-sectional views showing a conventional method for manufacturing a double-sided wiring board (two-layer circuit board). First, an insulating substrate 820 such as a glass epoxy substrate having a sheet 810 attached to one side is shown. A through hole 830 is formed at a predetermined location, and a first copper foil 840 is bonded to the lower surface of the insulating substrate 820 (FIG. 7A). Next, the through-hole 830 is filled with the conductive paste 850 (FIG. 7B). At this time, the conductive paste 850 is filled by printing using the sheet 810 as a print mask. Next, the sheet 810 is peeled from the insulating substrate 820 (FIG. 7C). At this time, an amount of the conductive paste 850 depending on the thickness of the sheet 810 may remain above the surface of the insulating substrate 820 above the through hole 830. Next, after the second copper foil 860 is attached to the upper surface of the insulating substrate 820, the insulating substrate 820 and the second copper foil 860 are bonded together and the conductive paste 850 is cured (FIG. 7D). . Next, the first copper foil 840 and the second copper foil 860 are selectively etched to form a first circuit pattern 870a and a second circuit pattern 870b (FIG. 7E). In this way, the first circuit pattern 870a and the second circuit pattern 870b are electrically connected by the conductive paste 850 filled in the through hole 830, and the double-sided wiring board (two-layer wiring circuit board) 880 is connected. Is manufactured. (See, for example, Patent Document 1 (paragraphs [0002]-[0004], FIG. 8)).

特開平6−268345号公報JP-A-6-268345

図7(d)の配線基板880は、絶縁層(絶縁基板820)の一方、他方の主面側の面内導体が金属箔(銅箔840、860の回路パターン870a、870b)により形成され、さらに、両主面側の面内導体を、貫通孔830に導電性ペースト850を充填して形成された層間接続体としての貫通ビアの端面に接合することにより、両面内導体が電気的に接続されている。   In the wiring substrate 880 of FIG. 7D, the in-plane conductor on the other main surface side of the insulating layer (insulating substrate 820) is formed of metal foil (circuit patterns 870a and 870b of the copper foils 840 and 860), Further, the in-plane conductors on both main surfaces are joined to the end face of the through via as an interlayer connector formed by filling the through-hole 830 with the conductive paste 850, whereby the double-sided inner conductor is electrically connected. Has been.

この場合、絶縁層の両主面側の面内導体と貫通ビアとは異なる導電材料で形成され、それらの間に異種材料の接合界面(以下、異種界面という)が存在する。そのため、配線基板880は、前記両主面側の面内導体(銅箔840、860)の貫通ビアを介した導通抵抗値が大きくなり、電気的な接続信頼性が低下する問題がある。   In this case, the in-plane conductors and the through vias on both main surfaces of the insulating layer are formed of different conductive materials, and a bonding interface of different materials (hereinafter referred to as a different interface) exists between them. For this reason, the wiring board 880 has a problem that the electrical connection reliability is lowered because the conduction resistance value through the through vias of the in-plane conductors (copper foils 840 and 860) on both main surfaces is increased.

本発明は、絶縁層の一方、他方の主面側の面内導体を層間接続体により電気的に接続した構造の配線基板において、両主面側の面内導体の電気的な接続信頼性を飛躍的に向上することを目的とし、また、絶縁層の両主面側の面内導体の電気的な接続信頼性が飛躍的に向上した新規な配線基板の製造方法を提供することを目的とする。   The present invention provides an electrical connection reliability of in-plane conductors on both main surfaces in a wiring board having a structure in which in-plane conductors on one main surface side of an insulating layer are electrically connected by an interlayer connector. An object is to dramatically improve the electrical connection reliability of the in-plane conductors on both main surfaces of the insulating layer, and to provide a novel method for manufacturing a wiring board. To do.

上記した目的を達成するために、本発明の配線基板は、絶縁層と、前記絶縁層の一方の主面側の面内導体を形成する第1面内導体部と、前記絶縁層の他方の主面側の面内導体を形成する第2面内導体部と、前記両内面導体部を電気的に接続する層間接続体としての層間導体部とを備え、前記両面内導体部および前記層間導体部は、同一材質の導電性部材により連続的に形成されていることを特徴としている(請求項1)。   In order to achieve the above-described object, a wiring board of the present invention includes an insulating layer, a first in-plane conductor portion that forms an in-plane conductor on one main surface side of the insulating layer, and the other of the insulating layer. A second in-plane conductor portion that forms an in-plane conductor on the main surface side; and an interlayer conductor portion as an interlayer connection body that electrically connects the inner surface conductor portions. The portion is formed continuously by a conductive member made of the same material (claim 1).

そして、前記層間導体部は、前記導電性部材を少なくとも一方の主面側から加工して中央部がくびれないように形成されていることが好ましい(請求項2)。さらに、前記導電性部材は、金属箔または金属板からなる金属導体であることが実用的である(請求項3)。   And it is preferable that the said interlayer conductor part is formed so that the center part may not be constricted by processing the said electroconductive member from the at least one main surface side (Claim 2). Further, it is practical that the conductive member is a metal conductor made of a metal foil or a metal plate.

つぎに、本発明の配線基板の製造方法は、金属箔または金属板からなる金属導体を支持部材上に剥離自在に接着する導体接着工程と、前記複合体の前記金属導体を加工して上面側から順の第1面内導体部、層間導体部、第2面内導体部を連続的に形成する導体加工工程と、加工した前記金属導体を絶縁層に内蔵し、前記第1面内導体部により前記絶縁層の一方の主面側の面内導体を形成し、前記第2面内導体部により前記絶縁層の他方の主面側の面内導体を形成する絶縁層形成工程と、前記支持部材を前記金属導体から剥離する剥離工程と、前記絶縁層を少なくとも前記一方の主面側から研磨して前記両面内導体部の表面を前記絶縁層から露出させる研磨工程とを含むことを特徴としている(請求項4)。   Next, the method for manufacturing a wiring board according to the present invention includes a conductor bonding step of releasably bonding a metal conductor made of a metal foil or a metal plate on a support member, and processing the metal conductor of the composite to the upper surface side. The first in-plane conductor portion, the inter-layer conductor portion, and the second in-plane conductor portion sequentially formed from the first, and the processed metal conductor is built in an insulating layer, and the first in-plane conductor portion Forming an in-plane conductor on one main surface side of the insulating layer, and forming an in-plane conductor on the other main surface side of the insulating layer by the second in-plane conductor portion; and the support A peeling step of peeling the member from the metal conductor, and a polishing step of polishing the insulating layer from at least one of the main surfaces to expose the surface of the double-sided conductor portion from the insulating layer. (Claim 4).

また、本発明の配線基板の製造方法は、金属箔または金属板からなる金属導体を第1の支持部材上に剥離自在に接着する第1接着工程と、前記第1の支持部材上の前記金属導体を上面側から加工して第1面内導体部および層間導体部および第2面内導体部を連続的に形成する第1導体加工工程と、前記第1導体加工工程により加工した前記金属導体を絶縁層に内蔵し、前記第1面内導体部により前記絶縁層の一方の主面側の面内導体を形成し、前記第2面内導体部により前記絶縁層の他方の主面側の面内導体を形成する絶縁層形成工程と、前記第1の支持部材を前記金属導体から剥離する第1剥離工程と、前記第1の支持部材の剥離後に前記絶縁層の前記一方の主面側に第2の支持部材を剥離自在に接着する第2接着工程と、前記金属導体の前記第1導体加工工程で残った部分を前記絶縁層の前記他方の主面側からさらに加工する第2導体加工工程と、前記第2の支持部材を前記金属導体から剥離する第2剥離工程と、前記絶縁層の前記両主面側を研磨して前記両面内導体部の表面を前記絶縁層から露出させる研磨工程とを含むことを特徴としている(請求項5)。   The wiring board manufacturing method of the present invention includes a first bonding step of releasably bonding a metal conductor made of a metal foil or a metal plate on the first support member, and the metal on the first support member. A first conductor processing step for continuously forming a first in-plane conductor portion, an interlayer conductor portion, and a second in-plane conductor portion by processing a conductor from the upper surface side, and the metal conductor processed by the first conductor processing step Embedded in the insulating layer, the first in-plane conductor portion forms an in-plane conductor on one main surface side of the insulating layer, and the second in-plane conductor portion on the other main surface side of the insulating layer. An insulating layer forming step of forming an in-plane conductor; a first peeling step of peeling the first support member from the metal conductor; and the one main surface side of the insulating layer after peeling of the first support member A second bonding step of releasably bonding the second support member to the metal conductor; A second conductor processing step of further processing a portion remaining in the first conductor processing step from the other main surface side of the insulating layer; a second peeling step of peeling the second support member from the metal conductor; And a polishing step of polishing both the main surface sides of the insulating layer to expose the surface of the double-sided inner conductor portion from the insulating layer (Claim 5).

請求項1の本発明の配線基板によれば、絶縁層の一方、他方の主面側の面内導体を形成する第1、第2面内導体部および、両内面導体部を電気的に接続する層間接続体としての層間導体部が、同一金属部材等の同一材質の導電性部材により連続的に形成されているため、それらの間に異種界面が存在しなくなる。そのため、本発明の配線基板は、前記両面内導体間の導通抵抗値が小さく、電気的な接続信頼性が飛躍的に向上する。   According to the wiring board of the first aspect of the present invention, the first and second in-plane conductor portions that form the in-plane conductors on the one and other main surfaces of the insulating layer, and both inner conductor portions are electrically connected. Since the interlayer conductor as the interlayer connection body is continuously formed of conductive members made of the same material such as the same metal member, there is no heterogeneous interface between them. Therefore, the wiring board of the present invention has a small conduction resistance value between the conductors on both sides, and the electrical connection reliability is greatly improved.

請求項2の本発明の配線基板によれば、第1、第2面内導体部および層間導体部が、導電性部材を少なくとも一方の主面側から他方の主面側に加工して形成されるため、層間導体部となる前記導電性部材の厚み方向の中央部分だけが極端にくびれて細く(狭く)なったりせず、両面内導体部の接続抵抗が確実に小さくなり、絶縁層の両主面側の面内導体間の電気的な接続信頼性を一層向上することができる。また、層間導体部等を所望の面積に形成することができるため、基板設計の自由度が増すとともに層間導体部等を極力小面積にして配線基板の小型化(小面積化)を図ることも可能になる。   According to the wiring board of the present invention of claim 2, the first and second in-plane conductor portions and the interlayer conductor portion are formed by processing the conductive member from at least one main surface side to the other main surface side. Therefore, only the central portion in the thickness direction of the conductive member that becomes the interlayer conductor portion is not extremely narrowed and thinned (narrow), and the connection resistance of the conductor portions on both sides is reliably reduced, so that both the insulating layers The electrical connection reliability between the in-plane conductors on the main surface side can be further improved. In addition, since the interlayer conductors and the like can be formed in a desired area, the degree of freedom in board design is increased, and the interlayer conductors and the like can be made as small as possible to reduce the size of the wiring board (reduction in area). It becomes possible.

請求項3の本発明の配線基板によれば、前記導電性部材を、入手容易で加工し易く、材質が均一な金属箔または金属板からなるの金属導体とするため、極めて実用的な材料を用いた構成で請求項1、2の効果を奏する配線基板を提供できる。   According to the wiring board of the present invention of claim 3, the conductive member is a metal conductor made of a metal foil or a metal plate that is readily available and easy to process and is made of a uniform material. A wiring board having the effects of claims 1 and 2 can be provided with the configuration used.

請求項4の本発明の配線基板の製造方法によれば、導体接着工程により金属導体を支持部材上に剥離自在に接着し、導体加工工程により支持部材上の金属導体を加工して第1面内導体部、層間導体部および第2面内導体部を連続的に形成することができる。つぎに、絶縁層形成工程により、加工した前記金属導体を支持部材に接着した状態で絶縁層に内蔵し、第1面内導体部により絶縁層の一方の主面側の面内導体を形成し、第2面内導体部により前記絶縁層の他方の主面側の面内導体を形成することができる。さらに、剥離工程により支持部材を金属導体から剥離し、研磨工程により絶縁層を少なくとも一方の主面側から研磨して両面内導体部の表面を絶縁層から露出させ、配線基板を製造することができる。この場合、金属導体を前記一方の主面側から一方向に加工する少ない工程で請求項1〜3の発明の効果を奏する配線基板を製造することができる。   According to the method for manufacturing a wiring board of the present invention of claim 4, the metal conductor is detachably bonded to the support member by the conductor bonding step, and the metal conductor on the support member is processed by the conductor processing step to form the first surface. The inner conductor portion, the interlayer conductor portion, and the second in-plane conductor portion can be formed continuously. Next, in the insulating layer forming step, the processed metal conductor is embedded in the insulating layer in a state of being bonded to the support member, and an in-plane conductor on one main surface side of the insulating layer is formed by the first in-plane conductor portion. The in-plane conductor on the other main surface side of the insulating layer can be formed by the second in-plane conductor portion. Furthermore, the supporting member is peeled from the metal conductor by the peeling process, and the insulating layer is polished from at least one main surface side by the polishing process to expose the surface of the conductor part in both sides from the insulating layer, thereby manufacturing the wiring board. it can. In this case, a wiring board having the effects of the first to third aspects of the invention can be manufactured with a small number of steps of processing the metal conductor in one direction from the one main surface side.

請求項5の本発明の配線基板の製造方法によれば、第1接着工程により金属箔または金属板からなる金属導体を第1の支持部材上に剥離自在に接着した後、第1導体加工工程により第1の支持部材に接着した金属導体を加工して第1面内導体部、層間導体部、第2面内導体部を連続的に形成することができる。つぎに、絶縁層形成工程により、加工した前記金属導体を支持部材に接着した状態で絶縁層に内蔵し、第1面内導体部により絶縁層の一方の主面側の面内導体を形成し、第2面内導体部により前記絶縁層の他方の主面側の面内導体を形成することができる。つぎに、第1の剥離工程により、第1の支持部材を剥離し。さらに、第2接着工程により絶縁層の一方の主面側を第2の支持部材に剥離自在に接着した後、第2導体加工工程により、金属導体を他方の主面側(裏側)からさらに加工することができる。そして、第2剥離工程により第2の支持部材を剥離し、研磨工程により絶縁層の両主面側を研磨して両面内導体部の表面を絶縁層から露出させ、配線基板を製造することができる。この場合、金属導体を絶縁層の両主面側から加工し、両面内導体部および層間導体部を一層小面積にして連続的に形成することができ、請求項1〜3の発明の効果を奏する配線基板を一層小型に製造することができる。   According to the method for manufacturing a wiring board of the present invention of claim 5, after the metal conductor made of metal foil or metal plate is detachably bonded on the first support member in the first bonding step, the first conductor processing step is performed. Thus, the metal conductor bonded to the first support member can be processed to continuously form the first in-plane conductor portion, the interlayer conductor portion, and the second in-plane conductor portion. Next, in the insulating layer forming step, the processed metal conductor is embedded in the insulating layer in a state of being bonded to the support member, and an in-plane conductor on one main surface side of the insulating layer is formed by the first in-plane conductor portion. The in-plane conductor on the other main surface side of the insulating layer can be formed by the second in-plane conductor portion. Next, the first supporting member is peeled off by the first peeling step. Further, after one main surface side of the insulating layer is detachably bonded to the second support member by the second bonding step, the metal conductor is further processed from the other main surface side (back side) by the second conductor processing step. can do. Then, the second supporting member is peeled off by the second peeling step, and both main surface sides of the insulating layer are polished by the polishing step to expose the surfaces of the conductor portions in both sides from the insulating layer, thereby manufacturing the wiring board. it can. In this case, the metal conductor can be processed from both main surface sides of the insulating layer to continuously form the inner conductor portion and the interlayer conductor portion with a smaller area. The printed wiring board can be manufactured in a smaller size.

本発明の第1の実施形態の配線基板の部品実装状態の断面図である。It is sectional drawing of the components mounting state of the wiring board of the 1st Embodiment of this invention. 図1の配線基板の一部の製造工程を説明する断面図である。It is sectional drawing explaining the manufacturing process of a part of wiring board of FIG. 図1の配線基板の残りの製造工程を説明する断面図である。FIG. 7 is a cross-sectional view illustrating the remaining manufacturing steps of the wiring board of FIG. 1. 本発明の第2の実施形態の配線基板の部品実装状態の断面図である。It is sectional drawing of the components mounting state of the wiring board of the 2nd Embodiment of this invention. 図4の配線基板の製造工程を説明する断面図である。It is sectional drawing explaining the manufacturing process of the wiring board of FIG. 本発明の第3の実施形態の多層基板の断面図である。It is sectional drawing of the multilayer substrate of the 3rd Embodiment of this invention. 従来例の製造工程を説明する断面図である。It is sectional drawing explaining the manufacturing process of a prior art example.

本発明の実施形態について、図1〜図6を参照して詳述する。   An embodiment of the present invention will be described in detail with reference to FIGS.

(第1の実施形態)
まず、請求項1、2、3、5に対応する第1の実施形態について、図1〜図3を参照して説明する。
(First embodiment)
First, a first embodiment corresponding to claims 1, 2, 3, and 5 will be described with reference to FIGS.

[配線基板の構成]
図1は本実施形態の配線基板(両面配線基板)1aの構成を示す断面図であり、配線基板1aは絶縁層2の一方の主面側(上面側)の面内導体(例えば配線ランド)を形成する第1面内導体部3と、絶縁層2の他方の主面側(下面側)の面内導体(例えば配線ランド)を形成する第2面内導体部4と、絶縁層2を貫通して両内面導体部3、4を電気的に接続する層間接続体(貫通ビア)としての層間導体部5とを備え、面内導体部3、4および層間導体部5は、同一材質の導電性部材、具体的には本発明の金属導体の一例である銅(Cu)箔6により連続的に形成されている。この場合、面内導体部3、4及び層間導体部5の間に異種界面が存在しなくなり、配線基板1aは面内導体部3、4が形成する面内導体間の導通抵抗値が飛躍的に小さくなって電気的な接続信頼性が著しく向上する。
[Configuration of wiring board]
FIG. 1 is a cross-sectional view showing a configuration of a wiring board (double-sided wiring board) 1a according to the present embodiment. The wiring board 1a is an in-plane conductor (for example, a wiring land) on one main surface side (upper surface side) of an insulating layer 2. A first in-plane conductor portion 3 that forms a conductor, a second in-plane conductor portion 4 that forms an in-plane conductor (for example, a wiring land) on the other main surface side (lower surface side) of the insulating layer 2, and the insulating layer 2. And an interlayer conductor 5 as an interlayer connector (through via) that penetrates and electrically connects both inner surface conductors 3 and 4. The in-plane conductors 3 and 4 and the interlayer conductor 5 are made of the same material. The conductive member, specifically, a copper (Cu) foil 6 which is an example of the metal conductor of the present invention is continuously formed. In this case, the heterogeneous interface does not exist between the in-plane conductor portions 3 and 4 and the interlayer conductor portion 5, and the wiring substrate 1a has a dramatic increase in conduction resistance value between the in-plane conductors formed by the in-plane conductor portions 3 and 4. The electrical connection reliability is remarkably improved.

そして、必要に応じて両面内導体部3、4にはんだバンプ等の接合部材7を介してコンデンサ、コイル、トランジスタ、IC等のチップ状の各種の電子部品8の電極が接続されることにより、図1に示す両面配線基板構造の信頼性の高い回路モジュールが形成される。   And, if necessary, the electrodes of various chip-shaped electronic components 8 such as capacitors, coils, transistors, ICs, etc. are connected to the conductor portions 3, 4 on both sides via bonding members 7 such as solder bumps, A highly reliable circuit module having the double-sided wiring board structure shown in FIG. 1 is formed.

ところで、本実施形態の場合、層間導体部5は後述するように銅箔6を一方の主面側から他方の主面側、その逆に加工(ハーフエッチング)して形成される。この場合、銅箔6は層間導体部5となる厚み方向の中央部分だけが極端にくびれて細く(狭く)なったりせず、面内導体部3、4が形成する面内導体間の導通抵抗値が確実に小さくなって電気的な接続信頼性が向上する。また、層間導体部5等を所望の面積(太さ)に形成することができるため、基板設計の自由度が増して配線基板1aの小面積化(小型化)を図ることができる。   By the way, in this embodiment, the interlayer conductor part 5 is formed by processing (half-etching) the copper foil 6 from one main surface side to the other main surface side and vice versa, as will be described later. In this case, the copper foil 6 does not become extremely narrow and narrow (narrow) only at the center portion in the thickness direction to be the interlayer conductor portion 5, and the conduction resistance between the in-plane conductors formed by the in-plane conductor portions 3 and 4. The value is reliably reduced and the electrical connection reliability is improved. Further, since the interlayer conductor portion 5 and the like can be formed in a desired area (thickness), the degree of freedom in board design is increased, and the wiring board 1a can be reduced in area (downsized).

そして、小型化(薄型化)を図るため、銅箔6の厚みは例えば35μmである。また、絶縁層2は、例えばエポキシ樹脂、フェノール樹脂、シアネート樹脂等の熱硬化性樹脂からなる。その際、熱伝導特性等を銅箔6と合わせて反り等を防止するため、絶縁層2はシリカ粉末、アルミナ粉末などの無機粉末の無機フィラーを含有することが好ましい。   And in order to achieve size reduction (thinning), the thickness of the copper foil 6 is 35 micrometers, for example. The insulating layer 2 is made of a thermosetting resin such as an epoxy resin, a phenol resin, or a cyanate resin. At that time, in order to prevent the warp and the like by combining the heat conduction characteristics and the like with the copper foil 6, the insulating layer 2 preferably contains an inorganic filler of an inorganic powder such as silica powder or alumina powder.

[配線基板の製造方法]
図2、図3は配線基板1aの順の製造工程を示し、本実施形態の場合、銅箔6を必要に応じて一方の主面側から他方の主面側またはその逆、さらには両側からハーフエッチングして面内導体部3、4および層間導体部5を形成するため、銅箔6の加工工程として、絶縁層2の一方の主面側から他方の主面側に銅箔6を加工する工程と、その逆に銅箔6を加工する工程とを要する。そこで、配線基板1aの製造工程は、概略、絶縁層形成工程を挟んで、一方の主面側から他方の主面側に銅箔6をハーフエッチングする前半の工程と、その逆に銅箔6をハーフエッチングする後半の工程とを備える。
[Method of manufacturing a wiring board]
FIGS. 2 and 3 show the manufacturing process of the wiring board 1a in this order. In the case of this embodiment, the copper foil 6 is moved from one main surface side to the other main surface side or vice versa as necessary, and from both sides. In order to form the in-plane conductor parts 3 and 4 and the interlayer conductor part 5 by half etching, the copper foil 6 is processed from one main surface side of the insulating layer 2 to the other main surface side as a processing step of the copper foil 6. And a process of processing the copper foil 6 on the contrary. Therefore, the manufacturing process of the wiring board 1a is roughly the first half of the process of half-etching the copper foil 6 from one main surface side to the other main surface side with the insulating layer forming step interposed therebetween, and vice versa. A half-etching step.

前半の工程は、工程順の第1接着工程(図2(a))、第1レジスト形成工程(図2(b))、第1導体加工工程(ハーフエッチング工程)(図2(c))、第1レジスト除去工程(図2(d))からなる。   The first half of the process consists of a first bonding step (FIG. 2 (a)), a first resist forming step (FIG. 2 (b)), a first conductor processing step (half etching step) (FIG. 2 (c)). And a first resist removing step (FIG. 2D).

第1接着工程(図2(a))においては、銅箔6を本発明の第1の支持部材としてのベース基板9上に剥離自在に接着してレーザ照射等により銅箔6を所定パターンにパターニングする。なお、銅箔6は前記したように例えば35μmの厚みであり、ベース基板9は例えば粘着フィルムである。前記接着により粘着フィルムと銅箔6の2層ラミネートが形成される。   In the first bonding step (FIG. 2A), the copper foil 6 is peelably bonded onto the base substrate 9 as the first support member of the present invention, and the copper foil 6 is formed into a predetermined pattern by laser irradiation or the like. Pattern. As described above, the copper foil 6 has a thickness of, for example, 35 μm, and the base substrate 9 is, for example, an adhesive film. A two-layer laminate of the adhesive film and the copper foil 6 is formed by the adhesion.

第1レジスト形成工程(図2(b))においては、第1面内導体部3を所定の大きさ、形状の配線ランド等に加工するため、銅箔6の上面に所要のパターンでレジスト10を塗布する。   In the first resist formation step (FIG. 2 (b)), the first in-plane conductor portion 3 is processed into a wiring land having a predetermined size and shape. Apply.

第1導体加工工程(図2(c))においては、酸による化学的処理で銅箔6を上面側から下面側に緩やかにハーフエッチングし、銅箔6により上面側から順に第1面内導体部3、層間導体部5、第2面内導体部4を連続的に形成する。このとき、前記ハーフエッチングにより銅箔6が上面側から次第にエッチングされ、少なくとも第1面内導体部3および層間導体部5が銅箔6をエッチングして形成されるため、層間導体部5となる銅箔6の厚み方向の中央部分だけが極端にくびれて細く(狭く)なったりしない。その後、第1レジスト除去工程(図2(d))に移行して不要になったレジスト10を除去する。   In the first conductor processing step (FIG. 2C), the copper foil 6 is gently half-etched from the upper surface side to the lower surface side by chemical treatment with an acid, and the first in-plane conductor is sequentially formed from the upper surface side by the copper foil 6. The part 3, the interlayer conductor part 5, and the second in-plane conductor part 4 are continuously formed. At this time, the copper foil 6 is gradually etched from the upper surface side by the half etching, and at least the first in-plane conductor portion 3 and the interlayer conductor portion 5 are formed by etching the copper foil 6, so that the interlayer conductor portion 5 is formed. Only the central portion of the copper foil 6 in the thickness direction is extremely narrowed and does not become thin (narrow). Thereafter, the process shifts to the first resist removing step (FIG. 2D), and the resist 10 that is no longer needed is removed.

つぎに、絶縁層形成工程(図2(e))により、前記した熱硬化性樹脂のプリプレグを気泡等が生じないように真空中で加熱しつつ加圧し、銅箔6をプリプレグ状態の絶縁層2に埋設するとともに絶縁層2をベース基板9に圧着し、銅箔6を絶縁層2に内蔵した構造の複合体11aを形成する。この超薄層により例えば110℃で10分間、銅箔6を真空ラミネートして絶縁層2に銅箔6を内蔵する。なお、銅箔6の下面は絶縁層2から露出してベース基板9に直接接着された状態になる。その後、第1剥離工程(図2(f))により、ベース基板9を複合体11aから剥離して銅箔6の下面を露出する。   Next, in the insulating layer forming step (FIG. 2 (e)), the above-described thermosetting resin prepreg is pressurized while being heated in a vacuum so as not to generate bubbles and the copper foil 6 is in the prepreg state. 2, the insulating layer 2 is pressure-bonded to the base substrate 9, and a composite 11 a having a structure in which the copper foil 6 is built in the insulating layer 2 is formed. With this ultrathin layer, the copper foil 6 is vacuum laminated at 110 ° C. for 10 minutes, for example, and the copper foil 6 is built in the insulating layer 2. The lower surface of the copper foil 6 is exposed from the insulating layer 2 and directly adhered to the base substrate 9. Thereafter, the base substrate 9 is peeled off from the composite 11a by the first peeling step (FIG. 2F) to expose the lower surface of the copper foil 6.

後半の工程は、工程順の第2接着工程(図3(a))、第2レジスト形成工程(図3(b))、第2導体加工工程(図3(c))、第2レジスト除去工程(図3(d))、絶縁層補充工程(図3(e))、第2剥離工程(図3(f))、研磨工程(図3(g))からなる。   The latter half of the process consists of a second bonding step (FIG. 3A), a second resist forming step (FIG. 3B), a second conductor processing step (FIG. 3C), and second resist removal in the order of the steps. It comprises a process (FIG. 3D), an insulating layer replenishment process (FIG. 3E), a second peeling process (FIG. 3F), and a polishing process (FIG. 3G).

第2接着工程(図3(a))においては、複合体11aにおける絶縁層2の上面に第2の支持部材としてベース基板12を剥離自在に接着する。なお、ベース基板12は例えばベース基板9と同様の粘着フィルムであり、可能であればベース基板9を再利用して形成される。   In the second bonding step (FIG. 3A), the base substrate 12 is bonded as a second support member to the upper surface of the insulating layer 2 in the composite 11a in a detachable manner. The base substrate 12 is, for example, an adhesive film similar to the base substrate 9 and is formed by reusing the base substrate 9 if possible.

第2レジスト形成工程(図3(b))においては、銅箔6の第1導体加工工程の上面側からのエッチングによって残った部分を下面側からさらにエッチングして加工するために必要な所要のレジストパターンにレジスト13を塗布して形成する。具体的には、前記第1導体加工工程により銅箔6の左側を上面側からハーフエッチングした場合は、銅箔6の右側を下面側からハーフエッチングして、第2面内導体部4および層間導体部5を加工するため、銅箔6の下面左側にレジスト13を塗布する(図3(b)の中央の銅箔6)。なお、エッチングしない銅箔6は下面全体にレジスト13を塗布する(図3(b)の右側の銅箔6)。また、左右両方からエッチングする銅箔6は下面中央部にレジスト13を塗布する(図3(b)の左側の銅箔6)。   In the second resist forming step (FIG. 3B), a necessary part required for further etching and processing the portion remaining by etching from the upper surface side of the first conductor processing step of the copper foil 6 from the lower surface side. A resist 13 is applied to the resist pattern. Specifically, when the left side of the copper foil 6 is half-etched from the upper surface side by the first conductor processing step, the right side of the copper foil 6 is half-etched from the lower surface side, and the second in-plane conductor portion 4 and the interlayer In order to process the conductor part 5, the resist 13 is apply | coated to the lower surface left side of the copper foil 6 (copper foil 6 of the center of FIG.3 (b)). In addition, the resist 13 is apply | coated to the copper foil 6 which is not etched on the whole lower surface (copper foil 6 on the right side of FIG.3 (b)). Moreover, the resist 13 is apply | coated to the lower surface center part for the copper foil 6 etched from both right and left (copper foil 6 on the left side of FIG. 3B).

第2導体加工工程(図3(c))においては、銅箔6を下面側から酸による化学的処理でハーフエッチングし、第2面内導体部4や層間導体部5を加工して銅箔6により所望の大きさ(面積)の第1面内導体部3、層間導体部5、第2面内導体部4を連続的に(一体に)形成する。なお、銅箔6を下面側からハーフエッチングする際には、加工のし易さ等を考慮して複合体11aの上下を逆にしてもよい。   In the second conductor processing step (FIG. 3C), the copper foil 6 is half-etched from the lower surface side by chemical treatment with acid to process the second in-plane conductor portion 4 and the interlayer conductor portion 5 to obtain a copper foil. 6, the first in-plane conductor portion 3, the interlayer conductor portion 5, and the second in-plane conductor portion 4 having a desired size (area) are formed continuously (integrally). In addition, when half-etching the copper foil 6 from the lower surface side, the composite 11a may be turned upside down in consideration of ease of processing.

つぎに、第2レジスト除去工程(図3(d))により不要になったレジスト13を除去し、絶縁層補充工程(図3(e))により、銅箔6の下面側の前記ハーフエッチングで生じた凹部に、例えば110℃で10分間の真空ラミネートにより、熱硬化性樹脂のプリプレグを充填する。   Next, the resist 13 that has become unnecessary in the second resist removing step (FIG. 3D) is removed, and the half etching on the lower surface side of the copper foil 6 is performed in the insulating layer supplementing step (FIG. 3E). The resulting concave portion is filled with a thermosetting resin prepreg by, for example, vacuum lamination at 110 ° C. for 10 minutes.

その後、絶縁層2を例えば200℃で60分加熱して硬化した後、第2ジスト除去工程(図3(f))によりベース基板12を絶縁層2から剥離し、最後に、研磨工程(図3(g))により、絶縁層2の両主面側を研磨して第1、第2面内導体部3、4の表面を絶縁層2から露出させ、配線基板1aを製造する。   Thereafter, the insulating layer 2 is cured by heating, for example, at 200 ° C. for 60 minutes, and then the base substrate 12 is peeled off from the insulating layer 2 by the second dies removing step (FIG. 3F), and finally the polishing step (FIG. 3 (g)), both the main surface sides of the insulating layer 2 are polished so that the surfaces of the first and second in-plane conductor portions 3 and 4 are exposed from the insulating layer 2 to manufacture the wiring board 1a.

したがって、本実施形態の場合、導電性部材を、入手容易で加工し易く、材質が均一な金属導体の一例である銅箔6を、絶縁層2の両主面側からハーフエッチングして第1、第2面内導体部3、4および層間導体部5を極力小面積に連続的に形成し、それらの導体部3〜5間に異種界面が存在しないようにすることができ、絶縁層2の両主面側の面内導体間の導通抵抗値が小さく、電気的な接続信頼性が飛躍的に向上した配線基板1aを製造して提供することができる。   Therefore, in the case of this embodiment, the conductive member is easily obtained, easily processed, and the copper foil 6, which is an example of a metal conductor having a uniform material, is half-etched from both main surface sides of the insulating layer 2 to be first. The second in-plane conductor portions 3 and 4 and the interlayer conductor portion 5 can be formed continuously in a small area as much as possible so that no heterogeneous interface exists between the conductor portions 3 to 5, and the insulating layer 2 It is possible to manufacture and provide a wiring board 1a in which the conduction resistance value between the in-plane conductors on both the main surfaces is small and the electrical connection reliability is dramatically improved.

(第2の実施形態)
つぎに、請求項1、2、3、4に対応する第2の実施形態について、図4、図5を参照して説明する。
(Second Embodiment)
Next, a second embodiment corresponding to claims 1, 2, 3, and 4 will be described with reference to FIGS.

[配線基板の構成]
図4は本実施形態の配線基板(両面配線基板)1bの構成を示す断面図であり、配線基板1bが図1の配線基板1aと最も異なる点は、後述するように銅箔6を絶縁層2の一方の主面側から他方の主面側に一方向に加工(ハーフエッチング)し、工程数を第1の実施形態の場合より半減して製造される点である。この場合、銅箔6の加工方向は一方向に限られるが、少なくとも第1面内導体部3および層間導体部5がエッチングされることにより、第1の実施形態の場合と同様、銅箔6の厚み方向の中央部分(層間導体部5)だけが極端にくびれて細く(狭く)なったりせず、抵抗値が十分に小さくなって電気的な接続信頼性が著しく向上する。また、層間導体部5等を所望の大きさに形成することができる。そのため、より簡単な製造工程により第1の実施形態の配線基板1aと同様の効果を奏する新規な両面の配線基板1bを提供することができる。
[Configuration of wiring board]
FIG. 4 is a cross-sectional view showing the configuration of the wiring board (double-sided wiring board) 1b of this embodiment. The most different point of the wiring board 1b from the wiring board 1a of FIG. 2 is processed in one direction from one main surface side to the other main surface side (half-etching), and the number of processes is reduced to half that in the case of the first embodiment. In this case, the processing direction of the copper foil 6 is limited to one direction, but at least the first in-plane conductor portion 3 and the interlayer conductor portion 5 are etched, so that the copper foil 6 is the same as in the first embodiment. Only the central portion (interlayer conductor portion 5) in the thickness direction is not extremely narrowed and narrowed (narrow), and the resistance value becomes sufficiently small, so that the electrical connection reliability is remarkably improved. Further, the interlayer conductor portion 5 and the like can be formed in a desired size. Therefore, it is possible to provide a novel double-sided wiring board 1b having the same effects as the wiring board 1a of the first embodiment by a simpler manufacturing process.

[配線基板の製造方法]
図5は配線基板1bの順の製造工程を示し、本実施形態の場合、銅箔6を絶縁層2の一方の主面側から他方の主面側に一方向にハーフエッチングして配線基板1の第1面内導体部3、第2面内導体部4および層間導体部5を形成する。
[Method of manufacturing a wiring board]
FIG. 5 shows a sequential manufacturing process of the wiring board 1b. In the case of this embodiment, the copper foil 6 is half-etched in one direction from one main surface side to the other main surface side of the insulating layer 2 to form the wiring substrate 1. The first in-plane conductor portion 3, the second in-plane conductor portion 4, and the interlayer conductor portion 5 are formed.

そのため、製造工程は、第1の実施形態の前半の工程の1接着工程、第1レジスト形成工程、第1導体加工工程、第1レジスト除去工程、絶縁層形成工程と同様の接着工程(図5(a))、レジスト形成工程(図5(b))、導体加工工程(ハーフエッチング工程)(図5(c))、レジスト除去工程(図5(d))、絶縁層形成工程(図5(e))および、剥離工程(図5(f))、研磨工程(図5(g))からなる。   Therefore, the manufacturing process is the same bonding process as the first bonding process, the first resist forming process, the first conductor processing process, the first resist removing process, and the insulating layer forming process of the first half of the first embodiment (FIG. 5). (A)), resist formation step (FIG. 5B), conductor processing step (half etching step) (FIG. 5C), resist removal step (FIG. 5D), insulating layer formation step (FIG. 5). (E)), a peeling process (FIG. 5 (f)), and a polishing process (FIG. 5 (g)).

接着工程(図5(a))においては、銅箔6を支持部材としてのベース基板14上に剥離自在に接着し、その状態でレーザ照射等により銅箔6をパターニングする。なお、銅箔6は第1の実施形態の場合と同様に例えば35μmの厚みであり、ベース基板14は例えは粘着フィルムである。   In the bonding step (FIG. 5A), the copper foil 6 is detachably bonded onto the base substrate 14 as a support member, and in this state, the copper foil 6 is patterned by laser irradiation or the like. The copper foil 6 has a thickness of 35 μm, for example, as in the first embodiment, and the base substrate 14 is an adhesive film, for example.

レジスト形成工程(図5(b))においては、銅箔6の上面にランド形成等に必要な所要のレジストパターンにレジスト15を塗布して形成する。   In the resist formation step (FIG. 5B), a resist 15 is applied to the upper surface of the copper foil 6 in a required resist pattern necessary for land formation or the like.

導体加工工程(図5(c))においては、酸による化学的処理で銅箔6を上面側から下面側に緩やかにハーフエッチングし、銅箔6により上面側から順の第1面内導体部3、層間導体部5、第2面内導体部4を連続的に形成する。その後、レジスト除去工程(図5(d))により、不要になったレジスト15を除去する。   In the conductor processing step (FIG. 5C), the copper foil 6 is gently half-etched from the upper surface side to the lower surface side by chemical treatment with an acid, and the first in-plane conductor portion in order from the upper surface side by the copper foil 6 3, the interlayer conductor 5 and the second in-plane conductor 4 are continuously formed. Thereafter, the resist 15 that is no longer needed is removed by a resist removing step (FIG. 5D).

つぎに、絶縁層形成工程(図5(e))により、前記した熱硬化性樹脂のプリプレグを真空中で加熱しつつ加圧し、銅箔6をプリプレグ状態の絶縁層2に埋設するとともに絶縁層2をベース基板14に圧着し、銅箔6を絶縁層2に内蔵した構造の複合体11bを形成する。なお、絶縁層2は第1の実施形態の場合と同様に例えば10μmの超薄層である。また、銅箔6の下面は略絶縁層2から露出してベース基板14に略直接接着されている。   Next, in the insulating layer forming step (FIG. 5 (e)), the thermosetting resin prepreg is pressurized while being heated in vacuum, and the copper foil 6 is embedded in the insulating layer 2 in the prepreg state and the insulating layer is formed. 2 is bonded to the base substrate 14 to form a composite 11b having a structure in which the copper foil 6 is embedded in the insulating layer 2. The insulating layer 2 is an ultra-thin layer of 10 μm, for example, as in the first embodiment. Further, the lower surface of the copper foil 6 is exposed from the substantially insulating layer 2 and is directly bonded to the base substrate 14.

そして、樹脂層2を例えば200℃で60分加熱して硬化した後、剥離工程(図5(f))によりベース基板14を絶縁層2から剥離し、最後に、研磨工程(図5(g))により絶縁層2の少なくとも一方の主面側(上面側)を研磨して第1、第2面内導体部3、4の表面を絶縁層2から露出させ、配線基板1bを製造する。   Then, after the resin layer 2 is cured by heating at 200 ° C. for 60 minutes, for example, the base substrate 14 is peeled off from the insulating layer 2 by a peeling step (FIG. 5F), and finally the polishing step (FIG. 5G) )) To polish at least one main surface side (upper surface side) of the insulating layer 2 to expose the surfaces of the first and second in-plane conductor portions 3 and 4 from the insulating layer 2 to manufacture the wiring substrate 1b.

したがって、本実施形態の場合、銅箔6を、絶縁層2の一方の主面側からハーフエッチングして第1、第2面内導体部3、4および層間導体部5を連続的に形成し、それらの導体部3〜5間に異種界面が存在しないようにすることができ、第1の実施形態より工程数が半減した簡易な製造方法により絶縁層2の両主面側の面内導体間の導通抵抗値が小さく、電気的な接続信頼性が向上した配線基板1bを製造して提供することができる。   Therefore, in the case of this embodiment, the copper foil 6 is half-etched from one main surface side of the insulating layer 2 to continuously form the first and second in-plane conductor portions 3 and 4 and the interlayer conductor portion 5. The in-plane conductors on both main surfaces of the insulating layer 2 can be made so that no heterogeneous interface exists between the conductor portions 3 to 5 and the number of steps is halved compared to the first embodiment. It is possible to manufacture and provide a wiring board 1b having a small conduction resistance value between them and improved electrical connection reliability.

(第3の実施形態)
つぎに、例えば第1の実施形態で製造した超薄層の配線基板1aを用いて前記電子部品8等の部品16を内蔵した多層基板1cを製造する実施形態について、図6を参照して説明する。
(Third embodiment)
Next, an embodiment in which the multilayer substrate 1c including the component 16 such as the electronic component 8 is manufactured using the ultrathin wiring substrate 1a manufactured in the first embodiment, for example, will be described with reference to FIG. To do.

本実施形態においては、実装基板準備工程(図6(a))により配線基板1aを用意する。配線基板1aは硬化した絶縁層2の両主面側に銅箔6の第1、第2面内導体部3、4の研磨された表面が露出している。   In the present embodiment, the wiring board 1a is prepared by the mounting board preparation step (FIG. 6A). In the wiring substrate 1 a, the polished surfaces of the first and second in-plane conductor portions 3 and 4 of the copper foil 6 are exposed on both main surface sides of the cured insulating layer 2.

そして、部品実装工程(図6(b))により、所要の第1面内導体3の表面にはんだ等の金属バンプ17を介して部品16の電極を設け、金属バンプ17をリフロー等して部品16を配線基板1a上に実装し、配線基板1aにより部品16の極めて薄い接続層を形成する。   Then, in the component mounting process (FIG. 6B), the electrodes of the component 16 are provided on the surface of the required first in-plane conductor 3 via the metal bumps 17 such as solder, and the metal bumps 17 are reflowed and the like. 16 is mounted on the wiring board 1a, and a very thin connection layer of the component 16 is formed by the wiring board 1a.

つぎに、絶縁層形成工程(図6(c))により、部品16を実装した配線基板1aに、上方から絶縁層18を形成する熱硬化性樹脂のプリプレグを加熱しつつ加圧して接着し、絶縁層18に部品を内蔵し、その後、加熱温度を上昇して絶縁層18を硬化する。   Next, in the insulating layer forming step (FIG. 6C), the thermosetting resin prepreg for forming the insulating layer 18 is heated and pressed and bonded to the wiring board 1a on which the component 16 is mounted, from above. Components are built in the insulating layer 18, and then the heating temperature is raised to cure the insulating layer 18.

つぎに、配線層準備工程(図6(d))により、銅箔61を絶縁層21に内蔵した薄い配線基板19を用意し、その上面の面内導体部31に導電性ペースト19を塗布する。   Next, by the wiring layer preparation step (FIG. 6D), a thin wiring board 19 in which the copper foil 61 is built in the insulating layer 21 is prepared, and the conductive paste 19 is applied to the in-plane conductor portion 31 on the upper surface. .

配線基板19は、例えば第2の実施形態の製造方法と略同様の方法で製造された配線基板であり、絶縁層2に対応する絶縁層21が完全に硬化したものであってもよいが、絶縁層18と良好に接着するため、絶縁層21が半硬化の状態であることが好ましい。そして、配線基板19は、例えば図5の接着工程(図5(a))、レジスト形成工程(図5(b))、導体加工工程(ハーフエッチング工程)(図5(c))、レジスト除去工程(図5(d))、絶縁層形成工程(図5(e))及び、剥離工程(図5(f))、研磨工程(図5(g))を経て製造されるが、絶縁層21を半硬化の状態にする場合、絶縁層形成工程(図5(e))において、絶縁層2に対応する絶縁層21の加熱の時間や温度を制御して絶縁層21が半硬化の状態に留められる。また、銅箔6に対応する配線基板19の銅箔61は、上面側(一方の主面側)からハーフエッチングされて面内導体部3、4に対応する面内導体部31、41および層間導体部5に対応する層間導体部51が形成され、下面側(他方の主面側)の面内導体部41はエッチングされずに元のパターン形状のままである。   The wiring board 19 is a wiring board manufactured by a method substantially similar to the manufacturing method of the second embodiment, for example, and the insulating layer 21 corresponding to the insulating layer 2 may be completely cured. In order to adhere well to the insulating layer 18, the insulating layer 21 is preferably in a semi-cured state. For example, the wiring substrate 19 includes an adhesion process (FIG. 5A), a resist formation process (FIG. 5B), a conductor processing process (half etching process) (FIG. 5C), and resist removal shown in FIG. 5. It is manufactured through the process (FIG. 5D), the insulating layer forming process (FIG. 5E), the peeling process (FIG. 5F), and the polishing process (FIG. 5G). When 21 is made into a semi-cured state, the insulating layer 21 is semi-cured by controlling the heating time and temperature of the insulating layer 21 corresponding to the insulating layer 2 in the insulating layer forming step (FIG. 5E). To be held in. Also, the copper foil 61 of the wiring board 19 corresponding to the copper foil 6 is half-etched from the upper surface side (one main surface side), and the in-plane conductor portions 31 and 41 corresponding to the in-plane conductor portions 3 and 4 and the interlayer An interlayer conductor portion 51 corresponding to the conductor portion 5 is formed, and the in-plane conductor portion 41 on the lower surface side (the other main surface side) is not etched and remains in the original pattern shape.

そして、接合工程(図6(e))により、絶縁層18が接着した基板1aの面内導体部4に導電性ペースト19を介して配線基板19の面内導体部31を接合し、この状態で全体を200℃以上に加熱して配線基板19の絶縁層21を完全に硬化し、絶縁層18の下側に配線基板1aの薄い接続層を介して配線基板19の薄い配線層を接続し、樹脂基板を重ねて部品を内蔵した構造の厚みの薄い多層基板1cを製造する。   Then, in the bonding step (FIG. 6E), the in-plane conductor portion 31 of the wiring board 19 is bonded to the in-plane conductor portion 4 of the substrate 1a to which the insulating layer 18 is bonded via the conductive paste 19, and this state The whole is heated to 200 ° C. or more to completely cure the insulating layer 21 of the wiring board 19, and the thin wiring layer of the wiring board 19 is connected to the lower side of the insulating layer 18 through the thin connection layer of the wiring board 1 a. Then, a thin multilayer substrate 1c having a structure in which a resin substrate is stacked and a component is incorporated is manufactured.

この場合、部品16の接続ビア等が不要であり、その分、製造工程が少なくなるとともに、基板面積が小咲くなって薄くなり、今までにない小型で薄く安価な部品内蔵の多層基板1cの回路モジュールを提供することができる。   In this case, the connection via of the component 16 is not necessary, and the manufacturing process is reduced correspondingly, and the substrate area becomes small and thin. A circuit module can be provided.

なお、例えば絶縁層18の形成後形成工程(図6(c))または接合工程(図6(e))の後において、絶縁層18の上面を研磨して部品16の電極上面を絶縁層18から露出し、その上にも金属バンプを介して配線基板1aと同様の配線基板を設け、この配線基板上に金属バンプを介して部品を実装し、その部品を絶縁層18と同様の絶縁層に内蔵すれば、さらに多層の部品内蔵の多層基板を製造することができ、これらをくり返すことにより、さらに一層多層化した部品内蔵の多層基板を製造することができ、多層化する程、従来の接続ビア等を形成して製造する場合より小型で薄く安価な構成になる。   For example, after the formation process of the insulating layer 18 (FIG. 6C) or the bonding process (FIG. 6E), the upper surface of the insulating layer 18 is polished so that the electrode upper surface of the component 16 is the insulating layer 18. A wiring board similar to the wiring board 1a is provided on the wiring board via a metal bump, and a component is mounted on the wiring board via the metal bump. It is possible to manufacture a multilayer substrate with a built-in component, and by repeating these, a multilayer substrate with a built-in component can be manufactured. This is a smaller, thinner and cheaper structure than the case of manufacturing by forming connection vias and the like.

また、配線基板1aに代えて配線基板1bを用いても多層基板1cと同様の部品内蔵の多層基板を製造できる。   Further, even if the wiring board 1b is used instead of the wiring board 1a, a multilayer board with built-in components similar to the multilayer board 1c can be manufactured.

そして、本発明は上記した各実施形態に限定されるものではなく、その趣旨を逸脱しない限りにおいて、上記したもの以外に種々の変更を行なうことが可能であり、例えば本発明の導電性部材は、銅箔6以外の種々の金属箔や、金属箔より厚い銅板を含む種々の金属板、さらには金属を含有した樹脂体等であってもよい。また、絶縁層2、18、21は熱硬化性樹脂でなくてもよく、光硬化性樹脂等で形成してもよい。さらに、ベース基板9、12はフィルム状や板状の種々の金属、樹脂により形成することができる。   The present invention is not limited to the above-described embodiments, and various modifications other than those described above can be made without departing from the spirit thereof. For example, the conductive member of the present invention is Further, various metal foils other than the copper foil 6, various metal plates including a copper plate thicker than the metal foil, and a resin body containing metal may be used. The insulating layers 2, 18, and 21 may not be formed of a thermosetting resin, but may be formed of a photocurable resin or the like. Furthermore, the base substrates 9 and 12 can be formed of various films and plates of metals and resins.

つぎに、銅箔6等の導電性部材や絶縁層の面積、厚み等は、設計条件等に応じて適当にオ設定してよいのは勿論である。   Next, it is needless to say that the area, thickness, etc. of the conductive member such as the copper foil 6 and the insulating layer may be appropriately set according to the design conditions.

そして、本発明は、種々の用途の配線基板及びその製造方法に適用することができる。   And this invention is applicable to the wiring board of various uses, and its manufacturing method.

1a、1b 配線基板
2 絶縁層
3 第1面内導体部
4 第2面内導体部
5 層間導体部
6 銅箔
9、12 ベース基板
DESCRIPTION OF SYMBOLS 1a, 1b Wiring board 2 Insulating layer 3 1st in-plane conductor part 4 2nd in-plane conductor part 5 Interlayer conductor part 6 Copper foil 9, 12 Base board

Claims (5)

絶縁層と、
前記絶縁層の一方の主面側の面内導体を形成する第1面内導体部と、
前記絶縁層の他方の主面側の面内導体を形成する第2面内導体部と、
前記両内面導体部を電気的に接続する層間接続体としての層間導体部とを備え、
前記両面内導体部および前記層間導体部は、同一材質の導電性部材により連続的に形成されていることを特徴とする配線基板。
An insulating layer;
A first in-plane conductor portion forming an in-plane conductor on one main surface side of the insulating layer;
A second in-plane conductor portion forming an in-plane conductor on the other main surface side of the insulating layer;
An interlayer conductor portion as an interlayer connection body for electrically connecting the inner surface conductor portions;
The wiring board according to claim 1, wherein the inner-surface double-side conductor portion and the interlayer conductor portion are continuously formed of a conductive member made of the same material.
請求項1に記載の配線基板において、
前記層間導体部は、前記導電性部材を少なくとも一方の主面側から加工して中央部がくびれないように形成されていることを特徴とする配線基板。
The wiring board according to claim 1,
The wiring board according to claim 1, wherein the interlayer conductor portion is formed such that the conductive member is processed from at least one main surface side so that a central portion is not constricted.
請求項1または2に記載の配線基板において、
前記導電性部材は、金属箔または金属板からなる金属導体であることを特徴とする配線基板。
In the wiring board according to claim 1 or 2,
The wiring board, wherein the conductive member is a metal conductor made of a metal foil or a metal plate.
金属箔または金属板からなる金属導体を支持部材上に剥離自在に接着する導体接着工程と、
前記複合体の前記金属導体を加工して上面側から順の第1面内導体部、層間導体部、第2面内導体部を連続的に形成する導体加工工程と、
加工した前記金属導体を絶縁層に内蔵し、前記第1面内導体部により前記絶縁層の一方の主面側の面内導体を形成し、前記第2面内導体部により前記絶縁層の他方の主面側の面内導体を形成する絶縁層形成工程と、
前記支持部材を前記金属導体から剥離する剥離工程と、
前記絶縁層を少なくとも一方の主面側から研磨して前記両面内導体部の表面を前記絶縁層から露出させる研磨工程とを含むことを特徴とする配線基板の製造方法。
A conductor bonding step of releasably bonding a metal conductor made of a metal foil or a metal plate on a support member;
A conductor processing step of processing the metal conductor of the composite to continuously form a first in-plane conductor portion, an interlayer conductor portion, and a second in-plane conductor portion in order from the upper surface side;
The processed metal conductor is incorporated in an insulating layer, the first in-plane conductor portion forms an in-plane conductor on one main surface side of the insulating layer, and the second in-plane conductor portion forms the other side of the insulating layer. An insulating layer forming step of forming an in-plane conductor on the main surface side of
A peeling step of peeling the support member from the metal conductor;
And a polishing step of polishing the insulating layer from at least one main surface side to expose the surface of the double-sided conductor portion from the insulating layer.
金属箔または金属板からなる金属導体を第1の支持部材上に剥離自在に接着する第1接着工程と、
前記第1の支持部材上の前記金属導体を上面側から加工して第1面内導体部および層間導体部および第2面内導体部を連続的に形成する第1導体加工工程と、
前記第1導体加工工程により加工した前記金属導体を絶縁層に内蔵し、前記第1面内導体部により前記絶縁層の一方の主面側の面内導体を形成し、前記第2面内導体部により前記絶縁層の他方の主面側の面内導体を形成する絶縁層形成工程と、
前記第1の支持部材を前記金属導体から剥離する第1剥離工程と、
前記第1の支持部材の剥離後に前記絶縁層の前記一方の主面側に第2の支持部材を剥離自在に接着する第2接着工程と、
前記金属導体の前記第1導体加工工程で残った部分を前記絶縁層の前記他方の主面側からさらに加工する第2導体加工工程と、
前記第2の支持部材を前記金属導体から剥離する第2剥離工程と、
前記絶縁層の前記両主面側を研磨して前記両面内導体部の表面を前記絶縁層から露出させる研磨工程とを含むことを特徴とする配線基板の製造方法。
A first bonding step of releasably bonding a metal conductor made of a metal foil or a metal plate on the first support member;
A first conductor processing step of processing the metal conductor on the first support member from the upper surface side to continuously form a first in-plane conductor portion, an interlayer conductor portion, and a second in-plane conductor portion;
The metal conductor processed by the first conductor processing step is built in an insulating layer, an in-plane conductor on one main surface side of the insulating layer is formed by the first in-plane conductor portion, and the second in-plane conductor is formed. Forming an in-plane conductor on the other main surface side of the insulating layer by a portion; and
A first peeling step of peeling the first support member from the metal conductor;
A second bonding step of releasably bonding the second support member to the one main surface side of the insulating layer after peeling of the first support member;
A second conductor processing step of further processing a portion remaining in the first conductor processing step of the metal conductor from the other main surface side of the insulating layer;
A second peeling step of peeling the second support member from the metal conductor;
A method of manufacturing a wiring board, comprising: a polishing step of polishing both main surface sides of the insulating layer to expose the surfaces of the double-sided inner conductor portions from the insulating layer.
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JP7442019B2 (en) 2020-11-10 2024-03-01 クゥアルコム・インコーポレイテッド Package with board-to-board gradient interconnect structure
JP2022144913A (en) * 2021-03-19 2022-10-03 株式会社Fpcコネクト Printed wiring board and manufacturing method thereof

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