JP2010252210A - Temperature compensation type piezoelectric oscillator - Google Patents

Temperature compensation type piezoelectric oscillator Download PDF

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Publication number
JP2010252210A
JP2010252210A JP2009101647A JP2009101647A JP2010252210A JP 2010252210 A JP2010252210 A JP 2010252210A JP 2009101647 A JP2009101647 A JP 2009101647A JP 2009101647 A JP2009101647 A JP 2009101647A JP 2010252210 A JP2010252210 A JP 2010252210A
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Prior art keywords
chip
heat
temperature
piezoelectric
piezoelectric oscillator
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Inventor
Shigehisa Kurogo
重久 黒後
Masayuki Ishikawa
匡亨 石川
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Seiko Epson Corp
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Seiko Epson Corp
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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
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    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2924/181—Encapsulation

Abstract

<P>PROBLEM TO BE SOLVED: To provide a temperature compensation type piezoelectric oscillator that reduces an initial frequency drift caused due to heat generation during actuation. <P>SOLUTION: The temperature compensation type piezoelectric oscillator includes a package (container) having a recessed portion with a piezoelectric element mounting portion and a surface mount electrode provided outside, and an IC chip 1, wherein the IC chip has the followings integrated thereon: a lid (lid member) for closing the package; an oscillation circuit; and a temperature compensation circuit. The IC chip 1 includes a silicon substrate (chip body) 3, an IC electrode 2 formed on one surface of the silicon substrate 3, and a heat slinger (conductor film for heat dissipation) 5 formed on the opposite surface from the one surface, wherein a ground potential portion of the silicon substrate 3 and the heat slinger 5 are connected through at least one or more VIA hole 4. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、温度補償型圧電発振器（ＴＣＸＯ）に関し、さらに詳しくは、表面実装用の
温度補償型圧電発振器において、起動時の発熱による初期周波数ドリフトを低減させる温
度補償型圧電発振器に関するものである。 The present invention relates to a temperature compensated piezoelectric oscillator (TCXO), and more particularly, to a temperature compensated piezoelectric oscillator that reduces initial frequency drift due to heat generation at startup in a surface compensated temperature compensated piezoelectric oscillator.

表面実装用の温度補償型圧電発振器は、小型、軽量であって温度変化に対する周波数安
定度が高いことから、特に温度環境が厳しい携帯電話等の周波数源として内蔵されている
。この温度補償型圧電発振器の一つとして、図６に示すように、温度補償回路５１及び発
振回路５４をＩＣチップ５０内に収容して圧電振動素子５３とともに密封した温度補償型
圧電発振器が知られている。
しかしながら昨今、電源印加から周波数が安定するまでの、時間に対する周波数変化(
周波数ドリフト)の規格が厳しくなる中、仕様を満足することが難しくなっている。これ
は、温度補償型圧電発振器の起動時すなわち電源印加直後には、ＩＣチップ５０内に生ず
る回路電流に起因した発熱、特に発振用増幅器や緩衝増幅器等の能動素子に流れる電流に
よって、ＩＣチップ５０自体の温度が変動する。この熱は圧電振動素子５３にも配線やパ
ッケージを伝って、遅れて伝達されることになる。本来、温度補償型圧電発振器はＩＣチ
ップ５０の温度と圧電振動子５３の温度が平衡状態であるときが定常状態である。
温度補償型圧電発振器は、圧電振動子が持つ温度特性を、補償電圧発生回路が打ち消す
ような電圧を生成し、それを可変容量素子に印加することで、発振器の出力（Ｖｏｕｔ）
周波数を温度に対して変化の小さな安定した値にすることができる。
ＩＣチップ５０に集積化された補償電圧発生回路５１内の温度センサーは、ＩＣの温度
に応じた補償電圧Ｖｃを可変容量素子５２に印加する。ここで電源印加直後の動きとして
例えば、周囲温度が２５℃であれば、圧電振動素子５３は２５℃であるのに対し、温度セ
ンサーはＩＣ自身の発熱によりこれより高い例えば２６℃を検出する。そして、補償電圧
発生回路５１は検出温度２６℃に基づく補償電圧Ｖｃを可変容量素子５２に印加する。発
振回路は補償電圧に追随して周波数が変化する構成になっていることから、その間、補償
電圧の変動により、発振周波数が変動することになる。また圧電振動子にはＩＣの熱が時
間差をもって伝達され振動子の温度が遅れて上昇する。これによっても圧電振動子の温度
特性により、発振回路の周波数が変化することになる。やがて熱的平衡状態が保たれると
周波数は安定する。このように電源印加直後は、ＩＣ自身の発熱による補償電圧変化と、
それが圧電素子に伝達されることによる圧電素子の周波数変化の、双方により発振周波数
ｆが時間に対して変化をすることになる。
周波数ドリフトを抑えるためには、ＩＣと圧電素子の温度差を完全になくすか、ＩＣの
発熱を抑える方法がある。前者での対応はＩＣに直接圧電素子を実装するなど考えられる
が、実用化するには課題が多い。後者についてはいくつか既に検討されている。 A temperature-compensated piezoelectric oscillator for surface mounting is small and lightweight, and has high frequency stability against temperature changes, and is therefore built in as a frequency source for mobile phones and the like that have particularly severe temperature environments. As one of the temperature compensated piezoelectric oscillators, there is known a temperature compensated piezoelectric oscillator in which a temperature compensation circuit 51 and an oscillation circuit 54 are accommodated in an IC chip 50 and sealed together with a piezoelectric vibration element 53 as shown in FIG. ing.
However, in recent years, the frequency change with respect to time from the application of power to the stabilization of the frequency (
As the standard of (frequency drift) becomes stricter, it is difficult to satisfy the specifications. This is because, when the temperature compensated piezoelectric oscillator is started up, that is, immediately after the power supply is applied, the IC chip 50 is caused by heat generated by the circuit current generated in the IC chip 50, particularly, current flowing in an active element such as an oscillation amplifier or buffer amplifier. The temperature of itself fluctuates. This heat is transmitted to the piezoelectric vibration element 53 with a delay through the wiring and the package. Originally, the temperature compensated piezoelectric oscillator is in a steady state when the temperature of the IC chip 50 and the temperature of the piezoelectric vibrator 53 are in an equilibrium state.
The temperature-compensated piezoelectric oscillator generates a voltage that cancels out the temperature characteristics of the piezoelectric vibrator by the compensation voltage generation circuit, and applies it to the variable capacitance element to output the oscillator output (Vout).
The frequency can be a stable value with little change with respect to temperature.
A temperature sensor in the compensation voltage generation circuit 51 integrated in the IC chip 50 applies a compensation voltage Vc corresponding to the temperature of the IC to the variable capacitance element 52. Here, for example, if the ambient temperature is 25 ° C. as the movement immediately after the power supply is applied, the piezoelectric vibration element 53 is 25 ° C., whereas the temperature sensor detects 26 ° C. higher than this due to the heat generated by the IC itself. The compensation voltage generation circuit 51 applies a compensation voltage Vc based on the detected temperature of 26 ° C. to the variable capacitance element 52. Since the oscillation circuit has a configuration in which the frequency changes following the compensation voltage, the oscillation frequency fluctuates due to the fluctuation of the compensation voltage during that time. Further, the heat of the IC is transmitted to the piezoelectric vibrator with a time difference, and the temperature of the vibrator rises with a delay. This also changes the frequency of the oscillation circuit due to the temperature characteristics of the piezoelectric vibrator. Over time, the frequency stabilizes when the thermal equilibrium is maintained. Thus, immediately after application of power, the compensation voltage changes due to the heat generated by the IC itself,
The oscillation frequency f changes with time due to both changes in the frequency of the piezoelectric element caused by the fact that it is transmitted to the piezoelectric element.
In order to suppress the frequency drift, there are methods of completely eliminating the temperature difference between the IC and the piezoelectric element or suppressing the heat generation of the IC. For the former, it is conceivable to mount a piezoelectric element directly on the IC, but there are many problems for practical use. Some of the latter have already been studied.

従来技術として特許文献１には、ＩＣチップの発熱源が発振回路とバッファ回路である
という前提のもと、温度センサーと発振回路、バッファ回路の距離を離してレイアウトし
て発熱の影響を抑えた温度補償型水晶発振器について開示されている。また、特許文献２
には、ＩＣチップの発熱を抑えて放熱性を高めるために、ＩＣチップの側面に熱伝導の良
い接着剤を塗布した構造を有する表面実装用の温度補償水晶発振器について開示されてい
る。また、特許文献３には、ＩＣチップの発熱を抑えるためにＩＣチップの裏面に放熱板
を接着した構造を有する表面実装用の温度補償水晶発振器について開示されている。 As a conventional technique, Patent Document 1 discloses that the heat source of an IC chip is an oscillation circuit and a buffer circuit, and the temperature sensor, the oscillation circuit, and the buffer circuit are separated from each other to reduce the influence of the heat generation. A temperature compensated crystal oscillator is disclosed. Patent Document 2
Discloses a temperature-compensated crystal oscillator for surface mounting having a structure in which an adhesive having good thermal conductivity is applied to the side surface of an IC chip in order to suppress heat generation of the IC chip and enhance heat dissipation. Patent Document 3 discloses a surface-mounted temperature compensated crystal oscillator having a structure in which a heat sink is bonded to the back surface of an IC chip in order to suppress heat generation of the IC chip.

特開２００７−６７９６７公報JP 2007-67967 A 特開２００７−２９５１５９公報JP 2007-295159 A 特開２００７−３２４８５１公報JP 2007-324851 A

しかしながら、特許文献１に開示されている従来技術は、ＩＣチップが小型になると温
度センサーと発振回路、バッファ回路を離す距離にも限度があり、それほど発熱の影響を
軽減する効果が得られないといった問題がある。また、特許文献２及び３に開示されてい
る従来技術は、構造的に複雑となるため、それに伴って製造工程が複雑となり、小型化す
ると更に製造が困難になるといった問題がある。
本発明は、かかる課題に鑑みてなされたものであり、ＩＣチップの回路面と反対側の面
に放熱板を設け、回路内のグランド電位部と放熱板とをＶＩＡホールを介して接続し、電
源印加時に発生するＩＣチップ内の発熱を放熱板で放熱することにより、起動時の発熱に
よる初期周波数ドリフトを低減させる温度補償型圧電発振器を提供することを目的とする
。 However, the conventional technology disclosed in Patent Document 1 has a limitation in the distance between the temperature sensor, the oscillation circuit, and the buffer circuit when the IC chip is small, and the effect of reducing the influence of heat generation cannot be obtained so much. There's a problem. Further, since the conventional techniques disclosed in Patent Documents 2 and 3 are structurally complicated, the manufacturing process is complicated accordingly, and there is a problem that manufacturing becomes more difficult when the size is reduced.
The present invention has been made in view of such problems, and a heat sink is provided on the surface opposite to the circuit surface of the IC chip, and the ground potential portion in the circuit and the heat sink are connected via the VIA hole. It is an object of the present invention to provide a temperature compensated piezoelectric oscillator that reduces initial frequency drift due to heat generation during startup by radiating heat generated in an IC chip when power is applied by a heat radiating plate.

本発明は、上述の課題の少なくとも一部を解決するためになされたものであり、以下の
形態又は適用例として実現することが可能である。 SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

［適用例１］圧電振動素子搭載部を有した凹部、及び外部に形成された表面実装用電極
を備えた容器と、該容器を閉止する蓋部材と、発振回路及び温度補償回路を集積化したＩ
Ｃチップと、を備えた温度補償型圧電発振器であって、前記ＩＣチップは、チップ本体と
、該チップ本体の一面に形成されたＩＣ電極と、該一面の反対面に形成された放熱用導体
膜と、を備え、前記チップ本体のグランド電位部と前記放熱用導体膜とが少なくとも１つ
以上のＶＩＡホールを介して接続されていることを特徴とする。 Application Example 1 A container having a concave portion having a piezoelectric vibration element mounting portion and a surface mounting electrode formed outside, a lid member for closing the container, an oscillation circuit, and a temperature compensation circuit are integrated. I
A temperature-compensated piezoelectric oscillator comprising a C chip, wherein the IC chip includes a chip body, an IC electrode formed on one surface of the chip body, and a heat radiation conductor formed on the opposite surface of the chip body. A ground potential portion of the chip body and the heat radiating conductor film are connected to each other through at least one VIA hole.

温度補償型圧電発振器の起動時には、ＩＣチップ内に生ずる回路電流に起因した発熱、
特に発振用増幅器や緩衝増幅器等の能動素子による発熱によって、ＩＣチップ自体の温度
が周囲温度よりも高くなる。その結果、起動時に周波数ドリフトという現象が発生する。
この原因は、ＩＣチップと圧電振動素子の温度の立ち上がりが異なるために発生する現象
である。即ち、ＩＣチップの方が温度の立ち上がりが早いため、ＩＣチップ内の温度セン
サーが周囲温度より高い温度データに基づいて発振周波数を補正しようとするためである
。言い換えると、起動時にＩＣチップと圧電振動素子の温度差を可能な限り少なくするか
、またはＩＣの発熱量を抑えることによって、周波数ドリフトを低減することができる。
そこで本発明では、ＩＣチップの発熱量を抑えて、圧電振動素子との温度差を小さくする
ことで周波数ドリフトを低減するものであり、ＩＣに放熱用導体膜を備えてＩＣチップ内
で発生した熱を放熱するものである。これにより、起動時の発熱による初期周波数ドリフ
トを低減させることができる。 When starting up the temperature compensated piezoelectric oscillator, heat generated by the circuit current generated in the IC chip,
In particular, the temperature of the IC chip itself becomes higher than the ambient temperature due to heat generated by active elements such as an oscillation amplifier and a buffer amplifier. As a result, a phenomenon called frequency drift occurs at startup.
This is a phenomenon that occurs because the temperature rises of the IC chip and the piezoelectric vibration element are different. That is, since the temperature rise of the IC chip is faster, the temperature sensor in the IC chip tries to correct the oscillation frequency based on temperature data higher than the ambient temperature. In other words, frequency drift can be reduced by reducing the temperature difference between the IC chip and the piezoelectric vibration element as much as possible at the time of start-up or suppressing the heat generation amount of the IC.
Therefore, in the present invention, the frequency drift is reduced by suppressing the heat generation amount of the IC chip and reducing the temperature difference from the piezoelectric vibration element. The IC is provided with a heat radiating conductor film and is generated in the IC chip. It dissipates heat. Thereby, the initial frequency drift due to heat generation at the time of startup can be reduced.

［適用例２］前記容器の凹部は、内壁に前記圧電振動素子搭載部を有すると共に内底部
にＩＣチップ搭載部を有し、該ＩＣチップ搭載部に前記ＩＣチップの放熱用導体膜を接触
させて搭載したことを特徴とする。 Application Example 2 The concave portion of the container has the piezoelectric vibration element mounting portion on the inner wall and the IC chip mounting portion on the inner bottom, and the heat dissipation conductor film of the IC chip is brought into contact with the IC chip mounting portion. It is characterized by being mounted.

ＩＣチップがワイヤーボンディング型の場合、ＩＣ電極を備えた一面が上向きとなる。
その結果、放熱用導体膜を備えた面は下向きとなるので、必然的に放熱用導体膜は、ＩＣ
チップ搭載部の内底部と接触させて搭載される。そしてＩＣ電極にバンプを形成してボン
ディングワイヤーによりＩＣチップ搭載部の配線パターンと接続する。これにより、放熱
用導体膜から発生した熱がＩＣチップ搭載部の内底部から放熱され、放熱効果を高めるこ
とができる。 When the IC chip is a wire bonding type, one surface provided with the IC electrode faces upward.
As a result, the surface provided with the heat dissipating conductor film faces downward, so that the heat dissipating conductor film is inevitably the IC
Mounted in contact with the inner bottom of the chip mounting portion. Then, bumps are formed on the IC electrodes and connected to the wiring pattern of the IC chip mounting portion by bonding wires. Thereby, the heat generated from the heat radiating conductor film is radiated from the inner bottom portion of the IC chip mounting portion, and the heat radiation effect can be enhanced.

［適用例３］前記容器は、前記凹部と、該凹部の底板によって隔てられて配置されたＩ
Ｃチップ収容空所と、を備え、該ＩＣチップ収容空所の内底面又は天井面に前記ＩＣチッ
プの放熱用導体膜を接触させて搭載したことを特徴とする。 [Application Example 3] The container is arranged such that the container is separated from the recess by a bottom plate of the recess.
And a C chip housing space, and the heat sink conductive film of the IC chip is mounted in contact with the inner bottom surface or ceiling surface of the IC chip housing space.

圧電振動素子がＩＣチップから発生する熱の影響を低減するために、本発明では、圧電
振動素子を搭載した容器とＩＣチップ収容空所とを別体として２段構造とし、ＩＣチップ
収容空所の内底面又は天井面にＩＣチップの放熱用導体膜を接触させて搭載する。これに
より、ＩＣチップから発生する熱が直接圧電振動素子に伝達するのを防止することができ
る。 In order to reduce the influence of heat generated by the piezoelectric vibration element from the IC chip, in the present invention, the container mounting the piezoelectric vibration element and the IC chip housing space are separated into a two-stage structure, and the IC chip housing space is formed. An IC chip heat dissipating conductor film is brought into contact with and mounted on the inner bottom surface or ceiling surface. Thereby, it is possible to prevent heat generated from the IC chip from being directly transferred to the piezoelectric vibration element.

［適用例４］前記容器、前記圧電振動素子搭載部に搭載した圧電振動素子、及び前記凹
部を閉止する前記蓋部材を備えた圧電振動子と、前記ＩＣチップと、該圧電振動子及び該
ＩＣチップを近接配置した状態で前記表面実装用電極及び前記ＩＣ電極を配線パターンと
接続したプリント配線基板と、を備え、 前記圧電振動子と前記ＩＣチップをモールド樹
脂により被覆一体化したことを特徴とする。 Application Example 4 Piezoelectric Vibrator Provided with the Container, the Piezoelectric Vibrating Element Mounted on the Piezoelectric Vibrating Element Mount, and the Lid Member for Closing the Recess, the IC Chip, the Piezoelectric Vibrator, and the IC A printed wiring board in which the surface mounting electrode and the IC electrode are connected to a wiring pattern in a state where the chip is disposed close to the chip, and the piezoelectric vibrator and the IC chip are integrally covered with a mold resin. To do.

圧電振動素子搭載部とＩＣチップ収容空所を縦方向に構成すると、圧電発振器全体の高
さが高くなってしまう。そこで本発明では、プリント配線基板上に圧電振動子とＩＣチッ
プを並行に実装し、圧電振動子とＩＣチップをモールド樹脂により被覆一体化する。これ
により、圧電発振器の高さ方向を低く構成することができ、且つ圧電振動子とＩＣチップ
を外部環境から保護することができる。 If the piezoelectric vibration element mounting portion and the IC chip housing space are configured in the vertical direction, the overall height of the piezoelectric oscillator is increased. Therefore, in the present invention, the piezoelectric vibrator and the IC chip are mounted in parallel on the printed wiring board, and the piezoelectric vibrator and the IC chip are covered and integrated with a mold resin. As a result, the height direction of the piezoelectric oscillator can be reduced, and the piezoelectric vibrator and the IC chip can be protected from the external environment.

［適用例５］前記ＩＣチップを前記プリント配線基板にフリップチップ実装した場合、
前記ＩＣチップの放熱用導体膜に接触するように該ＩＣチップを覆う金属ケースを備えた
ことを特徴とする。 Application Example 5 When the IC chip is flip-chip mounted on the printed wiring board,
A metal case is provided that covers the IC chip so as to be in contact with the heat-dissipating conductor film of the IC chip.

ＩＣチップをプリント配線基板にフリップチップ実装した場合、ＩＣ電極を備えた一面
が下向きとなる。その結果、放熱用導体膜を備えた面は上向きとなるので、必然的に放熱
用導体膜は、何処とも接触しない状態で、放熱用導体膜から発生した熱は空気を介して放
熱される。しかし、これだけでは放熱の効率が良くないので、本発明ではＩＣチップを覆
う金属性のケースを設け、この金属ケースに放熱用導体膜を密着させる。これにより、放
熱用導体膜から発生した熱が金属ケースを介して放熱され、放熱効率を高めることができ
る。 When the IC chip is flip-chip mounted on the printed wiring board, the one surface provided with the IC electrodes faces downward. As a result, since the surface provided with the heat radiating conductor film is directed upward, the heat generated from the heat radiating conductor film is radiated through the air without being in contact with the heat radiating conductor film. However, since the heat dissipation efficiency is not good only by this, in the present invention, a metal case that covers the IC chip is provided, and the heat dissipation conductive film is adhered to the metal case. Thereby, the heat generated from the heat-dissipating conductor film is dissipated through the metal case, and the heat dissipation efficiency can be improved.

［適用例６］前記放熱用導体膜は、導電性接着剤又は金属ペーストにより前記ＩＣチッ
プ収容空所の内底面又は天井面又は前記金属性のケースと接着されることを特徴とする。 Application Example 6 The heat-dissipating conductor film is bonded to an inner bottom surface or a ceiling surface of the IC chip housing space or the metallic case with a conductive adhesive or a metal paste.

放熱用導体膜は、アルミ又は銅等の熱伝導率が比較的高い金属により構成される。しか
し、放熱用導体膜から発生した熱をＩＣチップ収容空所の内底面や天井面又は金属ケース
に密着させても、平面性が悪いと接触面での熱の伝達効率が悪くなる。そこで本発明では
、接触面に導電性接着剤又は金属ペーストを塗布する。これにより、接触性を高めて更に
放熱効果を高めることができる。 The heat radiating conductor film is made of a metal having a relatively high thermal conductivity such as aluminum or copper. However, even if the heat generated from the heat-dissipating conductor film is brought into close contact with the inner bottom surface, the ceiling surface, or the metal case of the IC chip housing space, if the flatness is poor, the heat transfer efficiency at the contact surface is deteriorated. Therefore, in the present invention, a conductive adhesive or a metal paste is applied to the contact surface. Thereby, contact property can be improved and the thermal radiation effect can be improved further.

（ａ）は本発明の第１の実施形態に係る温度補償型圧電発振器の構造を示す断面図、（ｂ）は本発明の第２の実施形態に係る温度補償型圧電発振器の構造を示す断面図、（ｃ）、（ｄ）は本発明の第３の実施形態に係る温度補償型圧電発振器の構造を示す断面図である。(A) is sectional drawing which shows the structure of the temperature compensation type piezoelectric oscillator which concerns on the 1st Embodiment of this invention, (b) is a cross section which shows the structure of the temperature compensation type piezoelectric oscillator which concerns on the 2nd Embodiment of this invention. FIGS. 3C and 3D are sectional views showing the structure of a temperature compensated piezoelectric oscillator according to the third embodiment of the present invention. 本発明の実施形態に係るＩＣチップの構成を示す図であり、（ａ）は断面図、（ｂ）は裏面から見た平面図、（ｃ）は裏面から見た他の平面図である。It is a figure which shows the structure of the IC chip which concerns on embodiment of this invention, (a) is sectional drawing, (b) is the top view seen from the back surface, (c) is the other top view seen from the back surface. 図２（ａ）のＡ部を拡大した図である。It is the figure which expanded the A section of Fig.2 (a). ＩＣチップをパッケージに実装した状態を示す図であり、（ａ）はＩＣチップをボンディングワイヤーによりパッケージに実装した場合、（ｂ）はＩＣチップをパッケージにフリップチップ実装した場合を示す図である。It is a figure which shows the state which mounted the IC chip in the package, (a) is a figure which shows the case where an IC chip is mounted in a package with a bonding wire, (b) is a figure which shows the case where an IC chip is flip-chip mounted in a package. 起動時の圧電発振器のＩＣチップと圧電素子の温度の立ち上がりを示す図である。It is a figure which shows the rise of the temperature of the IC chip of a piezoelectric oscillator and a piezoelectric element at the time of starting. 一般的な温度補償型圧電発振器の概略構成を示す図である。It is a figure which shows schematic structure of a general temperature compensation type piezoelectric oscillator.

以下、本発明を図に示した実施形態を用いて詳細に説明する。但し、この実施形態に記
載される構成要素、種類、組み合わせ、形状、その相対配置などは特定的な記載がない限
り、この発明の範囲をそれのみに限定する主旨ではなく単なる説明例に過ぎない。 Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings. However, the components, types, combinations, shapes, relative arrangements, and the like described in this embodiment are merely illustrative examples and not intended to limit the scope of the present invention only unless otherwise specified. .

図１（ａ）は本発明の第１の実施形態に係る温度補償型圧電発振器の構造を示す断面図
である。この温度補償型圧電発振器（以下、単に圧電発振器と呼ぶ）４０は、圧電振動素
子搭載部を有した凹部２７、及び外部に形成された表面実装用電極２３を備えたパッケー
ジ（容器）１２と、パッケージ１２を閉止するリッド（蓋部材）２０と、発振回路５４及
び温度補償回路５１を集積化したＩＣチップ１と、を備えた圧電発振器４０であって、Ｉ
Ｃチップ１は、シリコン基板（チップ本体）３と、シリコン基板３の一面に形成されたＩ
Ｃ電極２と、この一面の反対面に形成された放熱板（放熱用導体膜）５と、を備え、シリ
コン基板３のグランド電位部と放熱板５とが少なくとも１つ以上のＶＩＡホール４を介し
て接続されている（詳細は後述する）。尚、圧電振動素子２１とＩＣチップ１を接続する
ためにパッケージ１２には配線パターンが形成されている。また、ＩＣチップ１と表面実
装用電極２３もパッケージ１２に形成された配線パターンにより接続されている。
即ち、圧電発振器の起動時（図５の電源ＯＮ時）には、ＩＣチップ１内に生ずる回路電
流に起因した発熱、特に発振用増幅器や緩衝増幅器等の能動素子による発熱によって、Ｉ
Ｃチップ１自体の温度が周囲温度よりも高くなる。その結果、起動時に周波数ドリフトと
いう現象が発生する。この原因は、ＩＣチップ１と圧電振動素子２１の温度の立ち上がり
が異なるために発生する現象である（図５の時間ｔだけＸｔａｌの発熱が遅れる）。即ち
、ＩＣチップ１の方が温度の立ち上がりが早いため、ＩＣチップ１内の温度センサーが周
囲温度より高い温度データに基づいて発振周波数を補正しようとするためである。言い換
えると、起動時にＩＣチップ１と圧電振動素子２１の温度差を可能な限り少なくするか、
またはＩＣの発熱量を抑えることによって、周波数ドリフトを低減することができる。そ
こで本実施形態では、ＩＣチップ１の発熱量を抑えて、圧電振動素子２１との温度差を小
さくすることで周波数ドリフトを低減するものであり、ＩＣに放熱板５を備えてＩＣチッ
プ１内で発生した熱を放熱するものである。これにより、起動時の発熱による初期周波数
ドリフトを低減させることができる。 FIG. 1A is a sectional view showing the structure of a temperature compensated piezoelectric oscillator according to the first embodiment of the present invention. This temperature-compensated piezoelectric oscillator (hereinafter simply referred to as a piezoelectric oscillator) 40 includes a package (container) 12 including a concave portion 27 having a piezoelectric vibration element mounting portion, and a surface mounting electrode 23 formed outside, A piezoelectric oscillator 40 including a lid (lid member) 20 for closing a package 12 and an IC chip 1 in which an oscillation circuit 54 and a temperature compensation circuit 51 are integrated,
The C chip 1 includes a silicon substrate (chip body) 3 and an I formed on one surface of the silicon substrate 3.
A C electrode 2 and a heat sink (heat dissipating conductor film) 5 formed on the opposite surface of the one surface, and the ground potential portion of the silicon substrate 3 and the heat sink 5 have at least one VIA hole 4. (Details will be described later). A wiring pattern is formed on the package 12 to connect the piezoelectric vibration element 21 and the IC chip 1. The IC chip 1 and the surface mounting electrode 23 are also connected by a wiring pattern formed on the package 12.
That is, when the piezoelectric oscillator is activated (when the power supply in FIG. 5 is turned on), heat generated by the circuit current generated in the IC chip 1, particularly heat generated by an active element such as an oscillation amplifier or a buffer amplifier, causes I
The temperature of the C chip 1 itself becomes higher than the ambient temperature. As a result, a phenomenon called frequency drift occurs at startup. This is due to a phenomenon that occurs because the temperature rises of the IC chip 1 and the piezoelectric vibration element 21 are different (the Xtal heat generation is delayed by the time t in FIG. 5). That is, since the temperature rise of the IC chip 1 is faster, the temperature sensor in the IC chip 1 tries to correct the oscillation frequency based on temperature data higher than the ambient temperature. In other words, the temperature difference between the IC chip 1 and the piezoelectric vibration element 21 is reduced as much as possible at the time of startup,
Alternatively, frequency drift can be reduced by suppressing the amount of heat generated by the IC. Therefore, in the present embodiment, the amount of heat generated by the IC chip 1 is suppressed and the temperature difference from the piezoelectric vibration element 21 is reduced, thereby reducing the frequency drift. The heat generated in is dissipated. Thereby, the initial frequency drift due to heat generation at the time of startup can be reduced.

また、パッケージ１２の凹部２７は、内壁に圧電振動素子搭載部を有すると共に内底部
１２ａにＩＣチップ搭載部を有し、このＩＣチップ搭載部にＩＣチップ１の放熱板５を接
触させて搭載した。即ち、ＩＣチップ１がワイヤーボンディング型の場合、ＩＣ電極２を
備えた一面が上向きとなる。その結果、放熱板５を備えた面は下向きとなるので、必然的
に放熱板５は、ＩＣチップ搭載部の内底部１２ａと接触させて搭載される。そしてＩＣ電
極２にバンプを形成してボンディングワイヤー１０によりＩＣチップ搭載部の配線パター
ンと接続する。これにより、放熱板５から発生した熱がＩＣチップ搭載部の内底部１２ａ
から放熱され、放熱効果を高めることができる。 Further, the recess 27 of the package 12 has a piezoelectric vibration element mounting portion on the inner wall and an IC chip mounting portion on the inner bottom portion 12a, and the heat sink 5 of the IC chip 1 is mounted in contact with the IC chip mounting portion. . That is, when the IC chip 1 is a wire bonding type, one surface provided with the IC electrode 2 faces upward. As a result, since the surface provided with the heat sink 5 faces downward, the heat sink 5 is necessarily mounted in contact with the inner bottom portion 12a of the IC chip mounting portion. Then, a bump is formed on the IC electrode 2 and connected to the wiring pattern of the IC chip mounting portion by the bonding wire 10. Thereby, the heat generated from the heat sink 5 is transferred to the inner bottom portion 12a of the IC chip mounting portion.
The heat dissipation effect can be enhanced.

図１（ｂ）は本発明の第２の実施形態に係る圧電発振器の構造を示す断面図である。同
じ構成要素には図１（ａ）と同じ参照番号を付して説明する。この圧電発振器４１は、圧
電振動素子搭載部２５と、凹部２７と、凹部２７の底板を介して下方に配置されたＩＣチ
ップ収容空所２４と、を備え、ＩＣチップ収容空所２４の内底面又は天井面にＩＣチップ
１の放熱板５を接触させて搭載した。即ち、圧電振動素子２１がＩＣチップ１から発生す
る熱の影響を低減するために、本実施形態では、圧電振動素子２１を搭載したパッケージ
２５とＩＣチップ収容空所２４とを別体として２段構造とし、ＩＣチップ収容空所２４の
内底面にＩＣチップ１の放熱板５を接触させて搭載する。これにより、ＩＣチップ１から
発生する熱が直接圧電振動素子２１に伝達するのを防止することができる。
図１（ｃ）、（ｄ）は本発明の第３の実施形態に係る圧電発振器の構造を示す断面図で
ある。同じ構成要素には図１（ａ）と同じ参照番号を付して説明する。この圧電発振器４
２／４３は、パッケージ２５、圧電振動素子搭載部に搭載した圧電振動素子２１、及び凹
部２７を閉止するリッド２０を備えた圧電振動子３１と、ＩＣチップ１と、圧電振動子３
１及びＩＣチップ１を近接配置した状態で表面実装用電極３０及びＩＣ電極２を配線パタ
ーン１０と接続したプリント配線基板２８と、を備え、圧電振動子３１とＩＣチップ１を
モールド樹脂２６により被覆一体化した。即ち、圧電振動素子搭載部とＩＣチップ収容空
所２４を縦方向に構成すると、圧電発振器全体の高さが高くなってしまう。そこで本実施
形態では、プリント配線基板２８上に圧電振動子３１とＩＣチップ１を並行に実装し、圧
電振動子３１とＩＣチップ１をモールド樹脂２６により被覆一体化する。これにより、圧
電発振器の高さ方向を小さくでき、且つ圧電振動子３１とＩＣチップ１を外部環境から保
護することができる。 FIG. 1B is a cross-sectional view showing the structure of a piezoelectric oscillator according to the second embodiment of the present invention. The same constituent elements will be described with the same reference numerals as in FIG. The piezoelectric oscillator 41 includes a piezoelectric vibration element mounting portion 25, a concave portion 27, and an IC chip accommodating space 24 disposed below via a bottom plate of the concave portion 27, and an inner bottom surface of the IC chip accommodating space 24. Alternatively, the heat sink 5 of the IC chip 1 is mounted in contact with the ceiling surface. That is, in order to reduce the influence of heat generated by the piezoelectric vibration element 21 from the IC chip 1, in this embodiment, the package 25 on which the piezoelectric vibration element 21 is mounted and the IC chip housing space 24 are separated into two stages. The heat sink 5 of the IC chip 1 is mounted in contact with the inner bottom surface of the IC chip housing space 24. Thereby, it is possible to prevent the heat generated from the IC chip 1 from being directly transmitted to the piezoelectric vibration element 21.
FIGS. 1C and 1D are sectional views showing the structure of a piezoelectric oscillator according to a third embodiment of the present invention. The same constituent elements will be described with the same reference numerals as in FIG. This piezoelectric oscillator 4
2/43 is a package 25, a piezoelectric vibrator 31 provided on a piezoelectric vibrator element mounting portion, and a piezoelectric vibrator 31 including a lid 20 that closes a recess 27; an IC chip 1; and a piezoelectric vibrator 3
1 and the printed circuit board 28 in which the IC chip 2 and the IC electrode 2 are connected to the wiring pattern 10 in a state where the IC chip 1 and the IC chip 1 are arranged close to each other, and the piezoelectric vibrator 31 and the IC chip 1 are covered with a mold resin 26 Integrated. That is, if the piezoelectric vibration element mounting portion and the IC chip housing space 24 are configured in the vertical direction, the overall height of the piezoelectric oscillator is increased. Therefore, in this embodiment, the piezoelectric vibrator 31 and the IC chip 1 are mounted on the printed wiring board 28 in parallel, and the piezoelectric vibrator 31 and the IC chip 1 are covered and integrated with the mold resin 26. As a result, the height direction of the piezoelectric oscillator can be reduced, and the piezoelectric vibrator 31 and the IC chip 1 can be protected from the external environment.

また、図１（ｄ）のように、ＩＣチップ１をプリント配線基板２８にフリップチップ実
装した場合、ＩＣチップ１の放熱用導体膜５に接触するようにＩＣチップ１を覆う金属ケ
ース２９を備えた。即ち、ＩＣチップ１をプリント配線基板２８にフリップチップ実装し
た場合、バンプ９を備えた一面が下向きとなる。その結果、放熱板５を備えた面は上向き
となるので、必然的に放熱板５は、何処とも接触しない状態で、放熱板５から発生した熱
は空気を介して放熱される。しかし、これだけでは放熱の効率が良くないので、本実施形
態ではＩＣチップ１を覆う金属性のケース２９を設け、この金属ケース２９に放熱板５を
密着させる。これにより、放熱板５から発生した熱が金属ケース２９を介して放熱され、
放熱効率を高めることができる。 Further, as shown in FIG. 1D, when the IC chip 1 is flip-chip mounted on the printed wiring board 28, a metal case 29 is provided to cover the IC chip 1 so as to be in contact with the heat radiating conductor film 5 of the IC chip 1. It was. That is, when the IC chip 1 is flip-chip mounted on the printed wiring board 28, one surface provided with the bumps 9 faces downward. As a result, the surface provided with the heat radiating plate 5 faces upward, so that the heat generated from the heat radiating plate 5 is necessarily radiated through the air in a state where the heat radiating plate 5 is not in contact with anything. However, since the heat dissipation efficiency is not good only by this, in this embodiment, a metallic case 29 that covers the IC chip 1 is provided, and the heat dissipation plate 5 is brought into close contact with the metal case 29. Thereby, the heat generated from the heat sink 5 is dissipated through the metal case 29,
Heat dissipation efficiency can be increased.

図２は本発明の実施形態に係るＩＣチップの構成を示す図である。図２（ａ）は断面図
、（ｂ）は裏面から見た平面図、（ｃ）は裏面から見た他の平面図である。図２（ａ）よ
り、ＩＣチップ１は、シリコン基板（チップ本体）３と、シリコン基板３の一面（半導体
素子面）に形成されたＩＣ電極２と、この一面の反対面に形成された放熱板（放熱用導体
膜）５と、を備え、シリコン基板３の半導体素子面のグランド電位部と放熱板５とが少な
くとも１つ以上のＶＩＡホール４を介して接続されている。
図２（ｂ）では、ＶＩＡホール４は放熱板５の略中央に１つ形成されている。ＩＣチッ
プ１から発生した熱は、ＶＩＡホール４を介して放熱板５により放熱されるが、それと共
に、シリコン基板３から伝達される熱も放熱板５から放熱される。しかし、ＶＩＡホール
４の熱伝導率の方がシリコン基板３の熱伝導率より大きいので、可能な限りＶＩＡホール
４の数を増やした方が有利である。図２（ｃ）はＶＩＡホール４の数を増加した場合の放
熱板を示す図であり、この例では、ＶＩＡホールが４の他に４ａ、４ｂ、４ｃと複数形成
され、更に放熱効果を高めるような構成となっている。
図３は図２（ａ）のＡ部を拡大した図である。同じ構成要素には図２（ａ）と同じ参照
番号を付して説明する。放熱板５は熱伝導率の高いアルミ又は銅等で構成されてグランド
に接続される。そのため、ＶＩＡホール４及び放熱板５は、シリコン基板内の回路とのシ
ョートを防止するために、絶縁膜８により境界面が絶縁されている。 FIG. 2 is a diagram showing the configuration of the IC chip according to the embodiment of the present invention. 2A is a cross-sectional view, FIG. 2B is a plan view seen from the back side, and FIG. 2C is another plan view seen from the back side. 2A, the IC chip 1 includes a silicon substrate (chip body) 3, an IC electrode 2 formed on one surface (semiconductor element surface) of the silicon substrate 3, and a heat dissipation formed on the opposite surface of the one surface. A ground potential portion on the semiconductor element surface of the silicon substrate 3 and the heat sink 5 are connected via at least one or more VIA holes 4.
In FIG. 2B, one VIA hole 4 is formed at the approximate center of the heat sink 5. The heat generated from the IC chip 1 is radiated by the heat radiating plate 5 through the VIA hole 4, and the heat transmitted from the silicon substrate 3 is also radiated from the heat radiating plate 5. However, since the thermal conductivity of the VIA hole 4 is larger than that of the silicon substrate 3, it is advantageous to increase the number of VIA holes 4 as much as possible. FIG. 2C is a view showing a heat dissipation plate when the number of VIA holes 4 is increased. In this example, a plurality of VIA holes 4a, 4b and 4c are formed in addition to 4, further enhancing the heat dissipation effect. It has a configuration like this.
FIG. 3 is an enlarged view of portion A in FIG. The same constituent elements will be described with the same reference numerals as in FIG. The heat sink 5 is made of aluminum or copper having a high thermal conductivity and is connected to the ground. Therefore, the interface between the VIA hole 4 and the heat sink 5 is insulated by the insulating film 8 in order to prevent a short circuit with a circuit in the silicon substrate.

図４はＩＣチップをパッケージに実装した状態を示す図であり、図４（ａ）はＩＣチッ
プ１をボンディングワイヤー１０によりパッケージ１２に実装した場合、図４（ｂ）はＩ
Ｃチップ１をパッケージ１２にフリップチップ実装した場合を示す。ＩＣチップ１をボン
ディングワイヤー１０によりパッケージ１２に実装した場合、放熱板５は、パッケージ１
２の内底面１２ａと接触して搭載される。即ち、ＩＣチップ１をボンディングワイヤー１
０によりパッケージ１２に実装した場合、電極２を備えた面が上向きとなる。その結果、
放熱板５を備えた面は下向きとなるので、必然的に放熱板５は、パッケージ１２の内底面
１２ａと接触して搭載される。そして電極パッド２にバンプ９を形成してボンディングワ
イヤー１０によりパッケージ１２の回路と接続される。これにより、放熱板５から発生し
た熱がパッケージ１２の内底面１２ａから放熱され、放熱効果を高めることができる。尚
、パッケージ１２の内底面１２ａにランド１１を形成することにより、更に放熱効果を高
めることができる。 FIG. 4 is a diagram showing a state where the IC chip is mounted on the package. FIG. 4A shows a case where the IC chip 1 is mounted on the package 12 by the bonding wire 10, and FIG.
The case where the C chip 1 is flip-chip mounted on the package 12 is shown. When the IC chip 1 is mounted on the package 12 by the bonding wire 10, the heat sink 5
2 in contact with the inner bottom surface 12a. That is, the IC chip 1 is bonded to the bonding wire 1
When mounted on the package 12 by 0, the surface provided with the electrode 2 faces upward. as a result,
Since the surface provided with the heat sink 5 faces downward, the heat sink 5 is necessarily mounted in contact with the inner bottom surface 12 a of the package 12. A bump 9 is formed on the electrode pad 2 and connected to a circuit of the package 12 by a bonding wire 10. Thereby, the heat generated from the heat radiating plate 5 is radiated from the inner bottom surface 12a of the package 12, and the heat radiation effect can be enhanced. In addition, by forming the land 11 on the inner bottom surface 12a of the package 12, the heat dissipation effect can be further enhanced.

また、ＩＣチップ１をパッケージ１２にフリップチップ実装した場合（図４（ｂ））、
放熱板５は、ＩＣチップ１を覆う金属性のケース１３と接触して搭載される。即ち、ＩＣ
チップ１をパッケージ１２にフリップチップ実装した場合、電極２を備えた面が下向きと
なる。その結果、放熱板５を備えた面は上向きとなるので、必然的に放熱板５は、何処と
も接触しない状態で、放熱板５から発生した熱は空気を介して放熱される。しかし、これ
だけでは放熱の効率が良くないので、本実施形態ではＩＣチップ１を覆う金属性のケース
１３を設け、この金属ケース１３に放熱板５を密着させる。これにより、放熱板５から発
生した熱が金属ケース１３を介して放熱され、放熱効果を高めることができる。
尚、図示は省略するが、放熱板５は、導電性接着剤又は金属ペーストによりパッケージ
１２又は金属ケース１３と接着される。即ち、放熱板５は、アルミ又は銅等の熱伝導率が
比較的高い金属により構成される。しかし、放熱板５から発生した熱をパッケージ１２の
内底面１２ａや金属ケース１３に密着させても、平面性が悪いと接触面での熱の伝達効率
が悪くなる。そこで本実施形態では、接触面に導電性接着剤又は金属ペーストを塗布する
。これにより、接触性を高めて更に放熱効果を高めることができる。 When the IC chip 1 is flip-chip mounted on the package 12 (FIG. 4B),
The heat sink 5 is mounted in contact with a metallic case 13 that covers the IC chip 1. IC
When the chip 1 is flip-chip mounted on the package 12, the surface provided with the electrode 2 faces downward. As a result, the surface provided with the heat radiating plate 5 faces upward, so that the heat generated from the heat radiating plate 5 is necessarily radiated through the air in a state where the heat radiating plate 5 is not in contact with anything. However, since the heat dissipation efficiency is not good only by this, in this embodiment, a metallic case 13 that covers the IC chip 1 is provided, and the heat radiating plate 5 is adhered to the metal case 13. Thereby, the heat generated from the heat radiating plate 5 is radiated through the metal case 13, and the heat radiating effect can be enhanced.
In addition, although illustration is abbreviate | omitted, the heat sink 5 is adhere | attached with the package 12 or the metal case 13 with a conductive adhesive or a metal paste. That is, the heat sink 5 is made of a metal having a relatively high thermal conductivity such as aluminum or copper. However, even if the heat generated from the heat radiating plate 5 is brought into close contact with the inner bottom surface 12a of the package 12 or the metal case 13, if the flatness is poor, the heat transfer efficiency at the contact surface is deteriorated. Therefore, in this embodiment, a conductive adhesive or a metal paste is applied to the contact surface. Thereby, contact property can be improved and the thermal radiation effect can be improved further.

１ ＩＣチップ、２ 電極パッド、３ シリコン基板、４ ＶＩＡホール、５ 放熱板
、６ 回路面、７ 反対側の面、８ 絶縁膜、９ バンプ、１０ ボンディングワイヤー
、１１ ランド、１２ パッケージ、１３ 金属ケース、３１ 圧電振動子、４０、４１
、４２、４３ 圧電発振器、５０ ＩＣチップ、５１ 温度補償回路、５２ 可変容量素
子、５３ 圧電振動素子、５４ 発振回路 1 IC chip, 2 electrode pad, 3 silicon substrate, 4 VIA hole, 5 heat sink, 6 circuit surface, 7 opposite surface, 8 insulating film, 9 bump, 10 bonding wire, 11 land, 12 package, 13 metal case , 31 Piezoelectric vibrator, 40, 41
, 42, 43 Piezoelectric oscillator, 50 IC chip, 51 Temperature compensation circuit, 52 Variable capacitance element, 53 Piezoelectric vibration element, 54 Oscillation circuit

Claims (6)

圧電振動素子搭載部を有した凹部、及び外部に形成された表面実装用電極を備えた容器
と、該容器を閉止する蓋部材と、発振回路及び温度補償回路を集積化したＩＣチップと、
を備えた温度補償型圧電発振器であって、
前記ＩＣチップは、チップ本体と、該チップ本体の一面に形成されたＩＣ電極と、該一
面の反対面に形成された放熱用導体膜と、を備え、
前記チップ本体のグランド電位部と前記放熱用導体膜とが少なくとも１つ以上のＶＩＡ
ホールを介して接続されていることを特徴とする温度補償型圧電発振器。 A recess having a piezoelectric vibration element mounting portion, a container provided with a surface mounting electrode formed outside, a lid member for closing the container, an IC chip in which an oscillation circuit and a temperature compensation circuit are integrated;
A temperature-compensated piezoelectric oscillator comprising:
The IC chip includes a chip body, an IC electrode formed on one surface of the chip body, and a heat radiating conductor film formed on the opposite surface of the one surface.
The ground potential portion of the chip body and the heat dissipating conductor film have at least one VIA.
A temperature compensated piezoelectric oscillator characterized by being connected through a hole. 前記容器の凹部は、内壁に前記圧電振動素子搭載部を有すると共に内底部にＩＣチップ
搭載部を有し、該ＩＣチップ搭載部に前記ＩＣチップの放熱用導体膜を接触させて搭載し
たことを特徴とする請求項１に記載の温度補償型圧電発振器。 The concave portion of the container has the piezoelectric vibration element mounting portion on the inner wall and an IC chip mounting portion on the inner bottom, and the IC chip mounting portion is mounted in contact with the conductive film for heat dissipation of the IC chip. The temperature compensated piezoelectric oscillator according to claim 1. 前記容器は、前記凹部と、該凹部の底板によって隔てられて配置されたＩＣチップ収容
空所と、を備え、該ＩＣチップ収容空所の内底面又は天井面に前記ＩＣチップの放熱用導
体膜を接触させて搭載したことを特徴とする請求項１に記載の温度補償型圧電発振器。 The container includes the concave portion and an IC chip housing space arranged by being separated by a bottom plate of the concave portion, and a heat-dissipating conductor film for the IC chip on an inner bottom surface or a ceiling surface of the IC chip housing space. The temperature-compensated piezoelectric oscillator according to claim 1, which is mounted in contact with each other. 前記容器、前記圧電振動素子搭載部に搭載した圧電振動素子、及び前記凹部を閉止する
前記蓋部材を備えた圧電振動子と、前記ＩＣチップと、該圧電振動子及び該ＩＣチップを
近接配置した状態で前記表面実装用電極及び前記ＩＣ電極を配線パターンに接続したプリ
ント配線基板と、を備え、
前記圧電振動子と前記ＩＣチップをモールド樹脂により被覆一体化したことを特徴とす
る請求項１に記載の温度補償型圧電発振器。 The container, the piezoelectric vibration element mounted on the piezoelectric vibration element mounting portion, and the piezoelectric vibrator including the lid member for closing the recess, the IC chip, the piezoelectric vibrator, and the IC chip are disposed in proximity to each other. A printed wiring board in which the surface mounting electrode and the IC electrode are connected to a wiring pattern in a state,
The temperature-compensated piezoelectric oscillator according to claim 1, wherein the piezoelectric vibrator and the IC chip are integrally coated with a mold resin. 前記ＩＣチップを前記プリント配線基板にフリップチップ実装し、前記ＩＣチップの放
熱用導体膜に接触するように該ＩＣチップを覆う金属ケースを備えたことを特徴とする請
求項４に記載の温度補償型圧電発振器。 5. The temperature compensation according to claim 4, further comprising: a metal case that flip-chip mounts the IC chip on the printed wiring board and covers the IC chip so as to contact a heat dissipation conductive film of the IC chip. Type piezoelectric oscillator. 前記放熱用導体膜は、導電性接着剤又は金属ペーストにより前記ＩＣチップ収容空所の
内底面又は天井面又は前記金属性のケースと接着されることを特徴とする請求項１乃至５
の何れか一項に記載の温度補償型圧電発振器。 6. The heat radiation conductor film is bonded to an inner bottom surface or a ceiling surface of the IC chip housing space or the metallic case with a conductive adhesive or a metal paste.
The temperature compensated piezoelectric oscillator according to any one of the above.
JP2009101647A 2009-04-20 2009-04-20 Temperature compensation type piezoelectric oscillator Withdrawn JP2010252210A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8710931B2 (en) 2011-06-14 2014-04-29 Nihon Dempa Kogyo Co., Ltd. Piezoelectric device and fabricating method thereof
KR20170072326A (en) * 2014-12-04 2017-06-26 가부시키가이샤 무라타 세이사쿠쇼 Elastic wave device manufacturing method and elastic wave device
WO2020203123A1 (en) * 2019-04-03 2020-10-08 株式会社デンソー Electronic device
US11502644B2 (en) 2020-11-26 2022-11-15 Seiko Epson Corporation Vibration device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8710931B2 (en) 2011-06-14 2014-04-29 Nihon Dempa Kogyo Co., Ltd. Piezoelectric device and fabricating method thereof
KR20170072326A (en) * 2014-12-04 2017-06-26 가부시키가이샤 무라타 세이사쿠쇼 Elastic wave device manufacturing method and elastic wave device
KR101987712B1 (en) * 2014-12-04 2019-06-11 가부시키가이샤 무라타 세이사쿠쇼 Elastic wave device manufacturing method and elastic wave device
US10601389B2 (en) 2014-12-04 2020-03-24 Murata Manufacturing Co., Ltd. Elastic wave device
WO2020203123A1 (en) * 2019-04-03 2020-10-08 株式会社デンソー Electronic device
JP2020170786A (en) * 2019-04-03 2020-10-15 株式会社デンソー Electronic device
JP7063302B2 (en) 2019-04-03 2022-05-09 株式会社デンソー Electronic device
US11502644B2 (en) 2020-11-26 2022-11-15 Seiko Epson Corporation Vibration device

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