JP2010250493A - タッチパネル装置 - Google Patents
タッチパネル装置 Download PDFInfo
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- JP2010250493A JP2010250493A JP2009098235A JP2009098235A JP2010250493A JP 2010250493 A JP2010250493 A JP 2010250493A JP 2009098235 A JP2009098235 A JP 2009098235A JP 2009098235 A JP2009098235 A JP 2009098235A JP 2010250493 A JP2010250493 A JP 2010250493A
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- 238000005259 measurement Methods 0.000 claims abstract description 8
- 238000001514 detection method Methods 0.000 claims description 15
- 238000004364 calculation method Methods 0.000 abstract description 5
- 238000000034 method Methods 0.000 description 18
- 238000010586 diagram Methods 0.000 description 10
- 239000010410 layer Substances 0.000 description 7
- 238000006243 chemical reaction Methods 0.000 description 6
- 238000002474 experimental method Methods 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 239000011241 protective layer Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
【解決手段】タッチ領域の形状を例えば円と仮定する。前記タッチ領域円と電極領域6が重なる領域のX方向の幅(重なり幅X46)およびY方向の幅(重なり幅Y47)を、センサ測定値から求める。重なり幅X46と重なり幅Y47が異なる場合、タッチ領域が電極領域からはみ出しているものと判定し、前記タッチ領域円の中心の位置をタッチ位置とみなして算出する。
【選択図】図5
Description
ただし、式(1)で求めた値が負の値となった場合は、かわりに0を差分値43として格納する。差分値43は、各電極においてタッチによって増加した静電容量である。
重なり幅Y47=MAX(X軸の差分値43)*変換比率45 (3)
ここで関数MAXは、複数の値の中から最大のものを選択して返す関数である。図4においては、X軸では電極X1の差分値43、Y軸では電極Y3の差分値43がそれぞれ最大である。変換比率45は予め設定された値であり、差分値43の値をタッチパネル1上の長さに変換するための比率である。重なり幅X46および重なり幅Y47は、図5に示すように、それぞれ、タッチパネル1上のタッチされた領域(タッチ領域)と、電極が配置された領域(電極領域6)とが重なる領域のX方向の幅およびY方向の幅である。
タッチ位置(Y座標)=Σ(wi*yi)/Σ(wi) (5)
以上により、タッチ領域が電極領域6からはみ出していない場合のタッチ位置検出の1サイクルが完了し、ステップS2へ戻る。
図5におけるXがX座標、Rが重なり幅Y47/2にそれぞれ対応する。Y座標は、タッチ領域が電極領域6からはみ出していない場合の計算式(5)により求める。また、タッチ領域が電極領域6からY方向にはみ出している場合については、前記の算出方法において、XとYとを入れ替えることで同様にタッチ位置を求められる。
11 保護層
12 絶縁層
13 基板層
X,Y 電極層
X1〜5 電極(X軸)
Y1〜5 電極(Y軸)
2 静電容量検出部
3 制御部
4 記憶部
5 バス接続信号線
6 電極領域
Claims (5)
- 複数のセンサにおける測定値に基づいてタッチ位置を検出するタッチパネルのタッチ位置検出方法において、X方向のタッチ位置およびY方向のタッチ位置を検出するためのセンサ測定値に基づいて、タッチ領域と電極領域とが重なる領域のX方向の幅およびY方向の幅を求め、前記X方向の幅およびY方向の幅から前記タッチ領域の中心の位置を求め、前記中心の位置をタッチ位置として算出することを特徴とする、タッチパネル装置。
- 前記タッチ領域の形状は、X方向の幅とY方向の幅の比率が一定であると仮定することを特徴とする、請求項1に記載のタッチパネル装置。
- 前記タッチ領域の形状は、円または楕円であると仮定することを特徴とする、請求項1に記載のタッチパネル装置。
- 前記タッチ領域と電極領域とが重なる領域のX方向の幅を、Y軸のセンサ測定値の最大値に予め設定された値を乗算して求め、前記タッチ領域と電極領域とが重なる領域のY方向の幅を、X軸のセンサ測定値の最大値に予め設定された値を乗算して求めることを特徴とする、請求項1に記載のタッチパネル装置。
- 第1の方向のタッチ位置を、前記タッチ領域と電極領域とが重なる領域の第1の方向の幅から前記タッチ領域と電極領域とが重なる領域の第2の方向の幅の2分の1を減算した値として算出することを特徴とする、請求項1に記載のタッチパネル装置。
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JP2009098235A JP5219908B2 (ja) | 2009-04-14 | 2009-04-14 | タッチパネル装置 |
KR20100033846A KR101138622B1 (ko) | 2009-04-14 | 2010-04-13 | 터치 패널 장치 |
US12/759,045 US9024886B2 (en) | 2009-04-14 | 2010-04-13 | Touch-panel device |
CN2010101642515A CN101866239B (zh) | 2009-04-14 | 2010-04-14 | 触摸面板装置 |
EP10003950.2A EP2241959B1 (en) | 2009-04-14 | 2010-04-14 | Touch-panel device |
US13/271,804 US20120031657A1 (en) | 2009-04-14 | 2011-10-12 | Electronic device mounting structure and electronic device mounting method |
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JP2013051530A (ja) * | 2011-08-30 | 2013-03-14 | Yamaha Corp | フェーダ操作子及びそれを備えた操作子装置 |
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US9257396B2 (en) | 2014-05-22 | 2016-02-09 | Invensas Corporation | Compact semiconductor package and related methods |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07230352A (ja) * | 1993-09-16 | 1995-08-29 | Hitachi Ltd | タッチ位置検出装置及びタッチ指示処理装置 |
JPH1063404A (ja) * | 1996-08-27 | 1998-03-06 | Matsushita Electric Ind Co Ltd | 座標位置入力装置 |
JP2005100475A (ja) * | 2005-01-13 | 2005-04-14 | Fujitsu Ltd | タッチパネル装置 |
JP2007018372A (ja) * | 2005-07-08 | 2007-01-25 | Nintendo Co Ltd | ポインティングデバイスの入力調整プログラムおよび入力調整装置 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5036431A (en) * | 1988-03-03 | 1991-07-30 | Ibiden Co., Ltd. | Package for surface mounted components |
JPH0828583B2 (ja) * | 1992-12-23 | 1996-03-21 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 多層プリント回路基板およびその製作方法、およびボール・ディスペンサ |
KR100435813B1 (ko) * | 2001-12-06 | 2004-06-12 | 삼성전자주식회사 | 금속 바를 이용하는 멀티 칩 패키지와 그 제조 방법 |
SG111069A1 (en) * | 2002-06-18 | 2005-05-30 | Micron Technology Inc | Semiconductor devices including peripherally located bond pads, assemblies, packages, and methods |
JP3908147B2 (ja) * | 2002-10-28 | 2007-04-25 | シャープ株式会社 | 積層型半導体装置及びその製造方法 |
TWI231023B (en) * | 2003-05-27 | 2005-04-11 | Ind Tech Res Inst | Electronic packaging with three-dimensional stack and assembling method thereof |
JP4074862B2 (ja) * | 2004-03-24 | 2008-04-16 | ローム株式会社 | 半導体装置の製造方法、半導体装置、および半導体チップ |
JP4551255B2 (ja) * | 2005-03-31 | 2010-09-22 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP4758712B2 (ja) * | 2005-08-29 | 2011-08-31 | 新光電気工業株式会社 | 半導体装置の製造方法 |
CN100568502C (zh) * | 2005-09-06 | 2009-12-09 | 日本电气株式会社 | 半导体器件 |
US7429792B2 (en) * | 2006-06-29 | 2008-09-30 | Hynix Semiconductor Inc. | Stack package with vertically formed heat sink |
JP5302522B2 (ja) * | 2007-07-02 | 2013-10-02 | スパンション エルエルシー | 半導体装置及びその製造方法 |
JP2009071095A (ja) * | 2007-09-14 | 2009-04-02 | Spansion Llc | 半導体装置の製造方法 |
JP5358077B2 (ja) * | 2007-09-28 | 2013-12-04 | スパンション エルエルシー | 半導体装置及びその製造方法 |
US7838967B2 (en) * | 2008-04-24 | 2010-11-23 | Powertech Technology Inc. | Semiconductor chip having TSV (through silicon via) and stacked assembly including the chips |
-
2009
- 2009-04-14 JP JP2009098235A patent/JP5219908B2/ja active Active
-
2011
- 2011-10-12 US US13/271,804 patent/US20120031657A1/en not_active Abandoned
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07230352A (ja) * | 1993-09-16 | 1995-08-29 | Hitachi Ltd | タッチ位置検出装置及びタッチ指示処理装置 |
JPH1063404A (ja) * | 1996-08-27 | 1998-03-06 | Matsushita Electric Ind Co Ltd | 座標位置入力装置 |
JP2005100475A (ja) * | 2005-01-13 | 2005-04-14 | Fujitsu Ltd | タッチパネル装置 |
JP2007018372A (ja) * | 2005-07-08 | 2007-01-25 | Nintendo Co Ltd | ポインティングデバイスの入力調整プログラムおよび入力調整装置 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013051530A (ja) * | 2011-08-30 | 2013-03-14 | Yamaha Corp | フェーダ操作子及びそれを備えた操作子装置 |
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