JP2010232464A - Group iii nitride semiconductor light emitting element, method of manufacturing the same, and laser diode - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a group III nitride semiconductor light emitting element which has excellent crystallinity, reduced internal resistance and excellent light emitting characteristics, and to provide a method of manufacturing the element, and a laser diode. <P>SOLUTION: A foundation layer (ELO growth layer) 13 having a composition of Al<SB>X</SB>Ga<SB>1-X</SB>N(0<X≤1) is formed on a substrate 11 for growing an epitaxial film or on a buffer layer (group III nitride layer) 12 formed on the substrate 11. An n-type semiconductor layer 14 made of a group III nitride semiconductor, a light emitting layer 15 and a p-type semiconductor layer 16 are sequentially laminated on the foundation layer 13. The foundation layer 13 is formed by means of an ELO mask pattern made of a carbon material formed on the substrate 11 or on the buffer layer 12. The group III nitride semiconductor light emitting element is thus manufactured. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention is a light emitting diode (LED), a laser diode (LD), a group III nitride semiconductor light-emitting element that is suitably used for various electronic devices, etc., and a group III nitride semiconductor is laminated, a method for manufacturing the same, and The present invention relates to a laser diode.

  Conventionally, a group III nitride semiconductor has a function for forming a group III nitride semiconductor light emitting device having a pn junction structure such as a light emitting diode (LED) or a laser diode (LD) that emits visible light having a short wavelength. It is used as a material. In particular, in a light emitting element such as a laser diode that emits light in the ultraviolet region or deep ultraviolet region with an emission wavelength of 360 nm to 200 nm, the material of the III nitride semiconductor layer is gallium nitride (GaN), aluminum gallium nitride (AlGaN), or nitride Gallium indium (GaInN) or the like is used, and for example, application in the fields of medicine and precision processing is expected.

  Conventionally, in the light emitting and receiving device including the laser diode in the ultraviolet region or the deep ultraviolet region as described above, a template substrate in which GaN is laminated on a dissimilar single crystal substrate such as sapphire or silicon carbide (SiC), or has been self-supporting. A GaN substrate is used. However, when such a substrate is used, there is a problem that light emitted from the light emitting layer is absorbed by GaN. In addition, when AlGaN having a high Al composition ratio is deposited on GaN, there is a problem that cracks are generated due to a difference in lattice constant and a coefficient of thermal expansion, resulting in deterioration of device characteristics.

In order to solve the above-described problems, it is necessary to increase the light receiving and emitting efficiency by suppressing the light absorption by using an AlGaN substrate having a composition that transmits and receives and emits light. At the same time, it is necessary to suppress the occurrence of cracks and dislocations and improve the crystal quality by reducing the difference in lattice constant and thermal expansion coefficient between the light receiving and emitting layers. However, the crystal quality of conventional Al _x Ga _1-x N (0 <x ≦ 1) cannot be said to be sufficient, and in particular, Al _x Ga _1-x N (0 <x ≦ 1) having a high AlN mole fraction. Is close to the characteristics of AlN, which has a higher melting point and lower vapor pressure than GaN, and it is difficult to achieve good crystal growth.

On the other hand, in order to improve the crystallinity of a group III nitride semiconductor layer formed on a heterogeneous single crystal substrate, for example, a method of forming a single crystal made of GaN using a method called ELO (Epitaxial Lateral Overgrowth) method Has been proposed (see, for example, Patent Document 1). According to the semiconductor device described in Patent Document 1, a buffer layer and a first GaN layer are formed on a substrate, and a mask pattern made of silicon oxide (SiO ₂ ) is formed on the buffer layer and the first GaN layer. A method of forming a second GaN layer on one GaN layer is disclosed. In the method of manufacturing a semiconductor element of Patent Document 1, since GaN does not grow on the mask pattern, the second GaN layer grown from the surface of the first GaN layer not covered with the mask pattern is the mask pattern. It grows in the lateral direction on the top, and the threading dislocation in the vertical direction is suppressed, and a GaN layer with high crystallinity can be obtained.

When growing an AlGaN crystal using the ELO method described in Patent Document 1, for example, as shown in the schematic cross-sectional view of FIG. 10A, first, a group III nitride is formed on a substrate 111 made of sapphire. A buffer layer 112 which is a physical layer is formed, and a mask pattern 120 made of SiO ₂ or SiN is formed on the buffer layer 112. A layer made of Al _x Ga _1-x N (0 <x ≦ 1) is grown on the buffer layer 112 and the mask pattern 120 by ELO.
Here, when the layer to be grown by ELO is made of a GaN semiconductor as in Patent Document 1, GaN does not grow on the mask pattern 120 made of SiO ₂ or SiN, so that the mask pattern 123 is formed. A base layer 114 grown from the non-region R is grown laterally on the mask pattern 120. At this time, since the crystal defect advances in the crystal growth direction, it is considered that the threading dislocation in the vertical direction is suppressed on the mask pattern 120.

However, when a crystal containing Al as a composition, such as Al _x Ga _1-x N (0 <x ≦ 1), is grown by ELO, it is made of SiO ₂ or SiN as shown in FIG. The polycrystalline AlGaN layer 115 grows on the upper surface 120a of the mask pattern 120. At this time, the lateral growth of the underlying layer 114 made of AlGaN grown from the region R where the mask pattern 120 is not formed on the buffer layer 112 is blocked by the polycrystalline AlGaN layer 115 grown on the mask pattern 120. The Therefore, it is impossible to suppress threading dislocations in the vertical direction, not only it is impossible to improve the crystal quality of the _{Al x Ga 1-x N (} 0 <x ≦ 1) using the ELO method, a single crystal layer There was a problem that could not be formed.

  In order to solve such problems when growing an Al-containing composition such as AlGaN using the ELO method, as an alternative to the ELO method, for example, a periodic groove is formed in a substrate or a buffer layer. On the other hand, a method of forming a highly crystalline semiconductor layer with reduced dislocations by depositing a group III nitride semiconductor thereon has been proposed. However, the above-mentioned periodic groove may be difficult or impossible to form depending on the material constituting the substrate and the buffer layer. For this reason, there has been an urgent need for a technique for efficiently obtaining a semiconductor layer having better crystallinity in a light emitting element such as a laser diode that emits light in the ultraviolet region or deep ultraviolet region.

Furthermore, in the conventional laser diode, an insulating layer 117 made of silicon oxide (SiO ₂ ) or silicon nitride (SiN) is formed on the p-type semiconductor layer 116 as shown in the schematic sectional view of FIG. A structure is proposed in which the constricted portion 116c provided in the p-type semiconductor layer 116 and the positive electrode 118 are connected through the through portion 117a formed in the insulating layer 117. However, the laser diode having such a structure has a high resistance because the contact area between the p-type semiconductor layer 116 and the positive electrode 118 is small. For this reason, in the laser diode in which a large current flows through the constricted portion, there is a problem that the positive electrode 118 and the p-type semiconductor layer 16 generate heat and the light emission characteristics of the laser diode are deteriorated.

  In order to increase the contact area between the p-type semiconductor layer and the positive electrode, a so-called inner stripe structure laser diode in which a current confinement layer is embedded inside the p-type semiconductor layer has been proposed (for example, a patent). References 2-4). However, Patent Documents 2 to 4 have a problem that the crystallinity of the current confinement layer cannot be increased because the opening of the current confinement layer needs to be formed by lift-off or wet etching. Here, in Patent Document 2, the current confinement layer is formed at a temperature of 500 ° C. or lower by sputtering, and then the opening is formed by lift-off. On the other hand, in Patent Documents 3 and 4, an amorphous current confinement layer is formed at a temperature of 400 ° C. by MOCVD, and an opening is formed by wet etching, followed by heat treatment for crystallization. However, in any of the methods described in Patent Documents 2 to 4, a current confinement layer having good crystallinity cannot be obtained, and the crystallinity of the p-type semiconductor layer formed thereon is lowered. There was a problem that the light emission characteristics of the diode also deteriorated.

Japanese Patent Laid-Open No. 11-251632 JP 2001-015860 A JP 2003-078215 A JP 2007-250637 A

  The present invention has been made in view of the above problems, a group III nitride semiconductor light emitting device having high crystallinity, reduced contact resistance with the positive electrode, and excellent light emission characteristics, a method for manufacturing the same, and a laser An object is to provide a diode.

When forming an ELO growth layer having a composition composed of Al _X Ga _1-X N (0 <X ≦ 1) on the substrate or the group III nitride layer formed on the substrate, the present inventors By forming a mask pattern made of a carbon material on the substrate or the group III nitride layer and growing the ELO growth layer, the growth of polycrystals on the mask pattern is suppressed, and the dislocation is low and the crystallinity is excellent. It has been found that a layer can be formed. It has also been found that by forming a current confinement layer using a mask pattern made of a carbon material, the growth temperature can be increased and a current confinement layer having excellent crystallinity can be formed. Completed the invention.
The present invention relates to the following.

[1] An ELO growth layer having a composition made of Al _x Ga _1-X N (0 <X ≦ 1) is formed on a substrate for epitaxial film growth or a group III nitride layer formed on the substrate. An n-type semiconductor layer made of a group III nitride semiconductor, a light emitting layer, and a p-type semiconductor layer are sequentially stacked on the ELO layer, and the ELO growth layer is formed on the substrate or the group III nitride layer. A Group III nitride semiconductor light-emitting device, which is formed using an ELO mask pattern made of a carbon material.
[2] The Group III nitride semiconductor light-emitting device according to [1], wherein the ELO mask pattern remains on the substrate or between the Group III nitride layer and the ELO growth layer. element.
[3] The group III nitride semiconductor light emitting device according to the above [1], wherein the ELO mask pattern does not remain on the substrate or between the group III nitride layer and the ELO growth layer. element.
[4] The above [1] to [3], wherein an inner stripe structure is formed by providing a current confinement layer in at least a part between the light emitting layer and the p-type semiconductor layer. The group III nitride semiconductor light-emitting device according to any one of the above.
[5] The group III nitride according to [4], wherein the current confinement layer is formed by using a constriction layer mask pattern made of a carbon material formed on the light emitting layer. Semiconductor light emitting device.
[6] The group III nitride semiconductor light-emitting device according to the above [4] or [5], wherein the current confinement layer is made of AlN.

[7] A pattern forming step of forming an ELO mask pattern made of a carbon material on an epitaxial film growth substrate or a group III nitride layer formed on the substrate, and using the ELO mask pattern An ELO growth step of forming an ELO growth layer having a composition made of Al _X Ga _1-X N (0 <X ≦ 1), an n-type semiconductor layer made of a group III nitride semiconductor on the ELO growth layer, and light emission And a semiconductor layer forming step of sequentially laminating a p-type semiconductor layer and a p-type semiconductor layer.
[8] The group III according to the above [7], wherein the carbon material constituting the ELO mask pattern is any one of graphite, amorphous carbon, diamond, diamond-like carbon, carbon nanotube, and fullerene. A method for manufacturing a nitride semiconductor light emitting device.
[9] The semiconductor layer forming step further includes a small step of forming a constriction layer mask pattern made of a carbon material on the light emitting layer after forming the light emitting layer, and then forming the constriction layer mask pattern. And a small step of forming a current confinement layer on the light emitting layer. The method for producing a group III nitride semiconductor light emitting element according to the above [7] or [8].
[10] The III material according to [9], wherein the carbon material forming the constriction layer mask pattern is any one of graphite, amorphous carbon, diamond, diamond-like carbon, carbon nanotube, and fullerene. A method for manufacturing a group nitride semiconductor light emitting device.
[11] The semiconductor layer forming step, the current confinement _layer, a composition consisting of _{Al Y Ga 1-Y N (} 0 <Y ≦ 1), and characterized by forming at a temperature in the range of 1000 to 1400 ° C. The method for producing a group III nitride semiconductor light-emitting device according to the above [9] or [10].

[12] A group III nitride semiconductor light-emitting device obtained by the manufacturing method according to any one of [7] to [11].
[13] A laser diode comprising the group III nitride semiconductor light-emitting device according to any one of [1] to [6] or [12].

According to the group III nitride semiconductor light emitting device of the present invention, Al _X Ga _1-X N (0 <X ≦ 1) is formed on the epitaxial film growth substrate or the group III nitride layer formed on the substrate. Is formed, and an n-type semiconductor layer made of a group III nitride semiconductor, a light emitting layer, and a p-type semiconductor layer are sequentially stacked on the ELO layer. The ELO mask layer is formed using a carbon material formed on the substrate or the group III nitride layer, so that the ELO growth layer grows well and becomes a layer having excellent crystallinity. It is possible to improve the crystallinity of each layer formed of a group III nitride semiconductor. Thereby, a group III nitride semiconductor light emitting device having excellent light emission characteristics can be realized.

Further, according to the method for producing a group III nitride semiconductor light emitting device of the present invention, an ELO mask pattern made of a carbon material is formed on a substrate for epitaxial film growth or on a group III nitride layer formed on the substrate. Forming a pattern, forming an ELO growth layer having a composition made of Al _X Ga _1-X N (0 <X ≦ 1) using the ELO mask pattern, and the ELO growth layer The semiconductor layer forming step of sequentially stacking an n-type semiconductor layer made of a group III nitride semiconductor, a light emitting layer, and a p-type semiconductor layer is provided, so that the ELO growth layer can be efficiently formed as a highly crystalline layer. In addition, since each layer made of a group III nitride semiconductor having excellent crystallinity can be formed thereon, a group III nitride semiconductor light emitting device having excellent light emission characteristics can be obtained. It can be manufactured.

  Further, according to the laser diode of the present invention, since the element structure of the group III nitride semiconductor light emitting device of the present invention is used, the light emitting characteristics are excellent.

It is a figure which illustrates typically an example of the group III nitride semiconductor light-emitting device based on this invention, (a) is sectional drawing, (b) is a top view. It is a figure which illustrates typically an example of the group III nitride semiconductor light-emitting device based on this invention, and is sectional drawing which shows the principal part of the group III nitride semiconductor light-emitting device shown in FIG. It is a figure which illustrates typically an example of the manufacturing method of the group III nitride semiconductor light-emitting device based on this invention, and is sectional drawing which shows the process of forming a buffer layer (III group nitride layer). It is a figure which illustrates typically an example of the manufacturing method of the group III nitride semiconductor light-emitting device based on this invention, and is sectional drawing which shows the pattern formation process for forming the mask pattern for ELO. It is a figure which illustrates typically an example of the manufacturing method of the group III nitride semiconductor light-emitting device based on this invention, and is sectional drawing which shows the ELO growth process which grows a base layer (ELO growth layer). It is a figure which illustrates typically an example of the manufacturing method of the group III nitride semiconductor light-emitting device based on this invention, and is sectional drawing which shows a semiconductor layer formation process. BRIEF DESCRIPTION OF THE DRAWINGS It is a figure which illustrates typically an example of the manufacturing method of the group III nitride semiconductor light-emitting device based on this invention, and is sectional drawing which shows each small process included in a semiconductor layer formation process, (a) is a mask for constriction layers FIG. 5B is a schematic view showing a small process for forming a pattern, and FIG. It is a figure which illustrates typically an example of the manufacturing method of the group III nitride semiconductor light-emitting device based on this invention, and is sectional drawing which shows the process of forming each electrode. BRIEF DESCRIPTION OF THE DRAWINGS It is a figure explaining the Example of the group III nitride semiconductor light-emitting device based on this invention, The cross-sectional photograph which shows the state by which the buffer layer (III group nitride layer) and the base layer (ELO growth layer) were laminated | stacked on the board | substrate. FIG. It is a schematic diagram explaining the conventional group III nitride semiconductor light-emitting device.

  Hereinafter, a group III nitride semiconductor light-emitting device, a method for manufacturing the same, and a laser diode according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a schematic view showing a group III nitride semiconductor light-emitting device of this embodiment, FIG. 2 is a schematic cross-sectional view showing the main part of the group III nitride semiconductor light-emitting device shown in FIG. 1, and FIGS. It is a schematic cross section which shows each manufacturing process. The drawings referred to in the following description are drawings for explaining the group III nitride semiconductor light emitting device of the present embodiment, the manufacturing method thereof, and the laser diode. The size, thickness, dimensions, etc. of each part shown in the drawings are This is different from the dimensional relationship of an actual group III nitride semiconductor light emitting device.

[Laminated structure of group III nitride semiconductor light emitting device (laser diode)]
A group III nitride semiconductor light-emitting device (laser diode: hereinafter sometimes abbreviated as a light-emitting device) 1 according to the present embodiment is used for epitaxial film growth, as shown in the examples shown in FIGS. On the buffer layer (group III nitride layer) 12 formed on the substrate 11, an underlayer 13, which is an ELO growth layer having a composition of Al _X Ga _1-X N (0 <X ≦ 1), is formed. Then, an n-type semiconductor layer 14 made of a group III nitride semiconductor, a light emitting layer 15 and a p-type semiconductor layer 16 are sequentially stacked, and the underlayer 13 is made of an ELO mask pattern 50 made of a carbon material (see FIG. Formed by ELO growth.

1A and 1B is made of a carbon material formed on the light emitting layer 15 at least partially between the light emitting layer 15 and the p-type semiconductor layer 16. The element structure includes the current confinement layer 17 formed using the constriction layer mask pattern 60. Thus, the light emitting element 1 constitutes a so-called inner stripe structure laser diode.
In the illustrated light emitting device 1, the positive electrode 18 is stacked on the p-type semiconductor layer 16, and the negative electrode 19 is stacked on the exposed region 14 d formed in the n-type contact layer 14 a of the n-type semiconductor layer 14. Being done.
Hereinafter, the laminated structure of the light emitting device 1 of the present embodiment will be described in detail.

"substrate"
In general, as a material of a substrate on which a group III nitride semiconductor crystal is laminated, for example, sapphire (α-Al ₂ O ₃ single crystal), silicon carbide (SiC), single crystal silicon, zinc oxide (ZnO), oxide Magnesium, manganese oxide, zirconium oxide, manganese zinc iron oxide, magnesium aluminum oxide, zirconium boride, gallium oxide (Ga ₂ O ₃ ), indium oxide, lithium gallium oxide, lithium aluminum oxide, neodymium gallium oxide, lanthanum strontium aluminum tantalum A substrate material on which a group III nitride semiconductor crystal is epitaxially grown on the surface, such as strontium titanium oxide, titanium oxide, hafnium, tungsten, and molybdenum, is selectively used. Of these, oxide single crystal materials such as sapphire, ZnO, and Ga ₂ O ₃ having a relatively high melting point and heat resistance, and single crystal silicon and IV group semiconductor single crystals such as cubic or hexagonal crystal SiC. It is preferable to use a substrate material that can form a group III nitride semiconductor with good crystallinity, and sapphire is most preferable.
The size of the substrate 11 is usually about 2 inches in diameter, but is not limited to this. For example, a larger substrate such as a substrate having a diameter of 4 to 6 inches may be used. Is possible.

"Buffer layer (Group III nitride layer)"
In the light emitting device 1 of the present embodiment, a buffer layer 12 is provided on a substrate 11.
The buffer layer 12 of the present embodiment is made of, for example, a group III nitride represented by a general formula Al _Y Ga _1-Y N (0 ≦ Y ≦ 1), and a material such as AlGaN or AlN is preferably used. it can. Also, the method for forming the buffer layer 12 is not particularly limited, and any method conventionally used in this field, such as MOCVD or reactive sputtering, can be employed without any limitation.
In addition, as a material constituting the buffer layer 12, a material having the same crystal structure as that of the group III nitride semiconductor laminated on the buffer layer 12 can be used, and the length of the lattice is an underlayer 13 described later. Those close to the III-nitride semiconductor constituting are preferable.

The film thickness of the buffer layer 12 is not particularly limited, but is preferably in the range of 0.1 to 5 μm or less. By setting the film thickness of the buffer layer 12 within this range, a buffer layer having good crystallinity and orientation can be obtained.
If the film thickness of the buffer layer 12 is less than 0.1 μm, the crystallinity is not sufficient, the crystallinity in the region R described later is lowered, and there is a possibility of affecting the subsequent ELO growth in the lateral direction of the underlayer 13. is there. Further, when the buffer layer 12 is formed with a film thickness exceeding 5 μm, it is not preferable because cracks, warpage, surface flatness deterioration, and the like are likely to occur. By setting the film thickness of the buffer layer 12 within the above range, a layer having good crystallinity is obtained, and it is preferable in that cracks and warpage can be reduced. The film thickness of the buffer layer 12 is in the range of 1 to 2 μm. More preferably.

"Semiconductor layer"
As shown in the schematic cross-sectional view of FIG. 1A, the light-emitting element 1 of the present embodiment is made of a group III nitride semiconductor on a substrate 11 with a buffer layer 12 as described above, and is n-type. A semiconductor layer 20 including a semiconductor layer 14, a light emitting layer 15, and a p-type semiconductor layer 16 is laminated. In the illustrated example, an underlayer (ELO growth layer) 13 is stacked on the buffer layer 12.
In the illustrated example, in the semiconductor layer 20, a current confinement layer 17 is formed between the light emitting layer 15 and the p-type semiconductor layer 16.

Examples of the group III nitride semiconductor include, for example, a general formula Al _J Ga _K In _{ZN 1-A} M _A (where 0 ≦ J ≦ 1, 0 ≦ K ≦ 1, 0 ≦ Z ≦ 1, and J + K + Z = 1, symbol M represents a group V element different from nitrogen (N), and 0 ≦ A <1.) Many gallium nitride compound semiconductors are known. In addition, including the well-known gallium nitride compound semiconductor, the above general formula Al _J Ga _K In _{ZN 1-A} M _A (where 0 ≦ J ≦ 1, 0 ≦ K ≦ 1, 0 ≦ Z ≦ 1) , And J + K + Z = 1. Symbol M represents a Group V element different from nitrogen (N), and 0 ≦ A <1). .

  The gallium nitride-based compound semiconductor can contain other group III elements in addition to Al, Ga, and In.

"Underlayer (ELO growth layer)"
The underlayer 13 is a layer formed by ELO growth from Al _X Ga _1-X N (0 <X ≦ 1) on the buffer layer 12 formed on the substrate 11 for epitaxial film growth as described above. It can be formed using a conventionally known MOVPE method, CVD method or the like. The underlayer 13 of the present embodiment is formed using an ELO mask pattern 50 (see FIG. 2) made of a carbon material and formed on the buffer layer 12.

(Composition and film thickness)
The material of the underlying layer 13, the general formula _Al X _{Ga 1-X} N ones (0 <X ≦ 1) represented by the composition is used.
That is, as shown in FIG. 2, the underlayer 13 is formed by being laminated on the upper surface 50a of the ELO mask pattern 50 and the region R not covered with the ELO mask pattern 50 on the surface 12a of the buffer layer 12. ing. In this embodiment, since the ELO mask pattern 50 is formed of a carbon material, the polycrystalline layer is formed on the ELO mask pattern 50 even though the underlayer 13 has a composition containing Al. The layer never grows. As a result, Al _x Ga _1-x N (0 <x ≦ 1) grows sufficiently in the lateral direction on the ELO mask pattern 50, and the surface layer 13f is flat and the underlying layer 13 having good crystallinity is formed. Is done.

  The film thickness of the underlayer 13 is not particularly limited as long as it is a thickness necessary for the surface 13f of the underlayer 13 to be flat, and is preferably in the range of 2 to 50 μm, preferably 5 to 20 μm. More preferably, it is the range. If the film thickness of the underlayer 13 is within this range, the underlayer 13 having excellent flatness of the surface 13f can be obtained. If the film thickness of the underlayer 13 is less than 2 μm, the entire mask having a width (pitch) of several μm to several tens of μm generally used in ELO growth may not be covered. On the other hand, if the film thickness of the underlayer 13 exceeds 50 μm, the film thickness after covering the mask increases, and the flatness of the surface 13 f may be lowered.

The underlayer 13 may have a configuration in which n-type impurities are doped in the range of 1 × 10 ¹⁷ to 1 × 10 ¹⁹ atoms / cm ³ as necessary, but undoped (<1 × 10 ¹⁷ atoms / cm 3). ³ ), and undoped is preferable in that good crystallinity can be maintained. When the substrate is conductive, it is possible to form electrodes on and under the light emitting element by doping the base layer 13 with an n-type impurity to make it conductive.

(Mask pattern for ELO)
As described above, the base layer 13 of this embodiment is formed using the ELO mask pattern 50 (see FIG. 2) made of a carbon material formed on the buffer layer 12.
The ELO mask pattern 50 of this embodiment is formed by patterning a carbon material film laminated on the buffer layer 12 into a predetermined shape. As the carbon material used for the ELO mask pattern 50, for example, graphite (graphite), amorphous carbon, diamond, diamond-like carbon (DLC), carbon nanotube, fullerene, and the like can be used, and can be appropriately employed. However, the material is not particularly limited to these materials, and any material that can form a dense carbon film on the buffer layer 12 made of group III nitride may be used.

The film thickness of the ELO mask pattern 50 is not particularly limited, but is preferably in the range of 10 nm to 500 nm, for example, and more preferably in the range of 50 nm to 200 nm. Since the growth of the base layer 13 made of Al _x Ga _1-x N (0 <x ≦ 1) is slower in the lateral growth than GaN, the film thickness of the ELO mask pattern 50 is the film quality. Is preferably selected within a range that can be maintained.

  The pattern shape of the ELO mask pattern 50 is not particularly limited as long as the surface 13f of the base layer 13 is flat as shown in FIG. Further, as the pattern shape of the ELO mask pattern 50, an arbitrary shape such as a stripe shape, an island shape, or a lattice shape can be used.

(Underlayer crystal dislocation density)
As shown in the schematic cross-sectional view of FIG. 2, the surface 13 f of the underlayer 13 includes a region S having a low crystal dislocation density and a region having a high crystal dislocation density at a predetermined interval according to the shape of the ELO mask pattern 50. Are arranged alternately. In addition, the meeting line L is formed in the region S described above. That is, in the crystal growth by the ELO method, since Al _x Ga _1-x N (0 <x ≦ 1) does not grow from the upper surface 50a of the ELO mask pattern 50 made of a carbon material, it is covered with the ELO mask pattern 50. Al _x Ga _1-x N (0 <x ≦ 1) grown from the region R on the buffer layer 12 that has not been grown grows laterally on the upper surface 50 a of the ELO mask pattern 50. Thereby, the region S in which the threading dislocation in the vertical direction is suppressed is obtained on the surface 13f of the underlayer 13.

  The meeting line L in the foundation layer 13 appears in the region S described above. This is because an association line L composed of threading dislocations is formed when the ELO growth layer (underlayer 13) grown laterally from the left and right of the upper surface 50a of the ELO mask pattern 50 meets.

  On the other hand, the region having a high crystal dislocation density is formed on the surface 13f of the base layer 13 and vertically above the region R on the buffer layer 12 not covered with the mask pattern 50. In the region where the crystal dislocation density is high, threading dislocations in the vertical direction are formed. This is because the underlying layer 13 grows in the vertical direction above the region R, and crystal defects propagate in the vertical direction to form threading dislocations.

  By forming the underlayer 13 of the present embodiment on the buffer layer 12 using the ELO mask pattern 50, the crystal dislocation density in the vicinity of the surface 13f is reduced by the action as described above, and the crystallinity is increased. Excellent layer.

  2, the ELO mask pattern 50 remains between the buffer layer 12 and the base layer 13, but the present embodiment is not limited to this. For example, by appropriately adjusting the carbon material and film thickness of the ELO mask pattern in addition to the film formation conditions for the base layer, the ELO mask pattern does not remain between the buffer layer and the base layer. It is also possible.

  In the present embodiment, an example in which the ELO mask pattern 50 is formed on the buffer layer 12 provided on the substrate 11 and the base layer 13 is ELO grown from the region R on the buffer layer 12 will be described. However, it is not limited to this. For example, using the ELO mask pattern formed on the substrate 11, it is possible to directly form the base layer on the substrate without using the buffer layer.

"N-type semiconductor layer"
The n-type semiconductor layer 14 is usually formed on the base layer (ELO growth layer) 13 and is composed of an n-type contact layer 14a and an n-type cladding layer 14b.

{N-type contact layer}
The n-type contact layer 14a of the present embodiment is made of a group III nitride semiconductor, and is deposited on the base layer 13 by a method such as MOCVD or reactive sputtering.
As a material of the n-type contact layer 14a, for example, a composition made of Al _x Ga _1-x N (0 <x ≦ 1) can be used as in the case of the base layer 13. The n-type contact layer 14a is preferably doped with an n-type impurity. By controlling the content of the n-type impurity within an appropriate range, it is possible to maintain good ohmic contact with the negative electrode and suppress the generation of cracks. This is effective in maintaining good crystallinity.

  Further, the film thickness of the n-type contact layer 14a is preferably in the range of 1 to 5 μm, and more preferably in the range of 2 to 3 μm. By setting the thickness of the underlayer 13 within the above range and the thickness of the n-type contact layer 14a within this range, the crystallinity of the group III nitride semiconductor is maintained well. In the light emitting element 1 having a structure having the positive electrode 18 and the negative electrode 19 on the upper surface side as in the example shown in FIG. 1, the current flows in the lateral direction (in-plane direction) through the n-type contact layer 14a. If the film thickness is too thin, the resistance increases. However, if the n-type contact layer 14a is too thick, the current concentrates on the n-type contact layer 14a. Therefore, a film thickness greater than a predetermined thickness is not necessary, and specifically, it is preferably within the above range. .

{N-type cladding layer}
An n-type cladding layer 14b is provided between the above-described n-type contact layer 14a and the light emitting layer 15 described in detail later. By providing the n-type cladding layer 14b, electrons injected from the negative electrode 19 side are efficiently confined in the light-emitting layer 15, and when the light-emitting device 1 of this embodiment is applied to a laser diode, the n-type cladding layer 14b is n-type. The clad layer 14b serves as a waveguide layer for confining light.
The n-type cladding layer 14b can be formed from, for example, AlGaN using a method such as MOCVD.

The film thickness of the n-type cladding layer 14b is not particularly limited, but is preferably in the range of 20 to 200 nm, and more preferably in the range of 50 to 150 nm.
The n-type cladding layer 14b is also preferably doped with an n-type impurity. By controlling the content of the n-type impurity within an appropriate range, it is possible to maintain good crystallinity of the group III nitride semiconductor and to emit light. This is effective in reducing the operating voltage of the element.

  In the present embodiment, an n-type electron confinement layer (not shown) is further formed on the n-type cladding layer 14b, so that electrons injected from the negative electrode 19 side can be more efficiently introduced into the light emitting layer 15. It is further preferable from the viewpoint that it can be confined.

"Light emitting layer"
The light emitting layer 15 is laminated on the n-type semiconductor layer 14 and a p-type semiconductor layer 16 to be described later, and can be formed by using a conventionally known MOCVD method or the like. . Further, the light emitting layer 15 can be configured such that a barrier layer 15a made of a gallium nitride compound semiconductor and a well layer 15b are alternately and repeatedly stacked as in the example shown in FIG. In the illustrated example, the barrier layer 15a is stacked in the order in which the barrier layer 15a is disposed on the n-type semiconductor layer 14 side and the p-type semiconductor layer 16 side, the barrier layer 15a is a total of four layers, and the well layer 15b is a total of three layers, so-called It is formed as a light emitting layer having a multiple quantum well (MQW) structure.

The barrier layer 15a, for example, a gallium nitride compound semiconductor of _Al c _Ga or the like _1-c N band gap energy greater than that of the well layer 15b, can be suitably used.
In addition, the well layer 15b includes, for example, Ga _1-s In _s N (0 <s <) as Al _d Ga _1-d N (0 ≦ d <c) or a gallium nitride compound semiconductor containing indium. Indium gallium nitride such as 0.4) can be used.

  Although it does not specifically limit as a film thickness of the light emitting layer 15 whole, For example, it is preferable that it is the range of 10-100 nm, and it is more preferable that it is the range of 30-50 nm. When the film thickness of the light emitting layer 15 is in the above range, it contributes to the improvement of the light emission output.

"P-type semiconductor layer"
The p-type semiconductor layer 16 is formed on the light emitting layer 15 described above, that is, on the uppermost barrier layer 15a, and includes the p-type electron block layer 10, the p-type cladding layer 16a, and the p-type contact layer 16b. For example, it is formed using the MOCVD method.
In the p-type semiconductor layer 16 of this embodiment, a current confinement layer 17, which will be described in detail later, is formed at a predetermined position on the p-type electron block layer 10. As a result, the p-type semiconductor layer 16 has a so-called p-type cladding layer 16a formed on the upper surface 17a of the current confinement layer 17 and in the region T where the current confinement layer 17 is not formed on the p-type electron block layer 10. It is formed as an inner stripe structure.

The p-type semiconductor layer 16 is added with a p-type impurity for controlling the conductivity to be p-type. The p-type impurity is not particularly limited, but Mg is preferably used. It is also possible to use Zn.
Moreover, although the film thickness of the whole p-type semiconductor layer 16 is not specifically limited, When employ | adopting a laser structure, it is preferable that it is the range of 200-800 nm, and it is more preferable that it is the range of 300-500 nm. Moreover, when employ | adopting LED structure, it is preferable that the film thickness of the whole p-type semiconductor layer 16 is the range of 10-200 nm, and it is more preferable that it is the range of 20-100 nm.

{P-type electron blocking layer}
The material of the p-type electron blocking layer 10 is not particularly limited as long as it has a composition larger than the band gap energy of the light emitting layer 15 and can confine carriers in the light emitting layer 15. Examples thereof include those represented by Al _d Ga _1-d N (0 <d ≦ 1, preferably 0.1 ≦ d ≦ 0.8). Here, as the molar fraction d of AlN in the above general formula, if this value is increased, the effect of suppressing the overflow of electrons increases, but the electrical resistance also increases, so that it is appropriate in relation to the composition of the light emitting layer 15. Therefore, it is preferable to appropriately adjust the composition during film formation.

{P-type cladding layer}
The p-type cladding layer 16a is a layer that functions as a waveguide when the light-emitting element 1 of the present embodiment is applied to a laser diode. The film thickness as the waveguide of the laser diode needs to be a thickness that can sufficiently exhibit the light confinement effect. However, if the film thickness is too thick, the electrical resistance may increase and the light emission efficiency may decrease. There is. For this reason, the film thickness of the p-type cladding layer 16a is preferably in the range of 200 to 800 nm, and more preferably in the range of 300 to 500 nm.
Further, the p-type cladding layer 16 a needs to have a refractive index smaller than that of the light emitting layer 15, and usually AlGaN having a larger AlN molar fraction than the light emitting layer 15 is used. Examples of such a material include those represented by the general formula Al _d Ga _1-d N (0 <d ≦ 1, preferably 0.1 ≦ d ≦ 0.7).

  Further, by controlling the p-type dopant concentration obtained by adding the p-type impurity to the p-type cladding layer 16a within an appropriate range, there is an effect that a good p-type crystal can be obtained without reducing the crystallinity. .

{P-type contact layer}
The p-type contact layer 16b includes at least Al _e Ga _1-e N (0 ≦ e <0.5, preferably 0 ≦ e ≦ 0.2, more preferably 0 ≦ e ≦ 0.1). This is a gallium nitride compound semiconductor layer. When the Al composition is in the above range, it is preferable in terms of maintaining good crystallinity and good ohmic contact with the p ohmic electrode.
Although the film thickness of the p-type contact layer 16b is not specifically limited, It is preferable that it is the range of 10-200 nm, and it is more preferable that it is the range of 20-100 nm. When the film thickness is within this range, it is preferable in terms of light emission output.

  Further, by controlling the p-type dopant concentration obtained by adding p-type impurities to the p-type contact layer 16b within an appropriate range, it is possible to maintain good ohmic contact with the positive electrode, prevent cracks, and have good crystallinity. The effect can be obtained in terms of maintenance.

  In the present embodiment, a p-type electron confinement layer (not shown) is further formed on the light emitting layer 15 to confine holes injected from the positive electrode 18 side more efficiently in the light emitting layer 15. It is more preferable from the point that it becomes possible.

"Current confinement layer"
The light-emitting element 1 of the present embodiment can be configured such that the current confinement layer 17 is provided in at least a part of the inside of the p-type semiconductor layer 16 as in the example shown in FIGS. In the illustrated example, a current confinement layer 17 is formed on the entire surface of the p-type electron blocking layer 10 except for the region T. The position corresponding to the through portion 17b formed in the current confinement layer 17 is the region T on the barrier layer 15b. Further, in the present embodiment, the region T is arranged so as to be positioned on the ELO mask pattern 50 on the buffer layer 12 in the vertical direction of the light emitting element 1 (vertically long direction in FIG. 1A). .
With the above configuration, the light emitting element 1 is configured as a laser diode having an inner stripe structure.

  Further, the current confinement layer 17 of the present embodiment will be described in detail in the description of the manufacturing method described later, but a constriction layer mask pattern 60 made of a carbon material formed on the p-type electron block layer 10 (FIG. 7D). ))).

  As a material of the current confinement layer 17, for example, a generally used material in an inner stripe structure light emitting element such as AlN can be used without any limitation.

{Inner stripe structure}
As described above, the light-emitting element 1 of this embodiment is configured as a laser diode having an inner stripe structure by the current confinement layer 17 provided inside the p-type semiconductor layer 16. In addition, the light emitting layer 15 and the p-type semiconductor layer 16 are connected through a through portion 17 b formed in the current confinement layer 17.

  Thus, by providing the current confinement layer 17 on the p-type electron block layer 10 on the light emitting layer 15, current can be effectively confined in a narrow region in the light emitting layer 15. Effects such as improvement in current density can be obtained. Moreover, since the contact area between the p-type contact layer 16b and the positive electrode 18 described later can be increased by adopting the inner stripe structure, for example, even when the resistivity of the p-type contact 16c is high, p Current is diffused in the upper part of the mold contact 16 c, that is, in the vicinity of the upper surface in contact with the positive electrode 18. As a result, an effect that the contact resistance between the p-type contact layer 16b and the positive electrode 18 can be reduced is obtained, and as a result, an effect that the light emission characteristics of the light emitting element 1 are improved is obtained.

  The current confinement layer 17 of the present embodiment has a region T on the p-type electron block layer 10, that is, the through portion 17 b on the ELO mask pattern 50 on the buffer layer 12, as in the example shown in FIG. It is preferable to arrange at a position. Furthermore, it is more preferable that the current confinement layer 17 is disposed on the ELO mask pattern 50 so as to deviate from the extended line of the association line L as shown in FIG.

  As described above, in the underlayer 13 on the ELO mask pattern 50, an association line L composed of threading dislocations extending in the vertical direction from the substrate 11 side is formed in the vicinity of the center in the surface direction on the ELO mask pattern 50. Yes. In the present embodiment, as in the example shown in FIG. 1A, the ELO mask is arranged so that the position of the penetrating portion 17b (region T) deviates from the extended line of the meeting line L (see also FIG. 5C). The pattern 50 is arranged close to the edge of the upper surface 50a of the pattern 50. As a result, the semiconductor layer 20 at a position corresponding to the penetrating portion 17b (region T) in the vertical direction is composed of crystals in which dislocations are suppressed. As a result, current can be effectively confined in the light emitting layer 15, and the current supplied from the positive electrode 18 does not escape to threading dislocations at the position of the penetrating portion 17 b (region T), and the current in the light emitting layer 15. The density is improved. Thereby, the light emission efficiency in the light emitting layer 15 can be further improved.

Here, in a conventional light emitting element such as a laser diode, it is made of SiO ₂ or SiN as a layer for confining current inside the semiconductor layer on the p-type semiconductor layer 116 as shown in FIG. There has been proposed a structure in which an insulating layer 117 is formed and the p-type semiconductor layer 116 and the positive electrode 118 are connected through a through portion 117 a formed in the insulating layer 117. However, in such a case, since the p-type semiconductor layer 116 and the positive electrode 118 are connected only by the narrow constriction portion 116c, the contact resistance between them becomes very high, so that it is difficult for current to flow. There has been a major problem that the light emission characteristics of the laser diode are degraded.

In the present embodiment, the inner stripe structure in which the current confinement layer 17 is provided inside the p-type semiconductor layer 16 as described above improves the light emission intensity of the light emitting layer 15 by effective current confinement. Since the contact resistance can be reduced at the same time, a light emitting element (laser diode) having excellent light emission characteristics can be obtained.
In the present embodiment, as will be described in detail in the manufacturing method described later, the current confinement layer 17 is a constriction layer mask pattern 60 (FIG. 7D) made of a carbon material formed inside the p-type semiconductor layer 16. )), It can be stably manufactured with high processing accuracy, and can be a current confinement layer having a stable shape and crystal structure. The characteristics can be improved.

"Positive electrode and negative electrode"
The positive electrode 18 is an electrode formed on the p-type semiconductor layer 16 (p-type contact layer 16b) described above. As described above, the positive electrode 18 of the present embodiment is formed so as to be in contact with the p-type contact layer 16b over a wide area, and is configured to reduce contact resistance.
As the material of the positive electrode 18, various structures using Au, Al, Ni, Cu and the like are well known, and those known materials and structures can be used without any limitation.

The negative electrode 19 is formed to be in contact with the n-type contact layer 14 a of the n-type semiconductor layer 14 in the semiconductor layer in which the n-type semiconductor layer 14, the light emitting layer 15, and the p-type semiconductor layer 16 are sequentially stacked on the substrate 11. The
For this reason, when the negative electrode 19 is provided, an exposed region 14d of the n-type contact layer 14a is formed by removing a part of the p-type semiconductor layer 16, the light emitting layer 15 and the n-type semiconductor layer 14, and on this, A negative electrode 19 is formed.
As the material of the negative electrode 19, negative electrodes having various compositions and structures are well known, and these known negative electrodes can be used without any limitation, and can be provided by conventional means well known in this technical field.

As described above, according to the group III nitride semiconductor light emitting device 1 of the present embodiment, Al _X Ga _1-X N (0 <) is formed on the buffer layer 12 formed on the substrate 11 for epitaxial film growth. An underlayer 13 having a composition of X ≦ 1) is formed, an n-type semiconductor layer 14 made of a group III nitride semiconductor, a light emitting layer 15 and a p-type semiconductor layer 16 are sequentially stacked. Since it is formed using the ELO mask pattern 50 made of a carbon material formed on the buffer layer 12, the underlayer 13 is well grown by ELO to become a layer having excellent crystallinity, and III formed thereon It becomes possible to improve the crystallinity of each layer made of a group nitride semiconductor. Thereby, the light emitting element 1 excellent in the light emission characteristics can be realized.
In the light emitting device 1 of the present embodiment, the region S having a low crystal dislocation density is formed on the surface 13f of the base layer 13 with the above configuration, so that the base layer 13 having excellent crystallinity can be formed. The crystallinity of each layer formed of the group III nitride semiconductor can be made excellent.

  In addition, according to the light emitting device 1 of the present embodiment, the current confinement layer 17 having the above-described configuration is provided in the p-type semiconductor layer 16 so that it is configured as an inner stripe structure laser diode. However, since it is formed using the constriction layer mask pattern 60 made of a carbon material, it can be stably manufactured with high processing accuracy, and the light emitting device 1 having excellent light emission characteristics can be obtained.

  In the present embodiment, the laser diode type light emitting element 1 provided with the current confinement layer 17 is mainly described as an example, but various structures provided in the light emitting element 1 of the present embodiment are as follows. This is not a limitation. For example, a structure in which an ELO mask pattern 50 is provided on the buffer layer 12 on the substrate 11 and the base layer 13 is grown using the ELO mask pattern 50 described in the present embodiment is, for example, an LED. The present invention can also be applied to a type of light emitting element.

  Even if it is a case where it is a case where it is said each deformation | transformation aspect, the light emitting element of this embodiment can have the same effect as the above.

[Method for Producing Group III Nitride Semiconductor Light-Emitting Device (Laser Diode)]
The manufacturing method of the group III nitride semiconductor light emitting device (laser diode) of this embodiment is performed on the substrate 11 for epitaxial film growth or on the buffer layer (group III nitride layer) 12 formed on the substrate 11. A pattern forming step of forming an ELO mask pattern 50 made of a carbon material, and an underlayer (ELO growth layer) having a composition made of Al _X Ga _1-X N (0 <X ≦ 1) using the ELO mask pattern 50 ) 13 forming an ELO, and an n-type contact layer 14a, an n-type cladding layer 14b, a light emitting layer 15 and a p-type semiconductor constituting an n-type semiconductor layer 14 made of a group III nitride semiconductor on the underlayer 13 And a semiconductor layer forming step of sequentially stacking the layers 16.
In the example described in the present embodiment, the semiconductor layer forming step further forms the light emitting layer 15, forms the p-type electron blocking layer 10 thereon, and then forms the p-type electron blocking layer 16a on the p-type electron blocking layer 16a. A method including a small step of forming a constriction layer mask pattern 60 made of a carbon material, and then a small step of forming the current confinement layer 17 on the p-type electron blocking layer 10 using the constriction layer mask pattern 60. It is said.

In this embodiment, the positive electrode 18 is stacked on the p-type semiconductor layer 16, and the negative electrode 19 is stacked on the exposed region 14 d formed in the n-type contact layer 14 a of the n-type semiconductor layer 14 to form each electrode. (See FIGS. 8A and 8B).
Hereinafter, the manufacturing method of the group III nitride semiconductor light emitting device of this embodiment will be described in detail.

<Formation of buffer layer>
In the manufacturing method of the present embodiment, first, as shown in FIG. 3, a buffer layer 12 made of a group III nitride is stacked on a substrate 11.
The method for forming the buffer layer 12 is not particularly limited, and for example, a HVPE (Hydride Vapor Phase Epitaxy) method, a MOCVD (Metal Organic Chemical Vapor Deposition) method, a reactive sputtering method, and the like that are conventionally known in this field. It is possible to employ a crystal growth method. Further, when the buffer layer 12 is formed of AlN, a sublimation method, a liquid phase growth method, or the like can also be employed.

<Pattern formation process>
Next, in the pattern forming step, as shown in FIGS. 4A to 4B, an ELO mask pattern 50 made of a carbon material is stacked on the buffer layer 12 formed on the substrate 11. .

  Specifically, as shown in FIG. 4A, first, a carbon film 50A made of a carbon material is applied to the entire surface 12a of the buffer layer 12, for example, a CVD method such as MOCVD, a sputtering method, or an ion beam evaporation method. It is formed using a conventionally known general-purpose method such as plasma decomposition vapor deposition method or thermal decomposition vapor deposition method. At this time, as described above, graphite (graphite), amorphous carbon, diamond, diamond-like carbon (DLC), carbon nanotube, fullerene, and the like can be appropriately selected and used as the carbon material.

Next, as shown in FIG. 4B, the carbon film 50A is patterned to form an ELO mask pattern 50. The patterning method of the carbon film 50A is not particularly limited, and a general photolithography technique can be employed. For example, first, a resist layer (not shown) is formed on the carbon film 50A, and this resist layer is exposed and developed to form a predetermined shape. Next, the carbon film 50A is patterned by ashing the carbon film 50A using the resist layer as a mask. Finally, the resist layer is removed using a general-purpose method.
The ELO mask pattern 60 made of a carbon material is formed on the buffer layer 12 made of Group III nitride by the above-described steps.

<ELO growth process>
Next, in the ELO growth step, as shown in FIGS. 5A to 5C, Al _X Ga ₁ is formed on the buffer layer 12 using the ELO mask pattern 50 formed in the pattern formation step. _A base layer (ELO growth layer) 13 is stacked by epitaxially growing a crystal having a composition of _-XN (0 <X≤1).

In the present embodiment, the method for epitaxially growing a crystal having a composition composed of Al _X Ga _1-X N (0 <X ≦ 1) is not particularly limited. For example, metal organic chemical vapor deposition (MOVPE, MOCVD) Or abbreviated as OMVPE or the like), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), or the like. Among the methods exemplified above, it is most preferable to adopt the MOVPE method.

  The vapor phase growth method is preferable because an AlGaN mixed crystal can be easily produced as compared with the liquid phase method. Further, the MOVPE method is preferable because the composition can be easily controlled as compared with the HVPE method, and a large growth rate can be obtained as compared with the MBE method.

In the MOVPE method, hydrogen (H ₂ ) or nitrogen (N ₂ ) can be used as a carrier gas. Further, trimethylgallium (TMG) or triethylgallium (TEG) as a Ga source which is a group III material, trimethylaluminum (TMA) or triethylaluminum (TEA) as an Al source, ammonia (NH ₃ ) or hydrazine (N ₂ as a nitrogen source) H ₄ ) or the like can be used.

The underlayer 13 made of a crystal having a composition of Al _x Ga _1-x N (0 <x ≦ 1) is preferably grown at a growth temperature of 1250 ° C. or higher by the MOVPE method. When the growth temperature took 1250 ° C. or less, the crystal quality of a high Al composition _{Al x Ga 1-x N (} 0 <x ≦ 1) is lowered. Further, the growth temperature of the underlayer 13 by the MOVPE method is more preferably 1300 ° C. or higher, and further preferably 1400 ° C. or higher. The growth temperature of 1250 ° C. or higher as described above is considered to be close to the optimum growth temperature of AlN, which is a high melting point and low vapor pressure substance, and ammonia decomposition and reaction are further promoted, and Al surface migration is also promoted. This is preferable.

  In addition, the growth rate of the underlayer 13 by the MOVPE method is preferably 0.1 μm / hr or more, more preferably 1 μm / hr or more, and further preferably 2 μm / hr or more from the viewpoint of improving productivity. is there.

Specifically, in the ELO growth process of the present embodiment, first, as shown in FIG. 5A, Al _x Ga ₁₋ is formed in the region R on the buffer layer 12 where the ELO mask pattern 50 is not formed. the _x N crystal 13A of (0 <x ≦ 1) a composition is epitaxially grown. Here, in the initial stage of crystal growth, the growth direction of the crystal 13A is perpendicular to the region R as long as the height (thickness) of the crystal 13A does not exceed the height (thickness) of the ELO mask pattern 50. Upwards. In epitaxial growth, crystal dislocations (crystal defects) propagate in the crystal growth direction, so that the direction of crystal dislocation is also upward in the direction perpendicular to the region R. Then, when the crystal growth proceeds and the height of the crystal 13A exceeds the height of the ELO mask pattern 50, as shown in FIG. 5A, the portion close to the ELO mask pattern 50 of the crystal 13A is Growth (lateral growth) is started on the upper surface 50a of the ELO mask pattern 50 so as to extend in the lateral direction. The arrows in the figure indicate the growth direction of crystal 13A and the propagation direction of crystal dislocations.

Then, as shown in FIG. 5B, when the crystal 13A further grows, the crystals 13A adjacent to each other with the ELO mask pattern 50 interposed therebetween are associated with each other on the ELO mask pattern 50 and integrated to form an underlayer ( ELO growth layer) 13 is formed. At this time, the direction of crystal dislocations on the ELO mask pattern 50 is in the horizontal direction so as to face each other as shown by arrows in FIG. As a result, no threading dislocations in the vertical direction are formed on the ELO mask pattern 50. On the ELO mask pattern 50, threading dislocations formed by the association of adjacent crystals 13A, that is, the association line L are formed.
In the initial stage of crystal growth by the above-described ELO method, that is, in the process from FIG. 5A to FIG. 5B, the upper surface 50a of the ELO mask pattern 50 is located in the lateral direction of the crystal 13A. In some cases, voids (voids) may be generated in the vicinity of the meeting line L. However, even when the underlayer 13 is subjected to ELO growth with such voids, these voids disappear at the stage where crystal growth has proceeded, that is, at the stage of FIG. For this reason, there are no voids in the vicinity of the surface 13f in the underlayer 13 where the crystal has grown sufficiently.

And as shown in FIG.5 (c), the base layer 13 grows further, and the surface 13f becomes flat.
In the ELO growth process of this embodiment, the base layer 13 having the region S having a low crystal dislocation density can be formed by such a procedure.

<Semiconductor layer formation process>
Next, in the semiconductor layer forming step, as shown in FIGS. 6A to 6C (see also the small steps shown in FIGS. 7A to 7D), the semiconductor layer was formed in the ELO growth step. An n-type contact layer 14 a made of a group III nitride semiconductor, an n-type cladding layer 14 b, a light emitting layer 15, and a p-type semiconductor layer 16 are sequentially stacked on the base layer 13, thereby forming the semiconductor layer 20 on the buffer layer 12. Form.

“Formation of n-type semiconductor layer”
First, as shown in FIG. 6A, after an n-type contact layer 14a is formed on the base layer 13 formed in the ELO growth step, an n-type cladding layer 14b is formed thereon.
As a method for forming the n-type contact layer 14a and the n-type cladding layer 14b, a conventionally known method such as an MOCVD method or a reactive sputtering method can be employed without any limitation. Further, the n-type contact layer 14a and the n-type cladding layer 14b are doped with the n-type impurity as described above.

  Moreover, in the manufacturing method of this embodiment, it is possible to further form an n-type electron confinement layer on the n-type clad layer c by using the MOCVD method, if necessary.

`` Formation of light emitting layer ''
Next, as shown in FIG. 6B, the light emitting layer 15 is formed on the n-type cladding layer 14b by, for example, a conventionally known MOCVD method.
The light emitting layer 15 formed in the present embodiment, as exemplified in the schematic cross-sectional view of FIG. 1A, has a laminated structure that starts with the barrier layer and ends with the barrier layer, for example, four layers made of AlGaN. The barrier layers 15a and the three well layers 15b made of non-doped GaN can be alternately stacked.

“Formation of p-type semiconductor layer”
Next, as shown in FIG. 6C, the p-type electron blocking layer 10, the p-type cladding layer 16a, and the p-type contact layer are formed on the light-emitting layer 15, that is, on the barrier layer 15a that is the uppermost layer of the light-emitting layer 15. A p-type semiconductor layer 16 made of 16b is formed. As a method for forming the p-type semiconductor layer 16, a conventionally known method such as MOCVD method or sputtering method can be employed without any limitation.
As the p-type impurity doped into the p-type semiconductor layer 16, Mg or zinc (Zn) can be used.

“Each sub-process in the semiconductor formation process”
In the semiconductor layer forming step of the present embodiment, as shown in FIGS. 7A to 7D, after the light emitting layer 15 is further formed and the p-type electron blocking layer 10 is formed, the p-type is formed. A small step of forming a constriction layer mask pattern 60 made of a carbon material on the electron block layer 10, and a small step of forming a current confinement layer 17 on the p-type electron block layer 10 using the constriction layer mask pattern 60. And a method including a process.

"Small process for forming mask pattern for constriction layer"
In this small process, as shown in FIG. 7A, first, a constriction layer mask pattern 60 made of a carbon material is laminated and formed on the p-type electron block layer 10.
Specifically, as in the pattern formation step when forming the ELO mask pattern 50, first, a carbon film 60A made of a carbon material is applied to the entire surface of the p-type electron block layer 10 by, for example, CVD or sputtering. It is formed using a conventionally known general-purpose method such as a method, an ion beam vapor deposition method, a plasma decomposition vapor deposition method, or a thermal decomposition vapor deposition method. At this time, the same carbon material as that used in the pattern forming step can be used.

Next, as shown in FIG. 7B, the carbon film 60A is patterned to form a constriction layer mask pattern 60. The patterning method of the carbon film 60A is not particularly limited as in the pattern formation step, and a general photolithography technique can be adopted.
Through the steps described above, a constriction layer mask pattern 60 made of a carbon material is formed on the p-type electron block layer 10.

"Small process for forming current confinement layer"
In this small process, as shown in FIG. 7C, first, an AlN layer 17A is formed on the upper surface of the p-type electron block layer 10 in a region where the constriction layer mask pattern 60 is not formed. At this time, as shown in FIG. 7C, after the AlN layer 17A is formed thinner than the constriction layer mask pattern 60, the constriction layer mask pattern 60 is ashed or the like as shown in FIG. 7D. By removing by this method, the current confinement layer 17 patterned in a shape having the through portion 17b is obtained.

The growth temperature of the AlN layer 17A for forming the current confinement layer 17 is preferably in the range of 1000 to 1400 ° C, more preferably in the range of 1050 to 1300 ° C, and still more preferably in the range of 1100 to 1250 ° C.
Further, the preferred temperature for growing the AlN layer 17A for forming the current confinement layer 17 also varies depending on the composition of the current confinement layer 17 (AlN layer 17A). The current confinement layer _17, if made of _{Al Y Ga 1-Y N (} 0 <Y ≦ 1), 0 < is preferable temperature range of Y ≦ 0.3 at 1000~1100 ℃, 0.3 ≦ Y ≦ 0 . 7 is preferably in the range of 1100 to 1250 ° C., and 0.7 ≦ Y ≦ 1 is preferably in the temperature range of 1250 to 1400 ° C.
When the current confinement layer 17 is made of AlN as in this embodiment, the growth temperature of the AlN layer 17a for forming the current confinement layer 17 is ± 100 of the temperature at which the well layer 15b of the light emitting layer 15 is grown. It is preferable to make it into the range of ° C.

  In each of the small steps, the p-type cladding layer 16a is formed in the upper surface 17a of the current confinement layer 17 formed using the constriction layer mask pattern 60 and in the region exposed on the p-type electron blocking layer 10 through the penetrating portion 17b. Is formed by the above-described method (see FIG. 8A). Thereby, in this embodiment, the light emitting element (laser diode) of an inner stripe structure can be manufactured.

<Step of forming each electrode>
In the manufacturing method of the present embodiment, the positive electrode 18 is stacked on the p-type semiconductor layer 16 obtained by the above process, and the negative electrode 19 is formed in the exposed region 14d formed in the n-type contact layer 14a of the n-type semiconductor layer 14. A step of forming each electrode by stacking is provided.

  Specifically, first, as shown in FIG. 8B, a positive electrode 18 is formed on a wafer in which the layers up to the p-type semiconductor layer 16 are laminated on the substrate 11 as shown in FIG. The p-type semiconductor layer 16 is formed using a conventionally known method so as to cover the surface 16d of the p-type semiconductor layer 16. At this time, the positive electrode 18 can be formed, for example, by laminating Ti, Al, and Au materials in order from the surface 16d side of the p-type semiconductor layer 16 by a conventionally known method.

  When forming the negative electrode 19, first, as shown in FIG. 8B, a part of the p-type semiconductor layer 16, the light emitting layer 15 and the n-type semiconductor layer 14 formed on the substrate 11, An exposed region 14d of the n-type contact layer 14a is formed by removing a part of the positive electrode 18 by a method such as dry etching. Then, on this exposed region 14d, for example, each material of Ni, Al, Ti, and Au is laminated in order from the surface side of the exposed region 14d by a conventionally known method, so that a detailed illustration is omitted. The negative electrode 19 can be formed.

<Division of light emitting element>
In the manufacturing method of the present embodiment, the wafer obtained by the above steps is cut into a square of 500 μm square, for example, after the back surface of the substrate 11 is formed by grinding and cleaving, and thereby a light emitting element chip (FIG. It can be set as the light emitting element 1) illustrated to 1 (a) and (b).

According to the method for manufacturing a group III nitride semiconductor light emitting device of this embodiment as described above, an ELO mask pattern 50 made of a carbon material is formed on the buffer layer 12 formed on the substrate 11 for epitaxial film growth. A pattern forming step for forming a base layer 13, an ELO growth step for forming a base layer 13 having a composition made of Al _X Ga _1-X N (0 <X ≦ 1) using the ELO mask pattern 50, and a step on the base layer 13 In addition, the semiconductor layer forming step of sequentially stacking the n-type contact layer 14a, the n-type cladding layer 14b, the light emitting layer 15 and the p-type semiconductor layer 16 made of a group III nitride semiconductor is provided. As a high-performance layer, each layer made of a group III nitride semiconductor having excellent crystallinity can be formed thereon. It becomes possible to manufacture the group III nitride semiconductor light emitting device 1 having excellent optical characteristics.
According to the manufacturing method of this embodiment, since the foundation layer 13 is formed using the ELO mask pattern 50 made of a carbon material, crystals are formed on the ELO mask pattern 50 even when Al is included in the crystal composition. Does not grow. As a result, the underlying layer 13 grows laterally (lateral growth) on the ELO mask pattern 50, and a region S having a low crystal dislocation density is formed on the surface 13 f of the underlying layer 13. Therefore, the underlayer 13 having excellent crystallinity can be formed, and each layer made of a group III nitride semiconductor formed thereon can be formed as a layer having excellent crystallinity.

  Further, according to the manufacturing method of the present embodiment, after forming the p-type electron block layer 10 in the semiconductor layer forming step, the constriction layer mask pattern 60 made of a carbon material is formed on the p-type electron block layer 10. And a small process of forming the current confinement layer 17 on the p-type electron block layer 10 using the constriction layer mask pattern 60, and thus a laser diode (light emitting element) having an inner stripe structure. ) Can be formed efficiently.

In the manufacturing method of the present embodiment, the example in which the base layer 13 is formed on the buffer layer 12 using the ELO mask pattern 50 made of a carbon material has been described. For example, the buffer layer 12 is omitted. Alternatively, an ELO mask pattern 50 may be directly formed on the substrate 11 and the underlying layer 13 may be grown using the ELO mask pattern 50.
In the manufacturing method of this embodiment, an example in which the ELO mask pattern 50 is left between the buffer layer 12 and the base layer 13 has been described. However, as described above, the film forming conditions are changed. By doing so, it is also possible to form the p-type semiconductor layer 16 without leaving the ELO mask pattern 50.

  The group III nitride semiconductor light-emitting device and the method for producing the same according to the present invention will be described below in more detail with reference to examples. However, the present invention is not limited to these examples.

[Example 1]
1A and 1B are schematic cross-sectional views of a group III nitride semiconductor light-emitting device manufactured in this experimental example. In this example, an AlN epitaxial substrate having a structure as shown in FIG. 2 was produced by the following method, and each layer made of a group III nitride semiconductor was formed thereon.

{Formation of buffer layer (group III nitride layer))
First, a buffer layer was formed on a substrate made of sapphire using AlN as a group III nitride. A high temperature MOCVD apparatus was used for forming the buffer layer. Specifically, the substrate was placed on a molybdenum susceptor, and the substrate was set in a water-cooled reactor using stainless steel through a load lock chamber. And the nitrogen gas was distribute | circulated and the inside of a furnace was purged.

  Next, after changing the flow gas in the MOCVD furnace to hydrogen, the inside of the furnace was maintained at a pressure of 30 torr. Then, the resistance heater was operated to raise the temperature of the substrate from room temperature to 1400 ° C. over a period of 15 minutes. Next, while maintaining the temperature of the substrate at 1400 ° C., hydrogen gas was circulated for 5 minutes to thermally clean the surface of the substrate.

Next, the temperature of the substrate was lowered to 1300 ° C., and it was confirmed that the temperature was stable at 1300 ° C. Thereafter, vapor of trimethylaluminum (TMA) and ammonia (NH ₃ ) gas are supplied into the vapor phase growth reactor together with hydrogen gas as a carrier gas so that the V / III ratio becomes 500, and the AlN film is formed. Grow for 10 minutes. Thereafter, ammonia (NH ₃ ) gas and trimethylaluminum (TMA) were adjusted so that the V / III ratio was 100, and an AlN film was further grown for 40 minutes. During the growth of the AlN film, the reflectance of the epitaxial layer and the susceptor temperature were confirmed with an observation device, and the temperature was monitored. Further, it was confirmed from the monitored reflectivity that the film thickness of the AlN layer reached 2 μm in total.

  Finally, the supply of trimethylaluminum (TMA) was stopped, the temperature was lowered to 300 ° C., the supply of ammonia was also stopped, and the temperature was further lowered to room temperature. Then, the inside of the vapor phase growth reactor was replaced with nitrogen, and the wafer on which the buffer layer made of AlN was formed was taken out through the load lock chamber.

{Pattern formation process}
Next, an ELO mask pattern made of carbon (carbon material) was formed on the surface of the buffer layer made of AlN formed on the substrate. At this time, a sputtering apparatus was used for carbon film formation. Specifically, a carbon film (carbon film) was formed on the entire surface of the buffer layer on the substrate by sputtering under the following film formation conditions. Subsequently, stripe-like resist patterns with a spacing of several μm were formed on the carbon film by photolithography. Then, the portion where the carbon film was exposed was oxidized and removed by subjecting this wafer to oxygen ashing. Thereafter, by removing the resist pattern, an ELO mask pattern having a carbon film stripe structure was formed on the buffer layer.

"Sputtering conditions"
Target: High purity graphite Deposition temperature: Room temperature Deposition rate: 40-50 nm / hr
Film thickness: 200nm

{ELO growth process}
Next, an AlN film was formed on the wafer on which the ELO mask pattern was formed as a base layer (ELO growth layer) made of Al _X Ga _1-X N (0 <X ≦ 1). For the formation of the AlN film, a high temperature MOCVD apparatus was used as in the buffer layer. Specifically, the substrate on which the ELO mask pattern was formed was placed on a molybdenum susceptor, and the substrate was set in a water-cooled reactor using stainless steel through a load lock chamber. Then, the inside of the furnace was purged by circulating nitrogen gas.

  Next, after changing the flow gas in the MOCVD furnace to hydrogen, the inside of the reaction furnace was maintained at a pressure of 30 torr. Then, the resistance heater was operated, and the temperature of the substrate was raised from room temperature to 1400 ° C. over 15 minutes. Next, while keeping the temperature of the substrate at 1400 ° C., hydrogen gas was circulated for 5 minutes to thermally clean the surface of the substrate, that is, the buffer layer on which the ELO mask pattern was formed.

  Next, the temperature of the substrate was lowered to 1300 ° C., and after confirming that the temperature was stabilized at 1300 ° C., ammonia gas and trimethylaluminum were simultaneously supplied to the vapor phase growth reactor to start AlN film formation. did. At this time, adjustment was made in advance so that the V / III ratio of ammonia gas and trimethylaluminum was 100. By such a procedure, an AlN film of about 10 μm was grown over 3 to 4 hours.

  Next, the supply of trimethylaluminum (TMA) was stopped, the temperature was lowered to 300 ° C., the supply of ammonia was also stopped, and the temperature was further lowered to room temperature. Then, the inside of the vapor phase growth reactor was replaced with nitrogen, and the wafer placed on the susceptor was taken out again through the load lock chamber.

Through each of these procedures, threading dislocations in the vertical direction were suppressed, and an AlN epitaxial substrate excellent in crystallinity could be manufactured.
When the cross-sectional structure of the obtained wafer was observed using a scanning electron microscope (SEM), as shown in the photographic views of FIGS. It has been clarified that the buffer layer 201 made of AlN formed and the underlayer 202 made of AlN formed thereon have good crystallinity. In addition, as shown in FIGS. 9A and 9B, the wafer manufactured in this example has a slight ELO mask pattern 203 made of carbon remaining between the buffer layer 201 and the base layer 202. I understand that. The micrograph shown in FIG. 9 (b) is a partially enlarged view of FIG. 9 (a).

[Example 2]
In this example, an n-type contact layer, an n-type cladding layer, a light emitting layer, and a p-type semiconductor layer are formed on the underlayer of the wafer produced in Example 1 by the following procedure. Thus, a light emitting element was manufactured. Further, in the light emitting element manufactured in this example, a laser diode having an inner stripe structure is formed by forming a current confinement layer between the light emitting layer and the p-type semiconductor layer.

"Semiconductor layer formation process"
“Formation of n-type contact layer and n-type cladding layer”
First, an n-type contact layer made of Al _0.25 Ga _0.75 N was formed on the base layer formed on the substrate in Example 1 using a conventionally known MOCVD apparatus. This n-type contact layer made of Al _0.25 Ga _0.75 N also functions as an n-type cladding layer. The n-type contact layer was doped with Si using tetramethylsilane (TMSi) as a raw material, and was formed to a thickness of about 2 μm.

“Process for forming n-type electron confinement layer”
Next, in this example, an n-type electron confinement layer was formed on the n-type contact layer (n-type clad layer) using the same MOCVD apparatus. At this time, the flow rate of raw materials TMA and trimethylgallium (TMG) was adjusted so that the AlN molar fraction of AlGaN was 18%, and an n-type electron confinement layer having a film thickness of 100 nm was formed.

`` Formation of light emitting layer ''
Next, a light emitting layer having a multiple quantum well structure composed of four AlGaN (AlN molar fraction 12%) barrier layers having a thickness of 8 nm and three GaN well layers having a thickness of 3 nm was stacked.
In forming the light emitting layer, first, a barrier layer was formed on the n-type cladding layer, and a well layer was formed on the barrier layer. And after repeating such a lamination | stacking procedure 3 times, the 4th barrier layer was formed on the well layer laminated | stacked 3rd. The last barrier layer, after the substrate temperature of 1050 ° C., AlGaN a (AlN molar fraction of 35%) was formed by laminating a film thickness of 10 nm, also ethylcyclopentadienyl magnesium (EtC _p 2Mg) was used as a raw material, and Mg was doped. In this example, according to the above procedure, the barrier layer is provided on both sides of the light emitting layer having the multiple quantum well structure.
Then, a p-type electron blocking layer was laminated with a thickness of 20 nm on the light emitting layer.

"Formation of mask pattern for constriction layer"
Next, a constriction layer mask pattern made of carbon (carbon material) was formed on the surface of the p-type electron blocking layer. At this time, a sputtering apparatus is used to form the carbon, and it is formed on the entire surface of the p-type electron block layer using the same conditions and procedures as the ELO mask pattern described above except that the film thickness is 100 nm. did. Then, a carbon film was formed in a stripe shape with a width of 3 μm by the same photolithography method as the ELO mask pattern described above.

"Formation of current confinement layer"
Next, a current confinement layer made of AlN was formed on the p-type electron block layer on which the constriction layer mask pattern was formed. Specifically, AlN is formed on the p-type electron block layer in a region where the constriction layer mask pattern is not formed at a height lower than the constriction layer mask pattern, and then the constriction layer mask pattern is ashed or the like. By removing by this method, a current confinement layer patterned into a shape having a penetrating portion was obtained.

“Formation of p-type semiconductor layer”
Next, a p-type clad layer made of AlGaN doped with Mg (AlN molar fraction 25%) is formed on the current confinement layer and the p-type electron block layer exposed from the through portion provided in the current confinement layer by 0. A p-type semiconductor layer was formed by laminating an n-type contact layer made of GaN doped with Mg with a thickness of 50 nm.

  After the formation of each layer by the above steps, the furnace temperature was lowered to room temperature, and the epitaxial wafer was taken out through the load lock chamber.

“Formation of electrodes”
Next, a laser diode (light emitting element) illustrated in FIGS. 1A and 1B was manufactured using the epitaxial wafer.
That is, a positive electrode which is an ohmic contact layer is formed by sequentially depositing nickel (Ni) / gold (Au) on the surface of the p-type semiconductor layer of the epitaxial wafer and performing vapor deposition and alloy treatment, thereby forming a p-side electrode. It was.
Further, dry etching is performed on the epitaxial wafer to expose a region where the n-side electrode (negative electrode) of the n-type contact layer is formed, and titanium (Ti) / aluminum (Al) / titanium (Ti) is exposed in this exposed region. A negative electrode (n-side electrode) in which four layers of / gold (Au) were sequentially laminated was formed.

  Next, with respect to the wafer on which each electrode is formed, after the end surface is formed by grinding and cleaving the back surface of the substrate, the wafer is cut and divided into square chips of 500 μm square, so that FIG. A laser diode (light emitting element) having an inner stripe structure as shown in FIG.

“Measurement of luminous characteristics”
Next, when a forward current was passed between the positive electrode (p side) and the negative electrode (n side) of the laser diode obtained by the above procedure, the forward voltage at a current of 100 mA was 5.8V. Further, when the light emission state was observed through the positive electrode on the p side, the light emission wavelength was 358 nm, and the light emission output was 1 mW.

  From the above results, it is clear that the group III nitride semiconductor light emitting device according to the present invention has excellent crystallinity, reduced internal resistance, and excellent light emission characteristics.

DESCRIPTION OF SYMBOLS 1 ... Group III nitride semiconductor light emitting element (light emitting element), 11 ... Substrate, 12 ... Buffer layer (Group III nitride layer), 12a ... Surface (buffer layer), 17 ... Current confinement layer, 17a ... Upper surface (current confinement) layer), 17A ... AlN layer (current confinement layer), 14 ... n-type semiconductor layer, 13 ... foundation layer (ELO growth _{layer) 13A ... Al x Ga 1-} x n (0 <x ≦ 1) composition of crystalline , 13f ... surface (underlayer), 15 ... light emitting layer, 16 ... p-type semiconductor layer, 20 ... semiconductor layer, 50 ... mask pattern for ELO, 60 ... mask pattern for constriction layer, 50A, 60A ... carbon film, L ... Association line, R ... region (region where the ELO mask pattern is not formed on the buffer layer), S ... region (region where the crystal dislocation density is low), T ... region (current confinement layer on the p-type electron block layer) Unformed area )

Claims (13)

The epitaxial film on a substrate for growth or substrate group III formed on plate nitride _layer, ELO growth layer having a composition consisting of _{Al X Ga 1-X N (} 0 <X ≦ 1) is formed,
An n-type semiconductor layer made of a group III nitride semiconductor, a light emitting layer, and a p-type semiconductor layer are sequentially stacked on the ELO layer,
The Group 3 nitride semiconductor light emitting device, wherein the ELO growth layer is formed using an ELO mask pattern made of a carbon material formed on the substrate or the Group III nitride layer.   2. The group III nitride semiconductor light emitting device according to claim 1, wherein the ELO mask pattern remains on the substrate or between the group III nitride layer and the ELO growth layer.   2. The group III nitride semiconductor light emitting device according to claim 1, wherein the ELO mask pattern does not remain on the substrate or between the group III nitride layer and the ELO growth layer. 3.   4. The inner stripe structure according to claim 1, wherein a current confinement layer is provided at least at a part between the light emitting layer and the p-type semiconductor layer. 5. A group III nitride semiconductor light-emitting device according to item 2.   5. The group III nitride semiconductor light-emitting device according to claim 4, wherein the current confinement layer is formed by using a confinement layer mask pattern made of a carbon material formed on the light-emitting layer. .   The group III nitride semiconductor light-emitting device according to claim 4 or 5, wherein the current confinement layer is made of AlN. A pattern forming step of forming an ELO mask pattern made of a carbon material on an epitaxial film growth substrate or a group III nitride layer formed on the substrate;
An ELO growth step of forming an ELO growth layer having a composition made of Al _X Ga _1-X N (0 <X ≦ 1) using the ELO mask pattern;
A group III nitride semiconductor light emitting device comprising: a semiconductor layer forming step of sequentially stacking an n-type semiconductor layer made of a group III nitride semiconductor, a light emitting layer, and a p type semiconductor layer on the ELO growth layer Manufacturing method.   The group III nitride semiconductor light emitting device according to claim 7, wherein the carbon material forming the mask pattern for ELO is any one of graphite, amorphous carbon, diamond, diamond-like carbon, carbon nanotube, and fullerene. Device manufacturing method. The semiconductor layer forming step further includes a small step of forming a constriction layer mask pattern made of a carbon material on the light emitting layer after forming the light emitting layer,
9. The group III nitride semiconductor light emitting device according to claim 7, further comprising a small step of forming a current confinement layer on the light emitting layer using the constriction layer mask pattern. Manufacturing method.   10. The group III nitride semiconductor according to claim 9, wherein the carbon material forming the constriction layer mask pattern is any one of graphite, amorphous carbon, diamond, diamond-like carbon, carbon nanotube, and fullerene. Manufacturing method of light emitting element. The semiconductor layer forming step, claims the current confinement _layer, a composition consisting of _{Al Y Ga 1-Y N (} 0 <Y ≦ 1), and forming at a temperature in the range of 1000 to 1400 ° C. The manufacturing method of the group III nitride semiconductor light-emitting device of Claim 9 or Claim 10.   A group III nitride semiconductor light-emitting device obtained by the manufacturing method according to any one of claims 7 to 11.   A laser diode using the element structure of a group III nitride semiconductor light-emitting element according to any one of claims 1 to 6 or claim 12.