JP5105738B2 - Method for producing gallium nitride compound semiconductor laminate - Google Patents

Description

  The present invention relates to a method for manufacturing a gallium nitride-based compound semiconductor laminate useful for manufacturing a light-emitting element that emits high-power blue, green, or ultraviolet light.

  In recent years, nitride semiconductor materials have attracted attention as semiconductor materials for light-emitting elements that emit light of short wavelengths. In general, nitride semiconductors use various oxide crystals such as sapphire single crystals, silicon carbide single crystals, III-V group compound semiconductor single crystals, etc. as substrates, and metal organic vapor phase chemical reaction method (MOCVD method) thereon. ), Molecular beam epitaxy method (MBE method), hydride vapor phase epitaxy method (HVPE method), or the like.

  At present, the most widely used crystal growth method at the industrial level is a method in which sapphire, SiC, GaN, AlN, or the like is used as a substrate, and a metal organic chemical vapor deposition method (MOCVD method) is formed thereon. The n-type layer, the light-emitting layer, and the p-type layer are grown in a temperature range of about 700 ° C. to 1200 ° C. using a group III organometallic compound and a group V source gas in a reaction tube in which the above-described substrate is installed. After the growth of each semiconductor layer, a light-emitting element can be obtained by forming a negative electrode on the substrate or n-type layer and forming a positive electrode on the p-type layer.

  Conventional light-emitting layers use InGaN with a composition adjusted to adjust the emission wavelength, and have a double heterostructure sandwiched between layers with a higher band gap than InGaN, or a multiple quantum well structure that uses the quantum well effect. ing.

  In a gallium nitride compound semiconductor light emitting device having a light emitting layer having a multiple quantum well structure, a good output can be obtained when the thickness of the well layer is 2 to 3 nm. However, there is a problem that the drive voltage is high. On the other hand, when the thickness of the well layer is 2 nm or less, the driving voltage decreases, but good output, that is, high-efficiency light emission cannot be obtained.

  In U.S. Patent Application Publication No. US2003 / 0160229A1, in a gallium nitride compound semiconductor light emitting device having a light emitting layer having a multiple quantum well structure, the well layer of the active layer has a variation in film thickness in order to obtain high efficiency light emission. Proposed structure.

  Japanese Patent No. 3660446 also discloses a nitride semiconductor light emitting device having a quantum well structure in which the thickness of the well layer is not uniform. In this publication, in an active layer having a quantum well structure, a nitride semiconductor layer or a metal layer having a very thin in-plane distribution and a crystalline in-plane distribution is provided below the well layer, and the well is formed thereon. By growing the layer, the well layer is selectively grown and the active layer becomes a quantum dot, and the light emission efficiency is greatly improved, and a highly reliable nitride semiconductor device can be realized. Furthermore, in this publication, the film quality of the well layer is changed by changing the film thickness of the layer stacked under the well layer, thereby improving the element reliability.

  However, in the gallium nitride compound semiconductor light emitting device having a light emitting layer having a multiple quantum well structure, there is a problem in that the emission intensity deteriorates with time when the thickness of the well layer is not uniform. It became clear by study of.

US Patent Application Publication No. US2003 / 0160229A1 Japanese Patent No. 3660446

  SUMMARY OF THE INVENTION An object of the present invention is to provide a gallium nitride-based compound semiconductor laminate useful for the manufacture of a gallium nitride-based compound semiconductor light-emitting device having a low driving voltage, good light-emitting output, and little change in light-emitting output over time. It is to provide a method for manufacturing a product.

The present invention provides the following inventions.
(1) An n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are provided on a substrate, and the light-emitting layer is disposed between the n-type semiconductor layer and the p-type semiconductor layer. When manufacturing a gallium nitride compound semiconductor stack having a multi-quantum structure in which a layer and a barrier layer are stacked and at least one of the well layers has a non-uniform thickness, the growth rate of the barrier layer is controlled. A method for producing a gallium nitride-based compound semiconductor laminate, which is performed at a rate of less than 10 Å / min.

  (2) The method for producing a gallium nitride-based compound semiconductor laminate as described in 1 above, wherein the well layer closest to the p-type semiconductor layer has a uniform thickness.

  (3) The method for producing a gallium nitride compound semiconductor laminate according to the above item 1 or 2, wherein the well layer closest to the n-type layer has a uniform thickness.

  (4) The method for producing a gallium nitride compound semiconductor laminate according to any one of the above items 1 to 3, wherein the well layer has a uniform thickness of 1.8 to 5 nm.

  (5) The method for producing a gallium nitride-based compound semiconductor laminate according to any one of (1) to (4) above, wherein the thickness of the thin film portion of the well layer having a non-uniform thickness is 2.7 nm or less.

  (6) The method for producing a gallium nitride-based compound semiconductor laminate according to any one of 1 to 5 above, wherein the multiple quantum well structure is laminated 3 to 10 times.

  (7) The gallium nitride system according to any one of 1 to 6 above, wherein the barrier layer is a gallium nitride compound semiconductor selected from GaN, AlGaN, and InGaN having a smaller In ratio than InGaN forming the well layer. A method for producing a compound semiconductor laminate.

  (8) The method for producing a gallium nitride compound semiconductor laminate according to the above item 7, wherein the barrier layer is GaN.

  (9) The method for producing a gallium nitride compound semiconductor laminate according to any one of the above items 1 to 8, wherein the barrier layer contains a dopant.

  (10) The above 9 wherein the dopant is at least one selected from the group consisting of C, Si, Ge, Sn, Pb, O, S, Se, Te, Po, Be, Mg, Ca, Sr, Ba, and Ra. The manufacturing method of the gallium nitride type compound semiconductor laminated body as described in a term.

(11) The method for producing a gallium nitride-based compound semiconductor laminate as described in 9 or 10 above, wherein the dopant concentration is from 1 × 10 ¹⁷ cm ⁻³ to 1 × 10 ¹⁸ cm ⁻³ .

  (12) The method for producing a gallium nitride compound semiconductor laminate according to any one of the above items 1 to 11, wherein the barrier layer has a thickness of 7 nm to 50 nm.

  (13) The method for producing a gallium nitride compound semiconductor laminate according to the above item 12, wherein the barrier layer has a thickness of 14 nm or more.

  (14) The method for producing a gallium nitride compound semiconductor laminate according to any one of (1) to (13), wherein the well layer contains In.

  (15) The method for producing a gallium nitride compound semiconductor laminate as described in 14 above, wherein a thin layer not containing In is present on at least the substrate side surface of the barrier layer.

  (16) The method for producing a gallium nitride-based compound semiconductor laminate according to any one of (1) to (15), wherein the barrier layer is grown at a plurality of growth temperatures.

  (17) After the formation of the well layer, the well layer having a non-uniform thickness is formed by decomposing or sublimating a part of the well layer. The manufacturing method of the gallium nitride type compound semiconductor laminated body of description.

  (18) The production of a gallium nitride-based compound semiconductor laminate as described in 17 above, wherein the substrate temperature T1 when forming the well layer and the substrate temperature T2 when decomposing or sublimating a part of the well layer are T1 ≦ T2. Method.

  (19) The method for producing a gallium nitride-based compound semiconductor laminate as described in 17 or 18 above, wherein the decomposition or sublimation of a part of the well layer is performed in an atmosphere containing a nitrogen source and not containing a group III metal source.

  (20) The method for producing a gallium nitride-based compound semiconductor laminate according to any one of the above items 17 to 19, wherein a part of the well layer is decomposed or sublimated in the step of forming the barrier layer.

  (21) A gallium nitride compound semiconductor laminate manufactured by the manufacturing method according to any one of 1 to 20 above.

  (22) A gallium nitride compound semiconductor light-emitting device in which a negative electrode is provided on the n-type semiconductor layer and a positive electrode is provided on the p-type semiconductor layer of the gallium nitride compound semiconductor laminate according to the above item 21.

(23) A lamp comprising the gallium nitride-based compound semiconductor light-emitting element described in the above item 22.
(24) An electronic device in which the lamp according to item 23 is incorporated.
(25) A machine device in which the electronic device as described in 24 above is incorporated.

  According to the present invention, when manufacturing a gallium nitride compound semiconductor light emitting device having a light emitting layer having a multiple quantum well structure including at least one well layer having a non-uniform thickness, a growth rate of a barrier layer is specified. By controlling to the range, a gallium nitride compound semiconductor light emitting device having excellent semiconductor crystallinity, low driving voltage, high light emission intensity, and a small decrease rate of light emission intensity with time can be manufactured.

As the gallium nitride compound semiconductor composing the n-type semiconductor layer, the light emitting layer, and the p-type semiconductor layer of the gallium nitride compound semiconductor laminate, a general formula Al _x In _y Ga _1-xy N (0 ≦ x <1, 0 ≦ Semiconductors having various compositions represented by y <1, 0 ≦ x + y <1) are well known, and the gallium nitride compound semiconductor constituting the n-type semiconductor layer, the light emitting layer, and the p-type semiconductor layer in the present invention is also represented by the general formula. Semiconductors of various compositions represented by Al _x In _y Ga _1-xy N (0 ≦ x <1, 0 ≦ y <1, 0 ≦ x + y <1) can be used without any limitation.

  As the substrate, sapphire, SiC, or the like can be used, and conventionally known substrates such as GaP, GaAs, Si, ZnO, GaN can be used without any limitation.

  In order to laminate a gallium nitride compound semiconductor on these substrates that are not in principle lattice-matched with a gallium nitride compound except for a GaN substrate, it is disclosed in Japanese Patent No. 3026087 and Japanese Patent Laid-Open No. 4-297003. A lattice mismatch crystal epitaxial growth technique called a low temperature buffer method or an SP (Seeding Process) method disclosed in Japanese Patent Application Laid-Open No. 2003-243302 can be used. In particular, the SP method for producing an AlN crystal film at such a high temperature that a GaN-based crystal can be produced is an excellent lattice-mismatched crystal epitaxial growth technique from the viewpoint of improving productivity.

When a lattice mismatched crystal epitaxial growth technique such as a low-temperature buffer or SP method is used, the gallium nitride compound semiconductor as a base layer to be stacked thereon is undoped or lightly doped GaN of about 5 × 10 ¹⁷ cm ^−3. It is desirable to be. The film thickness of the underlayer is desirably 1 to 20 μm, and more preferably 5 to 15 μm.

  In the present invention, at least one well layer having a non-uniform thickness exists in the well layer of the multiple quantum well structure forming the light emitting layer. In the present invention, “uniform thickness” means that the film thickness is within ± 10% of the average film thickness everywhere. It is preferably within ± 7%. “Non-uniform thickness” means that there is a portion where the film thickness is not within ± 10% of the average film thickness. “Average film thickness” refers to a film thickness obtained by arithmetically averaging the maximum film thickness and the minimum film thickness. In a well layer having a non-uniform thickness, a portion thicker than the average film thickness is called a “thick film portion”, and a thin portion is called a “thin film portion”.

  The determination and measurement of whether the film thickness of each well layer is uniform or non-uniform can be made by a cross-sectional TEM photograph of a gallium nitride compound semiconductor. For example, when observed with a cross-sectional TEM photograph of 200,000 times to 2,000,000 times, the change in film thickness of each well layer can be measured. 4 to 11 are cross-sectional TEM photographs of the chip manufactured in Example 1 at a magnification of 1,000,000. The film thickness can be calculated in consideration of the magnification. In the table attached to the side of each figure, the maximum film thickness and the minimum film thickness in each figure of each well layer are described. From the maximum film thickness and the minimum film thickness of each well layer obtained by combining these eight figures, it can be determined whether each well layer is a uniform well layer or a non-uniform well layer. A portion thicker than the average film thickness obtained by arithmetically averaging the maximum film thickness and the minimum film thickness is a thick film portion, and a thin portion is a thin film portion. In the figure, A is a thick film part and B is a thin film part. The maximum film thickness and the minimum film thickness of each well layer are obtained by observing at least eight cross-sectional TEM photographs, for example, at an interval of 20 μm from adjacent sides.

  When the thickness is not uniform in all the well layers in the multiple quantum well structure forming the light emitting layer, the driving voltage is reduced as compared with the case where the thickness is uniform in all the well layers, but the light emission The output is reduced or equivalent. However, if the thickness of all the well layers is not made uniform and a part of the well layers is made to have a uniform thickness, the reason for this is not clear, but the drive voltage is lowered and the light emission output is increased. In particular, when the thickness of the well layer closest to the p-type semiconductor layer or the n-type semiconductor layer is uniform, the effect of increasing the light emission output is great. When the film thicknesses of the well layer closest to the p-type semiconductor layer and the well layer closest to the n-type semiconductor layer are uniform, the light emission output increase effect is maximized, but the drive voltage increases. Therefore, the well layer having a uniform thickness may include both the well layer closest to the p-type semiconductor layer and the well layer closest to the n-type layer, but preferably includes either one. It is particularly preferable that the well layer having a uniform thickness includes a well layer closest to the p-type semiconductor layer.

  When the number of well layers having a uniform thickness increases, the driving voltage increases. Accordingly, the number of well layers having a uniform thickness is preferably 1 or more and 60% or less of the total number of well layers. More preferably, it is 40% or less of the total number of well layers.

The thickness of the well layer having a uniform thickness is preferably 1.8 to 5 nm. If the thickness is outside this range, the light emission output is reduced. More preferably, it is an area | region of 2.0-3.5 nm.
The thickness of the thick film portion of the well layer having a non-uniform thickness is preferably about 1.8 to 5 nm. If the thickness of the thick film portion is outside this range, the light emission output is reduced. More preferably, the region of 2.3 to 3.5 nm is suitable. Moreover, it is preferable that the width | variety of a thick film part is 10-5000 nm, and also 20 nm-1000 nm are suitable.

  The ratio of the thick film portion is preferably 30% to 90% with respect to the entire well layer, and both reduction in driving voltage and increase in output can be realized. More preferably, it is 60% to 90%. The ratio between the thick film portion and the thin film portion can also be calculated based on the measured width value obtained from the cross-sectional TEM photograph.

The width of the thin film portion is preferably 1 to 200 nm. More preferably, 5-150 nm is suitable.
The difference between the maximum film thickness of the thick film portion and the minimum film thickness of the thin film portion is preferably about 1 to 3 nm. The film thickness of the thin film portion is preferably 1.0 to 2.7 nm.

  The thin film portion may include a region where the film thickness is 0, that is, a region where no well layer is present, but it is preferable to reduce the number of regions because it causes a decrease in light emission output. 30% or less is preferable with respect to the whole well layer, 20% or less is more preferable, and 10% or less is particularly preferable. This ratio can be calculated based on the measured width value in the cross-sectional TEM photograph.

  The well layer with a non-uniform thickness is preferably formed by growing a well layer with a predetermined thickness and then decomposing or sublimating a part thereof. A gallium nitride compound semiconductor containing In is preferable because it easily decomposes or sublimates. In addition, a gallium nitride-based compound semiconductor containing In can emit light in the blue wavelength region with strong intensity.

  While supplying a Group III metal source containing In and a nitrogen source, growing a gallium nitride compound semiconductor containing In to a predetermined thickness, and then maintaining the substrate temperature in a state where supply of the Group III metal source is stopped Alternatively, by raising the temperature, a part of it can be decomposed or sublimated. The carrier gas is preferably nitrogen.

  In addition to GaN and AlGaN, the barrier layer can be formed of an InGaN layer having a smaller In ratio than InGaN constituting the well layer. Among these, GaN is preferable. In the present invention, at least a part of the barrier layer is preferably grown at a substrate temperature higher than that of the well layer. The presence of the barrier layer grown at a high temperature can prevent the reverse breakdown voltage characteristics from being deteriorated due to the aging of the light emitting element.

  The growth of the barrier layer can be composed of a plurality of steps having different growth temperatures. For example, the barrier layer A may be stacked on the well layer composed of the thick film portion and the thin film portion at the growth temperature T2 at a predetermined thickness, and then the growth temperature may be increased to T3 to further stack the barrier layer B. Thereafter, the growth temperature can be lowered to T4, and the barrier layer C can be further laminated. When the barrier layer C laminated at a temperature lower than T3 is present, an effect of suppressing deterioration of characteristics due to aging can be further imparted, which is more preferable. The growth temperature of the barrier layer C may be the same as the growth temperature of the barrier layer A, and may be the same as the growth temperature T1 of the well layer. Without the barrier layer A grown at a relatively low temperature, the well layer may be damaged, and the light emission output may be reduced.

  The relationship between the temperature T1 at which the well layer is grown and the temperature T3 at which the barrier layer B is grown is preferably T1 <T3. In the process of raising the temperature from T1 to T3 after the well layer is grown, carriers containing nitrogen are included. A thick film portion and a thin film portion can be effectively formed in the well layer by including the step of stopping the supply of the group III raw material while continuing the supply of the gas and the nitrogen source. At this time, it is not necessary to change the carrier gas. Switching the carrier gas to hydrogen shortens the emission wavelength. The degree of change in wavelength is difficult to control stably, reducing product productivity.

  The growth temperature T1 of the well layer is preferably in the range of 600 ° C to 850 ° C. If T1 is lower than this range, the rate of change of the light emission output increases, and if it is higher, the In composition of the InGaN well layer decreases and the light emission wavelength becomes shorter. More preferably, it is the range of 700 to 750 degreeC.

  The growth temperature T3 of the barrier layer B is preferably in the range of 850 ° C to 1000 ° C. When T3 is lower than this range, the rate of change of the light emission output increases, and when T3 is higher, the drive voltage increases. More preferably, it is the range of 890 degreeC to 930 degreeC.

  The rate of temperature increase from T1 to T3 is preferably about 1 to 200 ° C./min. More desirably, it is about 5 to 150 ° C./min. Further, the time required for raising the temperature from T1 to T3 is preferably about 30 seconds to 10 minutes. More desirably, it is about 1 to 5 minutes.

  The barrier layer may have a structure in which a plurality of layers having different compositions are stacked. In the case where the well layer is a gallium nitride compound semiconductor containing In, it is preferable to provide a thin layer not containing In on the surface of the barrier layer at least in contact with the well layer on the substrate side. Providing this thin layer is preferable because it suppresses decomposition and sublimation of In in the well layer and enables stable control of the emission wavelength. This thin layer is preferably provided at a substrate temperature comparable to the growth temperature of the well layer.

  It is preferable to dope the barrier layer with a dopant because the driving voltage is lowered. Examples of the dopant include C, Si, Ge, Sn, Pb, O, S, Se, Te, Po, Be, Mg, Ca, Sr, Ba, and Ra. Of these, Si and Ge are preferable, and Si is most preferable.

The concentration of the dopant is preferably about 5 × 10 ¹⁶ cm ⁻³ to 1 × 10 ¹⁸ cm ⁻³ . If it is less than 5 × 10 ¹⁶ cm ⁻³ , the driving voltage lowering effect is reduced. When it exceeds 1 × 10 ¹⁸ cm ⁻³ , the reverse voltage characteristic tends to be deteriorated. More preferably, it is 1 * 10 < ¹⁷ > cm < ^-3 > -5 * 10 < ¹⁷ >.

  The thickness of the barrier layer is preferably 7 nm or more, and more preferably 14 nm or more. If the thickness of the barrier layer is small, the difference in thickness between the thick and thin film portions in the well layer cannot be filled, and the formation of the thick and thin film portions in the well layer is obstructed, resulting in reduced luminous efficiency and aging characteristics. Cause a decline. On the other hand, when the film thickness is too thick, the drive voltage increases and the light emission efficiency decreases. For this reason, the thickness of the barrier layer is preferably 50 nm or less.

  The growth rate of the barrier layer is important for preventing deterioration of the light emission output with time when at least one well layer having a non-uniform thickness exists. The growth rate of the barrier layer is preferably less than 10 / min, more preferably 7 / min or less, and even more preferably 5 / min or less. If it is 10 Å / min or more, a flat, good-crystallinity barrier layer cannot be grown on a well layer having a thick film and a thin film portion, and the deterioration of the light emission output with time increases (that is, a change in the light emission output). Rate increases). If the growth rate is too slow, the productivity is lowered, so 1 kg / min or more is preferable. In the case where the barrier layer is composed of a plurality of layers, the average growth rate may be controlled so as to satisfy the above value.

  The number of laminations in the multiple quantum well structure is preferably about 3 to 10 times, and more preferably about 3 to 6 times. The composition and structure may be changed in the well layer and the barrier layer.

  The p-type semiconductor layer is usually 0.01 to 1 μm thick, and is composed of a p-type cladding layer in contact with the light emitting layer and a p-type contact layer for forming a positive electrode. The p-type contact layer can also serve as the p-type cladding layer. The p-type cladding layer is formed using GaN, AlGaN, or the like, and doped with Mg as a p-type dopant. In order to prevent the overflow of electrons, it is desirable to form with a material having a larger band gap than the material of the light emitting layer. In addition, it is desirable to form a high carrier concentration layer so that carriers can be efficiently injected into the light emitting layer.

  As for the p-type cladding layer, layers having different compositions and lattice constants may be alternately stacked a plurality of times. At that time, in addition to the composition, the amount and thickness of the dopant may be changed depending on the layer to be stacked.

  For the p-type contact layer, GaN, AlGaN, InGaN or the like can be used, and Mg is doped as an impurity. Mg-doped gallium nitride compound semiconductors usually have high resistance when taken out from the reactor, but p-type conduction can be achieved by applying activation treatment such as annealing treatment, electron beam irradiation treatment, microwave irradiation treatment, etc. It is supposed to show sex.

  The growth temperature of the p-type semiconductor layer is preferably in the range of 900 ° C to 1050 ° C. If it is higher than this range, the rate of change of the light emission output increases. On the other hand, if it is lower than this range, the light emission output is lowered. More preferably, it is the range of 960 degreeC-1000 degreeC.

  Further, boron phosphide doped with p-type impurities can also be used as the p-type contact layer. Boron phosphide doped with p-type impurities exhibits p-type conductivity without any treatment for p-type conversion as described above.

The n-type semiconductor layer is usually 1 to 10 μm in thickness, preferably about 2 to 5 μm, and has an n-type contact layer for forming a negative electrode and an n-type cladding layer having a larger band gap than the light-emitting layer and in contact with the light-emitting layer Consists of. The n-type contact layer may also serve as the n-type cladding layer. The n-type contact layer is preferably doped with Si or Ge at a high concentration. The n-type semiconductor layer formed by doping these dopants preferably has a carrier concentration adjusted to about 5 × 10 ¹⁸ cm ⁻³ to 2 × 10 ¹⁹ cm ⁻³ .

  The n-type cladding layer can be formed of AlGaN, GaN, InGaN or the like. Needless to say, however, it is desirable that the composition be larger than the band gap of InGaN in the light emitting layer when using InGaN. The carrier concentration of the n-type cladding layer may be the same as that of the n-type contact layer, or may be large or small. In order to improve the crystallinity of the light emitting layer formed thereon, it is preferable to adjust the growth conditions such as the growth rate, the growth temperature, the growth pressure, and the dope amount so as to obtain a highly flat surface.

  The n-type cladding layer may be formed by alternately laminating layers having different compositions and lattice constants. At that time, in addition to the composition, the amount and thickness of the dopant may be changed depending on the layer to be stacked.

  Although the growth temperature at the time of growing the n-type semiconductor layer varies depending on the composition, it is generally preferably 800 to 1200 ° C., and more preferably 1000 to 1200 ° C. However, for example, when In is included as the n-type cladding layer, a temperature lower than this range is preferable.

  The growth method of the gallium nitride-based compound semiconductor constituting these n-type semiconductor layer, light emitting layer, and p-type semiconductor layer is not particularly limited, and a well-known method such as MBE, MOCVD, or HVPE can be used under well-known conditions. . Of these, the MOCVD method is preferable.

In the raw material, ammonia, hydrazine, azide, or the like can be used as a nitrogen source. Further, trimethylgallium (TMGa), triethylgallium (TEGa), trimethylindium (TMIn), trimethylaluminum (TMAl), or the like can be used as the group III organic metal. Further, silane, disilane, germane, an organic germanium raw material, biscyclopentadienyl magnesium (Cp ₂ Mg), or the like can be used as a dopant source. Nitrogen and hydrogen can be used as the carrier gas.

  As the negative electrode, negative electrodes having various compositions and structures are well known, and these known negative electrodes can be used without any limitation. As a negative electrode contact material in contact with the n-contact layer, in addition to Al, Ti, Ni, Au, etc., Cr, W, V, etc. can be used. Bonding properties and the like can be imparted by forming the entire negative electrode into a multilayer structure.

  As the positive electrode, positive electrodes having various compositions and structures are well known, and these known positive electrodes can be used without any limitation.

  The translucent positive electrode material may include Pt, Pd, Au, Cr, Ni, Cu, Co, and the like. Further, it is known that the translucency is improved by using a structure in which a part thereof is oxidized. In the case of forming a flip chip type element, Rh, Ag, Al, or the like can be used as the reflective positive electrode material in addition to the above materials.

  These positive electrodes can be formed by a method such as sputtering or vacuum deposition. When sputtering is used in particular, ohmic contact can be obtained by appropriately controlling the sputtering conditions without performing annealing after forming the electrode film.

  As a structure of the light emitting element, a flip chip type element including a reflective positive electrode may be used, or a face-up type element including a translucent positive electrode, a lattice type, or a comb type positive electrode may be used.

  In the well layer having the thick film portion and the thin film portion in the present invention, the interface between the well layer and the barrier layer made of different materials is inclined with respect to the substrate surface in the boundary region changing from the thick film portion to the thin film portion. The amount of light taken out in the direction perpendicular to the surface is increased. In particular, the light emission intensity is further increased by employing a flip chip type element structure provided with a reflective electrode.

  The gallium nitride compound semiconductor light emitting device manufactured from the gallium nitride compound semiconductor laminate of the present invention can be formed into a lamp by providing a transparent cover by means well known in the art, for example. In addition, a white lamp can be produced by combining the gallium nitride compound semiconductor light emitting device of the present invention and a cover having a phosphor.

  In addition, since the lamp manufactured from the gallium nitride compound semiconductor light emitting device of the present invention has a low driving voltage and high light output, electronic devices such as mobile phones, displays, and panels incorporating the lamp manufactured by this technology, Mechanical devices such as automobiles, computers, and game machines incorporating the electronic devices can be driven with low power and can achieve high characteristics. In particular, the battery-powered devices such as mobile phones, game machines, toys, and automobile parts exhibit power saving effects.

  EXAMPLES Next, although an Example demonstrates this invention still in detail, this invention is not limited only to these Examples.

Example 1
FIG. 1 is a schematic view showing a cross section of a gallium nitride compound semiconductor laminate for a semiconductor light emitting device manufactured in this example (however, the well layer and the barrier layer of the light emitting layer are omitted). As shown in FIG. 1, an SP layer (2) made of AlN is laminated on a substrate (1) made of sapphire having a c-plane by an epitaxial growth method of lattice mismatched crystals, and the thickness is sequentially increased from the substrate side. An underlayer (3a) made of 8 μm undoped GaN, an n-type contact layer (3b) made of 2 μm thick Ge-doped GaN having an electron concentration of about 1 × 10 ¹⁹ cm ⁻³ , and 1 × 10 ¹⁸ cm ⁻³ An n-type semiconductor layer (3) composed of an n-type cladding layer (3c) made of In _0.02 Ga _0.98 N with a thickness of 20 nm and a thickness of 6 × 15 × 3 ¹⁷ cm ⁻³ with a thickness of 15 nm. A light-emitting layer (4) having a multiple quantum well structure in which Si-doped GaN barrier layers and five well layers composed of 3 nm-thick non-doped In _0.08 Ga _0.92 N are alternately stacked; And thickness 16nm Mg-doped p-type Al _0.05 Ga _0.95 N p-type cladding layer (5c) and a 0.2 μm-thick Mg-doped p-type Al _0.02 Ga _0.98 N having a hole concentration of 8 × 10 ¹⁷ cm ⁻³ The p-type semiconductor layer (5) composed of the p-type contact layer (5b) is sequentially stacked.

  The above-mentioned gallium nitride compound semiconductor laminate was produced by the following procedure using MOCVD.

  First, the sapphire substrate was introduced into a stainless steel reaction furnace capable of processing a large number of substrates in the form of heating a carbon susceptor with an induction heater. The susceptor has a mechanism for rotating itself and a mechanism for rotating the substrate. The sapphire substrate (1) was placed on a carbon susceptor for heating in a glove box substituted with nitrogen gas. After introducing the sample, the reaction furnace was purged with nitrogen gas.

  After flowing nitrogen gas for 8 minutes, the induction heater was activated, the substrate temperature was raised to 600 ° C. over 10 minutes, and the pressure in the furnace was set to 15 kPa (150 mbar). While maintaining the substrate temperature at 600 ° C., the substrate surface was left for 2 minutes while flowing hydrogen gas and nitrogen gas to perform thermal cleaning of the substrate surface.

  After completion of the thermal cleaning, the nitrogen carrier gas valve was closed and the gas supply into the reactor was hydrogen only.

  After switching the carrier gas, the temperature of the substrate was raised to 1150 ° C. After confirming that the temperature was stabilized at 1150 ° C., the valve of TMAl piping was switched, and a gas containing TMAl vapor was supplied into the reactor, which was decomposed by the deposits attached to the inner wall of the reactor. The process of reacting with the generated N atoms to deposit AlN on the sapphire substrate was started.

  After the treatment for 7 minutes and 30 seconds, the valve of TMAl piping was switched, and the supply of gas containing TMAl vapor into the reactor was stopped. It waited for 4 minutes as it was, and waited for TMAl vapor | steam remaining in the furnace to be discharged | emitted completely. Subsequently, the valve of the ammonia gas pipe was switched to start supplying ammonia gas into the furnace.

  After 4 minutes, while continuing the circulation of ammonia, the temperature of the susceptor was lowered to 1040 ° C., and the pressure in the furnace was set to 40 kPa (400 mbar). While the susceptor temperature was lowered, the flow rate of the flow rate regulator of the TMGa pipe was adjusted.

After confirming that the substrate temperature reached 1040 ° C., wait for the temperature to stabilize, then switch the TMGa valve to start supplying TMGa into the furnace, and start undoped GaN growth for about 4 hours. The GaN layer was grown over the time.
In this way, an undoped GaN foundation layer (3a) having a film thickness of about 8 μm was formed.

Further, a high Ge-doped n-type GaN contact layer (3b) was grown on the undoped GaN foundation layer. After the growth of the undoped GaN underlayer, the supply of TMGa into the furnace was stopped, and then the substrate temperature was raised to 1080 ° C. over 1 minute and held for 3 minutes to stabilize the temperature. Meanwhile, the flow rate of tetramethyl germanium (TMGe) was adjusted. The amount to be circulated was examined in advance and adjusted so that the electron concentration of the Ge-doped GaN contact layer was about 2 × 10 ¹⁹ cm ⁻³ . Ammonia continued to be fed into the furnace at the same flow rate.

After temperature stabilization for 3 minutes, a thin film of 10 nm thick Ge-doped n-type GaN and 10 nm thick undoped GaN is alternately grown in this order for 100 periods, and an n-type GaN contact layer of about 2 μm is grown. It was. Ge-doped GaN was produced by supplying TMGa and TMGe into the furnace, and an undoped GaN layer was produced by supplying TMGa. As a result, an n-type contact layer (3b) having an average carrier concentration of about 1 × 10 ¹⁹ cm ⁻³ was formed.

  After the last undoped GaN layer was grown, the TMGa valve was switched to stop the supply of TMGa into the furnace. While the ammonia was circulated as it was, the valve was switched to switch the carrier gas from hydrogen to nitrogen. Thereafter, the temperature of the substrate was lowered from 1080 ° C. to 720 ° C.

While waiting for the temperature in the furnace to change, the supply amount of SiH ₄ was changed. The amount to be circulated was examined in advance, and adjusted so that the electron concentration of the Si-doped InGaN cladding layer (3c) was 1 × 10 ¹⁸ cm ⁻³ . Ammonia continued to be fed into the furnace at the same flow rate.

Then, waiting for the state of the furnace to stabilize, simultaneously switching the valves TMIn and TEGa and SiH _4, feed was started to the furnace. Supply was continued for a predetermined time to form an n-type cladding layer (3b) made of Si-doped In _0.02 Ga _0.98 N having a thickness of 20 nm.

  Thereafter, in a substrate temperature profile as shown in FIG. 2, a light emitting layer (4) having a multiple quantum well structure including a well layer and a barrier layer, a p-type AlGaN cladding layer (5c), and a p-type AlGaN contact layer (5b). Was formed. A well layer, a barrier layer A and a barrier layer C are formed at a substrate temperature of 720 ° C., a barrier layer B is formed at a substrate temperature of 920 ° C., and a p-type AlGaN cladding layer and a p-type AlGaN contact layer are formed at a substrate temperature of 1000 ° C. did. In this embodiment, the growth temperatures of the p-type AlGaN cladding layer and the p-type AlGaN contact layer are the same, but different growth temperatures may be used.

After the Si-doped In _0.02 Ga _0.98 N cladding layer was formed, the TMIn, TEGa, and SiH ₄ valves were switched to stop the supply of these raw materials. After stopping the raw material supply, the setting of the supply amounts of TEGa and SiH ₄ was changed. The amount to be circulated has been examined in advance and adjusted so that the growth rate of the Si-doped GaN barrier layer is 3 Å / min and the electron concentration of the Si-doped GaN barrier layer is 3 × 10 ¹⁷ cm ^−3. did. Formation of the Si-doped GaN barrier layer was performed as follows.

The supply of TEGa and SiH _{4 into} the furnace is started with the substrate temperature kept at 720 ° C., a thin barrier layer A made of GaN doped with Si is formed for a predetermined time, and the supply of TEGa and SiH ₄ is stopped. did. Thereafter, the temperature of the susceptor was raised to 920 ° C. while the growth was interrupted. After the temperature is stabilized, the substrate temperature, the pressure in the furnace, the flow rate and type of ammonia gas and carrier gas remain unchanged, the TEGa and SiH ₄ valves are switched, and the supply of TEGa and SiH _{4 into} the furnace is resumed. The barrier layer B was grown for a specified time at the substrate temperature of 920 ° C. as it was. After the growth of the barrier layer B, the supply of TEGa and SiH _{4 in} the furnace was stopped. Subsequently, the susceptor temperature is lowered to 720 ° C., the supply of TEGa and SiH ₄ is started, the barrier layer C is grown, and then the valve is switched again to stop the supply of TEGa and SiH ₄ to grow the GaN barrier layer. Ended. As a result, a Si-doped GaN barrier layer having a total film thickness of 15 nm was formed of a three-layered barrier layer composed of A, B, and C.

After the growth of the GaN barrier layer is completed, the supply of TEGa and SiH ₄ is stopped for 30 seconds, and the setting of the supply amount of TEGa is changed to a flow rate previously examined, and then the substrate temperature, furnace pressure, ammonia gas In addition, while maintaining the flow rate and type of the carrier gas, the TEGa and TMIn valves were switched to supply the TEGa and TMIn into the furnace, thereby forming a well layer. After supplying TEGa and TMIn for a predetermined time, the valve was switched again to stop the supply of TEGa and TMIn, and the growth of the In _0.08 Ga _0.92 N well layer was completed. At this point, an In _0.08 Ga _0.92 N layer having a thickness of 3 nm was formed. After the growth of the In _0.08 Ga _0.92 N well layer, the setting of the TEGa supply amount was changed. Subsequently, the supply of TEGa and SiH ₄ was resumed, and the formation of the second barrier layer was started.

Such a procedure was repeated five times to form five Si-doped GaN barrier layers and five In _0.08 Ga _0.92 N well layers. In these well layer and barrier layer manufacturing steps, the barrier layer A is formed at 720 ° C., and then the temperature is raised to 920 ° C. in order to form the barrier layer B. Suspended layer growth.

After forming the fifth In _0.08 Ga _0.92 N well layer, the sixth barrier layer was formed. In the formation of the sixth barrier layer, after the supply of SiH ₄ was restarted and the thin barrier layer A made of Si-doped GaN was formed, the supply of TEGa and SiH _{4 into} the furnace was continued, The substrate temperature was raised to 920 ° C., and the barrier layer B was grown for a specified time at the substrate temperature of 920 ° C. as it was. After the growth of the barrier layer B, the supply of TEGa and SiH _{4 in} the furnace was stopped. Subsequently, the substrate temperature is lowered to 720 ° C., the supply of TEGa and SiH ₄ is started, the barrier layer C is grown, and then the valve is switched again to stop the supply of TEGa and SiH ₄ to grow the GaN barrier layer. Ended. As a result, a Si-doped GaN barrier layer having a total film thickness of 15 nm was formed of a three-layered barrier layer composed of A, B, and C.

Through the above procedure, a light emitting layer (4) having a multiple quantum well structure including a well layer (1st to 4th layer) having a non-uniform thickness and a well layer (5th layer) having a uniform thickness was formed. .
An Mg-doped p-type Al _0.05 Ga _0.95 N cladding layer (5c) was formed on the light-emitting layer (4) terminated with the Si-doped GaN barrier layer.

After the supply of TEGa and SiH ₄ was stopped and the growth of the Si-doped GaN barrier layer was completed, the temperature of the substrate was raised to 1000 ° C., the type of carrier gas was switched to hydrogen, and the pressure in the furnace was 15 kPa ( 150 mbar). After waiting for the pressure in the furnace to stabilize, the valves for TMGa, TMAl, and Cp ₂ Mg were switched to start supplying these raw materials into the furnace. Then, after growing for about 3 minutes, the supply of TEGa and TMAl was stopped, and the growth of the Mg-doped p-type Al _0.05 Ga _0.95 N cladding layer was stopped. As a result, an Mg-doped p-type Al _0.05 Ga _0.95 cladding layer having a thickness of 16 nm was formed.

An Mg-doped p-type Al _0.02 Ga _0.98 N contact layer (5b) was formed on the Mg-doped p-type Al _0.05 Ga _0.95 N cladding layer.

After the supply of TMGa, TMAl, and Cp ₂ Mg was stopped and the growth of the Mg-doped Al _0.05 Ga _0.95 N cladding layer was completed, the pressure in the furnace was changed to 20 kPa (200 mbar). After waiting for the pressure in the furnace to stabilize, the valves for TMGa, TMAl, and Cp ₂ Mg were switched to start supplying these raw materials into the furnace. The amount of Cp ₂ Mg to be circulated was examined in advance, and adjusted so that the hole concentration of the Mg-doped p-type Al _0.02 Ga _0.98 N contact layer was 8 × 10 ¹⁷ cm ⁻³ . Then, after growing for about 12 minutes, the supply of TMGa, TMAl, and Cp ₂ Mg was stopped, and the growth of the Mg-doped p-type Al _0.02 Ga _0.98 N contact layer was stopped. As a result, an Mg-doped p-type Al _0.02 Ga _0.98 N contact layer (5b) having a thickness of about 0.2 μm was formed.

After the growth of the Mg-doped p-type Al _0.02 Ga _0.98 N contact layer was completed, energization to the induction heater was stopped and the temperature of the substrate was lowered to room temperature over 20 minutes. During the temperature drop, the atmosphere in the reactor was composed only of nitrogen. Then, after confirming that the substrate temperature was lowered to room temperature, the produced gallium nitride compound semiconductor laminate was taken out into the atmosphere.

A gallium nitride-based compound semiconductor laminate for a semiconductor light emitting device was produced by the procedure as described above. Here, the Mg-doped p-type Al _0.02 Ga _0.98 N contact layer showed p-type without performing annealing treatment for activating p-type carriers.

  Next, a light-emitting diode, which is a kind of semiconductor light-emitting element, was manufactured using the gallium nitride compound semiconductor laminate.

  On the surface of the p-type AlGaN contact layer of the produced gallium nitride compound semiconductor laminate, a positive electrode (10) comprising a transparent electrode in which Au and NiO are laminated in order from the contact layer side by a method well known in the art, and on the positive electrode (10) A positive electrode bonding pad (11) in which Ti, Au, Al, and Au were laminated in this order was formed.

  Further, dry etching is performed on the gallium nitride compound semiconductor laminate to expose the negative electrode forming portion (15) of the highly Ge-doped n-GaN contact layer, and Ti and Al are laminated in that order from the contact layer side. Thus, a negative electrode (16) was produced. Through these operations, an electrode having a shape as shown in FIG. 3 was produced.

  Thus, about the gallium nitride compound semiconductor laminated body which formed the positive electrode and the negative electrode, the back surface of the sapphire substrate was ground and grind | polished, and it was set as the mirror-shaped surface. Thereafter, the gallium nitride compound semiconductor laminate was cut into 300 μm square chips to form chips. Further, the chip was placed on a lead frame and connected to the lead frame with a gold wire to obtain a light emitting diode.

  When a forward current was passed between the positive electrode and the negative electrode of the light emitting diode produced as described above, the forward voltage (drive voltage) at a current of 20 mA was 3.3V. The emission wavelength was 460 nm, and the emission output was 5.5 mW. Such characteristics of the light-emitting diode were obtained with no variation for light-emitting diodes fabricated from almost the entire surface of the fabricated gallium nitride compound semiconductor laminate.

  An aging test was conducted in which a current of 30 mA was passed through the light emitting element in the forward direction and the light emission output was measured at the start and after 100 hours. The deterioration rate of the light output at the start and after 100 hours was compared. Was as good as 5%.

  In addition, before and after energization for 100 hours at a current of 30 mA, the reverse voltage at a current of 10 μA was measured and compared. As a result, the rate of change of the reverse voltage was 0%.

  In addition, FIGS. 4 to 11 show examples of photographs of one of the obtained chips observed with a cross-sectional TEM at a magnification of 1,000,000 times. The observation was performed at 8 sites arranged at intervals of 20 μm on a certain cross section. The numbers of the well layers are 1 to 5 in the order of the numbers counted from the surface side (semiconductor side) of the nitride semiconductor multilayer structure. That is, the well layer 1 is located on the p-type layer side, and the well layer 5 is located on the n-type layer side. In the figure, A is a thick film part and B is a thin film part. 4 to FIG. 11, the maximum film thickness and the minimum film thickness of each well layer at that part are shown in a table for each part.

  The eight portions shown in FIGS. 4 to 11 are combined to obtain the maximum film thickness, minimum film thickness, average film thickness and maximum film thickness of each well layer and the ratio of the difference from the average value of the minimum film thickness. The results are shown in Table 1.

  From Table 1, it can be seen that the well layer 1 is a well layer having a uniform thickness because the range of the film thickness is ± 5.1% from the average film thickness and within 10%. The well layers 2 to 5 have thickness ranges of ± 28.0%, ± 24.0%, ± 31.9%, and ± 20.6% from the average thickness, all exceeding 10%. Thus, it can be seen that the well layer has a non-uniform thickness in the present invention. In the well layers 2 to 5, a portion thicker than the average film thickness is a thick film portion, and a thin portion is a thin film portion.

  4-11, the barrier layer was about 15 nm thick. The barrier layer completely filled in the difference in film thickness between the thin film portion and the thick film portion of the well layer.

  12 to 19 are TEM photographs obtained by observing the vicinity of the site in FIGS. 4 to 11 while changing the magnification to 200,000 times. In all the figures, it can be seen that the well layer 1 has a uniform thickness.

  In these TEM photographs, the width of the thick film portion and the width of the thin film portion of the well layers 2 to 5 were measured, and the distribution was evaluated. In addition, determination of the thick film part and thin film part in each well layer was performed based on the average thickness of each said well layer calculated | required from FIGS. The results are shown in Table 2. For example, in the well layer 2 in the TEM photograph of FIG. 12, from the left side of the field of view of the TEM photograph, the thick film portion has a width of 250 nm, the thin film portion has a width of 60 nm, and subsequently the thick film portion has a thickness of 105 nm. The thin film portion was 35 nm, followed by the thick film portion was 75 nm. In the table, the thick film portion (250 nm) -thin film portion (60 nm) -thick film portion (105 nm) -thin film portion (35 nm) -thick film portion ( 75nm).

  From this table, when the distribution state of the width of the thin film portion and the thick film portion of each well layer is determined, the thin film portion has a well layer 2 of 30 to 100 nm, a well layer 3 of 30 nm to 100 nm, a well layer 4 of 30 nm to 100 nm, The well layer 5 was 35-100 nm. In addition, the thick film portion was 20 to 450 nm for the well layer 2, 60 nm to 580 nm for the well layer 3, 60 nm to 580 nm for the well layer 4, and 65 to 600 nm for the well layer 5.

(Example 2)
Example 1 except that the supply amount of TEGa was changed so that the growth rate of the Si-doped GaN barrier layers A and B was 3 Å / min and the growth rate of the Si-doped GaN barrier layer C was 7 Å / min. Similarly, a group III nitride semiconductor light emitting device was produced.

  When the obtained light-emitting element was evaluated in the same manner as in Example 1, the forward voltage was 3.3 V when the forward current was 20 mA. Further, the central wavelength of emitted blue band light when a forward current of 20 mA was passed was 460 nm. The intensity of light emission measured using a general integrating sphere was 5.5 mW. Such characteristics of the light-emitting diode were obtained with no variation for light-emitting diodes fabricated from almost the entire surface of the fabricated gallium nitride compound semiconductor laminate.

  An aging test was conducted in which a current of 30 mA was passed through the light emitting element in the forward direction and the light emission output was measured at the start and after 100 hours. The deterioration rate of the light output at the start and after 100 hours was compared. Was 6%.

  In addition, before and after energization for 100 hours at a current of 30 mA, the reverse voltage at a current of 10 μA was measured and compared. As a result, the rate of change of the reverse voltage was 0%.

(Comparative example)
A group III nitride semiconductor light-emitting device was fabricated in the same manner as in Example 1 except that the amount of TEGa was changed so that the growth rate of the Si-doped GaN barrier layer (A, B, and C) was 12 Å / min. Produced.

  When the obtained light-emitting element was evaluated in the same manner as in Example 1, the forward voltage was 3.3 V when the forward current was 20 mA. Further, the central wavelength of emitted blue band light when a forward current of 20 mA was passed was 460 nm. The intensity of light emission measured using a general integrating sphere was 5.5 mW. Such characteristics of the light-emitting diode were obtained with no variation for light-emitting diodes fabricated from almost the entire surface of the fabricated gallium nitride compound semiconductor laminate.

  An aging test was conducted in which a current of 30 mA was passed through the light emitting element in the forward direction and the light emission output was measured at the start and after 100 hours. The deterioration rate of the light output at the start and after 100 hours was compared. Was 15%.

  In addition, before and after energization for 100 hours at a current of 30 mA, the reverse voltage at a current of 10 μA was measured and compared. As a result, the rate of change of the reverse voltage was 0%.

  A light-emitting element obtained by using the gallium nitride compound semiconductor laminate manufactured by the manufacturing method of the present invention has a low driving voltage and a high light-emitting output and has a small temporal change rate of the light-emitting output. As a lamp or the like, its industrial utility value is very large.

It is the schematic diagram which showed the cross section of the gallium nitride type compound semiconductor laminated body produced by the Example and the comparative example. It is the schematic diagram which showed the growth temperature profile of the gallium nitride type compound semiconductor in an Example and a comparative example. It is the schematic diagram which showed the electrode structure of the light emitting diode produced by the Example and the comparative example. 2 is an example of a cross-sectional TEM photograph of a gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Substrate 2 SP layer 3 n-type semiconductor layer 3a Underlayer 3b n-type contact layer 3c n-type cladding layer 4 light-emitting layer 5 p-type semiconductor layer 5b p-type contact layer 5c p-type cladding layer 10 positive electrode 11 positive electrode bonding pad 15 n-type Contact layer exposed surface 16 Negative electrode

Claims (19)

An n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are provided on a substrate, the light-emitting layer is disposed between the n-type semiconductor layer and the p-type semiconductor layer, and the light-emitting layers are alternately formed as well layers and barriers. A multi-quantum structure in which layers are stacked, and at least one of the well layers has a portion where the film thickness is not within ± 10% of the average film thickness, and the well layer closest to the p-type semiconductor layer is a film The gallium nitride is characterized in that when the gallium nitride compound semiconductor laminate having a thickness within ± 10% of the average film thickness is produced everywhere, the growth rate of the barrier layer is less than 10 Å / min. Of manufacturing a semiconductor compound semiconductor laminate. An n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are provided on a substrate, the light-emitting layer is disposed between the n-type semiconductor layer and the p-type semiconductor layer, and the light-emitting layers are alternately formed as well layers and barriers. A multi-quantum structure in which layers are stacked, and at least one of the well layers has a portion whose thickness is not within ± 10% of the average thickness, and the well layer closest to the n-type semiconductor layer is a film The gallium nitride is characterized in that when the gallium nitride compound semiconductor laminate having a thickness within ± 10% of the average film thickness is produced everywhere, the growth rate of the barrier layer is less than 10 Å / min. Of manufacturing a semiconductor compound semiconductor laminate.   The method for producing a gallium nitride-based compound semiconductor laminate according to claim 1 or 2, wherein the well layer having a uniform thickness has a thickness of 1.8 to 5 nm.   The method for producing a gallium nitride-based compound semiconductor laminate according to any one of claims 1 to 3, wherein the thickness of the thin film portion of the well layer having a non-uniform thickness is 2.7 nm or less.   The method for producing a gallium nitride-based compound semiconductor laminate according to any one of claims 1 to 4, wherein the multiple quantum well structure is a laminate of 3 to 10 times.   The gallium nitride compound semiconductor stack according to any one of claims 1 to 5, wherein the barrier layer is a gallium nitride compound semiconductor selected from GaN, AlGaN, and InGaN having a smaller In ratio than InGaN forming the well layer. Manufacturing method.   The method for producing a gallium nitride-based compound semiconductor laminate according to claim 6, wherein the barrier layer is GaN.   The method for producing a gallium nitride compound semiconductor laminate according to claim 1, wherein the barrier layer contains a dopant.   The dopant is at least one selected from the group consisting of C, Si, Ge, Sn, Pb, O, S, Se, Te, Po, Be, Mg, Ca, Sr, Ba, and Ra. Of manufacturing a gallium nitride compound semiconductor laminate. 10. The method for producing a gallium nitride-based compound semiconductor laminate according to claim 8, wherein the concentration of the dopant is 1 × 10 ¹⁷ cm ⁻³ to 1 × 10 ¹⁸ cm ⁻³ .   The method for producing a gallium nitride-based compound semiconductor laminate according to any one of claims 1 to 10, wherein the thickness of the barrier layer is 7 nm to 50 nm.   The method for producing a gallium nitride compound semiconductor laminate according to claim 11, wherein the thickness of the barrier layer is 14 nm or more.   The method for producing a gallium nitride-based compound semiconductor laminate according to any one of claims 1 to 12, wherein the well layer contains In.   The method for producing a gallium nitride-based compound semiconductor laminate according to claim 13, wherein a thin layer not containing In is present on at least the substrate-side surface of the barrier layer.   The method for producing a gallium nitride-based compound semiconductor laminate according to claim 1, wherein the barrier layer is grown at a plurality of growth temperatures.   The nitriding according to any one of claims 1 to 15, wherein after forming the well layer, a well layer having a non-uniform thickness is formed by decomposing or sublimating a part of the well layer. A method for producing a gallium compound semiconductor laminate.   The method for producing a gallium nitride-based compound semiconductor laminate according to claim 16, wherein the substrate temperature T1 when forming the well layer and the substrate temperature T2 when decomposing or sublimating a part of the well layer satisfy T1 ≦ T2.   The method for producing a gallium nitride-based compound semiconductor laminate according to claim 16 or 17, wherein the decomposition or sublimation of a part of the well layer is performed in an atmosphere containing a nitrogen source and not containing a group III metal source.   The method for producing a gallium nitride-based compound semiconductor laminate according to any one of claims 16 to 18, wherein a part of the well layer is decomposed or sublimated in a barrier layer forming step.