JP2007220745A - Manufacturing method of p-type group iii nitride semiconductor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a p-type group III nitride semiconductor which is useful to the manufacture of a reliable light emitting device of the group III nitride semiconductor having low drive voltage and also little time variation of forward voltage in 1 μA. <P>SOLUTION: In the manufacturing method of a p-type group III nitride semiconductor, when heat reduction is carried out after the end of growth of the group III nitride semiconductor containing p-type dopant, the supply of a source of nitrogen is stopped within 90 seconds from the end of growth while controlling so that X-ray locking curve half width of a surface (10-10) of this group III nitride semiconductor might be set to 400 arcsecs or less. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a group III nitride p-type semiconductor useful for manufacturing a light-emitting element that emits high-power blue, green, or ultraviolet light.

  In recent years, Group III nitride semiconductor materials have attracted attention as semiconductor materials for light-emitting elements that emit light of short wavelengths. In general, group III nitride semiconductors use various oxide crystals such as sapphire single crystals, silicon carbide single crystals, group III-V compound semiconductor single crystals, etc. as substrates, and metalorganic vapor phase chemical reaction methods ( MOCVD method), molecular beam epitaxy method (MBE method), hydride vapor phase epitaxy method (HVPE method) or the like.

  At present, the most widely used crystal growth method at the industrial level is a method in which sapphire, SiC, GaN, AlN, or the like is used as a substrate, and a metal organic chemical vapor deposition method (MOCVD method) is formed thereon. The n-type layer, the light-emitting layer, and the p-type layer are grown in a temperature range of about 700 ° C. to 1200 ° C. using a group III organometallic compound and a group V source gas in a reaction tube in which the above-described substrate is installed. After the growth of each semiconductor layer, a light-emitting element can be obtained by forming a negative electrode on the substrate or n-type layer and forming a positive electrode on the p-type layer.

  For example, in Japanese Patent No. 3063756, a multilayer film having different n-type impurity doping amounts is used as an n-type cladding layer to improve the reliability of a light-emitting element such as an improvement in electrostatic breakdown voltage, or p-type impurities are mutually different. A multilayer film with different doping amounts is used as the p-type cladding layer. In Japanese Patent Laid-Open No. 9-31416, the total film thickness of the p-type layer is set to 10 to 150 nm, thereby suppressing crystal deterioration of the light emitting layer and improving element reliability. However, in these methods, there is a possibility that the process becomes complicated or a problem occurs in the crystallinity of the p-type layer.

  In order to analyze the crystallinity (particularly dislocation density) of the gallium nitride film, it is effective to analyze the half width of the X-ray rocking curve (XRC) of the (10-10) plane. J. et al. Appl. Phys. Vol. 42 (2003) L1-L3. However, there is only a report example with a gallium nitride single film, and there is no report example with a laminated film of a light emitting diode structure. In short, no specific study has been made so far on improving the crystallinity of the p-type layer and improving the device reliability by a method for producing the p-type layer.

  In the light emitting element, when the applied voltage in the low current region (for example, forward voltage at 1 μA) is low, or when the value changes with time due to aging, the emission intensity decreases or the electrostatic withstand voltage decreases. It is generally known that reliability is lowered due to a decrease. The electronic industry, which is a user of a light emitting device, usually describes the minimum value of the forward voltage at 1 μA in the specification. However, there has been no report on the technology related to the improvement of the applied voltage in the low current region.

Japanese Patent No. 3063756 JP-A-9-31416 Jpn. J. et al. Appl. Phys. Vol. 42 (2003) L1-L3

  An object of the present invention is to manufacture a Group III nitride semiconductor light-emitting device having a low forward voltage (driving voltage) at 20 mA and a small amount of temporal change in the forward voltage at 1 μA and high reliability. It is to provide a method for producing a useful group III nitride p-type semiconductor.

The present invention provides the following inventions.
(1) In the method for producing a group III nitride p-type semiconductor, when the temperature is lowered after the growth of a group III nitride semiconductor containing a p-type dopant, X-rays on the (10-10) plane of the group III nitride semiconductor A method for producing a group III nitride p-type semiconductor, characterized in that the supply of a nitrogen source is stopped within 90 seconds from the end of growth under the condition that the rocking curve half-width is 400 arcsec or less.

  (2) The manufacturing method according to the above item 1, wherein the temperature at the end of semiconductor growth is 900 ° C. or higher and 1050 ° C. or lower.

(3) The production method according to item 1 or 2, wherein the nitrogen source is ammonia gas.
(4) The manufacturing method according to any one of the above items 1 to 3, wherein the carrier gas during semiconductor growth contains hydrogen gas.

  (5) The manufacturing method according to any one of (1) to (4), wherein the carrier gas after completion of semiconductor growth is an inert gas.

  (6) The manufacturing method according to any one of (1) to (5) above, wherein a flow rate of the nitrogen source after completion of the semiconductor growth is 0.001 to 10% in the total gas volume.

  (7) The manufacturing method according to any one of (1) to (6) above, wherein the time from the end of growth until the supply of the nitrogen source is stopped is 25 seconds or more.

(8) The group III nitride semiconductor according to any one of the above items 1 to 7, wherein the group III nitride semiconductor is Al _x In _y Ga _1-xy N (x = 0 to 0.5, y = 0 to 0.1). Production method.

  (9) A group III nitride p-type semiconductor produced by the production method according to any one of 1 to 8 above.

  (10) A group III nitride semiconductor light-emitting device comprising the group III nitride p-type semiconductor according to item 9 above.

(11) A lamp comprising the group III nitride semiconductor light-emitting device as described in 10 above.
(12) An electronic device in which the lamp described in the above item 11 is incorporated.
(13) A machine device in which the electronic device described in the above item 12 is incorporated.

  According to the Group III nitride p-type semiconductor manufacturing method of the present invention, the crystallinity of the p-type semiconductor layer can be kept good, the forward voltage (driving voltage) at 20 mA is low, and at 1 μA. It is possible to manufacture a group III nitride semiconductor light emitting device with a small amount of change in the forward voltage with time and high reliability.

  Group III nitride semiconductors in group III nitride p-type semiconductors to which the manufacturing method of the present invention can be applied include GaN, binary mixed crystals such as InN and AlN, ternary mixed crystals such as InGaN and AlGaN, All quaternary mixed crystals such as InAlGaN are included. Further, in the present invention, a ternary mixed crystal such as GaPN or GaNAs containing a group V element other than nitrogen, a quaternary mixed crystal such as InGaPN, InGaAsN, AlGaPN, or AlGaAsN containing In or Al, further In, A ternary mixed crystal such as AlInGaPN including both Al, AlInGaAsN, AlGaPAsN including both P and As, and InGaPAsN, and a ternary mixed crystal of AlInGaPAsN including all elements are also included in the group III nitride semiconductor.

The present invention is a ternary mixed crystal such as GaN, InN and AlN, a ternary mixed crystal such as InGaN and AlGaN, and a quaternary system such as InAlGaN, which are relatively easy to produce and have a low risk of decomposition. It can be particularly preferably used for a group III nitride semiconductor containing only N as a V group such as a mixed crystal. When represented by the general formula Al _x In _y Ga _1-xy N (0 ≦ x + y ≦ 1), x is preferably in the range of 0 to 0.5, and y is preferably in the range of 0 to 0.1.

In addition, p-type dopants that can be used in the present invention include Mg, Ca, Zn, Cd, Hg, and the like that are reported or expected to be doped into a group III nitride semiconductor and exhibit p-type conductivity. . Among these, Mg having a high activation rate by heat treatment is particularly preferable as the p-type dopant. The amount of the dopant is preferably 1 × 10 ¹⁸ to 1 × 10 ²¹ cm ⁻³ . If it is 1 × 10 ¹⁸ cm ⁻³ or less, the emission intensity is reduced. On the other hand, if it exceeds 1 × 10 ²¹ cm ⁻³ , the crystallinity is deteriorated, which is not preferable. More preferably, it is 1 * 10 < ¹⁹ > -5 * 10 < ²⁰ > cm < ^-3 >.

  The growth method of the group III nitride p-type semiconductor to which the present invention is applied is not particularly limited, and MOCVD (metal organic chemical vapor deposition), HVPE (hydride vapor deposition), MBE (molecular beam epitaxy), etc. It can be applied to all methods known to grow group III nitride semiconductors. A preferred growth method is the MOCVD method from the viewpoint of film thickness controllability and mass productivity.

In the MOCVD method, hydrogen gas (H ₂ ) or nitrogen gas (N ₂ ) is used as a carrier gas, trimethyl gallium (TMGa) or triethyl gallium (TEGa) is used as a Ga source that is a group III material, and trimethyl aluminum (TMAl) is used as an Al source. ) Or triethylaluminum (TEAl), trimethylindium (TMIn) or triethylindium (TEIn) as the In source, and ammonia (NH ₃ ) or hydrazine (N ₂ H ₄ ) as the nitrogen source, respectively. As the p-type dopant, for example, biscyclopentadienyl magnesium (Cp ₂ Mg) or bisethylcyclopentadienyl magnesium ((EtCp) ₂ Mg) is used as the Mg raw material, and dimethyl zinc (Zn (CH ₃ CH ₃ ) is used as the Zn raw material. ) Use ₂ ) respectively.

The effect of the present invention is great when H ₂ is contained as a carrier gas and / or when NH ₃ is used as a nitrogen source.

  After the growth of the group III nitride semiconductor containing the p-type dopant, the temperature is lowered to room temperature and the semiconductor stack is taken out from the growth apparatus. In addition, it is preferable to switch the carrier gas to an inert gas containing no hydrogen gas at the same temperature as the growth temperature. If the circulation of hydrogen gas is allowed for about 1 minute or more, which is allowed as a time lag required for switching, the drive voltage is unlikely to be sufficiently low. Nitrogen gas is preferable as the inert gas for replacing the carrier gas, but argon, helium, or a mixture thereof can also be used.

  Moreover, it is preferable to reduce the flow rate of the nitrogen source simultaneously with the switching of the carrier gas. The supply amount of the nitrogen source at the time of growth is usually 10% to 50% of the volume of the total gas amount, but the amount of the nitrogen source after lowering the nitrogen source is 5% or less of the volume of the total gas amount. Is desirable. More desirably, it is 1% or less. If the amount of nitrogen source is too large, the drive voltage of the element will not decrease as expected. At this time, if the flow rate of the nitrogen source is also reduced to 0, it causes desorption of nitrogen from the crystal forming the p-type layer, leading to a decrease in Vr of the element. The amount of nitrogen source is preferably 0.001% or more of the total gas volume. More desirably, it is 0.01% or more.

  Further, it is desirable to start the temperature decrease immediately after changing the flow rate of the nitrogen source and switching the carrier gas. When the temperature holding time after completion of the growth is long, not only is the crystallinity lowered, but thermal damage to the light emitting layer is accumulated, and the light emission intensity is lowered.

  In addition, it is necessary to perform an operation for completely reducing the flow rate of the nitrogen source once reduced to 0 in the process of lowering the temperature. In an element manufactured by lowering the temperature to a low temperature such as 300 ° C. without stopping the flow of the nitrogen source, a phenomenon occurs in which the driving voltage of the element increases due to heat applied during bonding.

  The time until the flow rate of the nitrogen source is reduced to 0 during the temperature drop is preferably 25 seconds or more and 90 seconds or less. When the time is less than 25 seconds, the crystallinity of the semiconductor laminated film is lowered, so that the temporal change of the forward voltage at 1 μA of the light emitting element is increased and the reliability is lowered. In addition, if it exceeds 90 seconds, the driving voltage of the element at 20 mA is increased.

  In the present invention, when the temperature is lowered after the growth of the group III nitride p-type semiconductor, the X-ray rocking curve (XRC) half width of the (10-10) plane of the group III nitride p-type semiconductor is 400 arcsec or less. It is important to cool down under conditions. When the XRC half width is larger than 400 secsec, the temporal change of the forward voltage at 1 μA of the light emitting element becomes large, and the reliability of the light emitting element is lowered. Preferably, the temperature is lowered under a condition of 350 arcsec or less. The full width at half maximum of XRC can be examined by X-ray measurement of the semiconductor layer after film formation.

  FIG. 5 is a schematic diagram illustrating a method for measuring a (10-10) plane X-ray rocking curve. When a group III nitride semiconductor multilayer is stacked on a sapphire C-plane substrate, the (10-10) plane of the group III nitride p-type semiconductor is perpendicular to the surface of the multilayer film as shown in FIG. Since X-rays cannot be detected when X-rays are incident completely at a diffraction angle, the XRC half-value width can be measured by detecting the diffraction peak by making the X-rays incident with the turning angle α set to 1 ° as shown in FIG. It becomes possible.

  The XRC half width of the (10-10) plane of the group III nitride p-type semiconductor is affected by the temperature during the growth of the group III nitride p-type semiconductor. In order to set the XRC half-width to 400 arcsec or less, the growth temperature of the p-type layer is preferably 850 ° C. or higher. More preferably, it is 900 degreeC or more and 1050 degrees C or less.

  The Al composition of the group III nitride p-type semiconductor also greatly affects the XRC half-value width of the (10-10) plane. In order to reduce the XRC half-value width to 400 arcsec or less, the Al composition of the group III nitride p-type semiconductor is preferably 20% or less with respect to all group III elements. More preferably, it is 5% or less.

  Furthermore, the XRC half-value width of the (10-10) plane of the group III nitride p-type semiconductor is greatly affected by the flow rate of the nitrogen source after the growth of the group III nitride p-type semiconductor is completed. In order to reduce the XRC half width to 400 arcsec or less, it is desirable that the amount of the nitrogen source is 0.001% or more of the total gas volume when the flow rate of the nitrogen source is reduced. More desirably, it is 0.01% or more.

  In addition, the time until the nitrogen source is stopped is also greatly affected, and in order to reduce the XRC half-value width to 400 arcsec or less, the time until the nitrogen source is stopped after the growth of the group III nitride p-type semiconductor is completed. It is preferably 25 seconds or longer. More preferably, it is 30 seconds or more.

  When the XRC half-value width of the (10-10) plane of the group III nitride p-type semiconductor exceeds 400 arcsec, disorder occurs in the atomic arrangement of the group III nitride p-type semiconductor, and the crystallinity of the group III nitride p-type semiconductor is reduced. It became clear as a result of cross-sectional TEM observation of the p-type semiconductor. This deterioration of the crystallinity of the p-type semiconductor seems to cause a temporal change in the forward voltage at 1 μA.

  The method for manufacturing a group III nitride p-type semiconductor of the present invention can be used for manufacturing various semiconductor elements. For example, in addition to semiconductor light emitting devices such as light emitting diodes and laser diodes, any semiconductor device such as various high-speed transistors and light receiving devices that require group III nitride p-type semiconductors can be manufactured. It is possible to use. Among these various semiconductor elements, it can be particularly suitably used for the production of a semiconductor light emitting element that requires formation of a pn junction and formation of a positive electrode with good characteristics.

  FIG. 1 is a diagram schematically showing a cross section of a group III nitride semiconductor light-emitting device manufactured using the method for manufacturing a group III nitride p-type semiconductor of the present invention. An n-type semiconductor layer 3 of group III nitride, a light emitting layer 4 and a p-type semiconductor layer 5 are sequentially laminated on the substrate 1 with a buffer layer 2 as necessary, and a negative electrode 6 is formed on the n-type semiconductor layer 3. However, the positive electrode 7 is provided on the p-type semiconductor layer 5.

  For the substrate 1, any conventionally known material such as sapphire, SiC, GaN, AlN, Si, ZnO or other oxide substrate can be used without any limitation. Sapphire is preferable.

  The buffer layer 2 is provided as necessary in order to adjust the lattice mismatch between the substrate and the n-type semiconductor layer 3 grown thereon. Conventionally known buffer layer technology is used as needed. For example, a lattice-mismatched crystal epitaxial growth technique called an SP (Seeding Process) method disclosed in Japanese Patent Application Laid-Open No. 2003-243302 is used. In particular, the SP method for producing an AlN crystal film at such a high temperature that a GaN-based crystal can be produced is an excellent lattice-mismatched crystal epitaxial growth technique from the viewpoint of improving productivity.

  The composition and structure of the n-type semiconductor layer 3 may be set to a desired composition and structure using known techniques well known in this technical field. Usually, the n-type semiconductor layer is composed of a contact layer capable of obtaining good ohmic contact with the negative electrode and a cladding layer having a larger band gap energy than the light emitting layer. The negative electrode 6 may also have a desired composition and structure using known techniques well known in this technical field.

  The light emitting layer 4 can also use conventionally well-known composition and structures, such as a single quantum well structure (SQW) and a multiple quantum well structure (MQW), without any limitation. In the case of a multi-quantum well structure, a multi-quantum well structure including a well layer with a non-uniform thickness and a well layer with a uniform thickness is preferable because the driving voltage of the device is reduced and the emission intensity is high.

  The p-type semiconductor layer 5 is formed by the manufacturing method of the present invention. About the composition and structure, what is necessary is just to make it a desired composition and structure using the well-known technique well known in this technical field. Usually, like an n-type semiconductor layer, it consists of a cladding layer having a band gap energy larger than that of a light emitting layer and a contact layer capable of obtaining good ohmic contact with the positive electrode.

  As a material of the positive electrode 7 brought into contact with the p-type layer produced by the method of the present invention, metals such as Au, Ni, Co, Cu, Pd, Pt, Rh, Os, Ir, and Ru can be used. Moreover, transparent oxides, such as ITO, NiO, CoO, can also be used. As a form using a transparent oxide, you may include in the said metal film as a lump, and you may form in a layer form and overlap with the said metal film. Of course, a transparent oxide can be used alone. As the transparent oxide, ITO is preferable from the viewpoints of transparency and conductivity.

  The positive electrode may be formed so as to cover almost the entire surface, or may be formed in a lattice shape or a tree shape with a gap. After forming the positive electrode, thermal annealing may be performed for the purpose of alloying or transparency, but it may not be performed.

  As a form of the element, a so-called face-up (FU) type in which light emission is extracted from the semiconductor side using a transparent positive electrode, or so-called flip chip (FC) in which light emission is extracted from the substrate side using a reflection type positive electrode. It is good as a type.

  The group III nitride semiconductor light emitting device manufactured using the manufacturing method of the present invention can be formed into a lamp by providing a transparent cover by means well known in the art, for example. In addition, a white lamp can be manufactured by combining the group III nitride semiconductor light emitting device of the present invention and a cover having a phosphor.

  In addition, since a lamp manufactured from the group III nitride semiconductor light emitting device of the present invention has a low driving voltage and high reliability, electronic devices such as mobile phones, displays, and panels incorporating the lamp manufactured by this technology A mechanical device such as an automobile, a computer, or a game machine incorporating the electronic device can be driven with low power, has high reliability, and can realize high characteristics. In particular, the battery-powered devices such as mobile phones, game machines, toys, and automobile parts exhibit power saving effects.

  EXAMPLES Next, although an Example demonstrates this invention still in detail, this invention is not limited only to these Examples.

Example 1
FIG. 2 is a schematic view showing a cross section of a group III nitride semiconductor laminate for a semiconductor light emitting device produced in this example (however, the well layer and the barrier layer of the light emitting layer are omitted). As shown in FIG. 2, an SP layer (buffer layer) made of AlN is stacked on a sapphire substrate having a c-plane by an epitaxial growth method of lattice mismatched crystals, and an undoped GaN having a thickness of 8 μm is sequentially formed on the SP layer. Underlayer, high Ge-doped GaN contact layer 2 μm thick with an electron concentration of about 1 × 10 ¹⁹ cm ⁻³ , 20 nm thick In _0.02 Ga _0.98 N cladding layer with an electron concentration of 1 × 10 ¹⁸ cm ⁻³ 6 layers of 15 nm thick 3 × 10 ¹⁷ cm ⁻³ Si-doped GaN barrier layers and 5 layers of 3 nm thick non-doped In _0.08 Ga _0.92 N thin layers alternately A light emitting layer having a multi-quantum well structure, a Mg-doped p-type Al _0.05 Ga _0.95 N cladding layer having a thickness of 16 nm, and a 0.2 μm-thick Mg doping layer having a hole concentration of 8 × 10 ¹⁷ cm ⁻³ p-type Al _{0.0 In} this structure, ₂ Ga _0.98 N contact layers are sequentially stacked.

The production of the group III nitride semiconductor laminate was performed by the following procedure using the MOCVD method.
First, the sapphire C-plane substrate was introduced into a stainless steel reactor capable of processing a large number of substrates in a form in which a carbon susceptor is heated with a high frequency induction heater. The susceptor has a mechanism for rotating itself and a mechanism for rotating the substrate. The sapphire substrate was placed on a carbon susceptor for heating in a glove box substituted with nitrogen gas. After introducing the sample, the reaction furnace was purged with nitrogen gas.

  After flowing nitrogen gas for 8 minutes, the induction heater was activated, the substrate temperature was raised to 600 ° C. over 10 minutes, and the pressure in the furnace was set to 15 kPa (150 mbar). While maintaining the substrate temperature at 600 ° C., the substrate surface was left for 2 minutes while flowing hydrogen gas and nitrogen gas to perform thermal cleaning of the substrate surface.

  After completion of the thermal cleaning, the nitrogen carrier gas valve was closed and the gas supply into the reactor was hydrogen only.

  After switching the carrier gas, the temperature of the substrate was raised to 1150 ° C. After confirming that the temperature was stabilized at 1150 ° C., the valve of TMAl piping was switched, and a gas containing TMAl vapor was supplied into the reactor, which was decomposed by the deposits attached to the inner wall of the reactor. The process of reacting with the generated N atoms to deposit AlN on the sapphire substrate was started.

  After the treatment for 7 minutes and 30 seconds, the valve of TMAl piping was switched, and the supply of gas containing TMAl vapor into the reactor was stopped. It waited for 4 minutes as it was, and waited for TMAl vapor | steam remaining in the furnace to be discharged | emitted completely. Subsequently, the valve of the ammonia gas pipe was switched to start supplying ammonia gas into the furnace.

  After 4 minutes, while continuing the circulation of ammonia, the temperature of the susceptor was lowered to 1040 ° C., and the pressure in the furnace was set to 40 kPa (400 mbar). While the susceptor temperature was lowered, the flow rate of the flow rate regulator of the TMGa pipe was adjusted.

After confirming that the substrate temperature reached 1040 ° C., wait for the temperature to stabilize, then switch the TMGa valve to start supplying TMGa into the furnace, and start undoped GaN growth for about 4 hours. The GaN layer was grown over the time.
In this way, an undoped GaN foundation layer having a film thickness of about 8 μm was formed.

Further, a high Ge-doped n-type GaN contact layer was grown on the undoped GaN underlayer. After the growth of the undoped GaN underlayer, the supply of TMGa into the furnace was stopped, and then the substrate temperature was raised to 1100 ° C. over 1 minute and held for 3 minutes to stabilize the temperature. Meanwhile, the flow rate of tetramethyl germanium (TMGe) was adjusted. The amount to be circulated was examined in advance and adjusted so that the electron concentration of the Ge-doped GaN contact layer was about 2 × 10 ¹⁹ cm ⁻³ . Ammonia continued to be fed into the furnace at the same flow rate.

After temperature stabilization for 3 minutes, a thin film of 10 nm thick Ge-doped n-type GaN and 10 nm thick undoped GaN is alternately grown in this order for 100 periods, and an n-type GaN contact layer of about 2 μm is grown. It was. Ge-doped GaN was produced by supplying TMGa and TMGe into the furnace, and an undoped GaN layer was produced by supplying TMGa. As a result, an n-type contact layer having an average carrier concentration of about 1 × 10 ¹⁹ cm ⁻³ was formed.

  After the last undoped GaN layer was grown, the TMGa valve was switched to stop the supply of TMGa into the furnace. While the ammonia was circulated as it was, the valve was switched to switch the carrier gas from hydrogen to nitrogen. Thereafter, the temperature of the substrate was lowered from 1100 ° C. to 730 ° C.

While waiting for the temperature inside the furnace to change, the supply amount of SiH ₄ was set. The amount to be circulated was examined in advance, and adjusted so that the electron concentration of the Si-doped InGaN cladding layer was 1 × 10 ¹⁸ cm ⁻³ . Ammonia continued to be fed into the furnace at the same flow rate.

Then, waiting for the state of the furnace to stabilize, simultaneously switching the valves TMIn and TEGa and SiH _4, feed was started to the furnace. Supply was continued for a predetermined time to form a Si-doped In _0.02 Ga _0.98 N clad layer having a thickness of 20 nm.

After the Si-doped In _0.02 Ga _0.98 N cladding layer was formed, the TMIn, TEGa, and SiH ₄ valves were switched to stop the supply of these raw materials. After stopping the raw material supply, the setting of the SiH ₄ supply amount was changed. The amount to be circulated was examined in advance and adjusted so that the electron concentration of the Si-doped GaN barrier layer was 3 × 10 ¹⁷ cm ⁻³ . Formation of the Si-doped GaN barrier layer was performed as follows.

The supply of TEGa and SiH _{4 into} the furnace is started with the substrate temperature kept at 730 ° C., a thin barrier layer A made of GaN doped with Si is formed for a predetermined time, and the supply of TEGa and SiH ₄ is stopped. did. Thereafter, the temperature of the susceptor was raised to 920 ° C. while the growth was interrupted. After the temperature is stabilized, the substrate temperature, the pressure in the furnace, the flow rate and type of ammonia gas and carrier gas remain unchanged, the TEGa and SiH ₄ valves are switched, and the supply of TEGa and SiH _{4 into} the furnace is resumed. The barrier layer B was grown for a specified time at the substrate temperature of 920 ° C. as it was. After the growth of the barrier layer B, the supply of TEGa and SiH _{4 in} the furnace was stopped. Subsequently, the susceptor temperature is lowered to 730 ° C., the supply of TEGa and SiH ₄ is started, the barrier layer C is grown, and then the valve is switched again to stop the supply of TEGa and SiH ₄ to grow the GaN barrier layer. Ended. As a result, a Si-doped GaN barrier layer having a total film thickness of 15 nm was formed of a three-layered barrier layer composed of A, B, and C.

After the growth of the GaN barrier layer is completed, the supply of TEGa and SiH ₄ is stopped for 30 seconds, and the setting of the supply amount of TEGa is changed to the flow rate studied in advance, and then the substrate temperature, furnace pressure, ammonia gas In addition, while maintaining the flow rate and type of the carrier gas, the TEGa and TMIn valves were switched to supply the TEGa and TMIn into the furnace, thereby forming a well layer. After supplying TEGa and TMIn for a predetermined time, the valve was switched again to stop the supply of TEGa and TMIn, and the growth of the In _0.08 Ga _0.92 N well layer was completed. At this point, an In _0.08 Ga _0.92 N layer having a thickness of 3 nm was formed. After the growth of the In _0.08 Ga _0.92 N well layer, the setting of the TEGa supply amount was changed. Subsequently, the supply of TEGa and SiH ₄ was resumed, and the formation of the second barrier layer was started.

Such a procedure was repeated five times to form five Si-doped GaN barrier layers and five In _0.08 Ga _0.92 N well layers. In these well layer and barrier layer manufacturing steps, after forming the barrier layer A at 730 ° C., the semiconductor layer is stopped by stopping the supply of the group III material in the step of raising the temperature to 920 ° C. to form the barrier layer B. Suspended layer growth.

After forming the fifth In _0.08 Ga _0.92 N well layer, the sixth barrier layer was formed. In the formation of the sixth barrier layer, after the supply of SiH ₄ was restarted and the thin barrier layer A made of Si-doped GaN was formed, the supply of TEGa and SiH _{4 into} the furnace was continued, The substrate temperature was raised to 920 ° C., and the barrier layer B was grown for a specified time at the substrate temperature of 920 ° C. as it was. After the growth of the barrier layer B, the supply of TEGa and SiH _{4 in} the furnace was stopped. Subsequently, the substrate temperature is lowered to 730 ° C., the supply of TEGa and SiH ₄ is started, the barrier layer C is grown, and then the valve is switched again to stop the supply of TEGa and SiH ₄ to grow the GaN barrier layer. Ended. As a result, a Si-doped GaN barrier layer having a total film thickness of 15 nm was formed of a three-layered barrier layer composed of A, B, and C.

  Through the above procedure, a light emitting layer having a multiple quantum well structure including a well layer having a non-uniform thickness (1st to 4th layers) and a well layer having a uniform thickness (5th layer) was formed.

An Mg-doped p-type Al _0.05 Ga _0.95 N clad layer was formed on the light emitting layer terminated with the Si-doped GaN barrier layer.
After the supply of TEGa and SiH ₄ was stopped and the growth of the Si-doped GaN barrier layer was completed, the temperature of the substrate was raised to 980 ° C., the type of carrier gas was switched to hydrogen, and the pressure in the furnace was 15 kPa ( 150 mbar). After waiting for the pressure in the furnace to stabilize, the valves for TMGa, TMAl, and Cp ₂ Mg were switched to start supplying these raw materials into the furnace. Then, after growing for about 3 minutes, the supply of TEGa and TMAl was stopped, and the growth of the Mg-doped p-type Al _0.05 Ga _0.95 N cladding layer was stopped. As a result, an Mg-doped p-type Al _0.05 Ga _0.95 cladding layer having a thickness of 16 nm was formed.

An Mg-doped p-type Al _0.02 Ga _0.98 N contact layer was formed on the Mg-doped p-type Al _0.05 Ga _0.95 N cladding layer.
After the supply of TMGa, TMAl, and Cp ₂ Mg is stopped and the growth of the Mg-doped Al _0.05 Ga _0.95 N cladding layer is completed, the supply amount of TMGa, TMAl, Cp ₂ Mg is maintained with the carrier gas and the pressure in the furnace unchanged. Made changes. Thereafter, from the state in which the ammonia gas was continuously supplied into the furnace, the valves of TMGa, TMAl, and Cp ₂ Mg were further switched to start supplying these raw materials into the furnace. The amount of Cp ₂ Mg to be circulated was examined in advance, and adjusted so that the hole concentration of the Mg-doped p-type Al _0.02 Ga _0.98 N contact layer was 8 × 10 ¹⁷ cm ⁻³ . Then, after growing for about 14 minutes, the supply of TMGa, TMAl, and Cp ₂ Mg was stopped, and the growth of the Mg-doped p-type Al _0.02 Ga _0.98 N contact layer was stopped. As a result, an Mg-doped p-type Al _0.02 Ga _0.98 N contact layer having a thickness of about 0.2 μm was formed.

After the vapor phase growth of the Mg-doped p-type Al _0.02 Ga _0.98 N contact layer was completed, power supply to the high-frequency induction heating heater used to heat the substrate was stopped immediately. At the same time, the carrier gas was switched from hydrogen to nitrogen to reduce the ammonia flow rate. Specifically, during the growth, the ammonia gas, which had been tightened by about 14% of the total circulation gas volume, was reduced to 0.2%.

  Furthermore, after maintaining for 45 seconds in this state, the circulation of ammonia was stopped. FIG. 4 shows a schematic diagram of this cooling process. Hereinafter, after the growth of the Mg-doped p-type AlGaN contact layer, the time from when the ammonia supply amount is reduced to when the supply of ammonia is stopped is defined as t.

In this state, it was confirmed that the substrate temperature was lowered to room temperature, and the manufactured group III nitride semiconductor laminate was taken out into the atmosphere.
A group III nitride semiconductor laminate for a semiconductor light emitting device was produced by the procedure as described above. Here, the Mg-doped p-type Al _0.02 Ga _0.98 N contact layer showed p-type without performing annealing treatment for activating p-type carriers.

Next, a light-emitting diode, which is a kind of semiconductor light-emitting element, was produced using the above group III nitride semiconductor laminate.
An LED was fabricated using the fabricated group III nitride semiconductor laminate. First, general dry etching was performed on a region where a negative electrode (n-type ohmic electrode) is to be formed, and the surface of the Ge-doped GaN layer was exposed only in that region. On the exposed surface portion, an n-type ohmic electrode formed by stacking titanium (Ti) / aluminum (Al) was formed. A positive electrode (p-type ohmic electrode) made of ITO having a thickness of 350 nm was formed on substantially the entire surface of the p-type contact layer. Further, a positive electrode bonding pad in which Ti, Au, Al, and Au were laminated in this order on the p-type ohmic electrode was formed (Ti is the ohmic electrode side). Through these operations, an electrode having a shape as shown in FIG. 3 was produced.

  Thus, about the group III nitride semiconductor laminated body which formed the positive electrode and the negative electrode, the back surface of the sapphire substrate was ground and grind | polished, and it was set as the mirror-shaped surface. Thereafter, the group III nitride semiconductor laminate was cut into 350 μm square chips to form chips. Further, the chip was placed on a lead frame and connected to the lead frame with a gold wire to obtain a light emitting diode.

  When a forward current was passed between the positive electrode and the negative electrode of the light emitting diode fabricated as described above, the forward voltage (drive voltage) at a current of 20 mA was 3.42 V, and the forward voltage at a current of 1 μA was 2.4 V. It was. The emission wavelength was 460 nm, and the emission output at an applied current of 20 mA was 10.5 mW. Such characteristics of the light-emitting diode were obtained with no variation for light-emitting diodes manufactured from almost the entire surface of the manufactured group III nitride semiconductor laminate.

  An aging test was conducted in which a current of 30 mA was passed through the light emitting element in the forward direction and the forward voltage at a current of 1 μA was measured at the start and after 100 hours. The rate of change of the forward voltage at a current of 1 μA at the start and after 100 hours was measured. As a result of comparison, the voltage change rate was good at -4.2%.

Moreover, the X-ray rocking curve (XRC) of the diffraction surface of the (10-10) plane of the group III nitride semiconductor laminate was measured, and the half width of the diffraction peak was analyzed.
FIG. 5 is a schematic diagram illustrating a method for measuring a (10-10) plane X-ray rocking curve. Since the group III nitride semiconductor laminate is laminated on the sapphire C-plane substrate, the (10-10) plane is perpendicular to the surface of the laminate film as shown in FIG. When X-rays are incident completely at a diffraction angle, the diffracted X-rays can no longer be detected. Therefore, as shown in FIG.
The resulting diffraction peak half-width of the (10-10) plane was 310 arcsec.

(Examples 2 to 5 and Comparative Examples 1 and 2)
After the growth of the Mg-doped p-type AlGaN contact layer is completed, the time t from when the ammonia supply amount is reduced to when the ammonia supply is stopped is changed by changing the time when the ammonia supply is stopped. Then, a light emitting diode was produced in the same manner as in Example 1, and the obtained light emitting diode was evaluated in the same manner as in Example 1.

Table 1 shows the temperature conditions and evaluation results of the examples and comparative examples. Table 1 also shows the results of Example 1.

As is apparent from Table 1, the forward voltage at 1 μA is obtained when the time t from when the ammonia supply amount is reduced to when ammonia supply is stopped is 25 seconds or longer after the growth of the Mg-doped p-type AlGaN contact layer is completed. Of the XRC (10-10) plane is further reduced.
Further, at t = 180 seconds shown in Comparative Example 2, the driving voltage at 20 mA is as high as 3.5V.

  FIG. 6 shows a group III nitride semiconductor laminate produced a plurality of times under the conditions of Examples 1 to 5 and Comparative Examples 1 and 2, and its XRC (10-10) plane half width and group III nitride semiconductors thereof. The relationship of the rate of change of the forward voltage at 1 μA when a light emitting diode is produced by the same method as in Example 1 using a laminate is shown. From FIG. 6, it can be said that when the XRC (10-10) plane half-value width is smaller than 400 arcsec, the rate of change of the forward voltage at 1 μA is decreased and the reliability of the manufactured light-emitting diode is improved.

  Moreover, cross-sectional TEM observation of the p-type semiconductor of the group III nitride semiconductor laminated body produced in Example 1 and Comparative Example 1 was performed. 7 and 8 are cross-sectional TEM photographs of the p-type semiconductors of the group III nitride semiconductor laminates of Example 1 and Comparative Example 1, respectively. Distortion of the atomic lattice image is observed at the position indicated by the arrow in FIG. 8, and it can be seen that the p-type layer produced under the conditions of Comparative Example 1 has poor crystallinity. On the other hand, no distortion of the atomic lattice image is observed in the p-type semiconductor layer of the group III nitride semiconductor laminate produced in Example 1 of FIG. 7, and the crystallinity is good.

  The full width at half maximum of the XRC (10-10) plane of the p-type semiconductor layer of the group III nitride semiconductor stack of Example 1 is 310 arcsec, and the XRC (prc semiconductor layer of the group III nitride semiconductor stack of Comparative Example 1 is XRC ( 10-10) Since the half width of the plane is 420 arcsec, the above results show that when the XRC (10-10) plane half width is large, the atomic lattice arrangement of the p-type semiconductor layer is disturbed, and the crystallinity of the p-type semiconductor layer is reduced. It shows that it is decreasing.

  The light emitting device obtained by using the group III nitride p-type semiconductor manufactured by the manufacturing method of the present invention has a low forward voltage (driving voltage) at 20 mA and the forward voltage at 1 μA in terms of time. Since the rate of change is small, it can be said that it has high reliability. For example, as a lamp, its industrial utility value is very large.

It is the figure which showed typically the cross section of the group III nitride semiconductor light-emitting device manufactured using the manufacturing method of this invention. It is the schematic diagram which showed the cross section of the group III nitride semiconductor laminated body produced by the Example and the comparative example. It is the schematic diagram which showed the electrode structure of the light emitting diode produced by the Example and the comparative example. It is the schematic diagram which showed the growth temperature profile of the group III nitride p-type semiconductor in an Example and a comparative example. It is the schematic explaining the measuring method of the (10-10) plane X-ray rocking curve of a group III nitride p-type semiconductor. It is the figure which showed the relationship between the XRC (10-10) plane half value width of a group III nitride p-type semiconductor, and the rate of change of the forward voltage in 1 microampere. 2 is a cross-sectional TEM photograph of a p-type semiconductor layer of Example 1. 4 is a cross-sectional TEM photograph of a p-type semiconductor layer of Comparative Example 1.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Substrate 2 Buffer layer 3 N-type semiconductor layer 4 Light emitting layer 5 P-type semiconductor layer 6 Negative electrode 7 Positive electrode 10 LED
11 Semiconductor Stack 101 Substrate 102 AlN-SP Layer (Buffer Layer)
103 undoped GaN underlayer 104 n-type GaN contact layer 105 n-type InGaN clad layer 106 light emitting layer with multiple quantum well structure 107 p-type AlGaN clad layer 108 p-type AlGaN contact layer 109 negative electrode 110 positive electrode 110 positive electrode bonding pad 112 n-type GaN contact layer Exposed surface

Claims (13)

  In the method for producing a group III nitride p-type semiconductor, when the temperature is lowered after the growth of the group III nitride semiconductor containing the p-type dopant, the X-ray rocking curve half of the (10-10) plane of the group III nitride semiconductor is obtained. A method for producing a group III nitride p-type semiconductor, characterized in that the supply of a nitrogen source is stopped within 90 seconds from the end of growth under the condition that the value range is 400 arcsec or less.   The manufacturing method according to claim 1, wherein the temperature at the end of semiconductor growth is 900 ° C. or higher and 1050 ° C. or lower.   The production method according to claim 1 or 2, wherein the nitrogen source is ammonia gas.   The manufacturing method as described in any one of Claims 1-3 in which the carrier gas at the time of semiconductor growth contains hydrogen gas.   The manufacturing method according to claim 1, wherein the carrier gas after completion of semiconductor growth is an inert gas.   The manufacturing method according to any one of claims 1 to 5, wherein a flow rate of the nitrogen source after completion of semiconductor growth is 0.001 to 10% in a total gas volume.   The manufacturing method according to any one of claims 1 to 6, wherein the time from the end of growth to the stop of the supply of the nitrogen source is 25 seconds or more. Production according to any one of claims 1 to 7 III nitride semiconductor is _{Al x In y Ga 1-x} -y N (x = 0~0.5, y = 0~0.1) Method.   A group III nitride p-type semiconductor manufactured by the manufacturing method according to claim 1.   A group III nitride semiconductor light-emitting device comprising the group III nitride p-type semiconductor according to claim 9.   A lamp comprising the group III nitride semiconductor light-emitting device according to claim 10.   An electronic device in which the lamp according to claim 11 is incorporated.   A mechanical device in which the electronic device according to claim 12 is incorporated.