JP2005277401A - Gallium nitride-based compound semiconductor laminate and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a gallium nitride compound semiconductor laminate useful for manufacturing a gallium nitride compound semiconductor light-emitting device which operates at a low voltage while maintaining a satisfactory light emission output. <P>SOLUTION: This gallium nitride-based compound semiconductor laminate has on a substrate; an n-type layer, a light-emitting layer, and a p-type layer; and the light-emitting layer has a multiple quantum well structure in which a well layer and a barrier layer are alternately stacked repeatedly, and the light-emitting layer is sandwiched by the n-type layer and the p-type layer, wherein the well layer comprises a thick portion and a thin portion, and the barrier layer contains a dopant. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a gallium nitride compound semiconductor laminate useful for manufacturing a light-emitting element that emits high-power blue, green, or ultraviolet light, and a method for manufacturing the same.

  In recent years, nitride semiconductor materials have attracted attention as semiconductor materials for light-emitting elements that emit light of short wavelengths. In general, nitride semiconductors use various oxide crystals such as sapphire single crystals, silicon carbide single crystals, III-V group compound semiconductor single crystals, etc. as substrates, and metal organic vapor phase chemical reaction method (MOCVD method) thereon. ), Molecular beam epitaxy method (MBE method), hydride vapor phase epitaxy method (HVPE method), or the like.

  At present, the most widely used crystal growth method at the industrial level is a method in which sapphire, SiC, GaN, AlN, or the like is used as a substrate, and a metal organic chemical vapor deposition method (MOCVD method) is formed thereon. The n-type layer, the light-emitting layer, and the p-type layer are grown in a temperature range of about 700 ° C. to 1200 ° C. using a group III organometallic compound and a group V source gas in a reaction tube in which the above-described substrate is installed.

  After the growth of each semiconductor layer, a light-emitting element can be obtained by forming a negative electrode on the substrate or n-type layer and forming a positive electrode on the p-type layer.

  Conventional light-emitting layers use InGaN with a composition adjusted to adjust the emission wavelength, and have a double heterostructure sandwiched between layers with a higher band gap than InGaN, or a multiple quantum well structure that uses the quantum well effect. ing.

  In a gallium nitride compound semiconductor light emitting device having a light emitting layer having a multiple quantum well structure, a good output can be obtained when the thickness of the well layer is 2 to 3 nm. However, there is a problem that the drive voltage is high. On the other hand, when the thickness of the well layer is 2 nm or less, the driving voltage decreases, but a good output cannot be obtained.

Further, a quantum dot structure in which the following light emitting layer is formed in a dot shape has been proposed.
For example, Japanese Patent Application Laid-Open No. 10-79501 and Japanese Patent Application Laid-Open No. 11-354839 disclose a light-emitting element including a light-emitting layer having a quantum dot structure, and the quantum dot structure is formed by an anti-surfactant effect. However, in the quantum dot structure proposed here, the area covered by the light emitters (dots) is too small for the current flow area, so even if the luminous efficiency of each light emitter is improved, as a whole There is a problem that the light emission output with respect to the flowing current decreases. In these publications, the area covered by the dots is not stipulated, but the area of the gap is much larger than the area covered by the dots when calculated from the preferred values of the dot size and density described in the specification. Big.

Furthermore, a quantum box structure having a light emitter size larger than that of the quantum dot structure has been proposed.
For example, Japanese Patent Laid-Open No. 2001-68733 discloses a quantum box structure containing In, and the quantum well structure once formed is annealed in hydrogen to cause sublimation of the well layer, thereby forming a quantum box structure. The size of each light emitter is preferably 0.5 nm ≦ height ≦ 50 nm and 0.5 nm ≦ width ≦ 200 nm. The density of the illuminant is not specified, but from the published drawings, the area covered by the illuminant is equal to or larger than the area of the gap.

  In short, these techniques have a structure in which no dot or box is formed at all in a region where no quantum dot or quantum box is formed. Further, the area covered with the quantum box or the dots is very small, and the area of the gap region is wider.

  In such a structure in which the area covered by the dot or box, which is a light emitter, is small and the light emitter is not formed in an area that is not covered by the dot or box, the effect of lowering the driving voltage can be seen, but at the same time the light emission output is reduced. There is a problem that it causes a drop, and it is actually unusable.

  Furthermore, in Japanese Patent Application Laid-Open No. 2001-68733, after forming a normal quantum well structure, annealing is performed in hydrogen to decompose an InGaN crystal on threading dislocations to form a quantum box structure. However, annealing the quantum well structure in hydrogen causes a defect that the portion that should remain and become the quantum box structure induces In loss and shortens the emission wavelength.

  In addition, US Patent Application Publication No. US2003 / 0160229A1 discloses a multiple quantum well structure having well layers having periodically different film thicknesses. However, regarding a specific structure of the light-emitting element, only a structure in which a light-emitting layer having an undoped multiple quantum well structure is sandwiched between an Si-doped n-type layer and an Mg-doped p-type layer is disclosed.

Japanese Patent Laid-Open No. 10-79501 Japanese Patent Laid-Open No. 11-354839 JP 2001-68733 A US Patent Application Publication No. US2003 / 0160229A1

An object of the present invention is to provide a gallium nitride-based compound semiconductor laminate useful for manufacturing a gallium nitride-based compound semiconductor light-emitting device in which a driving voltage is reduced while maintaining a good light-emission output.
Another object of the present invention is to provide a method for forming a light emitting layer that does not induce a shorter wavelength of the generated light.

The present invention provides the following inventions.
(1) A multi-quantum structure having an n-type layer, a light-emitting layer, and a p-type layer on a substrate, wherein the light-emitting layer is alternately laminated with a well layer and a barrier layer, and the light-emitting layer is an n-type layer And a p-type layer sandwiched between gallium nitride compound semiconductors, wherein the well layer comprises a thick film part and a thin film part, and the barrier layer contains a dopant. Laminate.

(2) The gallium nitride compound semiconductor laminate according to the above item (1), wherein the well layer contains In.

(3) The gallium nitride compound semiconductor laminate according to the above item (2), wherein a thin layer not containing In exists on the upper surface of the well layer.

(4) The dopant is at least one selected from the group consisting of C, Si, Ge, Sn, Pb, O, S, Se, Te, Po, Be, Mg, Ca, Sr, Ba, and Ra. 4. The gallium nitride compound semiconductor laminate according to any one of the above items 1 to 3,

(5) The gallium nitride compound semiconductor laminate according to any one of (1) to (4) above, wherein the dopant concentration is 1 × 10 ¹⁷ cm ⁻³ to 1 × 10 ¹⁹ cm ⁻³ .

(6) The gallium nitride compound semiconductor laminate according to any one of the above items 1 to 5, wherein the thickness of the thick film portion is 1.5 nm to 5 nm.

(7) The gallium nitride-based compound semiconductor laminate according to any one of the above items 1 to 6, wherein the width of the thick film section in the laminate cross section is 10 nm or more (number average value).

(8) The gallium nitride compound semiconductor laminate as described in any one of (1) to (7) above, wherein the thickness of the thin film portion is less than 1.5 nm.

(9) The gallium nitride-based compound semiconductor laminate as described in any one of 1 to 8 above, wherein the width of the thin film portion in the laminate cross section is 100 nm or less (number average value).

(10) The gallium nitride compound semiconductor laminate as described in any one of (1) to (9) above, wherein a difference in film thickness between the thick film portion and the thin film portion is 1 nm to 3 nm.

(11) The gallium nitride compound semiconductor as described in any one of the above items 1 to 10, wherein the total width of the thick film sections in the laminate cross section is 30% or more of the width of the whole well layer Laminate.

(12) The gallium nitride compound semiconductor laminate as described in any one of (1) to (11) above, wherein the multiple quantum well structure is laminated 3 to 10 times.

(13) The barrier layer is a gallium nitride compound semiconductor selected from GaN, AlGaN, and InGaN having a smaller In ratio than InGaN forming the well layer. The gallium nitride compound semiconductor laminate described.

(14) The gallium nitride compound semiconductor laminate as described in (13) above, wherein the barrier layer is GaN.

(15) The gallium nitride compound semiconductor laminate according to any one of (1) to (14) above, wherein the barrier layer has a thickness of 7 nm to 50 nm.

(16) The gallium nitride compound semiconductor laminate as described in 15 above, wherein the thickness of the barrier layer is 14 nm or more.

(17) The gallium nitride compound semiconductor, wherein the gallium nitride compound semiconductor laminate according to any one of the above items 1 to 16 is provided with a negative electrode in the n-type layer and a positive electrode in the p-type layer. Light emitting element.

(18) The gallium nitride compound semiconductor light emitting device as described in the above item (17), wherein the device structure is a flip chip type.

(19) The gallium nitride-based compound semiconductor light-emitting element according to the above item 18, wherein the structure of the positive electrode is a reflection type.

(20) The gallium nitride-based compound semiconductor light-emitting element according to any one of the above items 17 to 19, wherein a driving voltage at a current of 20 mA is 2.9 V to 3.5 V.

(21) The gallium nitride-based compound semiconductor light-emitting element according to any one of the above 17 to 20, wherein a take-off voltage is 2.5 V or more and 3.2 V or less.

(22) A lamp using the gallium nitride-based compound semiconductor light-emitting device according to any one of items 17 to 21.

(23) A lamp comprising the gallium nitride-based compound semiconductor light-emitting element according to any one of items 17 to 21 and a phosphor.

(24) A multi-quantum structure having an n-type layer, a light-emitting layer, and a p-type layer on a substrate, wherein the light-emitting layer is alternately stacked with a well layer and a barrier layer, and the light-emitting layer is an n-type layer And a p-type layered gallium nitride compound semiconductor laminate, wherein the barrier layer is doped with a dopant to form a thick film portion and a thin film portion in the well layer Of manufacturing a semiconductor compound semiconductor laminate.

(25) The method for producing a gallium nitride-based compound semiconductor laminate as described in (24) above, wherein the dopant concentration is 1 × 10 ¹⁷ cm ⁻³ to 1 × 10 ¹⁹ cm ⁻³ .

(26) The step of forming a well layer includes a step of growing a gallium nitride compound semiconductor and a step of decomposing or sublimating a part of the gallium nitride compound semiconductor. The manufacturing method of the gallium nitride type compound semiconductor laminated body as described in any one.

(27) The method for producing a gallium nitride compound semiconductor laminate as described in 26 above, wherein the substrate temperature T1 in the growing step and the substrate temperature T2 in the decomposing or sublimating step are T1 ≦ T2.

(28) The method for producing a gallium nitride-based compound semiconductor laminate as described in (27) above, wherein T1 is in the range of 650 to 900 ° C.

(29) The method for producing a gallium nitride-based compound semiconductor laminate as described in 27 or 28 above, wherein T2 is in the range of 700 to 1000 ° C.

(30) The method for producing a gallium nitride-based compound semiconductor laminate as described in any one of (27) to (29) above, wherein the decomposition or sublimation step is performed while increasing the temperature from T1 to T2.

(31) The method for producing a gallium nitride compound semiconductor laminate according to the above item 30, wherein the temperature rise from T1 to T2 is performed at a rate of temperature rise of 1 ° C / min to 100 ° C / min.

(32) The method for producing a gallium nitride-based compound semiconductor laminate as described in (31) above, wherein the temperature rising rate is 5 ° C./min to 50 ° C./min.

(33) The method for producing a gallium nitride-based compound semiconductor laminate according to any one of the above items 30 to 32, wherein the temperature rise from T1 to T2 is performed in 30 seconds to 10 minutes.

(34) The method for producing a gallium nitride-based compound semiconductor laminate as described in (33) above, wherein the temperature is raised from T1 to T2 in 1 to 5 minutes.

(35) The method for producing a gallium nitride-based compound semiconductor laminate as described in any one of (27) to (34) above, wherein the barrier layer is grown at a temperature T2.

(36) The method for producing a gallium nitride-based compound semiconductor laminate as described in (35) above, wherein the barrier layer is grown at a temperature T2 and then further lowered to a temperature T3 and further grown.

(37) The method for producing a gallium nitride compound semiconductor laminate as described in 36 above, wherein T3 is the same temperature as T1.

(38) The above 26 to 37, wherein the growth step is in an atmosphere containing a nitrogen source and a group III metal source, and the decomposition or sublimation step is in an atmosphere containing a nitrogen source and no group III metal source. The manufacturing method of the gallium nitride type compound semiconductor laminated body as described in any one of claim | item.

  According to the present invention, the barrier layer of the multi-quantum structure forming the light emitting layer contains a dopant and the well layer is composed of a thick film part and a thin film part. According to the present invention, the driving voltage is reduced while maintaining a good output. A gallium nitride-based compound semiconductor light emitting device can be obtained.

  Further, by forming the thick film portion and the thin film portion of the well layer by doping the barrier layer with a dopant, it is possible to prevent the wavelength of light generated from the well layer from being shortened.

As a gallium nitride compound semiconductor constituting the n-type layer, the light-emitting layer, and the p-type layer of the gallium nitride compound semiconductor light emitting device, a general formula Al _x In _y Ga _1-xy N (0 ≦ x <1, 0 ≦ y < Semiconductors having various compositions represented by 1,0 ≦ x + y <1) are well known, and the gallium nitride compound semiconductor constituting the n-type layer, the light-emitting layer, and the p-type layer in the present invention can be represented by the general formula Al _x. Semiconductors having various compositions represented by In _y Ga _1-xy N (0 ≦ x <1, 0 ≦ y <1, 0 ≦ x + y <1) can be used without any limitation.

  As the substrate, sapphire, SiC, or the like can be used, and conventionally known substrates such as GaP, GaAs, Si, ZnO, GaN can be used without any limitation.

  In order to laminate a gallium nitride compound semiconductor on these substrates that are not in principle lattice-matched with a gallium nitride compound except for a GaN substrate, it is disclosed in Japanese Patent No. 3026087 and Japanese Patent Laid-Open No. 4-297003. It is possible to use a lattice mismatch crystal epitaxial growth technique called SP (Seeding Process) method disclosed in Japanese Patent Application Laid-Open No. 2003-243302 or the like. In particular, the SP method for producing an AlN crystal film at such a high temperature that a GaN-based crystal can be produced is an excellent lattice-mismatched crystal epitaxial growth technique from the viewpoint of improving productivity.

When a lattice mismatched crystal epitaxial growth technique such as a low-temperature buffer or SP method is used, the gallium nitride compound semiconductor as a base layer to be stacked thereon is undoped or lightly doped GaN of about 5 × 10 ¹⁷ cm ^−3. It is desirable to be. The film thickness of the underlayer is desirably 1 to 20 μm, and more preferably 5 to 15 μm.

  In the present invention, the well layer of the multiple quantum well structure forming the light emitting layer is composed of a thick film portion and a thin film portion. It is preferable that unevenness is formed on both the upper surface and the lower surface of the well layer to constitute a thick film portion and a thin film portion. In the present invention, the “thick film portion” means a portion whose thickness is equal to or greater than the average thickness of the well layer, and the “thin film portion” means a portion less than the average thickness of the well layer. The “average thickness of the well layer” is a thickness obtained by averaging the maximum thickness and the minimum thickness of the well layer. In addition, when there is a portion without a well layer in the thin film portion or when it is very thin, the “thick film portion” means a portion whose thickness is 1/2 or more of the maximum thickness of the well layer, “Thin film portion” means a portion of less than ½ of the maximum thickness of the well layer.

  The determination and measurement of the thick film portion and the thin film portion can be made by a cross-sectional TEM photograph of the gallium nitride compound semiconductor. For example, when the cross section is observed with a TEM photograph of 500,000 times to 2,000,000 times, the width and film thickness of the thin film portion and the thick film portion can be measured. FIG. 1 shows a cross-sectional TEM photograph of the sample prepared in Example 1 at a magnification of 2,000,000 times. In the figure, 1 is a well layer, and A, B and C are thin film portions. 2 is a barrier layer, 3 is an n-cladding layer, and 4 is a p-cladding layer. The width and film thickness of the thick film part and the thin film part can be calculated in consideration of the magnification. FIG. 2 is a cross-sectional TEM photograph at a magnification of 500,000 times, in which 1 is a well layer and D, E, F, and G are thin film portions. 2 is a barrier layer, 3 is an n-cladding layer, and 4 is a p-cladding layer. The width and film thickness can be calculated in consideration of the magnification.

  The thickness and width of the thick film portion or thin film portion are values obtained by observing a plurality of cross-sectional TEM photographs, for example, 10 points at intervals of 10 μm from adjacent sides and number-average.

  The thickness of the thick film portion is desirably about 1.5 nm to 5 nm. If the thickness of the thick film portion is outside this range, the light emission output is reduced. More desirably, a region of 1.5 nm to 3 nm is suitable. The width of the thick film part is desirably 10 to 5000 nm. Furthermore, 100-1000 nm is suitable.

  The ratio of the thick film portion is preferably 30 to 90% with respect to the entire well layer, and both reduction of the driving voltage and maintenance of the output can be realized. More preferably, the region covered with the thick film portion is larger than the region covered with the thin film portion, that is, the ratio of the thick film portion is 50% or more of the whole. The ratio between the thick film portion and the thin film portion can also be calculated based on the measured width value obtained from the cross-sectional TEM photograph.

The width of the thin film portion is preferably 1 to 100 nm. More preferably, 5-50 nm is suitable.
The thickness difference between the thick film portion and the thin film portion is preferably about 1 to 3 nm. The film thickness of the thin film portion is preferably less than 1.5 nm.

  The thin film portion may include a region where the film thickness is 0, that is, a region where no well layer is present, but it is preferable that the number of the regions is small because it causes a decrease in light emission output. 30% or less is preferable with respect to the whole well layer, 20% or less is more preferable, and 10% or less is particularly preferable. This ratio can be calculated based on the measured width value in the cross-sectional TEM photograph.

  The thick film portion and the thin film portion in the well layer are preferably formed by doping the barrier layer with a dopant. Examples of the dopant element include C, Si, Ge, Sn, Pb, O, S, Se, Te, Po, Be, Mg, Ca, Sr, Ba, and Ra. Of these, Si and Ge are preferable, and Si is most preferable.

The concentration of the dopant is preferably 1 × 10 ¹⁷ cm ⁻³ to 1 × 10 ¹⁹ cm ⁻³ . If it is less than 1 × 10 ¹⁷ cm ⁻³ , the well layer has a uniform thickness, and it is difficult to form a thick film portion and a thin film portion. If it exceeds 1 × 10 ¹⁹ cm ⁻³ , the well layer stops emitting light. More preferably, it is 2 × 10 ¹⁷ cm ^{−3 to} 5 × 10 ¹⁸ cm ⁻³ , and the thickness distribution of the well layer can be ideally controlled, and the DC resistance of the well layer can be lowered. Particularly preferred is 3 × 10 ¹⁷ cm ⁻³ to 2 × 10 ¹⁸ cm ⁻³ .

  The barrier layer may have a structure in which a plurality of layers are stacked. In that case, the layer in contact with the well layer preferably contains a dopant. The thickness is preferably at least 2.5 nm, more preferably 5 nm or more, and particularly preferably 7.5 nm or more. If the thickness of the dopant-containing barrier layer in contact with the well layer is less than 5 mm, it is difficult to form a thick film portion and a thin film portion in the well layer.

  When the barrier layer is formed under the above conditions, the well layer has a structure in which irregularities are formed on the lower surface and the upper surface. Combined with the effect of doping the barrier layer, strong emission intensity can be obtained, and the driving voltage can be further reduced. In addition, there is an effect of suppressing deterioration due to aging.

  The thickness of the barrier layer is preferably 7 nm or more, and more preferably 14 nm or more. If the thickness of the barrier layer is thin, the formation of the thick film portion and the thin film portion in the well layer is hindered, and the light emission efficiency and the aging characteristic are deteriorated. Moreover, when the film thickness is too thick, it causes an increase in driving voltage and a decrease in light emission. For this reason, it is preferable that the film thickness of a barrier layer is 50 nm or less.

  The number of laminations in the multiple quantum well structure is preferably about 3 to 10 times, and more preferably about 3 to 6 times. It is not necessary for all well layers to have a thick film portion and a thin film portion, and the dimensions and area ratios of the thick film portion and the thin film portion may be changed depending on each layer.

  The well layer is preferably a gallium nitride compound semiconductor containing In. The gallium nitride compound semiconductor containing In is a crystal system that tends to have a structure having a thick film portion and a thin film portion, and can emit light in the blue wavelength region with strong intensity.

  When the well layer is a gallium nitride compound semiconductor containing In, it is preferable to provide a thin layer not containing In on the surface of the well layer. The decomposition and sublimation of In in the well layer is suppressed, and the emission wavelength can be stably controlled, which is preferable.

  In addition to GaN and AlGaN, the barrier layer can be formed of InGaN having a smaller In ratio than InGaN constituting the well layer. Among these, GaN is preferable.

The n-type layer has a thickness of usually 1 to 10 μm, preferably about 2 to 5 μm, and is composed of an n-contact layer for forming a negative electrode and an n-cladding layer having a band gap larger than that of the light-emitting layer and in contact with the light-emitting layer. The n contact layer and the n clad layer may be combined. The n contact layer is preferably doped with Si or Ge at a high concentration. The n-type layer formed by doping these dopants preferably has a carrier concentration adjusted to about 5 × 10 ¹⁸ cm ⁻³ to 2 × 10 ¹⁹ cm ⁻³ .

  The n-clad layer can be formed of AlGaN, GaN, InGaN or the like, but it goes without saying that in the case of using InGaN, it is desirable that the composition be larger than the InGaN band gap of the light emitting layer. The carrier concentration of the n-clad layer may be the same as that of the n-contact layer, or may be large or small. In order to improve the crystallinity of the light emitting layer formed thereon, it is preferable to adjust the growth conditions such as the growth rate, the growth temperature, the growth pressure, and the dope amount so as to obtain a highly flat surface.

  The n-clad layer may be formed by alternately laminating layers having different compositions and lattice constants. At that time, in addition to the composition, the amount and thickness of the dopant may be changed depending on the layer to be stacked.

  The p-type layer is usually 0.01 to 1 μm thick, and is composed of a p-cladding layer in contact with the light-emitting layer and a p-contact layer for forming a positive electrode. The p-cladding layer and the p-contact layer can be combined. The p-clad layer is formed using GaN, AlGaN or the like, and doped with Mg as a p-dopant. In order to prevent the overflow of electrons, it is desirable to form with a material having a larger band gap than the material of the light emitting layer. In addition, it is desirable to form a high carrier concentration layer so that carriers can be efficiently injected into the light emitting layer.

  As for the p-cladding layer, layers having different compositions and lattice constants may be alternately stacked a plurality of times. At that time, in addition to the composition, the amount and thickness of the dopant may be changed depending on the layer to be stacked.

  GaN, AlGaN, InGaN or the like can be used for the p contact layer, and Mg is doped as an impurity. Mg-doped gallium nitride compound semiconductors usually have high resistance when taken out from the reactor, but they can be made p-conductive by applying activation treatment such as annealing treatment, electron beam irradiation treatment, microwave irradiation treatment, etc. It is supposed to indicate.

  Further, boron phosphide doped with p-type impurities can also be used as the p-contact layer. Boron phosphide doped with p-type impurities exhibits p-conductivity without any treatment for p-type conversion as described above.

  The growth method of the gallium nitride compound semiconductor constituting these n-type layer, light-emitting layer, and p-type layer is not particularly limited, and a well-known method such as MBE, MOCVD, or HVPE can be used under well-known conditions. Of these, the MOCVD method is preferable.

In the raw material, ammonia, hydrazine, azide, or the like can be used as a nitrogen source. Further, trimethylgallium (TMGa), triethylgallium (TEGa), trimethylindium (TMIn), trimethylaluminum (TMAl), or the like can be used as the group III organic metal. Further, silane, disilane, germane, organic germanium raw material, biscyclopentadienyl magnesium (Cp ₂ Mg), other organic metals, hydrides, and the like can be used as the dopant source. Nitrogen and hydrogen can be used as the carrier gas.

  The growth of the well layer containing In is desirably performed at a substrate temperature in the range of 650 to 900 ° C. If the temperature is lower than that, a well layer with good crystallinity cannot be obtained, and if the temperature is higher than that, the amount of In taken into the well layer may be reduced, and an element that emits light of an intended wavelength may not be manufactured.

  As described above, in the case of a well layer containing In, it is preferable to provide a thin layer not containing In on the surface of the well layer. In this case, after growing a gallium nitride compound semiconductor containing In, the same substrate is used. The supply of only the In source may be stopped at the temperature to grow the gallium nitride compound semiconductor.

  As described above, the thick film portion and the thin film portion in the well layer are preferably formed by doping the barrier layer with a dopant. However, after the well layer is grown to a predetermined thickness, a part thereof is decomposed or sublimated. Therefore, the formation of the thick film portion and the thin film portion can be promoted.

  That is, while supplying a Group III metal source containing In and a nitrogen source, growing a gallium nitride compound semiconductor containing In to a predetermined thickness, and then stopping the supply of the Group III metal source, the substrate temperature is increased. By maintaining or raising the temperature as it is, a part of it can be decomposed or sublimated. The carrier gas is preferably nitrogen. The decomposition or sublimation is preferably performed while raising the substrate temperature from the growth temperature to a range of 700 to 1000 ° C. or raising the temperature.

  The growth of the barrier layer is preferably performed at a higher substrate temperature than the growth of the well layer. The temperature range is preferably about 700 to 1000 ° C., and T1 ≦ T2, where T1 is a temperature for growing a well layer and T2 is a temperature for growing a barrier layer. After the growth of the well layer, in the process of raising the temperature from T1 to T2, the step of stopping the supply of the group III raw material while continuing the supply of the carrier gas containing nitrogen and the nitrogen source is performed. And the thin film portion can be formed effectively. At this time, it is not necessary to change the carrier gas. Switching the carrier gas to hydrogen shortens the emission wavelength. The degree of change in wavelength is difficult to control stably, reducing product productivity.

  The rate of temperature increase from T1 to T2 is preferably about 1 to 100 ° C./min. More desirably, it is about 5 to 50 ° C./min. Further, the time required for raising the temperature from T1 to T2 is preferably about 30 seconds to 10 minutes. More desirably, it is about 1 to 5 minutes.

  The growth of the barrier layer may be composed of a plurality of steps having different growth temperatures. That is, after the barrier layer is stacked at a predetermined thickness on the well layer composed of the thick film portion and the thin film portion, the barrier layer may be further stacked at the growth temperature T3. When T3 is a temperature lower than T2, an effect of suppressing deterioration of characteristics due to aging can be imparted, which is more preferable. T3 may be the same temperature as T1.

  As the negative electrode, negative electrodes having various compositions and structures are well known, and these known negative electrodes can be used without any limitation. As a negative electrode contact material in contact with the n-contact layer, in addition to Al, Ti, Ni, Au, etc., Cr, W, V, etc. can be used. Needless to say, the entire negative electrode can have a multilayer structure to provide bonding properties and the like.

As the positive electrode, positive electrodes having various compositions and structures are well known, and these known positive electrodes can be used without any limitation.
The translucent positive electrode material may include Pt, Pd, Au, Cr, Ni, Cu, Co, and the like. Further, it is known that the translucency is improved by using a structure in which a part thereof is oxidized. In addition to the above materials, Rh, Ag, Al, or the like can be used as the reflective positive electrode material.

  These positive electrodes can be formed by a method such as sputtering or vacuum deposition. When sputtering is used in particular, ohmic contact can be obtained by appropriately controlling the sputtering conditions without performing annealing after forming the electrode film.

  As a structure of the light emitting element, a flip chip type element including a reflective positive electrode may be used, or a face-up type element including a translucent positive electrode, a lattice type, or a comb type positive electrode may be used.

  In the light emitting layer of the present invention having the thick film portion and the thin film portion, the interface between the well layer and the barrier layer made of different materials is inclined with respect to the substrate surface in the boundary region changing from the thick film portion to the thin film portion. The amount of light taken out in the direction perpendicular to the surface is increased. In particular, the light emission intensity is further increased by employing a flip chip type element structure provided with a reflective electrode.

  By using the gallium nitride compound semiconductor laminate of the present invention, the driving voltage can be reduced to some extent freely. However, if the voltage is lowered too much, the light emission output is reduced accordingly. The driving voltage that does not cause a decrease in the light emission output is a voltage when a current of 20 mA is passed in the case of an element of 2.5 V or more, more preferably 2.9 V or more. However, since it is disadvantageous that the voltage is too high when incorporated in the apparatus, it is also necessary that the voltage be 3.5 V or less at the same time.

  As an effect of using the gallium nitride compound semiconductor laminate of the present invention, in the correlation between current and voltage, which is one of diode characteristics, the takeoff voltage at which the current rapidly increases with respect to the voltage is reduced. Raised. However, if the take-off voltage is too low, the light output is reduced. The take-off voltage that does not cause a decrease in the light emission output is a voltage when a current of 20 mA is passed in the case of an element of 2.3 V or higher, more preferably 2.5 V or higher. However, since it is disadvantageous that the voltage is too high when incorporated in the apparatus, it is also necessary to be 3.2 V or less at the same time.

  The gallium nitride-based compound semiconductor laminate of the present invention can be used for manufacturing a light-emitting diode, a laser diode, or the like.

  A semiconductor light emitting device can be produced from the gallium nitride compound semiconductor laminate of the present invention, and a lamp can be produced by providing a transparent cover by means well known in the art, for example. In addition, a white lamp can be produced by combining the gallium nitride compound semiconductor light emitting device of the present invention and a cover having a phosphor.

  As a result, it is possible to contribute to obtaining a gallium nitride compound semiconductor light emitting device having high emission intensity. By this method, a high-intensity LED lamp can be produced. Furthermore, electronic devices such as mobile phones, displays, and panels incorporating chips manufactured by this method, and mechanical devices such as automobiles, computers, and game machines incorporating such electronic devices can be driven with low power. It becomes possible, and it is possible to realize high characteristics. In particular, the battery-powered devices such as mobile phones, game machines, and automobile parts exhibit power saving effects.

  EXAMPLES Next, although an Example demonstrates this invention still in detail, this invention is not limited only to these Examples.

(Example 1)
FIG. 3 is a schematic view of a gallium nitride-based compound semiconductor laminate for a semiconductor light emitting device manufactured in this example (however, the well layer and the barrier layer of the light emitting layer are omitted). As shown in FIG. 3, an SP layer made of AlN is laminated on a sapphire substrate having a c-plane by an epitaxial growth method of lattice mismatched crystals, and an undoped GaN foundation layer having a thickness of 2 μm is formed on the SP layer in this order from the substrate side. 2 μm thick Si-doped n-GaN contact layer with an electron concentration of × 10 ¹⁹ cm ⁻³ , 12.5 nm thick n-In _0.1 Ga _0.9 N cladding with an electron concentration of 1 × 10 ¹⁸ cm ⁻³ 6 layers, 16 nm thick 1 × 10 ¹⁸ cm ⁻³ Si-doped GaN barrier layer, 5 layers of 2.5 nm thick undoped In _0.2 Ga _0.8 N and 0 to 0.5 nm thickness A light emitting layer having a multi-quantum well structure composed of a well layer composed of a thin GaN layer, a 10 nm thick Mg-doped p-type Al _0.07 Ga _0.93 N cladding layer, and 8 × 10 ¹⁷ cm ⁻³ holes Thickness with concentration 0. The Mg-doped p-GaN contact layer of μm a structure laminated in this order.

  The above-mentioned gallium nitride compound semiconductor laminate was produced by the following procedure using MOCVD.

  First, the sapphire substrate was introduced into a stainless steel reaction furnace capable of processing a large number of substrates in the form of heating a carbon susceptor with an induction heater. The susceptor has a mechanism for rotating itself and a mechanism for rotating the substrate. The sapphire substrate was placed on a carbon susceptor for heating in a glove box substituted with nitrogen gas. After introducing the substrate, the reaction furnace was purged with nitrogen gas.

  After circulating nitrogen gas for 8 minutes, the induction heater was activated, the substrate temperature was raised to 600 ° C. over 10 minutes, and the pressure in the furnace was 15 kPa (150 mbar). While maintaining the substrate temperature at 600 ° C., the substrate surface was left for 2 minutes while flowing hydrogen gas and nitrogen gas to perform thermal cleaning of the substrate surface.

  After completion of the thermal cleaning, the nitrogen carrier gas valve was closed and the gas supply into the reactor was hydrogen only.

  After switching the carrier gas, the temperature of the substrate was raised to 1180 ° C. After confirming that the temperature was stabilized at 1180 ° C., the valve of TMAl piping was switched, and a gas containing TMAl vapor was supplied into the reactor, which was decomposed by the deposits attached to the inner wall of the reactor. The process of reacting with the generated N atoms to deposit AlN on the sapphire substrate was started.

  After the treatment for 8 minutes and 30 seconds, the valve of TMAl piping was switched, and supply of gas containing TMAl vapor into the reactor was stopped. It waited for 4 minutes as it was, and waited for TMAl vapor | steam remaining in the furnace to be discharged | emitted completely. Subsequently, the valve of the ammonia gas pipe was switched to start supplying ammonia gas into the furnace.

  After 4 minutes, the temperature of the susceptor was lowered to 1040 ° C. while continuing the circulation of ammonia. While the susceptor temperature was lowered, the flow rate of the flow rate regulator of the TMGa pipe was adjusted.

  After confirming that the temperature of the susceptor reached 1040 ° C., wait for the temperature to stabilize, then switch the TMGa valve to start supplying TMGa into the furnace, and start the growth of undoped GaN. The GaN layer was grown over time.

In this way, an undoped GaN foundation layer having a thickness of 2 μm was formed.
Further, a high Si-doped n-type GaN layer was grown on the undoped GaN underlayer. After the growth of the undoped GaN underlayer, the supply of TMGa into the furnace was stopped for 1 minute. Meanwhile, the flow rate of SiH ₄ was adjusted. The amount to be circulated was examined in advance and adjusted so that the electron concentration of the highly Si-doped n-GaN layer was 1 × 10 ¹⁹ cm ⁻³ . Ammonia continued to be fed into the furnace at the same flow rate. In addition, the temperature of the susceptor was changed from 1040 ° C. to 1060 ° C. during the 1-minute stop.

After stopping for 1 minute, supply of TMGa and SiH ₄ was started, and growth was performed for 1 hour. By this operation, a highly Si-doped n-GaN contact layer having a thickness of 2 μm was formed.

After growing the high Si-doped n-GaN contact layer, the TMGa and SiH ₄ valves were switched to stop the supply of these raw materials into the furnace. While the ammonia was circulated as it was, the valve was switched to switch the carrier gas from hydrogen to nitrogen. Thereafter, the temperature of the substrate was lowered from 1060 ° C. to 730 ° C.

While waiting for the temperature in the furnace to change, the supply amount of SiH ₄ was changed. The amount to be circulated was examined in advance, and adjusted so that the electron concentration of the Si-doped n-InGaN cladding layer was 1 × 10 ¹⁸ cm ⁻³ . Ammonia continued to be fed into the furnace at the same flow rate.

Then, waiting for the state of the furnace to stabilize, simultaneously switching the valves TMIn and TEGa and SiH _4, feed was started to the furnace. Supply was continued for a predetermined time to form a Si-doped n-In _0.1 Ga _0.9 N cladding layer having a thickness of 12.5 nm. Thereafter, the valves for TMIn, TEGa and SiH ₄ were switched to stop the supply of these raw materials.

After completion of the growth of the Si-doped n-In _0.1 Ga _0.9 N cladding layer, the temperature of the susceptor was raised to 930 ° C. After the temperature was stabilized, the pressure of the substrate temperature and the furnace, flow rate and type of ammonia gas and carrier gas as it were supplied to TEGa and SiH ₄ in the furnace by switching the valves TEGa and SiH _4. The growth was carried out for a specified time at a susceptor temperature of 930 ° C. Subsequently, after adjusting the susceptor temperature and supplying TEGa and SiH ₄ at 730 ° C. for growth, the valve was switched again to stop the supply of TEGa and SiH ₄ to complete the growth of the GaN barrier layer. . Thereby, a GaN barrier layer having a total film thickness of 16 nm was formed.

After the growth of the GaN barrier layer is completed, the TEGa supply is stopped for 30 seconds, and the TEGa and TMIn valves are switched while the substrate temperature, the pressure in the furnace, the flow rates and types of ammonia gas and carrier gas remain unchanged. TEGa and TMIn were supplied into the furnace. After supplying TEGa and TMIn for a predetermined time, the valve was switched again to stop the supply of TMIn and the growth of the In _0.2 Ga _0.8 N well layer was completed. At this point, an In _0.2 Ga _0.8 N layer having a thickness of 2.5 nm was formed.

After the growth of the In _0.2 Ga _0.8 N layer, the supply of TEGa and SiH _{4 into} the furnace for a predetermined time is continued, and a thin layer made of Si-doped GaN for suppressing In escape is formed on the InGaN layer, The supply of TEGa and SiH ₄ was stopped.

Such a procedure is repeated five times to form five Si-doped GaN barrier layers and five In _0.2 Ga _0.8 N well layers, and finally again form an Si-doped GaN barrier layer to emit light of a multiple quantum well structure. Layered.

An Mg-doped p-type Al _0.07 Ga _0.93 N cladding layer was formed on the light-emitting layer terminated with the Si-doped GaN barrier layer.

After the supply of TEGa and SiH ₄ was stopped and the growth of the Si-doped GaN barrier layer was completed, the temperature of the substrate was raised to 1020 ° C., the type of carrier gas was switched to hydrogen, and the pressure in the furnace was 15 kPa ( 150 mbar). After waiting for the pressure in the furnace to stabilize, the valves for TMGa, TMAl, and Cp ₂ Mg were switched to start supplying these raw materials into the furnace. Thereafter, after growing for about 3 minutes, the supply of TEGa and TMAl was stopped, and the growth of the Mg-doped p-type Al _0.07 Ga _0.93 N cladding layer was stopped. As a result, an Mg-doped p-type Al _0.07 Ga _0.93 cladding layer having a thickness of 10 nm was formed.

An Mg-doped p-GaN contact layer was formed on the Mg-doped p-type Al _0.07 Ga _0.93 N cladding layer.

After the supply of TMGa, TMAl and Cp ₂ Mg was stopped and the growth of the Mg-doped p-Al _0.07 Ga _0.93 N clad layer was completed, the pressure in the furnace was changed to 20 kPa (200 mbar). After waiting for the pressure in the furnace to stabilize, the valves for TMGa and Cp ₂ Mg were switched to start supplying these raw materials into the furnace. The amount of circulating Cp ₂ Mg has been studied in advance, and was adjusted so that the hole concentration of the Mg-doped p-GaN contact layer was 8 × 10 ¹⁷ cm ⁻³ . Then, after growing for about 4 minutes, the supply of TMGa and Cp ₂ Mg was stopped, and the growth of the Mg-doped p-GaN layer was stopped. As a result, a Mg-doped p-GaN contact layer having a thickness of 0.1 μm was formed.

  After completing the growth of the Mg-doped p-GaN contact layer, the energization of the induction heater was stopped, and the temperature of the substrate was lowered to room temperature over 20 minutes. During the temperature drop, the atmosphere in the reactor was composed only of nitrogen. Then, after confirming that the substrate temperature was lowered to room temperature, the produced gallium nitride compound semiconductor laminate was taken out into the atmosphere.

  A gallium nitride-based compound semiconductor laminate for a semiconductor light emitting device was produced by the procedure as described above. Here, the Mg-doped p-GaN layer showed p-type even without performing an annealing process for activating p-type carriers.

  Next, a light-emitting diode, which is a kind of semiconductor light-emitting element, was manufactured using the gallium nitride compound semiconductor laminate.

  A reflective positive electrode having a structure in which Pt, Rh, and Au are laminated in this order from the contact layer side on the surface of the p-GaN contact layer of the produced gallium nitride compound semiconductor laminate was produced by known photolithography.

  Further, dry etching is performed on the gallium nitride compound semiconductor laminate to expose the negative electrode forming portion of the highly Si-doped n-GaN contact layer, and Ti and Al are laminated in that order from the contact layer side to form the negative electrode. Produced. By these operations, an electrode having a shape as shown in FIG. 4 was produced.

  Thus, about the gallium nitride compound semiconductor laminated body which formed the positive electrode and the negative electrode, the back surface of the sapphire substrate was ground and grind | polished, and it was set as the mirror-shaped surface. Thereafter, the gallium nitride-based compound semiconductor laminate was cut into 350 μm square chips and placed on the submount so that the electrodes faced down to form chips. Further, the chip was placed on a lead frame and connected to the lead frame with a gold wire to obtain a light emitting element.

  When a forward current was passed between the positive electrode and the negative electrode of the light-emitting diode produced as described above, the forward voltage at a current of 20 mA was 3.0V. The emission wavelength was 455 nm, and the emission output was 10 mW. Such characteristics of the light-emitting diode were obtained with no variation for light-emitting diodes fabricated from almost the entire surface of the fabricated gallium nitride compound semiconductor laminate.

  An example of a photograph of the gallium nitride compound semiconductor laminate produced as described above observed with a cross-sectional TEM is shown in FIGS. 1 and 2, wherein FIG. 1 shows a magnification of 2,000,000 and FIG. 2 shows a magnification. Is 500,000 times.

  It can be seen that the well layer has irregularities formed on the upper surface and the lower surface, and is composed of a thick film portion and a thin film portion. The observed thick film portion had a thickness of 2.5 nm and a width of 50 nm. Similarly, the observed thin film portion had a width of about 5 nm, and the thickness of the portion was 1 nm or less.

  The barrier layer had a thickness of 16 nm. The barrier layer completely filled in the difference in film thickness between the thin film portion and the thick film portion of the well layer.

(Comparative Example 1)
In this comparative example, a gallium nitride compound semiconductor laminate having the same structure as that of Example 1 except for the light emitting layer was produced. The light emitting layer is different from Example 1 only in that the barrier layer is not doped with Si, and has a structure in which a well layer and a barrier layer having a uniform thickness are stacked.

The manufacturing procedure up to the n-InGaN cladding layer is the same as that in the first embodiment.
After completion of the growth of the Si-doped n-In _0.1 Ga _0.9 N cladding layer, the temperature of the susceptor was raised to 930 ° C. After the temperature was stabilized, the substrate temperature, the pressure in the furnace, the flow rate and type of the carrier gas were kept unchanged, and the TEGa valve was switched to supply into the furnace. The growth was carried out for a predetermined time at the susceptor temperature of 930 ° C. Subsequently, the susceptor temperature was adjusted, and TEGa was supplied at 730 ° C. for growth, and then the valve was switched again to stop the supply of TEGa to complete the growth of the GaN barrier layer. As a result, an undoped GaN barrier layer having a total film thickness of 16 nm was formed.

After the growth of the undoped GaN barrier layer is completed, the TEGa supply is stopped for 30 seconds, and the TEGa and TMIn valves are switched by changing the TEGa and TMIn valves while maintaining the substrate temperature, the pressure in the furnace, and the flow rate and type of the carrier gas. TMIn was supplied into the furnace. After supplying TEGa and TMIn for a predetermined time, the valve was switched again to stop the supply of TEGa and TMIn, and the growth of the In _0.2 Ga _0.8 N layer was completed. At this point, an In _0.2 Ga _0.8 N layer having a thickness of 2.5 nm was formed.

After the growth of the In _0.2 Ga _0.8 N layer, TEGa was supplied into the furnace for a predetermined time to form a GaN thin layer on the InGaN layer for suppressing In detachment.

Such a procedure is repeated five times to form a layer composed of five undoped GaN barrier layers and five In _0.2 Ga _0.8 N well layers, and finally, an undoped GaN barrier layer is formed again and multiplexed. The light emitting layer has a quantum well structure.

_Subsequent steps for forming the Mg-doped p-type Al _0.07 Ga _0.93 N cladding layer and the Mg-doped p-type GaN layer were the same as in Example 1.

  Using this gallium nitride compound semiconductor laminate, a light emitting diode was fabricated and evaluated in the same manner as in Example 1. As a result, the forward voltage at a current of 20 mA was 3.9V. The emission wavelength was 455 nm, and the emission output was 8.5 mW.

  An example of a photograph of this gallium nitride-based compound semiconductor laminate observed with a cross-sectional TEM is shown in FIGS. FIG. 5 shows a magnification of 2,000,000 times, and FIG. 6 shows a magnification of 500,000 times. In these drawings, reference numerals 1, 2, 3 and 4 denote a well layer, a barrier layer, an n-cladding layer and a p-cladding layer, respectively, as in FIGS. From these figures, the film thickness of the well layer was constant at about 2.5 nm, and the film thickness did not vary depending on the position.

(Example 2)
The manufacturing procedure of the gallium nitride compound semiconductor laminate of this example is the same as that of Example 1 except for the following points. That is, in the growth process of the GaN thin layer on the barrier layer and the well layer, GeH ₄ was supplied together with TEGa, and the GaN thin layer on the barrier layer and the well layer was used as a Ge-doped GaN layer. The supply amount of GeH ₄ was adjusted so that the Ge doping concentration was 1 × 10 ¹⁸ cm ⁻³ .

  The obtained gallium nitride compound semiconductor laminate was provided with a positive electrode and a negative electrode in the same manner as in Example 1. The structure of the positive electrode was a transparent electrode in which Au and NiO were laminated in order from the surface of the p-GaN contact layer, and a transparent electrode thereon. The structure is composed of pad electrodes in which Ti, Au, Al, and Au are laminated in order.

  When the performance of this light-emitting diode was evaluated in the same manner as in Example 1, the forward voltage at a current of 20 mA was 3.0 V, the emission wavelength was 455 nm, and the emission output was 5 mW. Such characteristics of the light-emitting diode were obtained with no variation for light-emitting diodes fabricated from almost the entire surface of the fabricated gallium nitride compound semiconductor laminate. Moreover, as a result of observing with the cross-sectional TEM photograph, the well layer was comprised from the thick film part and the thin film part.

(Comparative Example 2)
In this comparative example, a light-emitting diode having the same electrode structure as that of Example 2 was fabricated using the gallium nitride compound semiconductor laminate fabricated in Comparative Example 1.
When the performance was evaluated in the same manner as in Example 1, the forward voltage at a current of 20 mA was 3.9 V, the emission wavelength was 455 nm, and the emission output was 5 mW.

(Example 3)
An SP layer made of AlN is stacked on a sapphire substrate having a c-plane by an epitaxial growth method of lattice mismatched crystals, and an undoped GaN underlayer having a thickness of 8 μm, a high Ge doped layer, and a low Ge layer are sequentially formed on the SP layer. An n-GaN contact layer having an average electron density of 5 × 10 ¹⁸ cm ⁻³ of 4 μm in thickness, in which doped layers are alternately stacked 100 times, and having a thickness of 180 mm having an electron concentration of 1 × 10 ¹⁸ cm ⁻³ . In _0.1 Ga _0.9 N cladding layer, 6 layers of 160 Å Si 8 × 10 ¹⁷ cm ^-3 doped GaN barrier layer and 5 layers of 25 ア ン undoped In _0.2 Ga _0.8 N and 0 to 5 膜 films A light emitting layer having a multiple quantum well structure composed of a well layer composed of a GaN layer having a thickness, a Mg-doped p-type Al _0.07 Ga _0.93 N cladding layer having a thickness of 100 mm, and a hole concentration of 8 × 10 ¹⁷ cm ⁻³ have It was prepared by 0.1μm of Mg-doped p-Al _0.02 Ga _0.98 N contact layer are sequentially stacked gallium nitride-based compound semiconductor multilayer structure.

  The above-mentioned gallium nitride compound semiconductor laminate was fabricated basically in the same manner as in Example 1 using the MOCVD method.

Next, a light-emitting diode, which is a kind of semiconductor light-emitting element using the gallium nitride compound semiconductor laminate, was manufactured according to the following procedure.
That is, a translucent positive electrode having a structure in which Pt and Au are laminated in order from the contact layer side on the surface of the p-AlGaN contact layer of the produced gallium nitride-based compound semiconductor laminate is produced by known photolithography. Then, a pad electrode having a structure in which Ti, Au, Al, and Au were sequentially laminated thereon was produced.

  Further, dry etching is then performed on the gallium nitride compound semiconductor laminate to expose the negative electrode forming portion of the n-GaN contact layer having a structure in which the high Ge doped layer and the low Ge doped layer are alternately laminated, and the exposed portion is exposed. Ti and Al were laminated in order from the contact layer side to produce a negative electrode. By these operations, an electrode having a shape as shown in FIG. 4 was produced.

  Thus, about the gallium nitride compound semiconductor laminated body which formed the positive electrode and the negative electrode, the back surface of the sapphire substrate was ground and grind | polished, and it was set as the mirror-shaped surface. Thereafter, the gallium nitride compound semiconductor laminate was cut into a 350 μm square chip, placed on a lead frame, and connected to the lead frame with a gold wire to obtain a light emitting device.

  When a forward current was passed between the positive electrode and the negative electrode of the light emitting diode produced as described above, the forward voltage at a current of 20 mA was 3.2V. The emission wavelength was 470 nm, and the emission output was 6 mW. Such characteristics of the light-emitting diode were obtained with no variation for light-emitting diodes fabricated from almost the entire surface of the fabricated gallium nitride compound semiconductor laminate.

  The light emitting device obtained by using the gallium nitride compound semiconductor laminate of the present invention has a very large industrial utility value because the driving voltage is lowered while maintaining a good light output.

2 is an example of a cross-sectional TEM photograph of a gallium nitride compound semiconductor laminate produced in Example 1. FIG. 4 is another example of a cross-sectional TEM photograph of the gallium nitride compound semiconductor laminate produced in Example 1. FIG. It is the schematic diagram which showed the cross section of the gallium nitride type compound semiconductor laminated body produced in Examples 1-3. It is the schematic diagram which showed the electrode structure of the light emitting diode produced in Examples 1-3. 2 is an example of a cross-sectional TEM photograph of a gallium nitride-based compound semiconductor laminate produced in Comparative Example 1. 6 is another example of a cross-sectional TEM photograph of the gallium nitride-based compound semiconductor laminate produced in Comparative Example 1.

Explanation of symbols

1 well layer 2 barrier layer 3 n clad layer 4 p clad layer

Claims (38)

  The substrate has an n-type layer, a light-emitting layer, and a p-type layer, the light-emitting layer has a multiple quantum structure in which a well layer and a barrier layer are alternately stacked, and the light-emitting layer has an n-type layer and a p-type layer A gallium nitride compound semiconductor laminate, wherein the well layer is formed of a thick film portion and a thin film portion, and the barrier layer contains a dopant.   The gallium nitride-based compound semiconductor laminate according to claim 1, wherein the well layer contains In.   The gallium nitride-based compound semiconductor laminate according to claim 2, wherein a thin layer not containing In exists on the upper surface of the well layer.   The dopant is at least one selected from the group consisting of C, Si, Ge, Sn, Pb, O, S, Se, Te, Po, Be, Mg, Ca, Sr, Ba, and Ra. The gallium nitride-based compound semiconductor laminate according to any one of claims 1 to 3. 5. The gallium nitride-based compound semiconductor laminate according to claim 1, wherein the dopant concentration is 1 × 10 ¹⁷ cm ⁻³ to 1 × 10 ¹⁹ cm ⁻³ .   The gallium nitride compound semiconductor laminate according to any one of claims 1 to 5, wherein the thick film portion has a thickness of 1.5 nm to 5 nm.   The gallium nitride-based compound semiconductor laminate according to any one of claims 1 to 6, wherein a width of the thick film portion in the laminate cross section is 10 nm or more (number average value).   The gallium nitride-based compound semiconductor laminate according to any one of claims 1 to 7, wherein the thickness of the thin film portion is less than 1.5 nm.   9. The gallium nitride compound semiconductor laminate according to claim 1, wherein a width of the thin film portion in a laminate cross section is 100 nm or less (number average value).   The gallium nitride compound semiconductor laminate according to any one of claims 1 to 9, wherein a difference in thickness between the thick film portion and the thin film portion is 1 nm to 3 nm.   The gallium nitride-based compound semiconductor laminate according to any one of claims 1 to 10, wherein the total width of the thick film sections in the laminate cross section is 30% or more of the entire well layer width.   The gallium nitride-based compound semiconductor laminate according to any one of claims 1 to 11, wherein the multi-quantum well structure is a structure obtained by laminating 3 to 10 times.   13. The nitriding according to claim 1, wherein the barrier layer is a gallium nitride-based compound semiconductor selected from GaN, AlGaN, and InGaN having a smaller In ratio than InGaN forming the well layer. Gallium-based compound semiconductor laminate.   The gallium nitride-based compound semiconductor laminate according to claim 13, wherein the barrier layer is GaN.   The gallium nitride-based compound semiconductor laminate according to claim 1, wherein the barrier layer has a thickness of 7 nm to 50 nm.   The gallium nitride compound semiconductor laminate according to claim 15, wherein the barrier layer has a thickness of 14 nm or more.   A gallium nitride-based compound semiconductor light-emitting device, wherein a negative electrode is provided in the n-type layer and a positive electrode is provided in the p-type layer of the gallium nitride-based compound semiconductor laminate according to claim 1.   The gallium nitride compound semiconductor light-emitting device according to claim 17, wherein the device structure is a flip-chip type.   The gallium nitride compound semiconductor light-emitting element according to claim 18, wherein the structure of the positive electrode is a reflection type.   The gallium nitride-based compound semiconductor light-emitting device according to any one of claims 17 to 19, wherein a driving voltage at a current of 20 mA is 2.9 V or more and 3.5 V or less.   The gallium nitride-based compound semiconductor light-emitting element according to any one of claims 17 to 20, wherein a take-off voltage is 2.5 V or more and 3.2 V or less.   A lamp comprising the gallium nitride-based compound semiconductor light-emitting element according to any one of claims 17 to 21.   A lamp comprising the gallium nitride-based compound semiconductor light-emitting element according to any one of claims 17 to 21 and a phosphor.   The substrate has an n-type layer, a light-emitting layer, and a p-type layer, the light-emitting layer has a multi-quantum structure in which a well layer and a barrier layer are alternately stacked, and the light-emitting layer is an n-type layer and a p-type layer In a method of manufacturing a gallium nitride compound semiconductor laminate disposed between layers, a gallium nitride compound semiconductor is characterized in that a dopant is doped into a barrier layer to form a thick film portion and a thin film portion in a well layer A method for producing a laminate. The method for producing a gallium nitride-based compound semiconductor laminate according to claim 24, wherein the dopant concentration is 1 x 10 ¹⁷ cm ^-3 to 1 x 10 ¹⁹ cm ^-3 .   The step of forming a well layer includes a step of growing a gallium nitride compound semiconductor and a step of decomposing or sublimating a part of the gallium nitride compound semiconductor. The manufacturing method of the gallium nitride type compound semiconductor laminated body as described in a term.   27. The method for producing a gallium nitride compound semiconductor laminate according to claim 26, wherein the substrate temperature T1 in the growing step and the substrate temperature T2 in the decomposing or sublimating step satisfy T1 ≦ T2.   28. The method for producing a gallium nitride compound semiconductor laminate according to claim 27, wherein T1 is in a range of 650 to 900 [deg.] C.   29. The method for producing a gallium nitride-based compound semiconductor laminate according to claim 27 or 28, wherein T2 is in a range of 700 to 1000 ° C.   30. The method for producing a gallium nitride-based compound semiconductor laminate according to any one of claims 27 to 29, wherein the decomposition or sublimation step is performed while increasing the temperature from T1 to T2.   The method for producing a gallium nitride-based compound semiconductor laminate according to claim 30, wherein the temperature rise from T1 to T2 is performed at a rate of temperature rise of 1 ° C / min to 100 ° C / min.   32. The method for producing a gallium nitride-based compound semiconductor laminate according to claim 31, wherein the temperature rising rate is 5 [deg.] C./min to 50 [deg.] C./min.   The method for producing a gallium nitride-based compound semiconductor laminate according to any one of claims 30 to 32, wherein the temperature rise from T1 to T2 is performed in 30 seconds to 10 minutes.   The method for producing a gallium nitride-based compound semiconductor laminate according to claim 33, wherein the temperature rise from T1 to T2 is performed in 1 minute to 5 minutes.   The method for producing a gallium nitride-based compound semiconductor laminate according to any one of claims 27 to 34, wherein the barrier layer is grown at a temperature T2.   36. The method of manufacturing a gallium nitride-based compound semiconductor stack according to claim 35, wherein the barrier layer is grown at a temperature T2, and then the temperature is further lowered to T3.   37. The method for producing a gallium nitride compound semiconductor laminate according to claim 36, wherein T3 is the same temperature as T1.   The growth process is in an atmosphere containing a nitrogen source and a group III metal source, and the decomposition or sublimation process is in an atmosphere containing a nitrogen source and no group III metal source. A method for producing a gallium nitride-based compound semiconductor laminate according to claim 1.