JP2010146678A5 - - Google Patents

Download PDF

Info

Publication number
JP2010146678A5
JP2010146678A5 JP2008325195A JP2008325195A JP2010146678A5 JP 2010146678 A5 JP2010146678 A5 JP 2010146678A5 JP 2008325195 A JP2008325195 A JP 2008325195A JP 2008325195 A JP2008325195 A JP 2008325195A JP 2010146678 A5 JP2010146678 A5 JP 2010146678A5
Authority
JP
Japan
Prior art keywords
selected cell
cell
memory
control circuit
plate line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2008325195A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010146678A (ja
JP5185098B2 (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2008325195A priority Critical patent/JP5185098B2/ja
Priority claimed from JP2008325195A external-priority patent/JP5185098B2/ja
Priority to US12/563,950 priority patent/US8059445B2/en
Publication of JP2010146678A publication Critical patent/JP2010146678A/ja
Publication of JP2010146678A5 publication Critical patent/JP2010146678A5/ja
Application granted granted Critical
Publication of JP5185098B2 publication Critical patent/JP5185098B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2008325195A 2008-12-22 2008-12-22 強誘電体メモリ Expired - Fee Related JP5185098B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008325195A JP5185098B2 (ja) 2008-12-22 2008-12-22 強誘電体メモリ
US12/563,950 US8059445B2 (en) 2008-12-22 2009-09-21 Ferroelectric memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008325195A JP5185098B2 (ja) 2008-12-22 2008-12-22 強誘電体メモリ

Publications (3)

Publication Number Publication Date
JP2010146678A JP2010146678A (ja) 2010-07-01
JP2010146678A5 true JP2010146678A5 (cg-RX-API-DMAC7.html) 2011-07-07
JP5185098B2 JP5185098B2 (ja) 2013-04-17

Family

ID=42265809

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008325195A Expired - Fee Related JP5185098B2 (ja) 2008-12-22 2008-12-22 強誘電体メモリ

Country Status (2)

Country Link
US (1) US8059445B2 (cg-RX-API-DMAC7.html)
JP (1) JP5185098B2 (cg-RX-API-DMAC7.html)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
PT2725925T (pt) 2011-06-30 2021-10-04 Gallo Winery E & J Processo para a produção de corante cristalino natural e sistema de processamento relacionado
WO2014145952A1 (en) 2013-03-15 2014-09-18 E & J Gallo Winery Dryer using adjustable conditioned air flow
US10373665B2 (en) * 2016-03-10 2019-08-06 Micron Technology, Inc. Parallel access techniques within memory sections through section independence
US9697913B1 (en) * 2016-06-10 2017-07-04 Micron Technology, Inc. Ferroelectric memory cell recovery
US9721639B1 (en) 2016-06-21 2017-08-01 Micron Technology, Inc. Memory cell imprint avoidance
US11037617B2 (en) 2018-08-03 2021-06-15 Micron Technology, Inc. Methods for row hammer mitigation and memory devices and systems employing the same
KR102515404B1 (ko) 2018-10-09 2023-03-29 마이크론 테크놀로지, 인크 행 해머를 완화하기 위한 방법 및 이를 이용한 메모리 디바이스 및 시스템
US11221179B2 (en) 2018-10-26 2022-01-11 E. & J. Gallo Winery Low profile design air tunnel system and method for providing uniform air flow in a refractance window dryer
KR102667274B1 (ko) 2018-12-21 2024-05-21 마이크론 테크놀로지, 인크 활동 기반 메모리 유지보수 동작 방법 및 이를 이용하는 메모리 디바이스 및 시스템
US10817371B2 (en) 2018-12-31 2020-10-27 Micron Technology, Inc. Error correction in row hammer mitigation and target row refresh

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3766181B2 (ja) 1996-06-10 2006-04-12 株式会社東芝 半導体記憶装置とそれを搭載したシステム
US5822265A (en) 1997-07-29 1998-10-13 Rockwell Semiconductor Systems, Inc. DRAM controller with background refresh
JP3720983B2 (ja) 1998-06-23 2005-11-30 株式会社東芝 強誘電体メモリ
JP3319437B2 (ja) * 1999-06-04 2002-09-03 ソニー株式会社 強誘電体メモリおよびそのアクセス方法
KR100597629B1 (ko) * 2003-12-22 2006-07-07 삼성전자주식회사 강유전체 메모리 장치 및 그에 따른 구동방법
JP4195899B2 (ja) * 2006-06-16 2008-12-17 三洋電機株式会社 強誘電体メモリ

Similar Documents

Publication Publication Date Title
JP2010146678A5 (cg-RX-API-DMAC7.html)
JP2018073402A5 (cg-RX-API-DMAC7.html)
JP2010267373A5 (cg-RX-API-DMAC7.html)
JP2007272938A5 (cg-RX-API-DMAC7.html)
WO2011130013A3 (en) Multi-port memory having a variable number of used write ports
JP2018073452A5 (cg-RX-API-DMAC7.html)
JP2012119050A5 (cg-RX-API-DMAC7.html)
MX2010004187A (es) Esquema de linea de bit de precarga a nivel de suelo para operacion de lectura en memoria de acceo aleatorio magnetoresistiva de torsion por transferencia de rotacion.
JP2011022998A5 (cg-RX-API-DMAC7.html)
ATE448548T1 (de) Mehrspalten-adressierungsmodus-speichersystem mit einem integrierten schaltungsspeicherbaustein
JP2013525936A5 (cg-RX-API-DMAC7.html)
WO2010080342A3 (en) Pseudo dual-ported sram
JP2016197484A5 (ja) 送信装置
JP2005182978A5 (cg-RX-API-DMAC7.html)
TW200737190A (en) Dynamic semiconductor memory reducing the frequency of occurrence of refresh command request and refresh control method thereof
JP2010108585A5 (cg-RX-API-DMAC7.html)
WO2018022382A3 (en) Variable page size architecture
JP2009545834A5 (cg-RX-API-DMAC7.html)
JP2016526749A5 (cg-RX-API-DMAC7.html)
JP2010267326A5 (cg-RX-API-DMAC7.html)
JP2010113793A5 (cg-RX-API-DMAC7.html)
TW200737182A (en) High-bandwidth magnetoresistive random access memory devices and methods of operation thereof
JP2009110600A5 (cg-RX-API-DMAC7.html)
JP2010010369A5 (cg-RX-API-DMAC7.html)
US20080205185A1 (en) Semiconductor memory device and its driving method