JP2010114290A - Semiconductor device and semiconductor unit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress occurrence of a shift in mounting position due to variance in solder amount when an LCC type semiconductor package having an electrode on a side surface is mounted on a printed wiring board. <P>SOLUTION: The electrode 3 of the semiconductor package 1 has a pair of conductors 3a partially in a recessed groove 2 formed on the side surface of the semiconductor package 1, which are perpendicular to the side surface and bottom of the semiconductor package 1 and symmetrically about a plane passing the center of the recessed groove 2 on the side surface of the semiconductor package 1. Solder 4 charged in the recessed groove 2 is shaped symmetrically to balance wetting force of the solder 4 for the conductors 3a. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a leadless chip carrier (LCC) type semiconductor device and a semiconductor unit which are provided on the side surface of a package with an electrode for soldering to a printed wiring board.

  Examples of the semiconductor package include SOP (Single Outline Package) and QFP (Quad Flat Package) in which lead terminals extend from the side of the package, and semiconductor packages having no lead terminals are also used.

  As one form of the semiconductor package having no lead terminal, as shown in FIG. 7, an LCC type semiconductor package 101 having an electrode 103 with a through hole cut in half on the side surface is known (Patent Document 1). reference).

  The LCC type semiconductor package is used as a package of an element that requires high mounting position accuracy, such as a solid-state imaging element typified by CCD or CMOS, or an optical element typified by LD or PD (see Patent Document 2). ). In a surface mounting structure (SMT) in which such a semiconductor package is mounted on a printed wiring board, a phenomenon is known in which an electronic component (semiconductor package) is pulled by the surface tension of molten solder during reflow soldering ( Non-patent document 1). In addition, a method of aligning electronic components using this phenomenon is known as an alignment method using a self-alignment effect (see Patent Document 3).

JP-A-5-335437 JP 2006-332472 A JP-A-6-252326 Japan Welding Association Micro Soldering Board of Education, Standard Micro Soldering Technology, Nikkan Kogyo Shimbun August 30, 2002 2nd Edition

  In the conventional LCC type semiconductor package, there is a problem that the semiconductor package is displaced from a predetermined position due to the wetting force of the solder in a reflow process in which the semiconductor package and the printed wiring board are joined by solder.

  This is because, in the solder printing process, when the amount of solder transferred to the land of the printed wiring board varies, the force received by the semiconductor package due to the wetting force of the solder is not balanced and biased.

  The reason why the force received by the semiconductor package is biased is that the force received by each electrode of the semiconductor package and each land of the printed wiring board changes according to the amount of solder due to the wetting force of the solder.

  Specifically, as shown in FIG. 7, the solder joint portion by the solder 104 on the side surface of the semiconductor package 101 passes through the center of the concave groove 102 on the side surface of the semiconductor package 101 and is parallel to the side surface of the semiconductor package 101. The shape is asymmetric with respect to a surface perpendicular to the bottom surface.

  Therefore, the force exerted on the electrode 103 of the semiconductor package 101 by the wetting force of the solder 104 includes a component acting along the surface of the printed wiring board 111 on which the semiconductor package 101 is mounted and in a direction perpendicular to the side surface of the semiconductor package 101. Existing.

  As shown in FIGS. 8A and 8B, when the amount of solder 104 transferred to each electrode 103 is different, the outer peripheral length of the surface where the solder 104 and the electrode 103 of the semiconductor package 101 contact is the same. It changes as shown in FIGS. For this reason, the force exerted by the solder 104 on each electrode 103 of the semiconductor package 101 also changes.

  This is because the force that the electrode receives due to the wetting force of the solder is expressed by the product of the outer peripheral length of the surface where the electrode and the solder come into contact with the surface tension of the solder.

  As a result, the balance of the solder wetting force received by the semiconductor package depends on the degree of variation in the amount of solder transferred to each electrode and land, and the semiconductor package moves to a position where all the wetting forces are balanced. .

  For this reason, even if the semiconductor package is mounted at an accurate position by the mounter, after the reflow process, the semiconductor package is fixed at a position shifted from the mounting position.

  An object of the present invention is to provide a semiconductor device and a semiconductor unit capable of suppressing a mounting position shift due to a wetting force of solder in a semiconductor unit in which a semiconductor device having an electrode on a side surface of a package and a printed wiring board are soldered. It is what.

  In order to solve the above-described problems, a semiconductor device according to the present invention is a package on which a semiconductor element is mounted, and a concave groove formed perpendicularly to a bottom surface on two opposing side surfaces of the package, An electrode comprising a pair of conductors disposed in a concave groove and facing each other, the pair of conductors being perpendicular to the bottom surface and the side surface of the package, It is arranged symmetrically with respect to a plane passing through the center of the concave groove.

  A semiconductor unit according to the present invention is a package on which a semiconductor element is mounted, and includes a concave groove formed on a side surface of the package and an electrode made of a pair of conductors arranged in the concave groove. And a printed wiring board having a land on which the semiconductor device is mounted and connected to the electrode by solder, and the pair of conductors is perpendicular to the bottom surface and the side surface of the package, The land of the printed wiring board is arranged symmetrically with respect to a plane passing through the center of the concave groove, and the shape of the land passes through the center of the electrode width in a direction perpendicular to the side surface of the package of the semiconductor device. It is symmetric with respect to the surface.

  If the solder joint that joins the electrode of the semiconductor device to the land of the printed wiring board is symmetrical, the forces acting on the semiconductor device due to the wetting force of the solder cancel each other. As a result, even if there is a variation in the amount of solder, it is possible to suppress mounting position deviation in the reflow process.

  The best mode for carrying out the present invention will be described with reference to the drawings.

  FIG. 1A is a perspective view showing a semiconductor package 1 on which a semiconductor element which is a semiconductor device according to the first embodiment is mounted. A semiconductor package 1, which is a package on which a semiconductor element (not shown) is mounted, has a concave groove 2 on two opposing side surfaces, and an electrode 3 is disposed in the concave groove 2. As shown in FIG. 1B, the electrode 3 includes a pair of conductors 3 a disposed in the concave groove 2 and facing each other, and is connected to the land 12 of the printed wiring board 11 by the solder 4. Is done.

  FIG. 2 is an enlarged view of a part of the apparatus of FIG. 1, (a) is a partially enlarged perspective view showing only the semiconductor package 1, and (b) is a partially enlarged perspective view including a land 12 of the printed wiring board 11. It is. A plane P1 shown in FIG. 2A is a plane that is perpendicular to the side surface and the bottom surface of the semiconductor package 1 and passes through the center of the concave groove 2 on the side surface of the semiconductor package 1. The axis A1 is an axis that passes through the center of the width (electrode width) of each conductor 3a in the direction perpendicular to the side surface of the semiconductor package 1 and is perpendicular to the bottom surface of the semiconductor package 1.

  A plane P2 shown in FIG. 2B passes through the center of the electrode width in the direction perpendicular to the side surface of the semiconductor package 1, is parallel to the side surface of the semiconductor package 1, and is perpendicular to the bottom surface of the semiconductor package 1. It is.

  FIG. 3 is a partial perspective view showing a part of a semiconductor unit in which a plurality of electrodes 3 of the semiconductor package 1 are joined to a printed wiring board 11 by solder 4.

  FIG. 4 shows a case where the amount of solder changes for each electrode 3. FIGS. 4A and 4C are a perspective view and a cross-sectional view showing a solder joint with a relatively small amount of solder, and FIGS. d) A perspective view and a cross-sectional view showing a solder joint portion having a relatively large amount of solder.

  The semiconductor package 1 and the semiconductor unit according to this embodiment will be specifically described.

  As shown in FIG. 1, an LCC type semiconductor package 1 having an electrode 3 in a concave groove 2 on a side surface is connected to a land 12 of a printed wiring board 11 via a solder 4.

  The semiconductor package 1 has a length of 11.49 mm, a width of 14.03 mm, and a height of 2.16 mm.

  The concave groove 2 on the side surface of the semiconductor package 1 has a length of 0.63 mm, a width of 0.64 mm, a height of 2.16 mm, and a pitch of 1.27 mm.

  The concave groove 2 on the side surface of the semiconductor package 1 is obtained by dividing a through hole formed in a direction perpendicular to the bottom surface of the semiconductor package 1.

  The cross section of the concave groove 2 on the side surface of the semiconductor package 1 is a rectangular parallelepiped having a length of 0.4 mm and a width of 0.64 mm and a semicircle having a center at the center of the long side of the rectangular parallelepiped and a radius of 0.23 mm. It is the shape which matched so. The long side of the rectangular parallelepiped portion in the cross section on the side not in contact with the semicircle is on the side surface of the semiconductor package 1.

  The electrode 3 formed in the concave groove 2 on the side surface of the semiconductor package 1 includes a pair of conductors 3a, and each conductor 3a has a width (electrode width) of 0.4 mm and a height of 2.16 mm. The surface plating is gold.

  As shown in FIG. 2, a pair of conductors 3 a that are perpendicular to the side surface and the bottom surface of the semiconductor package 1 and symmetrical with respect to the plane P <b> 1 that passes through the center of the concave groove 2 on the side surface of the semiconductor package 1 It is arranged in a part of the concave groove 2 on the side surface.

  The shape of each conductor 3 a passes through the center of the electrode width in the direction perpendicular to the side surface of the semiconductor package 1 and is symmetric with respect to the axis A 1 perpendicular to the bottom surface of the semiconductor package 1.

  The land 12 of the printed wiring board 11 is arranged so as to be parallel to the bottom surface of the semiconductor package 1 and perpendicular to the side surface. The shape of the land 12 is formed so as to be symmetric with respect to a plane P2 that passes through the center of the electrode width in the direction perpendicular to the side surface of the semiconductor package 1 and is perpendicular to the bottom surface of the semiconductor package 1.

  Further, the shape and arrangement of the lands 12 of the printed wiring board 11 are symmetrical to a plane P1 that is perpendicular to the side surface and the bottom surface of the semiconductor package 1 and passes through the center of the concave groove 2 on the side surface of the semiconductor package 1.

  As a result, as shown in FIG. 3, the shape of the solder 4 that joins the electrode 3 of the semiconductor package 1 and the land 12 of the printed wiring board 11 is perpendicular to the side surface and the bottom surface of the semiconductor package 1, and It becomes symmetrical with respect to a plane P1 passing through the center of the concave groove 2 on the side surface.

  Further, as shown in FIGS. 4C and 4D, the shape of the solder 4 passes through the center of the electrode width in the direction perpendicular to the side surface of the semiconductor package 1 and is parallel to the side surface of the semiconductor package 1. It becomes symmetrical with respect to a plane P2 perpendicular to the bottom surface.

  As a result, among the forces that the wetting force of the solder 4 exerts on the electrodes 3 of the semiconductor package 1, the component that acts along the surface of the printed wiring board 11 to which the semiconductor package 1 is joined and is perpendicular to the side surface of the semiconductor package 1 Then, the component acting in the direction parallel to the side surface is canceled out.

  As shown in FIGS. 4 (a) and 4 (b), even when the amount of solder 4 transferred to each electrode 3 is different, the shape of the solder joint is symmetrical, so the wetting force of the solder 4 Accordingly, the forces acting on the semiconductor package 1 cancel each other.

  Even when there is a variation in the amount of solder 4 transferred to each electrode 3, the force due to the solder 4 received by the semiconductor package 1 balances with each electrode 3, so that the mounting position of the semiconductor package 1 varies in the amount of solder in the reflow process. It will not be shifted by being affected.

  FIG. 5 is a partial perspective view showing a part of the semiconductor package 1 according to the second embodiment. In this example, instead of the electrode 3 of Example 1, a part of a cylindrical through hole is formed on a surface obtained by cutting in a direction parallel to the central axis of the cylinder and parallel to the side surface of the semiconductor package. An electrode 23 made of a conductor 23a having a pair of arcuate cross sections is provided. Other points are the same as in the first embodiment.

  Hereinafter, the semiconductor package 1 of the present embodiment will be specifically described.

  The semiconductor package 1 has a length of 11.49 mm, a width of 14.03 mm, and a height of 2.16 mm.

  The concave groove 2 on the side surface of the semiconductor package 1 divides a through hole of φ0.4 mm formed along an axis perpendicular to the bottom surface of the semiconductor package 1 and 0.1 mm from the side surface of the semiconductor package 1. It was obtained.

  The concave groove 2 on the side surface of the semiconductor package 1 has a height of 2.16 mm and a pitch of 1.27 mm.

  The pair of conductors 23a constituting the electrode 23 of the semiconductor package 1 is formed in a region where the distance from the side surface of the semiconductor package 1 is up to 0.3 mm, and the height is 2.16 mm. The plating on the surface of each conductor 23a is gold.

  The solder that joins the semiconductor package 1 and the printed wiring board has a Sn—Ag—Cu-based composition, but may have another composition, such as a Sn—Bi-based composition.

  FIG. 6 is a partial perspective view showing a part of the semiconductor package 1 according to the third embodiment. The electrode 3 of the semiconductor package 1 has a conductive portion 3b formed on a lid member 5 disposed so as to cover the upper ends of the pair of conductors 3a. Thereby, the solder joint area of the semiconductor package 1 increases, and the effect that joint strength increases can be expected.

  Hereinafter, the semiconductor package 1 according to the present embodiment will be described in detail.

  The semiconductor package 1 has a length of 11.49 mm, a width of 14.03 mm, and a height of 2.16 mm.

  The concave groove 2 on the side surface of the semiconductor package 1 has a length of 0.63 mm, a width of 0.64 mm, a height of 1.2 mm, and a pitch of 1.27 mm.

  The concave groove 2 on the side surface of the semiconductor package 1 is obtained by dividing a through hole formed to a height of 1.2 mm from the bottom surface of the semiconductor package 1 in a direction perpendicular to the bottom surface of the semiconductor package 1. .

  The cross section of the concave groove 2 on the side surface of the semiconductor package 1 is a rectangular parallelepiped having a length of 0.4 mm and a width of 0.64 mm and a semicircle having a center at the center of the long side of the rectangular parallelepiped and a radius of 0.23 mm. It is the shape which matched so. The long side of the rectangular parallelepiped on the side not in contact with the semicircle is on the side surface of the semiconductor package 1.

  The pair of conductors 3a formed in the concave groove 2 on the side surface of the semiconductor package 1 has a width of 0.4 mm and a height of 1.2 mm.

  In the concave groove 2 on the side surface of the semiconductor package 1, the conductive portion 3b formed to cover the upper ends of the pair of conductors 3a is 0.4 mm long and 0.64 mm wide.

  The plating of the surfaces of the pair of conductors 3a formed in the concave groove 2 on the side surface of the semiconductor package 1 and the upper conductive portion 3b is gold.

  The surface of the conductive portion 3b formed at the upper end of the concave groove 2 of the semiconductor package 1 is preferably plated from the viewpoint of securing the bonding strength. Can be solved.

  The solder for joining the semiconductor package and the printed wiring board has a Sn-Ag-Cu composition, but may have another composition, for example, a Sn-Bi composition.

FIGS. 1A and 1B show a first embodiment, in which FIG. 1A is a perspective view showing a semiconductor package, and FIG. 2B is a partially enlarged perspective view showing an enlarged part of a semiconductor unit. FIG. 2A shows a layout of an electrode structure of a semiconductor package and a land of a printed wiring board. FIG. 2A is a partial perspective view showing an electrode structure of the semiconductor package, and FIG. It is a fragmentary perspective view to explain. It is a fragmentary perspective view which shows a part of semiconductor unit which consists of the semiconductor package and printed wiring board which were soldered. It is explanatory drawing explaining the case where the amount of solder differs for every electrode. 6 is a partial perspective view showing a part of a semiconductor package according to Example 2. FIG. 12 is a partial perspective view showing a part of a semiconductor package according to Example 3. FIG. It is a figure explaining a prior art example. FIG. 8 is an explanatory diagram for explaining a case where the amount of solder differs for each electrode in the conventional example of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor package 2 Concave groove 3 Electrode 3a, 23a Conductor 4 Solder 5 Lid member 11 Printed wiring board 12 Land

Claims (7)

A package for mounting a semiconductor element,
A concave groove formed perpendicular to the bottom surface on two opposite side surfaces of the package;
An electrode made of a pair of conductors arranged in the concave groove and arranged to face each other,
The pair of conductors is perpendicular to the bottom surface and the side surface of the package, and is disposed symmetrically with respect to a surface passing through the center of the concave groove.   2. The semiconductor device according to claim 1, wherein the shape of each conductor is symmetric with respect to the center of the electrode width in a direction perpendicular to the side surface of the package.   The semiconductor device according to claim 1, wherein the electrode includes a conductive portion that covers an upper end of the pair of conductors. A semiconductor device mounting package, a semiconductor device having a concave groove formed on a side surface of the package and an electrode made of a pair of conductors arranged in the concave groove;
A printed wiring board having a land on which the semiconductor device is mounted and connected to the electrode by solder;
The pair of conductors is perpendicular to the bottom surface and the side surface of the package, and is disposed symmetrically with respect to a surface passing through the center of the concave groove,
The shape of the land of the printed wiring board is symmetric with respect to a plane passing through the center of the electrode width in a direction perpendicular to the side surface of the package of the semiconductor device.   5. The semiconductor unit according to claim 4, wherein the shape of each conductor of the semiconductor device is symmetric with respect to the center of the electrode width in a direction perpendicular to the side surface of the package.   6. The semiconductor unit according to claim 4, wherein a shape of the land of the printed wiring board is symmetric with respect to a plane passing through a center of the concave groove of the package of the semiconductor device.   The semiconductor unit according to claim 4, wherein the electrode of the semiconductor device includes a conductive portion that covers an upper end of the pair of conductors.

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