JP2010113435A5 - - Google Patents
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- Publication number
- JP2010113435A5 JP2010113435A5 JP2008283895A JP2008283895A JP2010113435A5 JP 2010113435 A5 JP2010113435 A5 JP 2010113435A5 JP 2008283895 A JP2008283895 A JP 2008283895A JP 2008283895 A JP2008283895 A JP 2008283895A JP 2010113435 A5 JP2010113435 A5 JP 2010113435A5
- Authority
- JP
- Japan
- Prior art keywords
- clock signal
- circuit
- clock generator
- clock
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008283895A JP2010113435A (ja) | 2008-11-05 | 2008-11-05 | メモリアクセス装置 |
| US12/607,447 US8473705B2 (en) | 2008-11-05 | 2009-10-28 | Memory access apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008283895A JP2010113435A (ja) | 2008-11-05 | 2008-11-05 | メモリアクセス装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2010113435A JP2010113435A (ja) | 2010-05-20 |
| JP2010113435A5 true JP2010113435A5 (enExample) | 2011-12-08 |
Family
ID=42132890
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008283895A Pending JP2010113435A (ja) | 2008-11-05 | 2008-11-05 | メモリアクセス装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8473705B2 (enExample) |
| JP (1) | JP2010113435A (enExample) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102526608B1 (ko) | 2018-02-27 | 2023-05-02 | 에스케이하이닉스 주식회사 | 전자 장치 및 그것의 동작 방법 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2567119B2 (ja) * | 1990-01-29 | 1996-12-25 | 日本電気株式会社 | バス調停回路 |
| JPH0612537A (ja) | 1992-06-25 | 1994-01-21 | Fuji Photo Film Co Ltd | Icメモリカード |
| US5485594A (en) * | 1992-07-17 | 1996-01-16 | International Business Machines Corporation | Apparatus and method using an atomic fetch and add for establishing temporary ownership of a common system resource in a multiprocessor data processing system |
| JPH09251793A (ja) | 1996-03-14 | 1997-09-22 | Hitachi Ltd | 半導体記憶装置及びデータ処理装置 |
| US6134638A (en) * | 1997-08-13 | 2000-10-17 | Compaq Computer Corporation | Memory controller supporting DRAM circuits with different operating speeds |
| JP2000137983A (ja) * | 1998-08-26 | 2000-05-16 | Toshiba Corp | 半導体記憶装置 |
| JP2004522235A (ja) * | 2001-07-18 | 2004-07-22 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 多重プロセッサデバイスにおける不揮発性メモリ装置と方法 |
| JP4744194B2 (ja) | 2005-05-23 | 2011-08-10 | 三洋電機株式会社 | メモリ制御回路 |
| JP4925162B2 (ja) * | 2005-11-07 | 2012-04-25 | 株式会社メガチップス | メモリ装置 |
-
2008
- 2008-11-05 JP JP2008283895A patent/JP2010113435A/ja active Pending
-
2009
- 2009-10-28 US US12/607,447 patent/US8473705B2/en not_active Expired - Fee Related
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