JP2010080742A - Method and apparatus for testing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for testing semiconductor devices, which suppresses an increase in the time required for simultaneously testing multiple semiconductor devices on a semiconductor wafer by using a probe card. <P>SOLUTION: The method for simultaneously conducting a contact test on the semiconductor devices 2 formed on the semiconductor wafer 1 includes a process of determining the difference between the maximum contact voltage of non-defective semiconductor devices and that of defective semiconductor devices, of correcting a standard value range for semiconductor devices 2, each having a contact voltage out of the standard value range, on the basis of the voltage difference, and then of applying the corrected standard value range to the semiconductor devices determined as defectives. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor device test method and a semiconductor device test apparatus, and more particularly to a semiconductor device test method and a semiconductor device test apparatus for testing a semiconductor device using a probe card.

  A plurality of semiconductor devices are repeatedly formed on a semiconductor wafer, then divided into chips, and further used by being covered with a package such as a mold. By the way, various tests such as a contact test and a leak test of a semiconductor device are also performed in a wafer state before division.

A semiconductor element and a semiconductor integrated circuit which constitute a semiconductor device in a wafer state are tested by, for example, a test apparatus for a semiconductor device provided with a probe card. The probe card includes a probe needle that connects the tip to a plurality of electrode pads on the surface of the semiconductor device, a probe needle support portion that supports the probe needle, a base having wiring connected to the probe needle, and the like.
The probe needle is electrically connected to the tester via a tester head or the like.

Such semiconductor device testing apparatuses include a single measurement type in which a plurality of semiconductor devices formed on a semiconductor wafer are tested one by one, and a simultaneous measurement type in which a plurality of semiconductor devices are simultaneously measured. The single measurement type probe card has a plurality of probe needles connected to a plurality of electrode pads of one semiconductor device in a semiconductor wafer. In addition, the same measurement type probe card has a plurality of probe needles that are simultaneously connected to a plurality of electrode pads of a plurality of semiconductor devices in a semiconductor wafer.
JP-A-8-45996 JP 2001-291748 A JP 2006-196711 A

  In the probe card of the same measurement type, adjustment for applying the probe needle to the electrode pads on a plurality of semiconductor devices with the same pressing force is difficult, resulting in a measurement error. In addition, if the adjustment is insufficient at the time of measurement, it is necessary to adjust again, and the measurement may take time.

  An object of the present invention is to provide a semiconductor device measurement method and a semiconductor device test apparatus capable of suppressing an increase in time for simultaneously testing a plurality of semiconductor devices on a semiconductor wafer using a probe card. .

According to one aspect of the present invention, a step of connecting a probe needle to each of a plurality of semiconductor devices formed on a semiconductor wafer, and a contact voltage of the plurality of semiconductor devices are measured via the probe needle by a tester. A step of performing a contact test, a step of identifying the semiconductor device in which the contact voltage corresponds to a standard value, and a plurality of the devices connected to the probe needle when there is the semiconductor device not corresponding to the standard value Obtaining a maximum value of each contact voltage of the semiconductor device, obtaining a voltage difference between the maximum value of the semiconductor device not corresponding to the standard value and the maximum value corresponding to the standard value, and the voltage difference Is applied to the semiconductor device determined not to correspond to the standard value by correcting the standard value in addition to the standard value. Test method of a semiconductor device characterized by having the steps of a new standard value is provided.
According to another aspect of the present invention, a chuck for mounting a semiconductor wafer on which a plurality of semiconductor devices are formed, and a probe card having probe needles connected to electrode pads of the semiconductor wafer mounted on the chuck; Measuring a contact voltage of a plurality of the semiconductor devices via the probe needle, specifying the semiconductor device whose contact voltage corresponds to a standard value, and when there is the semiconductor device not corresponding to the standard value, Obtaining a maximum value of the plurality of semiconductor devices connected to a probe needle, obtaining a voltage difference between the maximum value of the semiconductor device not corresponding to the standard value and the maximum value corresponding to the standard value, and the voltage difference Is added to the standard value to correct the standard value to be a new standard value applied to the semiconductor device not corresponding to the standard value. Test apparatus for a semiconductor device characterized by having a tester to perform more contact test is provided.

According to the present invention, when a contact test is performed on a semiconductor device formed on a semiconductor wafer by the same measurement, the standard value of a part of the semiconductor devices whose contact voltage deviates from the standard value is corrected. Then, the corrected new standard value is applied to the defective semiconductor device.
This eliminates the need to readjust the relative position of the probe needle and the semiconductor device when redoing the contact test for a semiconductor device in which the contact test due to a minor contact failure has failed. Shortening is possible.

Embodiments of the present invention will be described below in detail with reference to the drawings.
FIG. 1 is a side view showing an outline of a test apparatus for executing a semiconductor device test method according to an embodiment of the present invention, and FIGS. 2A and 2B are probes used in the test apparatus shown in FIG. It is a side view which shows a card | curd, and a top view which shows arrangement | positioning of a probe needle.
The semiconductor device testing apparatus shown in FIG. 1 is an apparatus that sequentially measures a plurality of semiconductor devices 2 formed on the semiconductor wafer 1 shown in FIG. 3A, and includes a tester 10 and a wafer prober 11. Yes.

  A wafer stage 13 is disposed in the housing 12 of the wafer prober 11, and a wafer chuck 14 is attached on the wafer stage 13. The wafer stage 13 has a structure capable of moving the wafer chuck 14 in the vertical direction, the front-rear direction, and the left-right direction and further rotating in the horizontal direction.

An opening that exposes the upper surface of the wafer chuck 14 is provided in an upper portion of the housing 12, and a head plate 15 is attached to the opening so as to be opened and closed. A flock ring 16 is fitted in an opening formed in the center of the head plate 15.
A clamp 20 that supports a flange on the outer periphery of the card folder 19 below the flock ring 16 is attached to the lower surface of the head plate 15.

  A card-type probe card 17 capable of simultaneously testing a plurality of semiconductor devices 2 is attached to the card folder 19. A plurality of probe needles 18 are attached to the probe card 17 so as to protrude from the central opening of the card holder 19 toward the wafer chuck 14.

  2A, the probe card 17 includes a printed circuit board 17a on which a plurality of wirings (not shown) are formed, a ceramic ring 17b attached to the lower surface of the printed circuit board 17a, and a lower surface of the ceramic ring 17b. And a resin-made probe support portion 17c.

  The probe support portion 17c is formed in an annular shape as illustrated in FIG. 2B and supports a plurality of probe needles 18. The probe needle 18 is supported at a position where the tip of the probe needle 18 can contact the electrode pad 2a of the semiconductor device 2 shown in FIG. The probe needle 18 has a shape bent, for example, in a substantially L shape, and its rear end is connected to a wiring (not shown) formed on the lower surface of the printed circuit board 17a.

The probe needle 18 is electrically connected to the electrode pad 17e on the upper surface thereof via a wiring, a via or the like formed on the printed circuit board 17a.
The probe card 17 is of the same measurement type, and in the example shown in FIG. 2B, two measurement regions 17g and 17h corresponding to the two semiconductor devices 2 are arranged in the horizontal direction. However, the probe card 17 for the same measurement is not limited to a structure in which two measurement areas are arranged side by side.

For example, as shown in FIG. 4A, there are two diagonal measurement types in which the tip of the probe needle 18 is arranged so as to surround two measurement regions 17d arranged in the diagonal direction. Alternatively, as shown in FIG. 4B, there are four diagonal measurement types in which tips of a plurality of probe needles 18 are arranged at positions surrounding four measurement regions 17d arranged in an oblique direction.
In order to increase the mechanical strength of the printed circuit board 17a, a reinforcing plate 17f is attached to the center area of the upper surface.

As shown in FIG. 1, the probe card 17 is attached to a clamp 20 via a card folder 19 and further connected to a conductive pin 16 a protruding from the lower surface of the frog ring 16.
A tester head 23 having a performance board 21 electrically connected to the conductive pins 16 a of the frog ring 16 is attached to the housing 12. Although not shown, the tester head 23 has a plurality of drivers, comparators, contact pins, and the like therein, and the contact pins are electrically connected to the contact pins of the performance board 21.

  The tester head 23 is connected to the tester 10 via a cable 24 having a signal line. Accordingly, the tester 10 transmits a test voltage, a test signal, and the like to the electrode pad 2a of the semiconductor device 2 through the tester head 23, the performance board 21, the frog ring 16, the probe card 17, the probe needle 18, and the like. Receive a signal. The measurement result is recorded in a storage device in the tester 10.

  The tester 10 includes a CPU, a storage device, an operation unit, and the like, and has a computer that operates according to a program in which a series of test processes are incorporated in a storage medium, and generates signals used for electrical characteristic tests. A test system related to analysis has been established.

That is, the electrical characteristic test is performed on the semiconductor device 2 through the signal transmission system according to a program in which various test items relating to the electrical characteristic test are described as a test system.
The tester 10 receives test results such as voltage, current, and resistance from the semiconductor device 2. Then, the tester 10 determines whether the function of the semiconductor device 2 is good or bad by comparing with a standard value, an expected value, etc., and further measures an analog value or the like such as an input / output signal, a voltage of a power supply part, a current, Perform analysis.

Next, a method for testing the semiconductor device 2 using the above-described semiconductor device test apparatus will be described.
First, the probe card 17 is attached to the head plate 15 via the card folder 19 and the clamp 20 shown in FIG. Further, the semiconductor wafer 1 is placed on the wafer chuck 14.

Further, the conductive pin 16 a of the flock ring 16 is connected to the electrode pad 17 e of the probe card 17.
As a result, the probe needle 18 of the probe card 17 is electrically connected to the tester 10 via the flock ring 16, the performance board 21, the tester head 23, and the cable 24.

  Subsequently, as shown in FIG. 5 a, the position of the wafer stage 13 is adjusted based on the signal from the tester 10. Then, the probe needle 18 is applied to the electrode pads 2 of the plurality of semiconductor devices 2 to be simultaneously measured first in the semiconductor wafer 1. As a result, a signal or the like can be transmitted and received between the semiconductor device 2 and the tester 10.

  Next, a contact test of the semiconductor device 2 is performed by the tester 10 as shown in FIG. In this case, the contact voltage of the electrode pad 2a is measured by passing a constant current as a test current to the electrode pad 2a of the semiconductor device 2 via the tester head 23, the probe needle 18 and the like.

Here, the tester 10 determines whether or not each contact voltage of the semiconductor device 2 of the same measurement is within the range of the standard value, as shown in FIG. And when higher than a standard value, the process according to the flow shown in FIG. 6 is performed.
First, as shown in FIG. 6d, it is determined whether or not the contact test of all the semiconductor devices 2 of the same measurement is defective.

  When the tester 10 determines that the contact test of all the semiconductor devices 2 of the same measurement is defective, the test of all the semiconductor devices 2 of the same measurement is ended as shown in k of FIG. This is because such a failure is mainly caused by a bad application of the probe 18 to the entire semiconductor wafer 1 or a connection failure in an internal circuit.

  After completing the test of all the semiconductor devices 2 of the same measurement, the position of the wafer chuck 14 is changed by the wafer stage 13 as shown in q and a of FIG. The probe needle 18 hits the electrode pad 2 a of the semiconductor device 2. After that, the first contact test is started.

  By the way, although not described in the flowchart, when the forced termination of the test as indicated by k in FIG. 6 occurs continuously a predetermined number of times, the test of all the semiconductor devices 2 of the semiconductor wafer 1 is completed. Also good. In this case, after removing the semiconductor wafer 1 from the wafer chuck 14, the surface of the electrode pad 2 a of the semiconductor device 2 is cleaned or the test apparatus is readjusted, and then the semiconductor wafer 1 is mounted on the wafer chuck 14. The test may be performed again.

  On the other hand, as shown in d and e of FIG. 6, when the good and bad semiconductor devices 2 are mixed in the contact test, the maximum value of the contact voltage is obtained for each of the same semiconductor devices 2. Then, as shown in f of FIG. 6, it is determined whether or not those maximum values exceed the allowable value.

The allowable value is, for example, a value that can be assumed when the contact voltage becomes abnormally high due to excessive contact failure between the probe needle 18 and the electrode pad 2a, and is set based on experimental values or experience values.
Further, as shown in i of FIG. 6, when the maximum value of the contact voltage of all defective semiconductor devices 2 exceeds the allowable value, the contact test is good as shown in r of FIG. Only the semiconductor device 2 is subjected to the following leak test. In this case, the test is finished for the defective semiconductor device 2.

Further, in i of FIG. 6, when the maximum value of the contact voltage of the semiconductor device 2 regarded as defective is mixed and the maximum value of the contact voltage does not exceed the allowable value, the semiconductor device 2 exceeding the allowable value is mixed. End the test.
In this case, the standard value for the contact test applied to the semiconductor device 2 whose contact voltage exceeds the standard value and is equal to or less than the allowable value is corrected as follows. Further, as shown in FIG. 6f, even when all the contact voltages of the semiconductor devices 2 determined to be defective do not exceed the allowable values, the standard values for contact tests applied to those semiconductor devices 2 are corrected. To do.

  First, as shown in g of FIG. 6, the correction is performed by setting each value of the defective semiconductor device 2 and the value of the good semiconductor device 2 out of the maximum value of the contact voltage of each semiconductor device 2 of the same measurement. A difference ΔV is obtained. In the case where there are a plurality of good semiconductor devices 2, the largest or smallest maximum value among them is used, or ΔV is obtained using the average value of the maximum values. Further, when there are a plurality of defective semiconductor devices 2, ΔV is obtained for each.

Subsequently, as shown in h of FIG. 6, the defective semiconductor device 2 is corrected so that the standard value of the contact test is increased by ΔV, and the corrected value is used as a newly applied standard value. Further, for the semiconductor device 2 determined to be defective, an increase value ΔR with respect to the contact resistance when the contact voltage is a standard value is calculated based on the contact test current and ΔV.
The above contact test measurement values ΔV and ΔR are stored in the storage device in the tester 10 in association with the address of the semiconductor device 2 and the number of the electrode pad 2 a of the semiconductor device 2.

  By the way, instead of f, i, and j in FIG. 6, the difference between the maximum value and the minimum value of the contact voltage is obtained for each semiconductor device 2, and this difference is used as a single measurement difference of each semiconductor device 2. And the difference ΔV between the maximum values of the contact voltages may be compared. Then, the above-described standard value correction may be performed only for the semiconductor device 2 in which the single measurement difference is smaller than the difference ΔV.

  After performing the contact test and the correction of the standard value as described above, the contact test is performed again as shown in FIG. In this case, the semiconductor device 2 that has been corrected for the standard value of the contact test and the semiconductor device 2 that has already been determined to be good become good by the contact test. The semiconductor device 2 that has already been tested is removed from the contact test.

For the semiconductor device 2 determined to be good in the contact test, a leak test is performed as shown by l and r in FIG.
In the leak test, for example, the reverse bias is applied to the diode to obtain the magnitude of the leak current, or the magnitude of the leak current flowing between the source and drain with the gate electrode of the MOS transistor set to the off voltage. This is the test you want.

  In this case, in the leak test of the semiconductor device 2 in which the standard value of the contact voltage is corrected, the current is measured by adding the correction value ΔV to the predetermined voltage, or the leak is considered in consideration of the voltage drop due to the resistance increase ΔR. The magnitude of the current is determined.

  Then, as shown by m, s, and t in FIG. 5, the tester 10 ends the test of the semiconductor device 2 for which the leakage current does not fall within the standard value at this stage. Here, as shown in m and s in FIG. 5, when all the leak currents of the semiconductor device 2 of the same measurement are out of the standard value, the subsequent test is ended.

  Thereafter, as shown in q and a of FIG. 5, the wafer stage 13 is moved, and the probe 18 is applied to the electrode pad 2 a of the next semiconductor device 2 of the same semiconductor wafer 1 to include a contact test. When various tests are performed or when all the semiconductors 2 have been tested, the test of the semiconductor wafer 1 is terminated.

On the other hand, as shown by m, n, s, and t in FIG. 5, the semiconductor device 2 whose leak test is within the standard value proceeds to the next functional test.
The above leak test data is stored in the storage device in the tester 10 in association with the address of the semiconductor device 2 and the number of the electrode pad 2a of the semiconductor device 2.

  The next functional test is, for example, a test for confirming that a change in current appears between the source and drain by applying an on / off voltage to the gate electrode of the MOS transistor, or for an input signal of the logic circuit. This is a test to confirm that the output signal is properly output.

  Also in such a functional test, the above-described voltage increase ΔV is added to the applied voltage or the like, or the resistance increase / decrease ΔR is used to correct the determination of the presence or absence of the input / output signal.

Then, as shown by o and u in FIG. 5, the test is finished at this stage for the semiconductor device 2 having a semiconductor element or semiconductor integrated circuit that does not function normally, while for the semiconductor device 2 that functions normally, the following is performed. Proceed to I / O level test.
The result of the function test is stored in the storage device in the tester 10 in association with the address of the semiconductor device 2 and the number of the electrode pad 2a of the semiconductor device 2 in the same measurement.

  By the way, as shown by o, u, q, a in FIG. 5, when all the function tests of the semiconductor device 2 of the same measurement are not normal, the subsequent tests are ended. Then, the wafer chuck 14 is moved by the wafer stage 13, the probe 18 is applied to the next semiconductor device 2 of the same semiconductor wafer 1, and various tests including a contact test are started. If all the semiconductors 2 have been tested, the test of the semiconductor wafer 1 is completed.

Next, for the semiconductor device 2 for which the functional test is determined to be good, an input / output level test is performed as shown by p and v in FIG.
As an input / output level test, for example, there is a test for confirming that the magnitude of a current flowing between a source and a drain when a MOS transistor is turned on and off is within a standard value range. In addition, there is a test for confirming that the magnitude of the input / output voltage of the output signal of the logic circuit and the magnitude of the input / output current are within the standard value range.

Also in this case, whether the voltage correction value ΔV is added to the applied voltage or the like, or when the voltage or current value is detected, the increase value ΔR is used for the resistance to determine whether it is good or bad.
And about the semiconductor device 2 by which the input / output level test was done, the tester 10 judges whether those input / output levels are good or bad, and memorize | stores those results in a memory | storage device.
If there is another test following this, the test is performed on the semiconductor device 2 whose input / output level is determined to be good, and the test is completed for the semiconductor device 2 determined to be defective.

  Various tests as described above are sequentially performed on each semiconductor device 2 of the semiconductor wafer 1 according to the flow shown in FIGS. Then, after all the semiconductor devices 2 have been tested, the semiconductor wafer 1 is removed from the wafer stage 13.

  According to the above embodiment, when a contact test is performed on the semiconductor device 2 formed on the semiconductor wafer 1 by the same measurement, the standard value is corrected for a part of the semiconductor devices 2 whose contact voltage deviates from the standard value. ing. As the correction, when the connection failure between the probe needle 18 and the electrode pad 2a of the semiconductor device 2 is within a range of allowable values that can be predicted, each of the semiconductor device 2 determined to be defective and the semiconductor device 2 determined to be good. Correction for adding the difference ΔV in the maximum value of the contact voltage to the standard value is performed. Then, the corrected new standard value is applied to the defective semiconductor device 2.

Furthermore, the increase of the resistance component is calculated based on the voltage difference ΔV, and the increase value of the resistance component is used for the determination of the leak test, the function test, the input / output level test, etc. The accuracy of is also increased.
As a result, the test results resulting from the low contact failure of the electrode pad 2a and the probe needle 18 of the semiconductor device 2 can be changed to good, and the subsequent tests can be performed with high accuracy.

On the other hand, if the test is performed according to a flow in which the contact potentials between the measurements are not compared or the difference is not confirmed, the test is immediately terminated when a contact failure occurs.
However, in such a method, the horizontal component of the semiconductor wafer 1 is adjusted and reconnected, or the surface of the electrode pad 2a on the semiconductor wafer 1 is cleaned. It will be long. Moreover, if the probe needle 18 is reconnected to the electrode pad 2a of the semiconductor wafer 1, the electrode pad 2a may be damaged.

By the way, in this embodiment, in the contact test, it takes time to correct the standard value of the semiconductor device that is first determined to be defective. However, the correction is based on calculation, and the probe needle 18 is reattached to the electrode pad 2a. Compared to the connection time, the processing time is extremely short.
The above test results may be displayed by the tester 10 in correspondence with the addresses of the semiconductor devices on the semiconductor wafer.

  The embodiment described above is merely given as a typical example, and it is obvious for those skilled in the art to combine the components or modifications and variations thereof, and those skilled in the art will describe the principle of the present invention and the claims. Obviously, various modifications of the above-described embodiments can be made without departing from the scope of the invention as described above.

Next, features of the embodiment of the present invention will be described.
(Appendix 1) A step of connecting a probe needle to each of a plurality of semiconductor devices formed on a semiconductor wafer, and a step of performing a contact test for measuring a contact voltage of the plurality of semiconductor devices via the probe needle by a tester The step of identifying the semiconductor device whose contact voltage corresponds to a standard value, and the semiconductor device not connected to the standard value when each of the plurality of semiconductor devices connected to the probe needle is present. Obtaining a maximum value of a contact voltage; obtaining a voltage difference between the maximum value of the semiconductor device not corresponding to the standard value and the maximum value corresponding to the standard value; and adding the voltage difference to the standard value By correcting the standard value, a new standard value applied to the semiconductor device determined not to correspond to the standard value is obtained. And a step of testing the semiconductor device.
(Supplementary note 2) The supplementary note 1 is characterized in that after the contact test is completed, at least one of a leak test, a function test, and an input / output level test of the semiconductor device connected to the probe needle is performed. The test method of the semiconductor device as described.
(Supplementary Note 3) The at least one result among the leak test, the functional test, and the input / output level test for a semiconductor device in which the new standard value is used is obtained using the voltage difference. The test method of the semiconductor device according to appendix 2.
(Supplementary Note 4) When the contact voltage of the semiconductor device not corresponding to the standard value is equal to or higher than an allowable value, the test of the semiconductor device having the contact voltage equal to or higher than the allowable value is terminated. A test method for a semiconductor device according to appendix 1.
(Supplementary Note 5) The test method for a semiconductor device according to Supplementary Note 4, wherein the test is continued for the semiconductor device having the contact voltage smaller than the allowable value.
(Additional remark 6) It has the process of calculating | requiring the resistance increase value of the contact resistance of the said semiconductor device judged that it does not correspond to the said standard value based on the said voltage difference and the supply current of a contact test 4. The method for testing a semiconductor device according to any one of 3 above.
(Supplementary note 7) The supplementary note 6, wherein after the contact test is finished, at least one result of the leakage current, the functional test, and the input / output level test is obtained using the resistance increase value. Semiconductor device testing method.
(Additional remark 8) The chuck | zipper which mounts the semiconductor wafer in which the several semiconductor device was formed,
A probe card having a probe needle connected to an electrode pad of a semiconductor wafer placed on the chuck, and a contact voltage of a plurality of the semiconductor devices is measured via the probe needle, and the contact voltage corresponds to a standard value The semiconductor device is identified, and when there is the semiconductor device that does not correspond to the standard value, the maximum value of the plurality of semiconductor devices connected to the probe needle is obtained, and the semiconductor device that does not correspond to the standard value A voltage difference between the maximum value and the maximum value corresponding to the standard value is obtained, and the standard value is corrected by adding the voltage difference to the standard value and applied to the semiconductor device not corresponding to the standard value. And a tester for performing a contact test by using a new standard value.
(Additional remark 9) The said tester has a structure which transmits / receives the signal which performs any of a leak test, a functional test, and an input-output level test between the said probe cards, The semiconductor device of Additional remark 8 characterized by the above-mentioned. Test equipment.

FIG. 1 is a configuration diagram illustrating a semiconductor device test apparatus according to an embodiment of the present invention. 2A is a side view showing an example of a probe card used in the semiconductor device testing apparatus according to the embodiment of the present invention, and FIG. 2B is a probe needle shown in FIG. It is a bottom view which shows a periphery. FIG. 3A is a plan view showing a semiconductor wafer to be tested by the semiconductor device testing apparatus according to the embodiment of the present invention, and FIG. 3B is formed on the semiconductor wafer shown in FIG. It is a top view which shows a semiconductor device. FIG. 4A is a bottom view showing another example of the probe needle of the probe card used in the semiconductor device testing apparatus according to the embodiment of the present invention, and FIG. 4B is the embodiment of the present invention. It is a bottom view which shows another example of the probe needle of the probe card used for the testing apparatus of the semiconductor device which concerns. FIG. 5 is a flowchart (No. 1) showing the test method of the semiconductor device according to the embodiment of the present invention. FIG. 6 is a flowchart (No. 2) showing the test method of the semiconductor device according to the embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 2 Semiconductor device 2a Electrode pad 10 Tester 11 Wafer prober 13 Wafer stage 14 Wafer chuck 16 Flock ring 17 Probe card 18 Probe needle 21 Performance board 23 Tester head 24 Cable

Claims (5)

Connecting a probe needle to each of a plurality of semiconductor devices formed on a semiconductor wafer;
Performing a contact test for measuring contact voltages of the plurality of semiconductor devices via the probe needle by a tester;
Identifying the semiconductor device in which the contact voltage corresponds to a standard value;
A step of obtaining a maximum value of the contact voltage of each of the plurality of semiconductor devices connected to the probe needle when there is the semiconductor device not corresponding to the standard value;
Obtaining a voltage difference between the maximum value of the semiconductor device not corresponding to the standard value and the maximum value corresponding to the standard value;
Correcting the standard value by adding the voltage difference to the standard value to obtain a new standard value applied to the semiconductor device determined not to correspond to the standard value;
A method for testing a semiconductor device, comprising: 2. The semiconductor according to claim 1, wherein after the contact test is completed, at least one of a leak test, a function test, and an input / output level test of the semiconductor device connected to the probe needle is performed. Equipment test method. 3. The result of at least one of the leak test, the function test, and the input / output level test for a semiconductor device using the new standard value is obtained using the voltage difference. 2. A test method for a semiconductor device according to 1. 4. The method according to claim 1, further comprising: obtaining a resistance increase value of a contact resistance of the semiconductor device that is determined not to correspond to the standard value based on the voltage difference and a supply current of a contact test. A test method for a semiconductor device according to any one of the above. A chuck for mounting a semiconductor wafer on which a plurality of semiconductor devices are formed;
A probe card having a probe needle connected to an electrode pad of a semiconductor wafer placed on the chuck;
When the contact voltages of a plurality of the semiconductor devices are measured via the probe needles, the semiconductor device whose contact voltage corresponds to a standard value is specified, and the semiconductor device that does not correspond to the standard value exists. Determining a maximum value of the plurality of semiconductor devices connected to the needle, determining a voltage difference between the maximum value of the semiconductor device not corresponding to the standard value and the maximum value corresponding to the standard value, and calculating the voltage difference A tester for performing a contact test by correcting the standard value by adding to the standard value and setting a new standard value applied to the semiconductor device not corresponding to the standard value;
A test apparatus for a semiconductor device, comprising:

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