JP2010056221A - Method of manufacturing semiconductor device, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which allows the formation of an oxide film and a charge storage layer without damage and control of the thicknesses thereof, and also to provide a method of manufacturing the same. <P>SOLUTION: A masking nitride film 2, a first nitride film 12, and a second oxide film 13 are separated from each other by anisotropic etching such as RIE. At this point, the masking oxide film 1 on the bottom of a trench 3 is left without being etched, and the masking oxide film 1 thus left serves as a defense layer against etching and prevents a substrate 10 from damage. The portion of the separated first nitride film 12, which covers the side wall of the trench 3, is protected by a sacrificial oxide film 13, there is no damage to that part by etching. Then, the second oxide film 13 and the first oxide film 11 on the bottom of the trench 3, which have been damaged by the anisotropic etching, are completely removed by isotropic etching. Thereafter, a third oxide film 14 and a gate oxide film 15 are formed by oxidation treatment such as plasma oxidation or radical oxidation. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a method of manufacturing a semiconductor device having a charge storage layer such as an ONO (Oxide-Nitride-Oxide) film, and a semiconductor memory device manufactured by this method.

  Some rewritable nonvolatile semiconductor memory devices use, for example, an ONO (Oxide-Nitride-Oxide) film made of an oxide film-nitride film-oxide film. The nitride film becomes a charge storage layer, and information is stored by holding charges in the nitride film. When the voltage applied between the source and the drain is switched, it is possible to hold charges on the source side and the drain side of the charge storage layer. As a result, two bits can be stored in one semiconductor memory device.

In a semiconductor memory device capable of 2-bit storage, the storage capacity is simply doubled for the same number of cells, and conversely, the chip area is simply halved for the same storage capacity. Therefore, the demand for high integration and low cost can be satisfied at the same time.
Further, when the cell size of such a semiconductor memory device is reduced, the channel length, bit line width, word line width, etc. are reduced. However, when the channel length is shortened, it becomes difficult to separate the two charge holding regions in the charge storage layer. For this purpose, a configuration is provided in which the charge retention region is physically separated into two.

  For example, in a non-volatile semiconductor memory device, conventionally, a NO (Nitride-Oxide) film or an ONO film is formed so as to cover the side wall and bottom of a U-shaped trench, and then different from an RIE (Reactive Ion Etching) apparatus or the like. A manufacturing method is known in which a charge storage layer isolation structure is formed on a side wall of a U-shaped trench so that the charge storage layer has a side wall spacer shape by isotropic etching. However, in the process of forming the charge storage layer separation structure, an oxide film on the substrate side (hereinafter referred to as a “lower oxide film”) constituting the ONO film by etching or the like, a nitride film that is a charge storage layer, and a gate The oxide film on the electrode side (hereinafter referred to as “upper oxide film”) is physically damaged. These damages will degrade the operating characteristics.

  For example, Patent Document 1 shows an example of a process for forming a charge storage layer separation structure. In Patent Document 1, first, a NO film (lower oxide film and nitride film) is formed and then etched to form a charge storage layer (nitride film) in the shape of a side wall spacer, and the first oxide film is formed at the bottom of the trench. Is exposed. At this time, the lower oxide film at the bottom of the exposed trench is damaged by etching, and the nitride film covering the sidewall of the trench is also damaged. Thereafter, an upper oxide film is formed on the damaged lower oxide film and nitride film. Patent Document 1 describes a countermeasure against damage to the nitride film by removing the damaged portion of the nitride film by removing the surface of the nitride film by isotropic etching. No measures are described.

In Patent Document 2, first, an ONO film (a lower oxide film, a nitride film, and an upper oxide film) is formed. Next, the ONO film is etched into the shape of the sidewall spacer, and the bottom of the trench is exposed. At this time, the upper oxide film and the silicon substrate at the bottom of the trench are damaged. Next, the exposed silicon substrate and bit line are oxidized by thermal oxidation, and a gate electrode is formed thereon, but the upper oxide film remains damaged. Further, in order to remove the damage at this time, when removing the upper oxide film before the thermal oxidation, it is necessary to considerably increase the thickness of the nitride film in order to perform the thermal oxidation again. Thus, it is impossible to obtain the thickness of the upper oxide film and the thickness of the upper oxide film.
JP-T-2005-517301 JP 2005-116964 A

  According to the invention disclosed in Patent Document 1 and Patent Document 2, it is possible to form a charge storage layer separation structure. However, in these disclosures, damage to the oxide film or the nitride film serving as the charge storage layer due to etching may occur, and the film thickness may have to be changed to remove the damage. Further, it is desirable to form an oxide film having a thickness of, for example, 10 nm or more at the bottom of the trench to separate the charge storage layer. However, an oxide film having such a thickness is formed at the bottom of the trench. It is difficult.

  In view of the above-described problems, an object of the present invention is to provide a semiconductor device and a method for manufacturing the same that enable formation of an oxide film and a charge storage layer without damage and control of the film thickness.

In the method of manufacturing a semiconductor device of the present invention that solves the above-described problems, the first silicon oxide film (11) and the charge storage layer (12) are formed so as to cover the side walls and bottom of the trench provided in the silicon substrate (10). And a first step of forming a second silicon oxide film (13) in this order, and removing the second silicon oxide film (13) and the charge storage layer (12) formed on the bottom, A second step of separating the second silicon oxide film (13) and the charge storage layer (12) into two parts to expose the first silicon oxide film (11) formed on the bottom; Removing the second silicon oxide film (13) covering the side wall and the first silicon oxide film (11) covering the exposed bottom to expose the bottom of the trench; and Covering the charge storage A fourth step of forming a third silicon oxide film (14, 23) on the layer (12); a fifth step of forming a gate oxide film (15, 24) on the exposed bottom of the trench; including.
In such a method for manufacturing a semiconductor device, the second silicon oxide film on the side wall is left when the charge storage layer formed so as to cover the side wall and the bottom of the trench is separated. The silicon oxide film is protected, and the charge storage layer is not damaged by etching or the like during separation of the charge storage layer. Similarly, since the first silicon oxide film is left at the bottom of the trench when the charge storage layer is separated, the bottom of the trench is protected by the first silicon oxide film when the charge storage layer is separated. The silicon substrate is not damaged.

In this method for manufacturing a semiconductor device, for example, in the second step, the second silicon oxide film (13) and the charge storage layer (12) stacked on the bottom are removed by anisotropic etching, In the third step, the second silicon oxide film (13) covering the side wall and the first silicon oxide film (11) covering the bottom may be removed by isotropic etching.
Damage to the charge storage layer and the bottom of the trench due to anisotropic etching can be prevented by the second silicon oxide film and the first silicon oxide film, respectively. Then, the second silicon oxide film and the first silicon oxide film damaged by the anisotropic etching are removed by the subsequent isotropic etching, so that the undamaged charge storage layer and the bottom of the trench are exposed. The

  In the fourth step, the third silicon oxide film (14, 23) may be formed by plasma oxidation or radical oxidation.

In the fifth step, the gate oxide films (15, 24) may be formed by plasma oxidation or radical oxidation simultaneously with the formation of the third silicon oxide film (14) in the fourth step.
In the fifth step, the gate oxide film (15, 24) may be formed by a combination of thermal oxidation and plasma oxidation, or only thermal oxidation.
In the fifth step, the gate oxide films (15, 24) may be formed by first performing thermal oxidation and then performing plasma oxidation. In thermal oxidation, the charge storage layer formed of a silicon nitride film or the like is hardly oxidized, and only the silicon substrate exposed at the bottom of the trench is oxidized. Therefore, the gate oxide film having a certain film thickness is first formed by thermal oxidation, and then the plasma oxidation is performed, thereby making it easier to control the film thickness of the gate oxide film.

In another method of manufacturing a semiconductor device according to the present invention, a first silicon oxide film (11), a charge storage layer (12), and an amorphous film are formed so as to cover the sidewall and bottom of a trench provided in the silicon substrate (10). A first step of forming a porous silicon layer (32) in this order, and removing the amorphous silicon layer (32) and the charge storage layer (12) stacked on the bottom, thereby providing the second silicon oxide layer. A second step of separating the film (13) and the charge storage layer (12) into two parts to expose the first silicon oxide film (11) formed on the bottom; A third step of thermally oxidizing the crystalline silicon layer (32) to form a third silicon oxide film (33) covering the charge storage layer (12), and on the exposed first silicon oxide film (11) Forming a gate oxide film (34) on Including of a step.
In such a method of manufacturing a semiconductor device, after the charge storage layer is separated, the upper oxide film is formed by thermally oxidizing the amorphous silicon layer on the charge storage layer. In thermal oxidation, the charge storage layer formed of a silicon nitride film or the like is hardly oxidized. Therefore, even if the entire amorphous silicon layer is oxidized, the charge storage layer underneath is not oxidized. On the other hand, since the silicon substrate exposed at the bottom of the trench has a high oxidation rate, the thickness of the gate oxide film can be controlled more easily.

  The semiconductor device manufactured by the semiconductor device manufacturing method as described above can be formed with a desired film thickness because there is no damage to the oxide film and the charge storage layer.

Embodiments of the present invention will be described below with reference to the drawings.
In the description of each embodiment, common symbols are used for common items, and redundant descriptions are omitted depending on circumstances.
In addition, each of the following embodiments is only for the step of forming the charge storage layer separation structure, and a grounding step performed before that, a grounding step such as wiring formation performed after the formation of the charge storage layer separation structure, etc. Is omitted. Other processes other than the formation of the charge storage layer separation structure are performed by the same method as in the prior art. In the following embodiments, the substrate is formed of a silicon substrate such as conventional silicon, the oxide film is formed of a silicon oxide film such as a silicon oxide film, the nitride film is formed of a silicon nitride film such as a silicon nitride film, and the gate electrode is formed of polysilicon. Is done.

<< First Embodiment >>
1a to 1k are views for explaining a method of manufacturing a semiconductor device according to the first embodiment of the present invention.
In the semiconductor device manufacturing method according to the first embodiment, first, the mask oxide film 1 and the mask nitride film 2 are stacked in this order from the substrate 10 on the substrate 10 and patterned as shown in FIG. 1a. Then, the trench 3 is formed. The mask nitride film 2 functions as a hard mask. The thickness of the mask oxide film 1 is, for example, 5 nm, and the thickness of the mask nitride film 2 is, for example, 50 nm. The depth of the trench 3 is, for example, 50 nm and the width is, for example, 90 nm. In the case where a plurality of trenches are formed, the interval is set to 70 nm, for example.

Next, the first oxide film 11 is formed on the substrate 10 by oxidizing the side walls and bottom of the trench 3 by thermal oxidation (FIG. 1b). The film thickness of the first oxide film 11 is, for example, 5 nm.
Next, a first nitride film 12 is formed along the sidewall and bottom of the trench 3 (FIG. 1c). The first nitride film 12 is formed on the first oxide film 11. The first nitride film becomes a charge storage layer by forming an isolation structure as will be described later. The first nitride film 12 is formed thicker than the desired charge storage layer, for example, 12 nm. A portion of the first nitride film 12 formed on the mask nitride film 2 is integrated with the mask nitride film 2 to form one nitride film.

Next, a second oxide film 13 is formed so as to cover the mask nitride film 2 and the first nitride film 12 by an oxidation process such as a CVD (Chemical Vapor Deposition) method or an ALD (Atomic-Layer Deposition) method (FIG. 1d). . The film thickness of the second oxide film 13 is, for example, 10 nm, and this film thickness is determined according to the state of etching performed thereafter.
Next, the mask nitride film 2, the first nitride film 12, and the sacrificial oxide film 13 are separated by anisotropic etching such as RIE (FIG. 1e). In anisotropic etching, etching proceeds only in a direction perpendicular to the surface of the material film to be processed, that is, in a direction parallel to the trench 3. Therefore, only the portions formed on the bottom of the trench 3 and the surface of the mask nitride film 2 are removed from the second oxide film 13 and the first nitride film 12. At this time, the first oxide film 11 at the bottom of the trench 3 remains without being etched, and the substrate 10 is not damaged because it serves as a protective layer against etching. Further, the separated first nitride film 12 covering the side wall of the trench 3 is protected by the second oxide film 13 and thus is not damaged by etching.
Next, the second oxide film 13 damaged by the anisotropic etching and the first oxide film 11 at the bottom of the trench 3 are completely removed by isotropic etching (FIG. 1f). By simultaneously removing the sacrificial oxide film 13 and the first oxide film 11 at the bottom of the trench 3, an upper oxide film and an oxide film (gate oxide film) at the bottom of the trench 3 are simultaneously formed by an oxidation process performed thereafter. be able to.

  Next, a third oxide film 14 and a gate oxide film 15 are formed by an oxidation process such as plasma oxidation or radical oxidation (FIG. 1g). The third oxide film 14 is formed by oxidizing the mask nitride film 2 and the first nitride film 12, and the gate oxide film 15 is formed by oxidizing the substrate 10 exposed at the bottom of the trench 3. The film thickness of the first nitride film 12 serving as a charge storage layer can be adjusted by the time of this oxidation treatment. Further, since the oxidation rate of the silicon substrate is higher than the oxidation rate of the nitride film, the thickness of the gate oxide film 15 can be made larger than the thickness of the third oxide film 14, and a desired film is formed at the bottom of the trench 3. A thick oxide film can be easily formed. The film thickness of the third oxide film 14 is, for example, 10 nm, the film thickness of the gate oxide film 15 is, for example, 13 nm, and the film thickness of the first nitride film 12 is, for example, 5 nm.

Next, the trench 3 is filled by depositing amorphous silicon 16 (FIG. 1h).
Next, the third oxide film 14 and the mask nitride film 2 on the mask nitride film 2 are removed. Thereafter, the bit line 17 is formed (FIG. 1i). For example, the bit line 17 is formed by implanting arsenic ions (As +) with an implantation amount of 2E15 / cm ² and an implantation energy of 50 keV.

  Next, a fourth oxide film 18 is deposited, and then planarized by a CMP (Chemical Mechanical Polishing) method (FIG. 1j). Finally, polysilicon is deposited, impurities are introduced, and patterning is performed to form word lines 19 (FIG. 1k).

  Through these steps, the third oxide film 14 serving as the upper oxide film, the first oxide film 11 serving as the lower oxide film, and the first nitride film 12 serving as the charge storage layer are formed so as not to be damaged. Can do. Further, the gate oxide film 15 can be formed so as to have a film thickness sufficient for the separation of the charge storage layer.

<< Second Embodiment >>
2a to 2i are views for explaining a method of manufacturing a semiconductor device according to the second embodiment of the present invention. The second embodiment is basically the same as the first embodiment, but in the oxidation treatment of the bottom of the U-shaped trench 3, either plasma oxidation or radical oxidation is combined with thermal oxidation. It is different in point. Since the process before FIG. 2a of 2nd Embodiment is the same as the process to FIG. 1a-1c of 1st Embodiment, description is abbreviate | omitted.

After the first nitride film 12 is formed along the side wall and bottom of the trench 3 by the steps up to FIG. 1c, in the second embodiment, the mask nitride film 2 and the first nitride film 2 are formed by oxidation treatment such as CVD or ALD. A second oxide film 21 is formed covering the first nitride film 12 (FIG. 2a). The film thickness of the second oxide film 21 is, for example, 20 nm, and this film thickness is determined according to the state of etching performed thereafter. Therefore, this film thickness may be 10 nm, which is the same as the second oxide film 13 of the first embodiment.
Next, the mask nitride film 2, the first nitride film 12, and the sacrificial oxide film 21 are separated by anisotropic etching such as RIE (FIG. 2b). At this time, the first oxide film 11 at the bottom of the trench 3 remains without being etched, and the substrate 10 is not damaged because it serves as a protective layer against etching. Further, the separated first nitride film 12 covering the side wall of the trench 3 is protected by the sacrificial oxide film 21 and thus is not damaged by etching. In this embodiment, since the thickness of the sacrificial oxide film 21 is 20 nm, the degree of protection by the sacrificial oxide film is greater than that of the first embodiment.
Next, the second oxide film 21 damaged by the anisotropic etching and the first oxide film 11 at the bottom of the trench 3 are completely removed by isotropic etching (FIG. 2c). By removing the second oxide film 21 and the first oxide film 11 at the bottom of the trench 3 at the same time, the upper oxide film and the oxide film at the bottom of the trench 3 can be formed simultaneously by the subsequent oxidation process. .

Next, a thin additional oxide film 22 is formed on the exposed bottom of the trench 3 by thermal oxidation (FIG. 2d). At this time, the first nitride film 12 is hardly oxidized by the thermal oxidation process. The film thickness of the additional oxide film 22 is 2 nm, for example.
Next, a third oxide film 23 and a gate oxide film 24 are formed by an oxidation process such as plasma oxidation or radical oxidation (FIG. 2e). The third oxide film 23 is formed by oxidizing the mask nitride film 2 and the first nitride film 12, and the gate oxide film 24 is formed by oxidizing the substrate 10 at the bottom of the exposed trench 3 in addition to the additional oxide film 22. It is formed. The film thickness of the first nitride film 12 serving as a charge storage layer can be adjusted by the time of this oxidation treatment. Further, since the oxidation rate of the silicon substrate is higher than the oxidation rate of the nitride film, the gate oxide film 24 can be made thicker than the third oxide film 23, and a desired film is formed at the bottom of the trench 3. A thick gate oxide film can be easily formed. When the gate oxide film 24 at the bottom of the trench 3 is formed only by plasma oxidation or radical oxidation, the first nitride film 12 may be excessively oxidized. By forming the oxide film 22, excessive oxidation of the first nitride film 12 can be prevented. The film thickness of the third oxide film 23 is, for example, 10 nm, the film thickness of the gate oxide film 24 is, for example, 13 nm, and the film thickness of the first nitride film 12 is, for example, 5 nm.

  The subsequent steps of FIG. 2f to FIG. 2i are the same as those of FIG.

  Through these steps, the third oxide film 23 serving as the upper oxide film, the first oxide film 11 serving as the lower oxide film, and the first nitride film 12 serving as the charge storage layer are formed so as not to be damaged. Can do. Further, the gate oxide film 24 can be formed so as to have a film thickness sufficient for the separation of the charge storage layer.

<< Third Embodiment >>
3a to 3h are views for explaining a method of manufacturing a semiconductor device according to the third embodiment of the present invention. The process of the third embodiment is basically the same as the process of the first embodiment, but differs in that amorphous silicon is used instead of using a sacrificial oxide film. Since the process before FIG. 3a of 3rd Embodiment is the same as the process to FIG. 1a-1b of 1st Embodiment, description is abbreviate | omitted.

  After the first oxide film 11 is formed along the side wall and bottom of the trench 3 by the steps up to FIG. 1b, in the third embodiment, the first nitride film 31 is formed on the trench 3 (FIG. 3a). The first nitride film 31 is formed on the first oxide film 11. The first nitride film 12 of the first embodiment and the second embodiment is subjected to an oxidation process in the subsequent process for forming the upper oxide film, so that an extra thickness is required for the oxidation. However, in the third embodiment, since the oxidation process is not performed on the first nitride film 31, the film thickness of the first nitride film 31 is the first nitride film 12 of the first embodiment or the second embodiment. It may be thinner than the film thickness. The film thickness of the first nitride film 12 is, for example, 5 nm. A portion of the first nitride film 12 formed on the mask nitride film 2 is integrated with the mask nitride film 2 to form one nitride film.

Next, an amorphous silicon layer 32 is formed on the masking nitride film 2 and the first nitride film 31 (FIG. 3b). The thickness of the amorphous silicon layer 32 is 5 nm, for example.
Next, the mask nitride film 2, the first nitride film 31, and the amorphous silicon layer 32 are separated by anisotropic etching such as RIE (FIG. 3c). At this time, the first oxide film 11 at the bottom of the trench 3 remains without being etched, and the substrate 10 is not damaged because it serves as a protective layer against etching. Further, the separated first nitride film 31 covering the side wall of the trench 3 is protected by the amorphous silicon layer 32 and thus is not damaged by etching.

  Next, a third oxide film 33 and a gate oxide film 34 are formed by thermal oxidation (FIG. 3d). The third oxide film 33 is formed by oxidizing the amorphous silicon layer 32. The gate oxide film 34 is formed by removing the first oxide film 11 at the bottom of the trench 3 by wet etching and then oxidizing the substrate 10 at the bottom of the exposed trench 3. When the thermal oxidation process is performed, even when the entire amorphous silicon layer 32 is oxidized, the first nitride film 31 serving as the charge storage layer is hardly oxidized. Therefore, the thickness of the gate oxide film 34 at the bottom of the trench 3 can be controlled regardless of the thickness of the first nitride film 31. The film thickness of the third oxide film 33 is, for example, 5 nm, the film thickness of the gate oxide film 34 is, for example, 13 nm, and the film thickness of the first nitride film 31 is, for example, 5 nm.

  The subsequent steps of FIG. 3e to FIG. 3h are the same as those of FIG.

  By these steps, the third oxide film 33 serving as the upper oxide film, the first oxide film 11 serving as the lower oxide film, and the first nitride film 31 serving as the charge storage layer are formed so as not to be damaged. Can do. Further, the gate oxide film 34 can be formed so as to have a film thickness sufficient for the separation of the charge storage layer.

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Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Mask oxide film 2 Mask nitride film 3 Trench 10 Substrate 11 1st oxide film 12 1st nitride film 13, 21 2nd oxide film 14, 23, 33 3rd oxide film 15, 24, 34 Gate oxide film 16, 25, 35 Amorphous silicon 17, 26, 36 Bit lines 18, 27, 37 Fourth oxide film 19, 28, 38 Word line 22 Additional oxide film 32 Amorphous silicon layer

Claims (8)

A first silicon oxide film (11), a charge storage layer (12), and a second silicon oxide film (13) are formed in this order so as to cover the side walls and bottom of the trench provided in the silicon substrate (10). 1 process,
By removing the second silicon oxide film (13) and the charge storage layer (12) formed on the bottom, two second silicon oxide films (13) and two charge storage layers (12) are provided. And a second step of exposing the first silicon oxide film (11) formed on the bottom,
Removing the second silicon oxide film (13) formed on the sidewall and the first silicon oxide film (11) formed on the bottom to expose the bottom of the trench;
A fourth step of forming a third silicon oxide film (14, 23) on the charge storage layer (12) formed on the sidewall;
A fifth step of forming a gate oxide film (15, 24) at the exposed bottom of the trench,
A method for manufacturing a semiconductor device. In the second step, the second silicon oxide film (13) and the charge storage layer (12) formed on the bottom by anisotropic etching are removed,
In the third step, the second silicon oxide film (13) formed on the side wall and the first silicon oxide film (11) formed on the bottom are removed by isotropic etching.
A method for manufacturing a semiconductor device according to claim 1. In the fourth step, the third silicon oxide film (14, 23) is formed by plasma oxidation or radical oxidation.
A method for manufacturing a semiconductor device according to claim 1. In the fifth step, the gate oxide films (15, 24) are formed by plasma oxidation or radical oxidation simultaneously with the formation of the third silicon oxide films (14, 23) in the fourth step.
A method for manufacturing a semiconductor device according to claim 3. In the fifth step, the gate oxide film (15, 24) is formed by a combination of thermal oxidation and plasma oxidation or only thermal oxidation.
A method for manufacturing a semiconductor device according to claim 3. In the fifth step, the gate oxide film (15) is formed by first performing thermal oxidation and then performing plasma oxidation.
A method for manufacturing a semiconductor device according to claim 5. A first silicon oxide film (11), a charge storage layer (12), and an amorphous silicon layer (32) are formed in this order so as to cover the side walls and bottom of the trench provided in the silicon substrate (10). 1 process,
By removing the amorphous silicon layer (32) and the charge storage layer (12) stacked on the bottom, each of the second silicon oxide film (13) and the charge storage layer (12) becomes two. A second step of separating and exposing the first silicon oxide film (11) formed on the bottom;
A third step of thermally oxidizing the amorphous silicon layer (32) on the sidewall to form a third silicon oxide film (33) covering the charge storage layer (12);
And a fourth step of forming a gate oxide film (34) on the first silicon oxide film (11) formed on the bottom,
A method for manufacturing a semiconductor device. It was manufactured by the manufacturing method according to any one of claims 1 to 7.
Semiconductor device.

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