JP2010034390A - Multilayer printed wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board the deformation of which can be reduced while suppressing an increase in thickness. <P>SOLUTION: The multilayer printed wiring board 1 includes: an insulating resin layer 11; an electronic component 13 bonded onto the insulating resin layer 11; spacers 14 bonded onto the insulating resin layer 11; reinforcing members 16; and an interlayer adhesion layer 12 provided in a gap around the electronic component 13 and reinforcing members 16 and containing a resin; and an insulating resin layer 21 provided on the adhesion layer. The reinforcing members 16 are made of a shape memory alloy and enclose the electronic component in plan view. The reinforcing members 16 are embedded in the spacers 14. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a multilayer printed wiring board provided with a resin layer.

  Conventionally, a multilayer printed wiring board having a resin layer on which a patterned wiring layer is formed is known. Since the resin layer is easily deformed due to warping or distortion caused by heating, a technique for suppressing the deformation is desired.

  Patent Document 1 discloses a component-embedded substrate including an insulating base material, a wiring pattern formed on one surface of the insulating base material, and a correction material formed on the other surface of the insulating base material. It is disclosed. The correction material is made of a material such as quartz having a thermal expansion coefficient comparable to or lower than that of silicon. Thus, in the component-embedded substrate of Patent Document 1, the insulating base material is reinforced by the correction material having a low thermal expansion coefficient.

  However, in the component-embedded substrate of Patent Document 1, since the insulating base material and the correction material having different thermal expansion coefficients are joined, there is a problem that when heated, the substrate is deformed due to warpage or distortion.

  Therefore, the wiring boards described in Patent Document 2 and Patent Document 3 include an insulating layer, a wiring portion formed in the insulating layer, and a pair of reinforcing layers provided on substantially the entire upper and lower surfaces of the insulating layer. Yes.

Thus, in the wiring board of patent document 2 and 3, the curvature at the time of heating was able to be reduced by providing a reinforcement layer on both surfaces of an insulating layer.
JP 2006-351819 A JP 2007-059821 A JP 2006-339421 A

  However, in the techniques of Patent Documents 2 and 3, since the reinforcing layer is provided on substantially the entire upper and lower surfaces of the insulating layer, the electronic component and the reinforcing layer overlap. For this reason, there exists a subject that the whole thickness of a wiring board becomes large.

  The present invention was created to solve the above-described problems, and an object of the present invention is to provide a multilayer printed wiring board capable of reducing deformation while suppressing an increase in thickness and a method for manufacturing the multilayer printed wiring board. Yes.

  The invention according to claim 1 includes a first resin layer, an electronic component bonded on the first resin layer, a shape memory alloy, a reinforcing member surrounding the electronic component in a plan view, and the electronic A multilayer printed wiring board comprising: an adhesive layer including a resin provided in a space around a component and the reinforcing member; and a second resin layer disposed on the adhesive layer.

  The invention according to claim 2 includes a spacer that surrounds the electronic component, and the reinforcing member is embedded in or adhered to the spacer. It is.

  The invention according to claim 3 is the multilayer printed wiring board according to claim 1 or 2, wherein the first resin layer and the second resin layer have flexibility.

  The invention according to claim 4 is characterized in that a via hole is formed in the first resin layer or the second resin layer, and a through electrode made of conductive paste or metal plating is formed in the via hole. The multilayer printed wiring board according to any one of claims 1 to 3.

  According to the present invention, the electronic component is surrounded by the reinforcing member made of the shape memory alloy. Accordingly, the reinforcing member and the electronic component can be arranged at the same height as the electronic component without being overlapped, or the reinforcing member can be embedded in the adhesive layer. As a result, deformation such as warpage can be suppressed while suppressing an increase in the overall thickness.

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a cross-sectional view of a multilayer printed wiring board according to the first embodiment. FIG. 2 is a plan view of the vicinity of the electronic component. In the following description, the up and down directions indicated by arrows in FIG.

  As shown in FIG.1 and FIG.2, the multilayer printed wiring board 1 by 1st Embodiment is comprised by the 3 layer structure. The multilayer printed wiring board 1 includes a first base material 2, a second base material 3, and a third base material 4.

  The first substrate 2 includes an insulating resin layer 11, an interlayer adhesive layer 12, an electronic component 13, a spacer 14, a copper wiring 15, and a pair of reinforcing members 16. The insulating resin layer 11 corresponds to the first resin layer described in the claims.

  The insulating resin layer 11 has flexibility. The insulating resin layer 11 is made of a polyimide film having a thickness of about 25 μm.

  The interlayer adhesive layer 12 is made of a thermoplastic epoxy film. The interlayer adhesive layer 12 is provided between the upper surface of the insulating resin layer 11 and the lower surface of an insulating resin layer 21 described later. That is, the interlayer adhesive layer 12 is filled in the gap around the electronic component 13, the spacer 14, and the reinforcing member 16. Thereby, the interlayer adhesive layer 12 functions as a filler that bonds the first base material 2 and the second base material 3 and suppresses the positional deviation of the electronic component 13.

  The electronic component 13 is bonded to the insulating resin layer 11 via the interlayer adhesive layer 12. The electronic component 13 is formed in a substantially rectangular parallelepiped shape. An electrode pad 13 a is provided on the upper surface of the electronic component 13.

  The spacer 14 is made of a hard material such as glass epoxy resin. The height of the spacer 14 is the same as that of the electronic component 13. An opening 14 a for installing the electronic component 13 is formed at the center of the spacer 14. The spacer 14 is bonded to the insulating resin layer 11 via the interlayer adhesive layer 12. The spacer 14 is disposed at a predetermined interval from the electronic component 13. A patterned copper wiring 15 is formed on the upper surface of the spacer 14.

  The reinforcing member 16 is for suppressing deformation due to warpage or the like. As shown in FIGS. 1 and 2, the reinforcing member 16 is formed in a square plate shape having a thickness smaller than that of the electronic component 13. An opening 16 a that is larger than the plane area of the electronic component 13 is formed in the central portion of the reinforcing member 16. The electronic component 13 is disposed in the opening 16 a of the reinforcing member 16. Thereby, the electronic component 13 is surrounded by the reinforcing member 16 in plan view. The reinforcing member 16 is made of a Ti—Ni alloy that is a shape memory alloy. That is, the reinforcing member 16 returns to the original shape shown in FIGS. 1 and 2 when it reaches a predetermined temperature (for example, 200 ° C.). The predetermined temperature here refers to the heating temperature in the reflow process, the heating temperature in the heat resistance reliability test, and the like. The pair of reinforcing members 16 are embedded in the upper end portion and the lower end portion of the spacer 14. The pair of reinforcing members 16 are embedded in the same position of the spacer 14 in plan view.

  The second base material 3 is bonded to the upper surface of the first base material 2. The second base material 3 includes an insulating resin layer 21, a copper wiring 22, and a through electrode 24. A via hole 25 penetrating to the copper wiring 22 is formed in the insulating resin layer 21. The insulating resin layer 21 corresponds to the second resin layer described in the claims.

  The insulating resin layer 21 has flexibility. The insulating resin layer 21 is made of a polyimide film having a thickness of about 25 μm. The insulating resin layer 21 is bonded onto the interlayer adhesive layer 12.

  The copper wiring 22 is formed on the insulating resin layer 21. The copper wiring 22 is patterned into a desired shape. The copper wiring 22 has a thickness of about 12 μm.

  The through electrode 24 is embedded in the via hole 25. A part of the through electrode 24 protrudes from the via hole 25 and is embedded in the interlayer adhesive layer 12. The through electrode 24 is made of a conductive paste in which tin is mixed in a binder made of a thermosetting resin. The upper end portion of the through electrode 24 is connected to the copper wiring 22. The lower end portion of the through electrode 24 is connected to the copper wiring 15 of the first base material 2 or the electrode pad 13a.

  The third base material 4 is bonded to the upper surface of the second base material 3. The third base material 4 includes an insulating resin layer 31, a copper wiring 32, an interlayer adhesive layer 33, and a through electrode 34 formed in the via hole 35. The third substrate 4 has the same configuration as the second substrate 3 except that the pattern of the copper wiring 32 and the arrangement of the through electrodes 34 are different.

  Next, the manufacturing method of the multilayer printed wiring board 1 by 1st Embodiment mentioned above is demonstrated. 3-6 is a figure explaining the preparation methods of a 1st base material. 7-13 is a figure explaining the preparation methods of a 3rd base material. FIG. 14 is a diagram for explaining a lamination process of the first to third base materials.

  First, the manufacturing method of the 1st base material 2 is demonstrated.

  As shown in FIG. 3, an interlayer adhesive material 12a made of a thermoplastic epoxy film is bonded to the upper surface of an insulating resin layer 11 made of a polyimide film by a hot press.

  Next, as shown in FIG. 4, the electronic component 13 is bonded to a predetermined position on the upper surface of the insulating resin layer 11 through the interlayer adhesive material 12 a. Here, the electronic component 13 is installed so that the electrode pad 13a is on the upper side.

  Next, as shown in FIG. 5, a spacer 14 having the same height as the electronic component 13 is bonded to a predetermined position on the upper surface of the insulating resin layer 11 via an interlayer adhesive material 12 a. The spacer 14 is provided with a reinforcing member 16 made of a shape memory alloy. Here, the spacer 14 is disposed so that the electronic component 13 is accommodated in the opening 14 a of the spacer 14 and a predetermined interval is provided between the electronic component 13 and the inner wall of the spacer 14. Accordingly, the electronic component 13 is surrounded by the spacer 14 and the reinforcing member 16.

  Next, as shown in FIG. 6, a copper wiring 15 is formed on the upper surface of the spacer 14.

  Thereby, the 1st base material 2 is completed.

  Next, a method for producing the third substrate 4 will be described.

  First, as shown in FIG. 7, a single-sided copper-clad laminate (single-sided CCL) in which a copper foil 32 </ b> A is formed on the upper surface of the insulating resin layer 31 is prepared. Next, an etching resist is laminated on the upper surface of the copper foil 32A. Thereafter, the pattern of the copper wiring 32 is exposed and developed on the etching resist, and the resist film 51 is patterned.

  Next, as shown in FIG. 8, the copper foil 32A exposed from the resist film 51 is etched with a cupric chloride bath or a ferric chloride bath. As a result, a patterned copper wiring 32 is formed on the insulating resin layer 31. Thereafter, the resist film 51 is removed.

  Next, as shown in FIG. 9, an interlayer adhesive material 33a made of a thermoplastic epoxy film is bonded to the lower surface of the insulating resin layer 31 by a hot press.

  Next, as shown in FIG. 10, a mask film 52 made of a polyimide film having a thickness of about 25 μm is bonded to the lower surface of the interlayer adhesive material 33a by a hot press.

Next, as shown in FIG. 11, the YAG laser device irradiates the laser from the mask film 52 side. Thereby, a via hole 35 having a diameter of about 100 μm that penetrates to the copper wiring 32 is formed in the mask film 52, the interlayer adhesive material 33 a, and the insulating resin layer 31. Thereafter, a plasma desmear process using a mixed gas of CF ₄ and O ₂ is performed, and the smear in the via hole 35 is removed.

  Next, as shown in FIG. 12, a conductive paste in which tin is mixed in a binder made of an epoxy-based thermosetting resin is filled in by a screen printing method. Thereby, the through electrode 34 connected to the copper wiring 32 is formed.

  Next, as shown in FIG. 13, the mask film 52 is removed. Thereby, the lower end part of the penetration electrode 34 is exposed from the lower surface of the interlayer adhesive material 33a.

  As a result, the third substrate 4 having an IVH (Interstitial Via Hole) structure in which the through electrode 34 protrudes downward is completed.

  Since the manufacturing process of the 2nd base material 3 is substantially the same as the 3rd base material 4, it abbreviate | omits. An interlayer adhesive material 12b for forming the interlayer adhesive layer 12 is bonded to the lower surface of the insulating resin layer 21 of the second base material 3.

  Next, as shown in FIG. 14, the first base material 2, the second base material 3, and the third base material are connected so that the through electrodes 24 and 34 and the electrode pads 13 a or the copper wirings 15 and 22 are connected. 4 is aligned. Thereafter, the atmosphere around each layer 2 to 4 is reduced to 1 kPa or less. In this state, the layers 2 to 4 are pressurized while being heated by a hot press. Thereby, the interlayer adhesive materials 12a, 12b, and 33a are softened and filled in the gaps around the electronic component 13, the spacer 14, the reinforcing member 16, and the like. Moreover, the through electrodes 24 and 34 made of a conductive paste are also cured by this heating. Thereafter, by cooling, the interlayer adhesive materials 12a, 12b, and 33a are cured to form the interlayer adhesive layers 12 and 33, and the layers 2 to 4 are bonded. Thereby, each layer 2-4 is laminated | stacked collectively.

  Next, a surface protection layer such as a coverlay (CL) or solder resist (SR), or an electrode pad (not shown) with tin plating or gold plating exposed to the outside is formed on the surface. Thereafter, processing such as external processing is performed. As a result, the multilayer printed wiring board 1 shown in FIG. 1 is completed. After this, a reflow process for mounting the multilayer printed wiring board 1 on the surface, a heat reliability test, and the like are performed.

  As described above, in the multilayer printed wiring board 1 according to the first embodiment, the electronic component 13 is surrounded by the reinforcing member 16 made of a shape memory alloy that returns to its original shape when a predetermined temperature (for example, 200 ° C.) is reached. is doing. Thereby, even when it is heated to 250 ° C. or higher in a reflow process or a heat resistance reliability test with a large deformation due to warpage or the like, it is possible to suppress deformation such as warpage or distortion and suppress a decrease in flatness. For this reason, the mounting defect of the electronic component 13 can be reduced.

  In the multilayer printed wiring board 1, the reinforcing member 16 is configured to surround the electronic component 13. For this reason, in the plan view, the electronic component 13 and the reinforcing member 16 can be embedded in the spacer 14 without overlapping at the same position, so that the above-described deformation suppressing effect can be achieved without increasing the overall thickness. Can play.

(Second Embodiment)
Next, a second embodiment in which the above-described embodiment is partially changed will be described. FIG. 15 is a plan view of the vicinity of an electronic component in the second embodiment. In addition, the same code | symbol is attached | subjected to the structure similar to embodiment mentioned above, and description is abbreviate | omitted.

  As shown in FIG. 15, in the second embodiment, the reinforcing member 16A is formed in an annular shape. An opening 16Aa for enclosing the electronic component 13 is formed at the center of the reinforcing member 16A. In the second embodiment, the reinforcing member 16A is embedded in the spacer 14.

(Third embodiment)
Next, a third embodiment in which the above-described embodiment is partially changed will be described. FIG. 16 is a cross-sectional view of a multilayer printed wiring board according to the third embodiment. In addition, the same code | symbol is attached | subjected to the structure similar to embodiment mentioned above, and description is abbreviate | omitted.

  As shown in FIG. 16, in the multilayer printed wiring board 1 </ b> B according to the third embodiment, the reinforcing member 16 </ b> B made of a shape memory alloy is bonded to the upper surface and the lower surface of the spacer 14 via the adhesive material 41. The shape of the reinforcing member 16B is the same as that of the above-described embodiment. Even if comprised in this way, the increase in the whole thickness can be suppressed by embedding reinforcement member 16B in interlayer adhesion layer 12. Moreover, the increase in the whole thickness can also be suppressed by making the spacer 14 thinner by the thickness of the reinforcing member 16B.

(Fourth embodiment)
Next, a fourth embodiment in which the above-described embodiment is partially changed will be described. FIG. 17 is a cross-sectional view of a multilayer printed wiring board according to the fourth embodiment. In addition, the same code | symbol is attached | subjected to the structure similar to embodiment mentioned above, and description is abbreviate | omitted.

  As shown in FIG. 17, in the multilayer printed wiring board 1 </ b> C according to the fourth embodiment, the spacer 14 </ b> C is configured by a double-sided CCL having a resin layer 42 and a pair of copper foils 43. Here, the outer copper foil 43 and the inner copper foil 43 are patterned so as to form a predetermined interval. The reinforcing member 16 </ b> C made of a shape memory alloy is disposed between the outer copper foil 43 and the inner copper foil 43. The shape of the reinforcing member 16C is the same as that of the above-described embodiment. Thereby, copper foil 43, 43 can be functioned as a positioning member of reinforcing member 16C. As a result, the reinforcing member 16C can be easily installed.

(Fifth embodiment)
Next, a fifth embodiment in which the above-described embodiment is partially changed will be described. FIG. 18 is a cross-sectional view of a multilayer printed wiring board according to the fifth embodiment. In addition, the same code | symbol is attached | subjected to the structure similar to embodiment mentioned above, and description is abbreviate | omitted.

  As shown in FIG. 18, the multilayer printed wiring board 1 </ b> D of the fifth embodiment has a four-layer structure in which four base materials 2, 3, 5, and 6 are laminated.

  The fourth substrate 5 includes an insulating resin layer 61 and a copper wiring 62 formed on the lower surface of the insulating resin layer 61. The fourth substrate 5 is bonded to the lower surface of the first substrate 2 via the interlayer adhesive layer 63.

  The fifth substrate 6 includes an insulating resin layer 65 and a copper wiring 66 formed on the lower surface of the insulating resin layer 65. The fifth substrate 6 is bonded to the lower surface of the fourth substrate 5 via the interlayer adhesive layer 67.

  In the multilayer printed wiring board 1 </ b> D, the through electrode 44 formed in the via hole 45 formed in the base material 2, 3, 5, 6 is configured by copper plating. A part of the through electrode 44 is formed so as to penetrate all the base materials 2, 3, 5, 6.

  Next, a method for manufacturing the multilayer printed wiring board 1D according to the fifth embodiment will be described. 19 and 20 are diagrams for explaining a method of manufacturing a multilayer printed wiring board according to the fifth embodiment.

  First, as shown in FIG. 19, a spacer 14 having an opening at the center is placed on the insulating resin layer 11 via an interlayer adhesive material 12a. Reinforcing members 16 made of a shape memory alloy are embedded in the inner peripheral portions of the upper and lower surfaces of the spacer 14. Then, the electronic component 13 is installed in the opening part 14a of the spacer 14 by a reflow process. Here, the electronic component 13 is connected to the copper wiring 15 on the upper surface of the insulating resin layer 11 via leaded or lead-free solder 46.

  Next, as shown in FIG. 20, the second base material 3 manufactured using the single-sided CCL is bonded to the upper surface of the first base material 2 through an interlayer adhesive layer 63. Thereafter, a single-sided CCL for producing the fourth substrate 5 is bonded to the lower surface of the first substrate 2 through the interlayer adhesive layer 67. Next, a via hole 45 is formed at a predetermined position of the fourth base material 5 with a laser. Thereafter, the through electrode 44 is formed on the inner wall surface of the via hole 45 by performing copper plating. Then, the 4th base material 5 in which the copper wiring 62 was formed is completed by patterning the copper foil of single-sided CCL.

  Next, as shown in FIG. 18, a single-sided CCL for producing the fifth substrate 6 is bonded to the lower surface of the fourth substrate 5 through an interlayer adhesive layer 67. Thereafter, a via hole 45 penetrating the first base material 2, the second base material 3, the fourth base material 5 and the fifth base material 6 is formed by a laser. In addition, a via hole 45 penetrating the fifth substrate 6 is also formed at the same time. Next, the through electrode 44 is formed on the inner wall surface of the via hole 45 by copper plating. Then, the 5th base material 6 in which the copper wiring 66 was formed is completed by patterning the copper foil of single sided CCL.

  As a result, the multilayer printed wiring board 1D shown in FIG. 18 is completed.

(Sixth embodiment)
Next, a sixth embodiment in which the above-described embodiment is partially changed will be described. FIG. 21 is a view corresponding to FIG. 14 in the manufacturing process of the sixth embodiment. In addition, the same code | symbol is attached | subjected to the structure similar to embodiment mentioned above, and description is abbreviate | omitted.

  As shown in FIG. 21, in the multilayer printed wiring board 1E according to the sixth embodiment, the electrode pads 13a of the electronic component 13 are installed downward. In addition, the electrode pad 13 a is connected to the copper wiring 15 formed on the lower surface of the insulating resin layer 11 of the first base 2 by a through electrode 71 made of a conductive paste. The through electrode 71 is formed in the via hole 72 formed in the insulating resin layer 11.

(Seventh embodiment)
Next, a seventh embodiment in which the above-described embodiment is partially changed will be described. FIG. 22 is a view corresponding to FIG. 14 in the manufacturing process of the seventh embodiment. In addition, the same code | symbol is attached | subjected to the structure similar to embodiment mentioned above, and description is abbreviate | omitted.

  As shown in FIG. 22, in the multilayer printed wiring board 1 </ b> F according to the seventh embodiment, the electrode pads 13 a are provided on both the upper and lower surfaces of the electronic component 13. The upper electrode pad 13a is connected to the copper wiring 22 of the second substrate 3 by a through electrode 24 made of a conductive paste. The lower electrode pad 13a is connected to the copper wiring 15 formed on the lower surface of the insulating resin layer 11 of the first substrate 2 by a through electrode 71 made of a conductive paste.

  As mentioned above, although this invention was demonstrated in detail using embodiment, this invention is not limited to embodiment described in this specification. The scope of the present invention is determined by the description of the scope of claims and the scope equivalent to the description of the scope of claims. Hereinafter, modified embodiments in which the above-described embodiment is partially modified will be described.

  The materials, shapes, numerical values, and the like of each configuration described above are examples and can be changed as appropriate.

  For example, the reinforcing member may be made of another shape memory alloy such as an Fe—Mg—Si alloy.

  The insulating resin layer is preferably made of a flexible resin. For example, the insulating resin layer may be composed of other resins such as polyimide resin, liquid crystal polymer, PET (polyethylene terephthalate), and PEN (polyethylene naphthalate). As the insulating resin layer, a resin that is cured by UV (ultraviolet) irradiation may be applied.

  Moreover, as single-sided CCL, you may apply the single-sided CCL produced by what is called the casting method which apply | coated polyimide varnish to copper foil and hardened the varnish. As another single-sided CCL, a single-sided CCL in which copper is grown on the seed layer after the seed layer is sputtered on the polyimide resin film may be applied. As another single-sided CCL, a single-sided CCL obtained by bonding rolled or electrolytic copper foil and a polyimide resin film with an adhesive may be applied.

  As the interlayer adhesive layer, another thermoplastic resin film made of polyimide resin or the like, a thermosetting film made of epoxy resin or the like, or a varnish-like resin may be applied.

  Further, when forming the via hole, laser irradiation may be performed by a carbon dioxide laser device, an excimer laser device, or the like. Further, the via hole may be formed by drilling or chemical etching.

  Further, the plasma desmear treatment of the via hole may be performed with an inert gas such as Ar gas. Furthermore, smears in via holes may be removed by wet desmear treatment using a chemical solution or the like.

  Moreover, what mixed the metal particle with low electrical resistance and a low melting-point metal in the binder can be applied to the electrically conductive paste which comprises a penetration electrode. Here, at least one type of metal particles selected from nickel (Ni), silver (Ag), and copper (Cu) may be applied to the metal particles having low electrical resistance. The low melting point metal particles may be at least one kind of low melting point metal particles selected from bismuth (Bi), indium (In), lead (Pb), and zinc (Zn). Here, the low melting point metal particles are preferably tin that can be alloyed with copper wiring.

  Moreover, you may comprise a spacer with soft materials, such as a polyimide-type resin. Furthermore, general-purpose double-sided CCL, CCL in which TH (Through Hole) plating or LVH (Laser Via Hole) plating is conducted may be applied to the spacer.

It is sectional drawing of the multilayer printed wiring board by 1st Embodiment. It is a top view of an electronic component vicinity. It is a figure explaining the preparation methods of the 1st substrate. It is a figure explaining the preparation methods of the 1st substrate. It is a figure explaining the preparation methods of the 1st substrate. It is a figure explaining the preparation methods of the 1st substrate. It is a figure explaining the preparation methods of the 3rd substrate. It is a figure explaining the preparation methods of the 3rd substrate. It is a figure explaining the preparation methods of the 3rd substrate. It is a figure explaining the preparation methods of the 3rd substrate. It is a figure explaining the preparation methods of the 3rd substrate. It is a figure explaining the preparation methods of the 3rd substrate. It is a figure explaining the preparation methods of the 3rd substrate. It is a figure explaining the lamination process of the 1st-3rd substrate. It is a top view of the electronic component vicinity in 2nd Embodiment. It is sectional drawing of the multilayer printed wiring board by 3rd Embodiment. It is sectional drawing of the multilayer printed wiring board by 4th Embodiment. It is sectional drawing of the multilayer printed wiring board by 5th Embodiment. It is a figure explaining the manufacturing method of a multilayer printed wiring board. It is a figure explaining the manufacturing method of a multilayer printed wiring board. FIG. 15 is a view corresponding to FIG. 14 in the manufacturing process of the sixth embodiment. FIG. 15 is a view corresponding to FIG. 14 in the manufacturing process of the seventh embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 1B, 1C, 1D, 1E, 1F Multilayer printed wiring board 2 1st base material 3 2nd base material 4 3rd base material 5 4th base material 6 5th base materials 11, 21, 31, 61, 65 Insulation Resin layer 12, 33, 63, 67 Interlayer adhesive layer 12a, 12b, 33a Interlayer adhesive material 13 Electronic component 13a Electrode pad 14, 14C Spacer 14a Openings 15, 22, 32, 62, 66 Copper wiring 16, 16A, 16B 16C Reinforcing member 16a, 16Aa Opening 24, 34, 44, 71 Through electrode 25, 35, 45, 72 Via hole 32A, 43 Copper foil 41 Adhesive 42 Resin layer 46 Solder

Claims (4)

A first resin layer;
An electronic component bonded on the first resin layer;
A reinforcing member made of a shape memory alloy and surrounding the electronic component in plan view;
An adhesive layer including a resin provided in a gap around the electronic component and the reinforcing member;
A multilayer printed wiring board, comprising: a second resin layer disposed on the adhesive layer. A spacer surrounding the electronic component;
The multilayer printed wiring board according to claim 1, wherein the reinforcing member is embedded in or adhered to the spacer.   The multilayer printed wiring board according to claim 1, wherein the first resin layer and the second resin layer have flexibility. Via holes are formed in the first resin layer or the second resin layer,
The multilayer printed wiring board according to any one of claims 1 to 3, wherein a through electrode made of a conductive paste or metal plating is formed in the via hole.