JP2009520363A5 - - Google Patents
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- Publication number
- JP2009520363A5 JP2009520363A5 JP2008545893A JP2008545893A JP2009520363A5 JP 2009520363 A5 JP2009520363 A5 JP 2009520363A5 JP 2008545893 A JP2008545893 A JP 2008545893A JP 2008545893 A JP2008545893 A JP 2008545893A JP 2009520363 A5 JP2009520363 A5 JP 2009520363A5
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- active
- stress
- contacts
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/300,091 | 2005-12-14 | ||
| US11/300,091 US7511360B2 (en) | 2005-12-14 | 2005-12-14 | Semiconductor device having stressors and method for forming |
| PCT/US2006/060638 WO2007097814A2 (en) | 2005-12-14 | 2006-11-08 | Semiconductor device having stressors and method for forming |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009520363A JP2009520363A (ja) | 2009-05-21 |
| JP2009520363A5 true JP2009520363A5 (https=) | 2010-01-07 |
| JP5323493B2 JP5323493B2 (ja) | 2013-10-23 |
Family
ID=38138439
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008545893A Expired - Fee Related JP5323493B2 (ja) | 2005-12-14 | 2006-11-08 | ストレッサを有する半導体デバイスおよびその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7511360B2 (https=) |
| JP (1) | JP5323493B2 (https=) |
| CN (1) | CN101375379B (https=) |
| WO (1) | WO2007097814A2 (https=) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7420202B2 (en) * | 2005-11-08 | 2008-09-02 | Freescale Semiconductor, Inc. | Electronic device including a transistor structure having an active region adjacent to a stressor layer and a process for forming the electronic device |
| JP4764160B2 (ja) * | 2005-12-21 | 2011-08-31 | 株式会社東芝 | 半導体装置 |
| JP4760414B2 (ja) * | 2006-02-06 | 2011-08-31 | ソニー株式会社 | 半導体装置の製造方法 |
| JP4899085B2 (ja) * | 2006-03-03 | 2012-03-21 | 富士通セミコンダクター株式会社 | 半導体装置およびその製造方法 |
| US8569858B2 (en) * | 2006-12-20 | 2013-10-29 | Freescale Semiconductor, Inc. | Semiconductor device including an active region and two layers having different stress characteristics |
| US7843011B2 (en) * | 2007-01-31 | 2010-11-30 | Freescale Semiconductor, Inc. | Electronic device including insulating layers having different strains |
| US7799678B2 (en) | 2008-01-30 | 2010-09-21 | Freescale Semiconductor, Inc. | Method for forming a through silicon via layout |
| JP2009188330A (ja) * | 2008-02-08 | 2009-08-20 | Fujitsu Microelectronics Ltd | 半導体装置およびその製造方法 |
| US8122394B2 (en) * | 2008-09-17 | 2012-02-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Performance-aware logic operations for generating masks |
| US9564506B2 (en) | 2015-01-06 | 2017-02-07 | International Business Machines Corporation | Low end parasitic capacitance FinFET |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5707486A (en) * | 1990-07-31 | 1998-01-13 | Applied Materials, Inc. | Plasma reactor using UHF/VHF and RF triode source, and process |
| JP2641385B2 (ja) * | 1993-09-24 | 1997-08-13 | アプライド マテリアルズ インコーポレイテッド | 膜形成方法 |
| KR100784603B1 (ko) * | 2000-11-22 | 2007-12-11 | 가부시키가이샤 히타치세이사쿠쇼 | 반도체 장치 및 그 제조 방법 |
| JP4173672B2 (ja) * | 2002-03-19 | 2008-10-29 | 株式会社ルネサステクノロジ | 半導体装置及びその製造方法 |
| JP2004023047A (ja) * | 2002-06-20 | 2004-01-22 | Renesas Technology Corp | 半導体装置 |
| US6674146B1 (en) * | 2002-08-08 | 2004-01-06 | Intel Corporation | Composite dielectric layers |
| CN1245760C (zh) * | 2002-11-04 | 2006-03-15 | 台湾积体电路制造股份有限公司 | Cmos元件及其制造方法 |
| US6870179B2 (en) * | 2003-03-31 | 2005-03-22 | Intel Corporation | Increasing stress-enhanced drive current in a MOS transistor |
| JP2005322730A (ja) * | 2004-05-07 | 2005-11-17 | Renesas Technology Corp | 半導体装置及びその製造方法 |
| US7514752B2 (en) * | 2005-08-26 | 2009-04-07 | Toshiba America Electronic Components, Inc. | Reduction of short-circuiting between contacts at or near a tensile-compressive boundary |
| US7297584B2 (en) * | 2005-10-07 | 2007-11-20 | Samsung Electronics Co., Ltd. | Methods of fabricating semiconductor devices having a dual stress liner |
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2005
- 2005-12-14 US US11/300,091 patent/US7511360B2/en active Active
-
2006
- 2006-11-08 CN CN2006800472576A patent/CN101375379B/zh not_active Expired - Fee Related
- 2006-11-08 JP JP2008545893A patent/JP5323493B2/ja not_active Expired - Fee Related
- 2006-11-08 WO PCT/US2006/060638 patent/WO2007097814A2/en not_active Ceased