JP2009516238A5 - - Google Patents

Download PDF

Info

Publication number
JP2009516238A5
JP2009516238A5 JP2008534745A JP2008534745A JP2009516238A5 JP 2009516238 A5 JP2009516238 A5 JP 2009516238A5 JP 2008534745 A JP2008534745 A JP 2008534745A JP 2008534745 A JP2008534745 A JP 2008534745A JP 2009516238 A5 JP2009516238 A5 JP 2009516238A5
Authority
JP
Japan
Prior art keywords
data set
discrete cosine
input data
cosine transform
digital signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2008534745A
Other languages
English (en)
Japanese (ja)
Other versions
JP4801163B2 (ja
JP2009516238A (ja
Filing date
Publication date
Priority claimed from US11/377,134 external-priority patent/US7725516B2/en
Application filed filed Critical
Publication of JP2009516238A publication Critical patent/JP2009516238A/ja
Publication of JP2009516238A5 publication Critical patent/JP2009516238A5/ja
Application granted granted Critical
Publication of JP4801163B2 publication Critical patent/JP4801163B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2008534745A 2005-10-05 2006-10-05 Ｖｌｉｗアーキテクチャを有する他のｄｓｐのための高速ｄｃｔアルゴリズム Expired - Fee Related JP4801163B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US72413105P 2005-10-05 2005-10-05
US60/724,131 2005-10-05
US11/377,134 US7725516B2 (en) 2005-10-05 2006-03-15 Fast DCT algorithm for DSP with VLIW architecture
US11/377,134 2006-03-15
PCT/US2006/039279 WO2007044598A2 (en) 2005-10-05 2006-10-05 Fast dct algorithm for dsp with vliw architecture

Publications (3)

Publication Number Publication Date
JP2009516238A JP2009516238A (ja) 2009-04-16
JP2009516238A5 true JP2009516238A5 (enExample) 2011-07-21
JP4801163B2 JP4801163B2 (ja) 2011-10-26

Family

ID=37903117

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008534745A Expired - Fee Related JP4801163B2 (ja) 2005-10-05 2006-10-05 Ｖｌｉｗアーキテクチャを有する他のｄｓｐのための高速ｄｃｔアルゴリズム

Country Status (7)

Country Link
US (2) US7725516B2 (enExample)
EP (1) EP1952269A2 (enExample)
JP (1) JP4801163B2 (enExample)
KR (1) KR101041760B1 (enExample)
CN (1) CN101351792B (enExample)
TW (1) TW200801980A (enExample)
WO (1) WO2007044598A2 (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7725516B2 (en) * 2005-10-05 2010-05-25 Qualcomm Incorporated Fast DCT algorithm for DSP with VLIW architecture
US8340058B2 (en) * 2007-10-29 2012-12-25 Nvidia Corporation Headphone with enhanced voice communication
US20090198976A1 (en) * 2008-02-06 2009-08-06 Austel Vernon R Method and structure for high-performance matrix multiplication in the presence of several architectural obstacles
US8825015B2 (en) * 2008-09-18 2014-09-02 Nvidia Corporation Accessing web pages on communication paths with low bandwidth
US9110849B2 (en) * 2009-04-15 2015-08-18 Qualcomm Incorporated Computing even-sized discrete cosine transforms
US9069713B2 (en) * 2009-06-05 2015-06-30 Qualcomm Incorporated 4X4 transform for media coding
US8762441B2 (en) * 2009-06-05 2014-06-24 Qualcomm Incorporated 4X4 transform for media coding
US9075757B2 (en) * 2009-06-24 2015-07-07 Qualcomm Incorporated 16-point transform for media data coding
US9081733B2 (en) * 2009-06-24 2015-07-14 Qualcomm Incorporated 16-point transform for media data coding
US9118898B2 (en) 2009-06-24 2015-08-25 Qualcomm Incorporated 8-point transform for media data coding
US8451904B2 (en) 2009-06-24 2013-05-28 Qualcomm Incorporated 8-point transform for media data coding
TWI415474B (zh) * 2010-07-19 2013-11-11 Mstar Semiconductor Inc 視訊編／解碼器與其方法
US9824066B2 (en) 2011-01-10 2017-11-21 Qualcomm Incorporated 32-point transform for media data coding
US9389854B2 (en) 2013-03-15 2016-07-12 Qualcomm Incorporated Add-compare-select instruction
US9870341B2 (en) * 2016-03-18 2018-01-16 Qualcomm Incorporated Memory reduction method for fixed point matrix multiply

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8601183A (nl) * 1986-05-12 1987-12-01 Philips Nv Discrete cosinus transformatie-inrichting.
JP2646844B2 (ja) * 1990-11-16 1997-08-27 日本電気株式会社 離散コサイン変換装置
JP2928684B2 (ja) * 1991-10-31 1999-08-03 株式会社東芝 Ｖｌｉｗ型演算処理装置
JPH0883264A (ja) * 1994-09-12 1996-03-26 Nippon Telegr & Teleph Corp <Ntt> １次元シストリックアレイ型演算器とそれを用いたｄｃｔ／ｉｄｃｔ演算装置
US5943502A (en) * 1994-12-09 1999-08-24 Neomagic Israel Ltd. Apparatus and method for fast 1D DCT
CN1142162A (zh) * 1995-01-28 1997-02-05 大宇电子株式会社 二维逆离散余弦变换电路
US5826054A (en) * 1996-05-15 1998-10-20 Philips Electronics North America Corporation Compressed Instruction format for use in a VLIW processor
CN1268231A (zh) * 1997-08-25 2000-09-27 夸尔柯姆股份有限公司 数据块规模可变的2维逆向离散余弦变换机
US6173389B1 (en) * 1997-12-04 2001-01-09 Billions Of Operations Per Second, Inc. Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor
JP4158864B2 (ja) * 1998-03-18 2008-10-01 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ マトリックスのコサイン変換を計算するためのデータ処理装置およびその方法
US6154443A (en) 1998-08-11 2000-11-28 Industrial Technology Research Institute FFT-based CDMA RAKE receiver system and method
US6839728B2 (en) * 1998-10-09 2005-01-04 Pts Corporation Efficient complex multiplication and fast fourier transform (FFT) implementation on the manarray architecture
EP1203308A1 (en) 1999-04-29 2002-05-08 Walter E. Pelton Computation of discrete fourier transform
WO2001035267A1 (en) 1999-11-12 2001-05-17 Bops, Incorporated Methods and apparatus for efficient cosine transform implementations
US6754687B1 (en) * 1999-11-12 2004-06-22 Pts Corporation Methods and apparatus for efficient cosine transform implementations
US6804771B1 (en) * 2000-07-25 2004-10-12 University Of Washington Processor with register file accessible by row column to achieve data array transposition
US7027489B2 (en) 2001-04-06 2006-04-11 Interdigital Technology Corporation Iterative fast fourier transform error correction
US7689641B2 (en) * 2003-06-30 2010-03-30 Intel Corporation SIMD integer multiply high with round and shift
EP1536647A1 (en) * 2003-11-26 2005-06-01 STMicroelectronics Limited A video decoding device
FI118747B (fi) 2004-01-23 2008-02-29 Abb Oy Automaattinen ohjauslaite
JP4283131B2 (ja) 2004-02-12 2009-06-24 パナソニック株式会社 プロセッサ及びコンパイル方法
US7725516B2 (en) * 2005-10-05 2010-05-25 Qualcomm Incorporated Fast DCT algorithm for DSP with VLIW architecture

Similar Documents

Publication Publication Date Title
JP2009516238A5 (enExample)
KR102452757B1 (ko) 가속화된 수학 엔진
CN109992743B (zh) 矩阵乘法器
CN107315574B (zh) 一种用于执行矩阵乘运算的装置和方法
US8396916B2 (en) Fast DCT algorithm for DSP with VLIW architecture
US20100274990A1 (en) Apparatus and Method for Performing SIMD Multiply-Accumulate Operations
CN111857819B (zh) 一种用于执行矩阵加/减运算的装置和方法
TW200411540A (en) Method and system for performing calculation operations and a device
WO2022205197A1 (zh) 一种矩阵乘法器、矩阵计算方法及相关设备
CN112446007B (zh) 一种矩阵运算方法、运算装置以及处理器
US20130191431A1 (en) Efficient fir filters
US8787422B2 (en) Dual fixed geometry fast fourier transform (FFT)
CN110782009A (zh) 基于ARMv8体系的计算内核优化方法
JP2002032358A (ja) ２サイクル高速フーリエ変換
CN117709422A (zh) 一种基于risc-v的深度可分离卷积神经网络加速器
US7653676B2 (en) Efficient mapping of FFT to a reconfigurable parallel and pipeline data flow machine
Wu et al. AI-ISP Accelerator with RISC-VISA Extension for Image Signal Processing
KR20080094812A (ko) 개선된 감소 트리 회로를 갖는 부스 곱셈기
JPH0883264A (ja) １次元シストリックアレイ型演算器とそれを用いたｄｃｔ／ｉｄｃｔ演算装置
CN111200732A (zh) 一种反量化反变换方法及装置
CN101246468B (zh) 修改型离散余弦反转换方法
CN118277718A (zh) 一种多核dsp上的通用矩阵乘优化方法及装置
CN115795252A (zh) 一种基于向量处理器的qr分解后的向量乘法实现方法
Gorius " Optimal" Architectures for Implementation of the 8x8 DCT
JP2004206535A (ja) 高速低電力逆離散コサイン変換計算をゼロ値のｄｃｔ係数の相対的出現を利用することによって実行する装置