JP2009302352A - Oxide thin film transistor and method for manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an oxide thin film transistor having good properties and a method for manufacturing the same. <P>SOLUTION: A gate insulating layer 5 is laminated on an upper surface of an oxide semiconductor layer 9. The gate insulating layer 5 is composed of a lower organic insulating layer 51 composed of an organic insulating material, and an upper inorganic insulating layer 52 composed of an inorganic insulating material. Additionally, the inorganic insulation layer 52 is formed by a coating method using a perhydropolysilazane solution. Since only the organic insulating layer 51, which can be formed without damaging the oxide semiconductor layer 9, is brought into contact with the upper surface of the oxide semiconductor layer 9, the gate insulating layer 5 can be formed without damaging the oxide semiconductor layer 9. Furthermore, the inorganic insulation layer 52 can be formed in a simple way and at lower cost without using large-scale equipment by using the coating method. Thus, a high-performance oxide thin film transistor is obtained easily at low cost. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an oxide thin film transistor and a method for manufacturing the same.

  Conventionally, an active drive circuit including a thin film transistor is embedded in each pixel of a flexible display such as organic EL, film liquid crystal, and electronic paper. As a material of the semiconductor layer of the thin film transistor, a Si-based semiconductor such as amorphous silicon or polycrystalline silicon is generally used. However, the formation of the Si-based semiconductor layer requires a temperature of 200 ° C. or higher. Therefore, when a Si-based semiconductor is used as the semiconductor layer, a flexible polymer film having low heat resistance cannot be used as a base material, and there is a problem that it is difficult to form a flexible thin film transistor. .

  In recent years, organic thin film transistors using organic semiconductor materials have been studied. Since the organic semiconductor layer can be formed at a low temperature, there is an advantage that it can be formed on a flexible polymer film having low heat resistance. However, organic semiconductor materials have a problem that they have extremely low carrier mobility and are vulnerable to deterioration over time.

  Thus, in recent years, development of oxide thin film transistors using an oxide as a semiconductor layer has been performed. It is known that an oxide semiconductor layer can be formed at a low temperature and has high carrier mobility. In addition, some oxide semiconductors are transparent oxide semiconductors. If a transparent oxide semiconductor and a known transparent substrate material are selected as materials, a transparent thin film transistor can be formed, and the oxide semiconductor can be expected to have characteristics that have not existed in the past.

  By the way, the insulating layer formed on the upper surface of the oxide semiconductor layer is generally formed by a vacuum process such as a sputtering method or a plasma CVD method. However, these methods have a problem that the apparatus becomes large and costs increase, and the process is complicated. In addition, when an insulating layer is formed by these methods, there is a problem that plasma ions generated from the apparatus in the forming process damage the oxide semiconductor layer and the like.

Thus, for example, Patent Document 1 proposes an oxide thin film transistor that employs an organic polymer as a material for the gate insulating layer. In the semiconductor device described in Patent Document 1 (the oxide thin film transistor in the present application), a polymer resin is used as the material of the gate insulating layer, and thus the gate insulating layer can be formed by a coating method. Thus, the gate insulating layer can be formed without damaging the semiconductor layer.
JP 2007-158147 A

  However, the semiconductor device described in Patent Document 1 also has the following problems. First, since the organic polymer has a low insulating property of the material itself, the insulating property of the gate insulating layer formed of the organic polymer is also low. In addition, since the gate insulating layer formed of an organic polymer has low hardness, the gate insulating layer is damaged when the gate electrode is formed on the upper surface of the gate insulating layer. As a result, the semiconductor device described in Patent Document 1 has a problem in that the gate leakage current increases as a result and the characteristics deteriorate.

  The present invention has been made to solve the above problems, and an object thereof is to provide an oxide thin film transistor that can be manufactured without damaging the semiconductor layer and the gate insulating layer, and a method for manufacturing the same.

  In order to achieve the above object, an oxide thin film transistor according to a first aspect of the present invention includes an insulating layer, a source electrode and a drain electrode provided on the upper surface of the insulating layer so as to be spaced apart from each other, and the source electrode and the drain. An oxide semiconductor layer provided continuously on the upper surface of the insulating layer, the upper surface of the source electrode, and the upper surface of the drain electrode in the gap with the electrode, and an organic provided on at least the upper surface of the oxide semiconductor layer An insulating layer and an inorganic insulating layer provided on the upper surface of the organic insulating layer are provided.

  In the oxide thin film transistor of the invention according to claim 2, in addition to the structure of the invention of claim 1, the inorganic insulating layer has a solution in which a compound containing an inorganic element is dissolved on the upper surface of the organic insulating layer. It is formed by coating.

  According to a third aspect of the present invention, an oxide thin film transistor includes an insulating layer, an oxide semiconductor layer formed on an upper surface of the insulating layer, and an oxide semiconductor layer spaced from each other on the upper surface of the oxide semiconductor layer. A source electrode and a drain electrode provided continuously on the upper surface of the semiconductor layer and the upper surface of the insulating layer, an organic insulating layer provided on at least the upper surface of the oxide semiconductor layer, and an upper surface of the organic insulating layer The inorganic insulating layer is formed by applying a solution in which a compound containing an inorganic element is dissolved to the upper surface of the organic insulating layer.

  Further, in the oxide thin film transistor of the invention according to claim 4, in addition to the constitution of the invention of claim 2 or 3, the compound is perhydropolysilazane.

  In addition to the configuration of the invention according to any one of claims 1 to 4, the oxide thin film transistor of the invention according to claim 5 is provided with a gate electrode or a pixel electrode on the upper surface of the inorganic insulating layer. It is characterized by.

  In the oxide thin film transistor of the invention according to claim 6, in addition to the configuration of the invention according to any of claims 1 to 5, the oxide semiconductor layer includes at least one of In, Ga, and Zn. It is characterized by being formed of an oxide containing an element.

  According to a seventh aspect of the present invention, there is provided an oxide thin film transistor manufacturing method comprising: an insulating layer; a source electrode and a drain electrode formed on an upper surface of the insulating layer; and the insulation between the source electrode and the drain electrode. A method for manufacturing an oxide thin film transistor including an oxide semiconductor layer formed on an upper surface of a layer and a gate electrode, wherein a source electrode and a drain electrode are formed on the upper surface of the insulating layer so as to be spaced apart from each other. And a second step of forming a continuous oxide semiconductor layer on the upper surface of the insulating layer, the upper surface of the source electrode, and the upper surface of the drain electrode in the gap between the source electrode and the drain electrode, and at least the oxidation A third step of forming an organic insulating layer on the upper surface of the physical semiconductor layer, and a fourth step of forming an inorganic insulating layer on the upper surface of the organic insulating layer.

  According to an eighth aspect of the present invention, there is provided a method for manufacturing an oxide thin film transistor, wherein, in the fourth step, a solution in which a compound having an inorganic element is dissolved is added to the organic organic compound. The inorganic insulating layer is formed on the upper surface of the organic insulating layer by coating on the upper surface of the insulating layer.

  According to a ninth aspect of the present invention, there is provided a method for manufacturing an oxide thin film transistor, comprising: an insulating layer; a source electrode and a drain electrode formed on an upper surface of the insulating layer; and the insulation between the source electrode and the drain electrode. A method of manufacturing an oxide thin film transistor including an oxide semiconductor layer formed on a top surface of a layer and a gate electrode, the first step of forming an oxide semiconductor layer on the top surface of the insulating layer, and the oxide A second step of forming a source electrode and a drain electrode separated from each other on the upper surface of the semiconductor layer and continuous with the upper surface of the oxide semiconductor layer and the upper surface of the insulating layer, and at least on the upper surface of the oxide semiconductor layer It includes at least a third step of forming an organic insulating layer and a fourth step of forming an inorganic insulating layer on the upper surface of the organic insulating layer, and the fourth step includes an inorganic element. A solution of a compound which is characterized by applying to the upper surface of the organic insulating layer.

  The oxide thin film transistor manufacturing method of the invention according to claim 10 is characterized in that, in addition to the structure of the invention of claim 8 or 9, the compound is perhydropolysilazane.

  In addition, in the method for manufacturing an oxide thin film transistor according to an eleventh aspect, in addition to the configuration according to any one of the seventh to tenth aspects, a gate electrode or a pixel electrode is formed on the upper surface of the inorganic insulating layer. A fifth step is provided.

  In the oxide thin film transistor manufacturing method according to a twelfth aspect of the invention, in addition to the configuration of the invention according to any one of the seventh to eleventh aspects, the oxide semiconductor layer is at least one of In, Ga, and Zn. It is characterized by being formed of an oxide containing one kind of element.

  An oxide thin film transistor according to a thirteenth aspect is manufactured by the method for manufacturing an oxide thin film transistor according to any one of the seventh to twelfth aspects.

  In the oxide thin film transistor of the invention according to claim 1, the organic insulating layer is provided on the upper surface of the oxide semiconductor layer, and the inorganic insulating layer is provided on the upper surface of the organic insulating layer. Since the top surface of the oxide semiconductor layer is provided with an organic insulating layer that can be formed without damaging the oxide semiconductor layer, the top surface of the oxide semiconductor layer is insulated without damaging the oxide semiconductor layer. A layer having a property can be formed. Further, since the inorganic insulating layer is provided on the upper surface of the organic insulating layer, the organic insulating layer is not exposed to the outside. Although it is known that an organic insulating layer made of an organic polymer is easily damaged by an external cause, the organic insulating layer is not exposed to the outside because the organic insulating layer is not exposed to the outside. In addition, the organic insulating layer is known to have low insulating properties, but by providing an inorganic insulating layer with high insulating properties on the top surface of the organic insulating layer, the insulating performance of the upper portion of the oxide semiconductor layer can be improved. it can. Furthermore, when an inorganic insulating layer is formed on the top surface of an oxide semiconductor layer, it is known that the oxide semiconductor layer is easily damaged in the process of forming the inorganic insulating layer. Since the inorganic insulating layer is not in contact, the oxide semiconductor layer is not damaged in the process of forming the inorganic insulating layer. Therefore, the semiconductor characteristics of the oxide semiconductor layer can be prevented from changing in the formation process of the inorganic insulating layer, and the performance of the oxide thin film transistor can be maintained. In addition, since the oxide semiconductor layer is formed above the source electrode and the drain electrode, the oxide semiconductor layer is not damaged when the source electrode or the drain electrode is formed. Therefore, an oxide thin film transistor having favorable characteristics can be provided.

  In addition, in the oxide thin film transistor of the invention according to claim 2, in addition to the effect of the invention of claim 1, the inorganic insulating layer is coated on the top surface of the organic insulating layer with a solution in which a compound containing an inorganic element is dissolved. It is formed by. Therefore, the inorganic insulating layer can be formed easily and inexpensively without using a large-scale apparatus. Further, it is possible to form an inorganic insulating layer without damaging the organic insulating layer. Thus, an oxide thin film transistor that can be manufactured easily and inexpensively and has good characteristics can be provided.

  In the oxide thin film transistor of the invention according to claim 3, since the source electrode and the drain electrode are formed above the oxide semiconductor layer, the source electrode and the drain electrode are formed when the oxide semiconductor layer is formed. There is no change in surface characteristics. Therefore, for example, even a material whose characteristics are relatively easily changed can be used as the source electrode and the drain electrode. Thereby, the freedom degree at the time of selecting the material of a source electrode and a drain electrode can be expanded. Moreover, the inorganic insulating layer is formed by applying a solution in which a compound containing an inorganic element is dissolved to the upper surface of the organic insulating layer. Therefore, the inorganic insulating layer can be formed easily and inexpensively without using a large-scale apparatus. Further, it is possible to form an inorganic insulating layer without damaging the organic insulating layer. Thus, an oxide thin film transistor that can be manufactured easily and inexpensively and has good characteristics can be provided.

  Moreover, in the oxide thin film transistor of the invention according to claim 4, in addition to the effect of the invention of claim 2 or 3, since perhydropolysilazane is used as a precursor of the inorganic insulating layer, An inorganic insulating layer can be formed. Thereby, a flexible plastic substrate with low heat resistance can be adopted as a substrate, and an oxide thin film transistor having flexibility can be manufactured.

  In addition, in the oxide thin film transistor of the invention according to claim 5, in addition to the effect of the invention according to any of claims 1 to 4, the gate electrode or the pixel electrode is formed on the upper surface of the inorganic insulating layer. When the electrode or the pixel electrode is formed, the organic insulating layer or the semiconductor layer is not damaged. Therefore, characteristics of the organic insulating layer and the semiconductor layer can be maintained, and an oxide thin film transistor having favorable characteristics can be provided.

  In the oxide thin film transistor of the invention according to claim 6, in addition to the effect of the invention according to any of claims 1 to 5, the semiconductor layer contains at least one element of In, Ga, and Zn. Since the oxide thin film transistor is formed using an oxide, an oxide thin film transistor having favorable characteristics can be provided.

  In the oxide thin film transistor manufacturing method of the invention according to claim 7, the source electrode and the drain electrode are formed in the first step, and the oxide semiconductor layer is formed in the second step after the first step. It is formed. Therefore, the oxide semiconductor layer is not damaged when the source electrode and the drain electrode are formed. In the third step, an organic insulating layer that can be formed without damaging the oxide semiconductor layer is formed on the top surface of the oxide semiconductor layer. Therefore, the oxide semiconductor layer is not damaged when a layer having insulating performance is formed on the top surface of the oxide semiconductor layer. In the fourth step, since the inorganic insulating layer is provided on the upper surface of the organic insulating layer, the organic insulating layer is not exposed to the outside. Although it is known that an organic insulating layer made of an organic polymer is easily damaged by an external cause, the organic insulating layer is not exposed to the outside because the organic insulating layer is not exposed to the outside. In addition, the organic insulating layer is known to have low insulating properties, but by providing an inorganic insulating layer with high insulating properties on the top surface of the organic insulating layer, a layer having high insulating performance on the top surface of the oxide semiconductor layer Can be formed. Furthermore, when an inorganic insulating layer is formed on the top surface of an oxide semiconductor layer, it is known that the oxide semiconductor layer is easily damaged in the process of forming the inorganic insulating layer. Since the inorganic insulating layer is not in contact, the oxide semiconductor layer is not damaged in the process of forming the inorganic insulating layer. Therefore, the semiconductor characteristics of the oxide semiconductor layer can be prevented from changing in the formation process of the inorganic insulating layer, and the performance of the oxide thin film transistor can be maintained. Therefore, an oxide thin film transistor having favorable characteristics can be obtained.

  Moreover, in the manufacturing method of the oxide thin film transistor of the invention according to claim 8, in addition to the effect of the invention according to claim 7, in the fourth step, the solution in which the compound having an inorganic element is dissolved in the inorganic insulating layer Is applied to the upper surface of the organic insulating layer. Therefore, the inorganic insulating layer can be formed easily and inexpensively without using a large-scale apparatus. Further, it is possible to form an inorganic insulating layer without damaging the organic insulating layer. Accordingly, an oxide thin film transistor that can be manufactured easily and inexpensively and has good characteristics can be obtained.

  In the method for manufacturing an oxide thin film transistor according to the ninth aspect, the oxide semiconductor layer is formed in the first step, and the source electrode and the drain electrode are formed in the second step. Since the source electrode and the drain electrode are formed after the oxide semiconductor layer, the surface characteristics of the source electrode and the drain electrode are not changed when the oxide semiconductor layer is formed. Therefore, for example, even a material whose characteristics are relatively easily changed can be used as the source electrode and the drain electrode. Thereby, the freedom degree at the time of selecting the material of a source electrode and a drain electrode can be expanded. Moreover, in the fourth step, the inorganic insulating layer is formed by applying a solution in which a compound containing an inorganic element is dissolved to the upper surface of the organic insulating layer. Therefore, the inorganic insulating layer can be formed easily and inexpensively without using a large-scale apparatus. Further, it is possible to form an inorganic insulating layer without damaging the organic insulating layer. Accordingly, an oxide thin film transistor that can be manufactured easily and inexpensively and has good characteristics can be obtained.

  In addition, in the method for manufacturing an oxide thin film transistor of the invention according to claim 10, in addition to the effect of the invention of claim 8 or 9, since perhydropolysilazane is used as a precursor of the inorganic insulating layer, An inorganic insulating layer can be formed below. Thereby, a flexible plastic substrate with low heat resistance can be adopted as a substrate, and an oxide thin film transistor having flexibility can be manufactured.

  In addition, in the manufacturing method of an oxide thin film transistor according to an eleventh aspect, in addition to the effect of the invention according to any one of the seventh to tenth aspects, in the fifth step, the gate electrode or the pixel electrode is an inorganic insulating layer. It is formed on the upper surface. Therefore, when the gate electrode or the pixel electrode is formed in the fifth step, the organic insulating layer or the semiconductor layer is not damaged. Therefore, the characteristics of the organic insulating layer and the semiconductor layer can be maintained, and an oxide thin film transistor having favorable characteristics can be obtained.

  In addition, in the oxide thin film transistor manufacturing method according to the twelfth aspect, in addition to the effect of the invention according to any one of the seventh to eleventh aspects, the oxide semiconductor layer includes at least one of In, Ga, and Zn. Since the oxide thin film is formed using an oxide containing a seed element, an oxide thin film transistor having favorable characteristics can be obtained.

  An oxide thin film transistor according to a thirteenth aspect of the present invention is manufactured using the oxide thin film transistor manufacturing method according to any one of the seventh to twelfth aspects. Therefore, it is possible to provide a high-performance oxide thin film transistor that can be obtained at low cost.

<First Embodiment>
Hereinafter, an oxide thin film transistor 1 according to a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a longitudinal sectional view of an oxide thin film transistor 1 according to the first embodiment, and FIG. 2 is a flowchart showing manufacturing steps of the oxide thin film transistor 1. 3 is a longitudinal sectional view showing a state in which the source electrode 3 and the drain electrode 4 are formed on the upper surface of the substrate 2. FIG. 4 is a diagram between the source electrode 3 and the drain electrode 4 shown in FIG. It is a longitudinal cross-sectional view of the state in which the oxide semiconductor layer 9 is formed. 5 is a longitudinal sectional view showing a state in which an organic insulating layer 51 is formed on the upper surfaces of the source electrode 3, the drain electrode 4, and the oxide semiconductor layer 9, and FIG. 6 shows an upper surface of the organic insulating layer 51. It is a longitudinal cross-sectional view in the state in which the inorganic insulating layer 52 was formed.

  The oxide thin film transistor 1 according to the first embodiment is a so-called “top gate type” oxide thin film transistor in which the gate electrode 6 is located above the source electrode 3 and the drain electrode 4. The oxide thin film transistor 1 of the present embodiment is a top gate type, the gate insulating layer 5 is formed of two layers of an organic insulating layer 51 and an inorganic insulating layer 52, and the inorganic insulating layer 52 is applied by a coating method. It is characterized by being formed by. In the following description, the lower side of the drawing (substrate 2 side) is the lower side, and the upper side of the drawing is the upper side.

  First, the cross-sectional structure of the oxide thin film transistor 1 will be described. An oxide thin film transistor 1 shown in FIG. 1 includes a plate-like substrate 2, and a source electrode 3 and a drain electrode 4 are provided on the upper surface of the substrate 2 so as to be separated from each other. An oxide semiconductor layer 9 is continuously provided on the upper surface of the source electrode 3 and the drain electrode 4 and the upper surface of the substrate 2 sandwiched between the source electrode 3 and the drain electrode 4. A gate insulating layer 5 is provided so as to cover the oxide semiconductor layer 9, the source electrode 3, the drain electrode 4, and the substrate 2. The gate insulating layer 5 includes a lower organic insulating layer 51 that covers at least the oxide semiconductor layer 9, and an upper inorganic insulating layer 52 that covers the upper surface of the organic insulating layer 51. A gate electrode 6 is provided on the upper surface of the inorganic insulating layer 52 at a position facing the oxide semiconductor layer 9.

The substrate 2 is a plate-like member having a flat surface. Various materials are applicable as the material of the substrate 2, but when a conductive material is employed, an insulating film needs to be provided on the surface of the substrate 2. When an insulating material is used as the material of the substrate 2, a plastic substrate is used in addition to a glass substrate or a silicon substrate. When it is desired to impart flexibility to the substrate 2, plastic is particularly used as the material of the substrate 2. Examples of plastic materials include polyethersulfone (PES), polyethylene terephthalate (PET), polyimide (PI), polyethylene naphthalate (PEN), polyetherimide (PEI), polystyrene (PS), and polyvinyl chloride (PVC). ), Polyethylene (PE), polypropylene (PP) and the like. In order to improve the water resistance of the substrate 2, a glass barrier film made of SiO ₂ or SiNx is formed on the surface of the substrate 2. In addition, the board | substrate 2 of 1st Embodiment corresponds to the insulating layer of this invention.

  On the upper surface of the substrate 2, a source electrode 3 and a drain electrode 4 are respectively provided with a separation width of a predetermined channel length. The material of the source electrode 3 and the drain electrode 4 is a single metal such as Au, Ag, Cu, Pd, Al, Mo, Cr, Ti, Ta, Ni, Pt, and W (tungsten), or at least one of the metals. In addition to composites containing copper, conductive oxides such as indium tin oxide (ITO), polyimide (PI), polymethyl methacrylate (PMMA), polyparavinylphenol (PVP), polyethylenedioxythiophene (PEDOT), etc. An applicable polymer is applicable.

An oxide semiconductor layer 9 is continuously provided on each upper surface of the source electrode 3 and the drain electrode 4 and on the upper surface of the substrate 2 sandwiched between the source electrode 3 and the drain electrode 4. A known oxide semiconductor material is used as the material of the oxide semiconductor layer 9, and an oxide semiconductor material containing at least one element of In, Ga, and Zn is more preferably used. Specific examples of the oxide semiconductor material containing at least one element of In, Ga, and Zn include ZnO, InGaZnO ₄ , ZnInO, and In ₂ O ₃ .

  Each upper surface of the oxide semiconductor layer 9, the source electrode 3, the drain electrode 4, and the substrate 2 is covered with a gate insulating layer 5. The gate insulating layer 5 includes a lower organic insulating layer 51 that covers at least the oxide semiconductor layer 9, and an upper inorganic insulating layer 52 that covers the upper surface of the organic insulating layer 51.

  The material of the organic insulating layer 51 is not particularly limited as long as it is an organic material having insulating properties. Specifically, the material of the organic insulating layer 51 is polyimide (PI), polyamide (PA), polyester (PE), polyvinylphenol (PVP), polyvinyl alcohol (PVA), polyvinyl acetate (PVAL), polymethacrylic acid. Methyl (PMMA), polyurethane (PUR), polysulfone (PSF), polyvinylidene fluoride (PVDF), cyanoethyl pullulan, epoxy resin, phenol resin, benzocyclobutene resin, acrylic resin, amorphous perfluoro resin (for example, Saipan Glass Top (registered trademark)) or a polymer alloy of the above resin or a copolymer resin can be used.

  The upper surface of the organic insulating layer 51 is covered with an inorganic insulating layer 52. As the material of the inorganic insulating layer 52, an inorganic / organic composite material may be used, or a material composed only of inorganic components may be used. When an inorganic / organic composite material is used, the main component is an inorganic component. An inorganic oxide etc. are mentioned as an inorganic component used as a main component. Examples of the organic component serving as a subcomponent include polyimide (PI), polymethyl methacrylate (PMMA), and silicon resin.

  A gate electrode 6 is provided on the upper surface of the inorganic insulating layer 52 at a position facing the oxide semiconductor layer 9. The material of the gate electrode 6 can be the same as that of the source electrode 3 and the drain electrode 4 described above.

  Next, the manufacturing process of the oxide thin film transistor 1 will be described. As shown in FIG. 2, the manufacturing process of the oxide thin film transistor 1 includes a source / drain electrode formation step (S1) in which the source electrode 3 and the drain electrode 4 are formed on the upper surface of the substrate 2, and the source electrode 3 and the drain electrode 4 respectively. A semiconductor layer forming step (S2) for forming the oxide semiconductor layer 9 on the upper surface of the substrate 2 between, and a gate insulating layer forming step (S3) for forming the gate insulating layer 5 on at least the upper surface of the oxide semiconductor layer 9, And a gate electrode forming step (S4) for forming a gate electrode 6 on the upper surface of the gate insulating layer 5. The gate insulating layer forming step (S3) includes an organic insulating layer forming step (S31) for forming the organic insulating layer 51 so as to cover at least the upper surface of the oxide semiconductor layer 9, and an inorganic layer so as to cover the upper surface of the organic insulating layer 51. And an inorganic insulating layer forming step (S32) for forming the insulating layer 52.

  First, the source / drain electrode forming step of S1 is performed. In this source / drain electrode formation step (S1), the source electrode 3 and the drain electrode 4 are formed on the upper surface of the substrate 2 as shown in FIG. The method for forming the source electrode 3 and the drain electrode 4 is not particularly limited. A method of removing an unnecessary portion by patterning after forming a thin film of a material for forming an electrode on the upper surface of the substrate 2 is generally used, but various methods can also be applied to a film forming method and a patterning method. . Specifically, a sputtering method, a vacuum deposition method, a CVD method, a plating method, or the like can be applied as the film forming method, and a photolithography method, a screen printing method, or the like can be applied as the patterning method.

  Next, the semiconductor layer forming step of S2 is performed. In the semiconductor layer forming step (S2), as shown in FIG. 4, the oxide semiconductor layer 9 is continuous with the upper surface of the substrate 2 between the source electrode 3 and the drain electrode 4 and the upper surface of the source electrode 3 and the drain electrode 4. Formed. A method of forming the oxide semiconductor layer 9 is generally a method of removing unnecessary portions by patterning after forming a semiconductor thin film. A sputtering method is suitable as the film forming method, but is not limited thereto. As the patterning method, a photolithography method, a screen printing method, or the like can be used.

  Next, a gate insulating layer forming step of S3 is performed. As shown in FIG. 2, the gate insulating layer forming step (S3) includes an organic insulating layer forming step (S31) in which the lower organic insulating layer 51 is formed and an inorganic insulating layer in which the upper inorganic insulating layer 52 is formed. A layer forming step (S32).

  In the organic insulating layer forming step (S31), as shown in FIG. 5, the source electrode 3, the drain electrode 4, the source electrode 3, and the drain electrode 4 among the upper surfaces of the oxide semiconductor layer 9 and the upper surface of the substrate 2, An organic insulating layer 51 is formed so as to cover a portion where the oxide semiconductor layer 9 is not provided. The method for forming the organic insulating layer 51 is not particularly limited, but it is preferable from the viewpoint of cost to use a coating method. Various methods can be applied as the coating method, and specifically, spin coating method, slit coating method, dip coating method, spray method, roll coating method, curtain coating method, printing method, droplet discharge method, etc. Either can be used.

  In the inorganic insulating layer forming step (S32), the inorganic insulating layer 52 is formed so as to cover the organic insulating layer 51 as shown in FIG. The method for forming the inorganic insulating layer 52 is most preferably a coating method, but is not limited to the coating method. When the coating method is adopted, in addition to a method using a perhydropolysilazane solution described later, a method using a solution in which an inorganic filler is dispersed in a polymer resin, or a sol-gel method can be used.

  Next, a gate electrode forming step of S4 is performed. In the gate electrode formation step (S4), the gate electrode 6 is formed on the upper surface of the inorganic insulating layer 52 as shown in FIG. The method for forming the gate electrode 6 is not particularly limited. A method of removing an unnecessary portion by patterning after forming a thin film of a material for forming the gate electrode 6 is generally used, but various methods can be applied to the film forming method and the patterning method. Specifically, a sputtering method, a vacuum deposition method, a CVD method, a plating method, or the like can be applied as the film forming method, and a photolithography method, a screen printing method, or the like can be applied as the patterning method.

  Hereinafter, the above-described steps will be described in detail with reference to examples.

<Example 1>
First, the source / drain electrode formation step (S1) will be described. In the source / drain electrode formation step (S1), the Ni thin film is formed on the upper surface of the substrate 2 after cleaning the substrate 2 made of glass. Then, by patterning the formed Ni thin film and removing unnecessary portions, the source electrode 3 and the drain electrode 4 are formed. The Ni film is formed by a sputtering method. At this time, Ni is used as the target, and a DC sputtering apparatus is used as the apparatus. A resist pattern is formed on the upper surface of the formed Ni film using a photolithography method, and then the Ni film is etched using an etching method. The unnecessary photoresist is removed by washing with acetone. Thus, as shown in FIG. 3, the source electrode 3 and the drain electrode 4 made of Ni can be formed on the upper surface of the substrate 2. The formed source electrode 3 and drain electrode 4 had a thickness of 150 nm.

Next, the semiconductor layer forming step (S2) will be described. In the semiconductor layer forming step (S2), as shown in FIG. 4, the oxide semiconductor layer 9 is continuously formed on the upper surface of the substrate 2 between the source electrode 3 and the drain electrode 4, the upper surface of the source electrode 3, and the upper surface of the drain electrode 4. To form. In the semiconductor layer forming step (S2), the upper surface of the source electrode 3, the upper surface of the drain electrode 4 and the upper surface of the substrate 2 shown in FIG. after forming the InGaZnO ₄ film, by removing the unnecessary portion by patterning the InGaZnO ₄ film, an oxide semiconductor layer 9 made of InGaZnO _4. The InGaZnO ₄ film is formed by sputtering, using InGaZnO ₄ as a target and flowing a mixed gas of Ar and O ₂ . After the InGaZnO ₄ film is formed, a resist pattern is formed by a photolithography method, and the InGaZnO ₄ film is etched by an etching method using an organic acid-based ITO etchant. The unnecessary photoresist is removed by washing with acetone. Thus, as illustrated in FIG. 4, the oxide semiconductor layer 9 made of InGaZnO ₄ is continuously formed on the upper surface of the substrate 2 between the source electrode 3 and the drain electrode 4, the upper surface of the source electrode 3, and the upper surface of the drain electrode 4. Can be made. The thickness of the formed oxide semiconductor layer 9 was 30 nm.

  In the organic insulating layer forming step (S31), as shown in FIG. 5, the oxide semiconductor layer 9, the source electrode 3 of the upper surface of the oxide semiconductor layer 9, the source electrode 3, and the drain electrode 4 and the upper surface of the substrate 2 are formed. 3. An organic insulating layer 51 is formed so as to cover a portion where the drain electrode 4 is not provided. In the organic insulating layer forming step (S31), an organic insulating layer forming solution containing PVP is formed by spin coating on the upper surfaces of the oxide semiconductor layer 9, the source electrode 3, and the drain electrode 4 shown in FIG. 2 is applied so as to cover a portion where the oxide semiconductor layer 9, the source electrode 3, and the drain electrode 4 in the upper surface of 2 are not provided, and then heat treatment is performed. The organic insulating layer forming solution is a mixed solution of PVP, melamine-formaldehyde, and propylene glycol monomethyl ether acetate, and the weight ratio of each material is PVP: melamine-formaldehyde: propylene glycol monomethyl ether acetate = 1: 2: 10. is there. The heat treatment is performed using a hot plate, heated at 70 ° C. for 10 minutes, then heated at 150 ° C. for 10 minutes, and finally heated at 200 ° C. for 30 minutes. The thickness of the organic insulating layer 51 after the heat treatment was 700 nm.

  In the inorganic insulating layer forming step (S32), the inorganic insulating layer 52 is formed so as to cover the upper surface of the organic insulating layer 51, as shown in FIG. In the inorganic insulating layer forming step (S32), an inorganic insulating layer forming solution containing perhydropolysilazane is applied to the upper surface of the organic insulating layer 51 shown in FIG. The inorganic insulating layer forming solution is prepared by dissolving perhydropolysilazane in a xylene solvent containing an amine catalyst. The concentration of perhydropolysilazane in the inorganic insulating layer forming solution is 10 wt%. The heat treatment is performed using a hot plate, heated at 70 ° C. for 10 minutes, then heated at 150 ° C. for 10 minutes, and finally heated at 200 ° C. for 30 minutes. The thickness of the inorganic insulating layer 52 after the heat treatment was 250 nm.

Here, perhydropolysilazane will be described. Perhydropolysilazane is a kind of polysilazane having — (SiH 2 NH) — as a basic unit, and all side chains are hydroxyl groups. Since perhydropolysilazane is an inorganic polymer that is soluble in an organic solvent, it can be handled as a liquid material by being mixed with the organic solvent. Perhydropolysilazane has the property of reacting with water and oxygen by being baked in the atmosphere or in an atmosphere containing water vapor and converted into a SiO ₂ film. In particular, by adding a small amount of an amine-based catalyst that promotes the reaction with moisture, it can be converted into a highly crystalline SiO ₂ film even at low temperature baking. By using a perhydropolysilazane solution in which perhydropolysilazane and a catalyst are added to a solvent such as xylene, an SiO ₂ film can be formed by a coating method.

  Next, the gate electrode formation step (S4) will be described. In the gate electrode formation step (S 4), the gate electrode 6 is formed on the surface of the inorganic insulating layer 52 and at a position facing the oxide semiconductor layer 9. In the gate electrode formation step (S4), after forming the Ni thin film, the Ni thin film is patterned to remove unnecessary portions, thereby forming the gate electrode 6 made of Ni. The Ni film is formed by a sputtering method. At this time, Ni is used as the target, and a DC sputtering apparatus is used as the apparatus. After the Ni film is formed, a resist pattern is formed by photolithography, and the Ni film is etched by etching. The unnecessary photoresist is removed by washing with acetone. Thus, as shown in FIG. 1, the gate electrode 6 made of Ni can be formed on the upper surface of the inorganic insulating layer 52. The formed gate electrode 6 had a thickness of 200 nm.

  In order to confirm the effect of the oxide thin film transistor 1 formed by the manufacturing method of Example 1, performance evaluation of the oxide thin film transistor 1 was performed. In this performance evaluation, as Comparative Example 1, the oxide thin film transistor 1a in which the gate insulating layer 5 is composed of only one layer of the organic insulating layer 51, and as Comparative Example 2, the gate insulating layer 5 is one layer of the inorganic insulating layer 52. The performance evaluation was also performed on the oxide thin film transistor 1b composed only of the above. Hereinafter, the results of this performance evaluation will be described with reference to FIGS. FIG. 7 is a longitudinal sectional view of the oxide thin film transistor 1a of Comparative Example 1, and FIG. 8 is a longitudinal sectional view of the oxide thin film transistor 1b of Comparative Example 2. FIG. 9 is a graph of current flowing between the source and drain when a predetermined voltage is applied between the source and drain of the oxide thin film transistor 1 to change the gate voltage (hereinafter referred to as voltage-current characteristics). . FIG. 10 shows voltage-current characteristics of the oxide thin film transistor 1a. FIG. 11 shows voltage-current characteristics of the oxide thin film transistor 1b.

  The configuration of the oxide thin film transistor 1a of Comparative Example 1 shown in FIG. 7 is the same as that of the oxide thin film transistor 1 except that the gate insulating layer 5 is composed of only one layer of the organic insulating layer 51. The oxide thin film transistor 1a is obtained by manufacturing the oxide thin film transistor 1 of Example 1 while omitting only the inorganic insulating layer forming step (S32).

  The oxide thin film transistor 1b of Comparative Example 2 shown in FIG. 8 is the same as the oxide thin film transistor 1 of Example 1 except that the gate insulating layer 5 is composed of only one layer of the inorganic insulating layer 52. Moreover, the oxide thin film transistor 1b is obtained by omitting only the organic insulating layer forming step (S31) in the manufacturing process of the oxide thin film transistor 1 of Example 1.

The performance evaluation was performed by calculating the carrier mobility and the on / off ratio of the oxide thin film transistor. The carrier mobility is calculated using the following formula.
I _ds = μC _in W (V _g −V _th ) ² / 2L
Where μ is the carrier mobility, I _ds is the current flowing between the source and drain in the saturation region (hereinafter referred to as drain current), C _in is the capacitance per unit area of the gate insulating film, W is the channel width, and V _g is the gate. The voltage, V _th is the threshold ground voltage of the gate at which the channel begins to form, and L is the channel length. The on / off ratio is a current ratio between an on state and an off state in the oxide thin film transistor. When a predetermined voltage is applied between the source electrode 3 and the drain electrode 4 to change the gate voltage, the current flowing between the source electrode 3 and the drain electrode 4 is measured, and from the obtained value, carrier mobility and The on / off ratio was calculated.

When the carrier mobility is compared and examined based on FIGS. 9 to 11, in the oxide thin film transistor 1 of Example 1, the carrier mobility is 5 cm ² / Vs or more and the on / off ratio is 10 ⁸ or more. On the other hand, in the oxide thin film transistor 1a in which the gate insulating layer 5 is composed of only one layer of the organic insulating layer 51, the carrier mobility was 0.1 cm ² / Vs or less and the on / off ratio was 10 ² or less. In addition, the oxide thin film transistor 1b in which the gate insulating layer 5 is composed of only one layer of the inorganic insulating layer 52 did not show any switching characteristics.

From the above results, the performance of the oxide thin film transistor 1 of Example 1 is about 50 times or more higher than that of the oxide thin film transistor 1a of Comparative Example 1, and the on / off ratio is 10 ⁶ or more. It was confirmed. This is because, in the oxide thin film transistor 1a of Comparative Example 1 in which the organic insulating layer 51 is exposed on the upper surface, high-energy sputtered atoms are organically insulated in the sputtering step when the gate electrode 6 is formed on the upper surface of the organic insulating layer 51. This is probably because the layer 51 was damaged. As the sputtered atoms damage the organic insulating layer 51, the insulating performance of the organic insulating layer 51 is lowered. It is considered that the gate leakage current of the oxide thin film transistor 1a is increased due to the deterioration of the insulating performance of the organic insulating layer 51, and the carrier mobility and the on / off ratio are decreased. On the other hand, in the oxide thin film transistor 1, since the inorganic insulating layer 52 having high hardness is laminated on the upper surface of the organic insulating layer 51, it is presumed that the transistor performance was maintained with little damage due to the sputtered atoms. .

Further, the oxide thin film transistor 1b of Comparative Example 2 did not show any switching characteristics. This is because, in the oxide thin film transistor 1b of Comparative Example 2 in which the oxide semiconductor layer 9 and the inorganic insulating layer 52 are in contact with each other, the precursor liquid of the inorganic insulating layer 52 and the like during the heat treatment when the inorganic insulating layer 52 is formed are It is presumed that the oxide semiconductor layer 9 was damaged. When InGaZnO ₄ constituting the oxide semiconductor layer 9 is reduced by the influence of perhydropolysilazane, amine catalyst, or the like contained in the precursor liquid of the inorganic insulating layer 52, the oxide semiconductor layer 9 does not exhibit the characteristics as a semiconductor. . It is considered that the oxide thin film transistor 1b did not exhibit any switching characteristics due to the deterioration of the semiconductor characteristics of the oxide semiconductor layer 9. On the other hand, in the oxide thin film transistor 1, the organic insulating layer 51 is stacked on the upper surface of the oxide semiconductor layer 9, and the oxide semiconductor layer 9 and the inorganic insulating layer 52 are not in contact with each other. Accordingly, it is presumed that the oxide semiconductor layer 9 is prevented from being damaged, the semiconductor characteristics of the oxide semiconductor layer 9 are maintained, and the transistor performance can be maintained.

  As described above, in the oxide thin film transistor 1 of Example 1, the gate insulating layer 5 laminated on the upper surface of the oxide semiconductor layer 9 is composed of the lower organic insulating layer 51 made of an organic insulator and the inorganic insulator. The upper inorganic insulating layer 52 is used. Since only the organic insulating layer 51 that can be formed without damaging the oxide semiconductor layer 9 is in contact with the upper surface of the oxide semiconductor layer 9, the oxide semiconductor layer 9 is not damaged without damaging the oxide semiconductor layer 9. A gate insulating layer 5 can be formed on the upper surface of the semiconductor layer 9. Thereby, the semiconductor characteristics of the oxide semiconductor layer 9 can be maintained, and the oxide thin film transistor 1 having high characteristics can be formed.

  Further, since the inorganic insulating layer 52 is provided on the upper surface of the organic insulating layer 51, the organic insulating layer 51 is not exposed to the outside. The organic insulating layer 51 made of an organic polymer is known to be easily damaged by external factors. However, since the organic insulating layer 51 is not exposed to the outside, the organic insulating layer 51 may be damaged by external factors. Absent. Thereby, it is possible to prevent deterioration of transistor characteristics due to damage to the organic insulating layer 51.

  In addition, the organic insulating layer 51 is known to have low insulating characteristics, but by providing the inorganic insulating layer 52 having high insulating characteristics on the upper surface of the organic insulating layer 51, the insulating performance of the gate insulating layer 5 is improved. Can do. Thereby, a high-performance oxide thin film transistor 1 can be obtained.

  In addition, after the source electrode 3 and the drain electrode 4 are formed, the oxide semiconductor layer 9 is formed. Therefore, the oxide semiconductor layer 9 is not damaged when the source electrode 3 and the drain electrode 4 are formed.

  Further, the inorganic insulating layer 52 is formed by applying a precursor solution of the inorganic insulating layer 52 on the upper surface of the organic insulating layer 51. Therefore, the inorganic insulating layer 52 can be formed easily and inexpensively without using a large-scale apparatus. In addition, the inorganic insulating layer 52 can be formed without damaging the organic insulating layer 51 formed on the lower surface side.

  Moreover, since perhydropolysilazane is used as the precursor of the inorganic insulating layer 52, the firing temperature during the heat treatment in the inorganic insulating layer forming step (S32) can be lowered. As a result, a flexible plastic substrate having low heat resistance can be employed as the substrate, and in that case, an oxide thin film transistor having flexibility can be manufactured. Furthermore, compared to the case where the inorganic insulating layer 52 is formed by a vacuum process or a sol-gel method, it can be formed with low energy.

In addition, since InGaZnO ₄ is employed as the material of the oxide semiconductor layer 9, film formation in the semiconductor layer formation step (S2) can be performed at room temperature. Therefore, a flexible plastic substrate can be used as the substrate, and in that case, a flexible oxide thin film transistor can be manufactured. In addition, an oxide thin film transistor having high carrier mobility can be realized.

<Example 2>
Next, the oxide thin film transistor 11 of Example 2 will be described with reference to FIGS. FIG. 12 is a longitudinal sectional view of the oxide thin film transistor 11 according to the second embodiment. FIG. 13 is a flowchart showing a manufacturing process of the oxide thin film transistor 11. The oxide thin film transistor 11 of Example 2 has the same configuration as that of the oxide thin film transistor 1 of Example 1 except that the oxide semiconductor layer 91 is formed before the source electrode 31 and the drain electrode 41. Therefore, only the stacking order of the oxide semiconductor layer 91, the source electrode 31, and the drain electrode 41 will be mainly described, and the other components will be denoted by the same reference numerals and description thereof will be omitted.

  First, the cross-sectional structure of the oxide thin film transistor 11 of Example 2 will be described. In the oxide thin film transistor 11, an oxide semiconductor layer 91 is formed on the upper surface of the substrate 2 as shown in FIG. The source electrode 31 and the drain electrode 41 are provided continuously on the upper surface of the oxide semiconductor layer 91 and the upper surface of the substrate 2, respectively. Similar to the oxide thin film transistor 1 of the first embodiment, the organic insulating layer 51, the inorganic insulating layer 52, and the gate electrode 6 are stacked on the upper surface of the source electrode 31, the drain electrode 41, the oxide semiconductor layer 91, and the substrate 2. . The material of each component of the oxide thin film transistor 11 is the same as that of the oxide thin film transistor 1 of the first embodiment.

  Next, the manufacturing process of the oxide thin film transistor 11 of Example 2 will be described. In the manufacturing process of the oxide thin film transistor 11 of Example 2, first, a semiconductor layer forming step (S11) for forming the oxide semiconductor layer 91 on the upper surface of the substrate 2 is performed, and then the upper surface of the oxide semiconductor layer 91 is formed. Then, a source / drain electrode formation step (S12) for forming the source electrode 31 and the drain electrode 41 is performed. Thereafter, similarly to the manufacturing process of the oxide thin film transistor 1 of Example 1, the gate insulating layer forming process (S3) is performed, and the gate electrode forming process (S4) is performed.

First, the semiconductor layer forming step (S11) will be described. In the semiconductor layer formation step (S11), the upper surface of the substrate 2, after forming the InGaZnO ₄ film, by removing the unnecessary portion by patterning the InGaZnO ₄ film, an oxide semiconductor formed of InGaZnO ₄ on the upper surface of the substrate 2 Layer 91 is formed. The InGaZnO ₄ film is formed by a sputtering method, and InGaZnO ₄ is used as a target and a mixed gas of Ar and O ₂ is supplied. After forming the InGaZnO ₄ film, a resist pattern is formed by photolithography, and the InGaZnO ₄ film is etched by etching using an ITO etchant. The unnecessary photoresist is removed by washing with acetone. Thus, the oxide semiconductor layer 91 made of InGaZnO ₄ can be formed on the upper surface of the substrate 2.

  In the source / drain electrode formation step (S12), a resist pattern was formed on the upper surface of the substrate 2 on which the oxide semiconductor layer 91 was formed using a photolithography method, and then the resist pattern was formed by a sputtering method. A Ni film is formed on a portion of the upper surface of the oxide semiconductor layer 91 and the upper surface of the substrate 2 where the oxide semiconductor layer 91 is not provided. The target at this time is a Ni target, and the apparatus is a DC sputtering apparatus. By removing Ni on the resist pattern together with the resist, the source electrode 31 and the drain electrode 41 can be formed. Since the gate insulating layer forming step (S3) and the gate electrode forming step (S4) are the same as those in the first embodiment, description thereof is omitted.

  In order to confirm the effect of the oxide thin film transistor 11 formed by the manufacturing method of Example 2, performance evaluation of the oxide thin film transistor 11 was performed. The results of the performance evaluation are shown in FIG. FIG. 14 shows voltage-current characteristics of the oxide thin film transistor 11. The performance evaluation was performed by calculating the carrier mobility and the on / off ratio of the oxide thin film transistor from the experimental results shown in FIG.

When the carrier mobility is compared and examined based on FIG. 14, in the oxide thin film transistor 1 of Example 2, the carrier mobility is 5 cm ² / Vs or more, and the on / off ratio is 10 ⁶ or more. From the above results, it was confirmed that the oxide thin film transistor 11 of Example 2 had high carrier mobility and an on / off ratio, like the oxide thin film transistor 1 of Example 1.

  In the oxide thin film transistor 11 of Example 2, the same effect as that of the oxide thin film transistor 1 of Example 1 is obtained. Furthermore, in the oxide thin film transistor 11 of Example 2, in order to form the source electrode 31 and the drain electrode 41 after forming the oxide semiconductor layer 91 first, in the semiconductor layer forming step (S11), the source The electrode 31 and the drain electrode 41 are not damaged. When the oxide semiconductor layer 91 is formed after the source electrode 31 and the drain electrode 41 are formed, the source electrode 31 and the drain electrode 41 may be oxidized in the process of forming the oxide semiconductor layer 91. . If the surface of the source electrode 31 and the drain electrode 41 is oxidized, the resistance value of the electrode changes, and the performance of the transistor is degraded. Therefore, when the oxide semiconductor layer 91 is formed after the source electrode 31 and the drain electrode 41 are formed, it is necessary to select a material that is not easily oxidized as the material of the source electrode 31 and the drain electrode 41. In this embodiment, since the semiconductor layer formation step (S11) is performed before the source / drain electrode formation step (S12), the source electrode 31 and the drain electrode 41 are formed in the formation process of the oxide semiconductor layer 91. It is not oxidized. Therefore, the selection range when selecting the material of the source electrode 31 and the drain electrode 41 can be widened, and the material of the source electrode 31 and the drain electrode 41 can be selected according to the use of the oxide thin film transistor 11. .

Second Embodiment
Next, an oxide thin film transistor 100 according to a second embodiment will be described with reference to the drawings. FIG. 15 is a longitudinal sectional view of an oxide thin film transistor 100 according to the second embodiment. FIG. 16 is a flowchart showing a manufacturing process of the oxide thin film transistor 100, and FIG. 17 is a longitudinal sectional view showing a state in which the gate electrode 106 is formed on the upper surface of the substrate 102. FIG. 18 is a longitudinal sectional view showing a state in which the gate insulating layer 110 according to the second embodiment is formed on the upper surface of the substrate 102 and the gate electrode 106 shown in FIG. 17, and FIG. 19 is a view according to the second embodiment. 2 is a longitudinal sectional view of a state in which a source electrode 103 and a drain electrode 104 are formed on the upper surface of a gate insulating layer 110. FIG. In FIG. 20, the oxide semiconductor layer 109 is formed on the upper surface of the source electrode 103, the upper surface of the drain electrode 104, and the upper surface of the gate insulating layer 110 in the second embodiment between the source electrode 103 and the drain electrode 104. FIG. FIG. 21 is a longitudinal sectional view showing a state in which the organic insulating layer 151 is formed on the upper surfaces of the source electrode 103, the drain electrode 104, the oxide semiconductor layer 109, and the gate insulating layer 110 in the second embodiment. FIG. 22 is a longitudinal sectional view showing a state in which the inorganic insulating layer 152 is formed on the upper surface of the organic insulating layer 151. FIG. 23 is a longitudinal sectional view showing a state in which the contact hole 111 penetrating the organic insulating layer 151 and the inorganic insulating layer 152 is formed.

  The oxide thin film transistor 100 of the second embodiment is a so-called “bottom gate type” oxide thin film transistor in which the gate electrode 106 is located below the source electrode 103 and the drain electrode 104. The oxide thin film transistor 100 according to the second embodiment is characterized in that the interlayer insulating layer 105 is formed of two layers of an organic insulating layer 151 and an inorganic insulating layer 152 in addition to being a bottom gate type. Further, the second embodiment is different from the first embodiment in that a contact hole 111 penetrating the interlayer insulating layer 105 is provided and a pixel electrode 112 is provided. In addition, description of the same part as Example 1 of 1st Embodiment is abbreviate | omitted.

  First, a cross-sectional structure of the oxide thin film transistor 100 will be described. An oxide thin film transistor 100 illustrated in FIG. 15 includes a plate-like substrate 102, and a gate electrode 106 is provided over the substrate 102. A gate insulating layer 110 in the second embodiment is provided so as to cover the substrate 102 and the gate electrode 106. Unlike the gate insulating layer 5 in the first embodiment, the gate insulating layer 110 in the second embodiment corresponds to the insulating layer of the present invention. A source electrode 103 and a drain electrode 104 are provided apart from each other on the upper surface of the gate insulating layer 110 in the second embodiment. Further, the oxide semiconductor layer 109 is continuously provided on the upper surface of the gate insulating layer 110, the upper surface of the source electrode 103, and the upper surface of the drain electrode 104 in the second embodiment between the source electrode 103 and the drain electrode 104. ing. The upper surface of the oxide semiconductor layer 109, the upper surfaces of the source electrode 103 and the drain electrode 104, and the upper surface of the gate insulating layer 110 in the second embodiment are covered with an interlayer insulating layer 105. The interlayer insulating layer 105 includes a lower organic insulating layer 151 and an upper inorganic insulating layer 152. A pixel electrode 112 is provided on the upper surface of the interlayer insulating layer 105. A contact hole 111 that penetrates the interlayer insulating layer 105 is provided between the pixel electrode 112 and the drain electrode 104.

  The materials of the substrate 102, the source electrode 103, the drain electrode 104, the gate electrode 106, and the oxide semiconductor layer 109 are the substrate 2, the source electrode 3, the drain electrode 4, the gate electrode 6, and the oxide semiconductor layer of the first embodiment. It is the same as that of the material of 9. The materials of the organic insulating layer 151 and the inorganic insulating layer 152 forming the interlayer insulating layer 105 are the same as those of the organic insulating layer 51 and the inorganic insulating layer 52 forming the gate insulating layer 5 in the first embodiment.

The gate insulating layer 110 in the second embodiment is composed of one layer and is formed of an insulating material. When an inorganic insulating material is employed as the insulating material, Al ₂ O ₃ , SiO ₂ , SiN, TiO _2, or the like can be applied. When an organic insulating material is used as the insulating material, PI (polyimide), PMMA (polymethyl methacrylate), PVP (polyparavinylphenol), or the like is applicable. In addition, as a material of the gate insulating layer 110 in 2nd Embodiment, it is more preferable to employ | adopt an inorganic insulating material from a viewpoint of insulation performance and tolerance. The pixel electrode 112 is formed of ITO (indium tin oxide).

  Next, a method for manufacturing the oxide thin film transistor 100 will be described. As shown in FIG. 16, the manufacturing method of the oxide thin film transistor 100 includes a gate electrode forming step (S101), a gate insulating layer forming step (S102), a source / drain electrode forming step (S103), and a semiconductor layer forming step. (S104), an interlayer insulating layer forming step (S105), a contact hole forming step (S106), and a pixel electrode forming step (S107). The interlayer insulating layer forming step (S105) includes an organic insulating layer forming step (S151) and an inorganic insulating layer forming step (S152). Hereinafter, each step will be described with reference to examples.

<Example>
First, a gate electrode formation step (S101) is performed. In the gate electrode formation step (S101), the gate electrode 106 is formed on the upper surface of the substrate 102. In the gate electrode formation step (S101), first, the substrate 102 is washed, a Ni thin film is formed on the upper surface of the substrate 102, and then the Ni thin film is patterned to remove unnecessary portions, thereby removing the gate electrode 106 made of Ni. Form. The Ni film is formed by a sputtering method. At this time, Ni is used as the target, and a DC sputtering apparatus is used as the apparatus. A resist pattern is formed on the upper surface of the formed Ni film by photolithography, and the Ni film is etched by etching. Finally, the unnecessary photoresist is removed by washing with acetone. Thus, as shown in FIG. 17, the gate electrode 106 made of Ni can be formed on the upper surface of the substrate 102.

Next, a gate insulating layer forming step is performed (S102). In the gate insulating layer formation step (S102), a SiO ₂ film is formed on the upper surface of the gate electrode 106 and the upper surface of the substrate 102 shown in FIG. The SiO ₂ film is formed by a sputtering method, and SiO ₂ is used as a target while flowing a mixed gas of Ar and O ₂ . Thus, as shown in FIG. 18, the gate insulating layer 110 of the second embodiment made of SiO ₂ is formed on the upper surface of the gate electrode 106 and the portion of the upper surface of the substrate 102 where the gate electrode 106 is not provided. The

  Next, a source / drain electrode formation step (S103) is performed. In the source / drain electrode formation step (S103), an Ni thin film is formed on the upper surface of the gate insulating layer 110 in the second embodiment shown in FIG. Thus, the source electrode 103 and the drain electrode 104 are formed. Since the formation conditions are the same as those of the gate electrode 106, description thereof is omitted.

Next, a semiconductor layer forming step (S104) is performed. In the semiconductor layer forming step (S104), as shown in FIG. 20, between the source electrode 103 and the drain electrode 104, the upper surface of the gate insulating layer 110, the upper surface of the source electrode 103, and the upper surface of the drain electrode 104 in the second embodiment. In addition, the oxide semiconductor layer 109 is continuously formed. In the semiconductor layer forming step (S104), first, the source electrode 103 and the drain electrode among the upper surface of the source electrode 103, the upper surface of the drain electrode 104, and the upper surface of the gate insulating layer 110 in the second embodiment shown in FIG. An InGaZnO ₄ film is formed so as to cover a portion where 104 is not provided. After that, the InGaZnO ₄ film is patterned to remove unnecessary portions, whereby the oxide semiconductor layer 109 made of InGaZnO ₄ is formed. The InGaZnO ₄ film is formed by a sputtering method, and InGaZnO ₄ is used as a target and a mixed gas of Ar and O ₂ is supplied. After the InGaZnO ₄ film is formed, a resist pattern is formed using a photolithography method, and the InGaZnO ₄ film is etched. Finally, the unnecessary photoresist is removed by washing with acetone. Thus, as shown in FIG. 20, an oxide made of InGaZnO _{4 is} formed on the upper surface of the gate insulating layer 110, the upper surface of the source electrode 103, and the upper surface of the drain electrode 104 between the source electrode 103 and the drain electrode 104 in the second embodiment. The semiconductor layer 109 can be formed continuously.

  Next, an interlayer insulating layer forming step (S105) is performed. As shown in FIG. 16, the interlayer insulating layer forming step (S105) includes an organic insulating layer forming step (S151) for forming the lower organic insulating layer 151 and an inorganic insulating layer forming for forming the upper inorganic insulating layer 152. Step (S152).

  In the organic insulating layer forming step (S151), as shown in FIG. 21, the oxide is formed among the upper surfaces of the oxide semiconductor layer 109, the source electrode 103, the drain electrode 104, and the upper surface of the gate insulating layer 110 in the second embodiment. An organic insulating layer 151 is formed so as to cover a portion where the semiconductor layer 109, the source electrode 103, and the drain electrode 104 are not provided. In the organic insulating layer forming step (S151), a solution for forming an organic insulating layer containing PVP is formed by spin coating on each upper surface of the oxide semiconductor layer 109, the source electrode 103, and the drain electrode 104 shown in FIG. After applying the oxide semiconductor layer 109, the source electrode 103, and the drain electrode 104 in the upper surface of the gate insulating layer 110 in the second embodiment, heat treatment is performed. The organic insulating layer forming solution is a mixed solution of PVP, melamine-formaldehyde, and propylene glycol monomethyl ether acetate, and the weight ratio of each material is PVP: melamine-formaldehyde: propylene glycol monomethyl ether acetate = 1: 2: 10. is there. The heat treatment is performed using a hot plate, and is performed by heating at 70 ° C. for 10 minutes, then heating at 150 ° C. for 10 minutes, and finally heating at 200 ° C. for 30 minutes.

  In the inorganic insulating layer forming step (S152), the inorganic insulating layer 152 is formed so as to cover the upper surface of the organic insulating layer 151 as shown in FIG. In the inorganic insulating layer forming step (S152), an inorganic insulating layer forming solution containing perhydropolysilazane is applied to the upper surface of the organic insulating layer 151 shown in FIG. 21 by spin coating, and then heat treatment is performed. The inorganic insulating layer forming solution is prepared by dissolving perhydropolysilazane in a xylene solvent containing an amine catalyst. The concentration of perhydropolysilazane in the inorganic insulating layer forming solution is 10 wt%. The heat treatment is performed using a hot plate, and is performed by heating at 70 ° C. for 10 minutes, then heating at 150 ° C. for 10 minutes, and finally heating at 200 ° C. for 30 minutes.

  Next, a contact hole forming step (S106) is performed. In the contact hole forming step (S106), the contact hole 111 penetrating the organic insulating layer 151 and the inorganic insulating layer 152 is formed. In the contact hole forming step (S106), first, a resist mask having openings at positions corresponding to the contact holes 111 is formed on the upper surface of the inorganic insulating layer 152 shown in FIG. Then, the inorganic insulating layer 152 and the organic insulating layer 151 are etched by a dry etching method. As the etching gas, CHF 3 is used for the inorganic insulating layer 152, and oxygen is used for the organic insulating layer 151.

  Next, a pixel electrode forming step is performed (S107). In the pixel electrode formation step (S107), an ITO thin film is formed on the upper surface of the inorganic insulating layer 152, and then unnecessary portions are removed by patterning, whereby the pixel electrode 112 made of ITO is formed. The ITO film is formed by a sputtering method. In this case, ITO is used as the target, and a DC sputtering apparatus is used as the apparatus. Thereafter, a resist pattern is formed and the ITO film is etched. Then, the unnecessary photoresist is removed by acetone cleaning. Thus, the pixel electrode 112 can be formed as shown in FIG.

  In order to confirm the effect of the oxide thin film transistor 100 formed by the manufacturing method of the second embodiment, performance evaluation of the oxide thin film transistor 100 was performed. The results of the performance evaluation are shown in FIG. FIG. 24 shows voltage-current characteristics of the oxide thin film transistor 100. The performance evaluation was performed by calculating the carrier mobility and the on / off ratio of the oxide thin film transistor from the experimental results shown in FIG.

Based on Figure 24, when examined carrier mobility, the oxide thin film transistor 100 of the second embodiment, the carrier mobility of ^{5 cm} 2 / Vs or more, on / off ratio was 10 ⁷ or more. From the above results, it was confirmed that the oxide thin film transistor 100 of Example 2 had high carrier mobility and an on / off ratio, like the oxide thin film transistors 1 and 11 of the first embodiment.

  According to the manufacturing method of the oxide thin film transistor 100 of the second embodiment described in detail above, the same effects as those of the first embodiment can be obtained. Furthermore, since the pixel electrode 112 is formed on the upper surface of the high-hardness inorganic insulating layer 152 and does not contact the organic insulating layer 151, the organic insulating layer 151 is not damaged in the process of forming the pixel electrode 112. Therefore, when the pixel electrode 112 is formed, the insulating characteristic of the interlayer insulating layer 105 including the organic insulating layer 151 and the inorganic insulating layer 152 is prevented from changing, and the performance of the oxide thin film transistor 100 is maintained. be able to.

  The present invention is not limited to the embodiments described in detail, and various modifications may be made without departing from the scope of the present disclosure. For example, the materials, sizes, and shapes of the substrate, the gate electrode, the source electrode, the drain electrode, the gate insulating layer, and the oxide semiconductor layer included in the oxide thin film transistor are not limited to those in the embodiment and depart from the gist of the present disclosure. It can be appropriately changed within the range not to be.

  In the example of the second embodiment, the oxide semiconductor layer 109 is formed after the source electrode 103 and the drain electrode 104 are formed. However, as in the example 2 of the first embodiment, the oxide semiconductor layer 109 is formed. The source electrode 103 and the drain electrode 104 may be formed after the layer 109 is formed. In this case, since the source electrode 103 and the drain electrode 104 are not oxidized in the formation process of the oxide semiconductor layer 109, the selection range when selecting the material of the source electrode 103 and the drain electrode 104 is increased. Can be spread.

  Moreover, in this embodiment, although the inorganic insulating layers 52 and 152 were formed using the apply | coating method, the formation method of an inorganic insulating layer is not limited to the apply | coating method. For example, the inorganic insulating layers 52 and 152 can be formed by a dry process such as a vacuum evaporation method.

  Moreover, in the Example explained in full detail, although the inorganic insulating layers 52 and 152 were comprised only with the inorganic component, you may comprise the inorganic insulating layers 52 and 152 with an inorganic and organic composite material. For example, the inorganic insulating layers 52 and 152 made of an inorganic / organic composite material can be formed by applying a solution in which an inorganic filler is dispersed in a polymer resin. In the case where the inorganic insulating layers 52 and 152 are made of an inorganic / organic composite material, the inorganic insulating layers 52 and 152 can be flexible, and the occurrence of cracks can be suppressed. Further, the inorganic insulating layers 52 and 152 can be formed under a low temperature condition.

  The oxide thin film transistor and the method for manufacturing the oxide thin film transistor of the present invention can be applied to a so-called bottom gate type or top gate type oxide thin film transistor and a method for manufacturing the same.

It is a longitudinal cross-sectional view of the oxide thin film transistor 1 of 1st Embodiment. 3 is a flowchart showing manufacturing steps of the oxide thin film transistor 1 of Example 1. 2 is a longitudinal sectional view of a state in which a source electrode 3 and a drain electrode 4 are formed on the upper surface of a substrate 2. FIG. FIG. 4 is a longitudinal sectional view showing a state where an oxide semiconductor layer 9 is formed between a source electrode 3 and a drain electrode 4 shown in FIG. 3. 2 is a longitudinal sectional view showing a state in which an organic insulating layer 51 is formed on the top surfaces of a substrate 2, a source electrode 3, a drain electrode 4, and an oxide semiconductor layer 9. FIG. 2 is a longitudinal sectional view showing a state in which an inorganic insulating layer 52 is formed on the upper surface of an organic insulating layer 51. 6 is a longitudinal sectional view of an oxide thin film transistor 1a of Comparative Example 1. FIG. 6 is a longitudinal sectional view of an oxide thin film transistor 1b of Comparative Example 2. FIG. 3 is a voltage-current characteristic of the oxide thin film transistor 1. It is a voltage-current characteristic of the oxide thin film transistor 1a. It is a voltage-current characteristic of the oxide thin film transistor 1b. 6 is a longitudinal sectional view of an oxide thin film transistor 11 of Example 2. FIG. 6 is a flowchart showing manufacturing steps of the oxide thin film transistor 11 of Example 2. 3 is a voltage-current characteristic of the oxide thin film transistor 11. It is a longitudinal cross-sectional view of the oxide thin film transistor 100 of 2nd Embodiment. 3 is a flowchart showing manufacturing steps of the oxide thin film transistor 100. 2 is a longitudinal sectional view showing a state in which a gate electrode 106 is formed on an upper surface of a substrate 102. FIG. It is a longitudinal cross-sectional view of a state in which the gate insulating layer 110 according to the second embodiment is formed on the upper surface of the substrate 102 and the gate electrode 106. It is a longitudinal cross-sectional view of a state in which a source electrode 103 and a drain electrode 104 are formed on the upper surface of a gate insulating layer 110 in the second embodiment. FIG. 10 is a longitudinal sectional view of a state in which an oxide semiconductor layer 109 is formed between a source electrode 103 and a drain electrode 104. It is the longitudinal cross-sectional view of the state in which the organic insulating layer 151 was formed in the upper surface of the source electrode 103, the drain electrode 104, the oxide semiconductor layer 109, and the gate insulating layer 110 in 2nd Embodiment. 2 is a longitudinal sectional view showing a state in which an inorganic insulating layer 152 is formed on the upper surface of an organic insulating layer 151. FIG. It is a longitudinal cross-sectional view of a state in which a contact hole 111 penetrating the organic insulating layer 151 and the inorganic insulating layer 152 is formed. 3 is a voltage-current characteristic of the oxide thin film transistor 100. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Oxide thin film transistor 2 Substrate 3 Source electrode 4 Drain electrode 5 Gate insulating layer 6 Gate electrode 9 Oxide semiconductor layer 11 Oxide thin film transistor 31 Source electrode 41 Drain electrode 51 Organic insulating layer 52 Inorganic insulating layer 91 Oxide semiconductor layer 100 Oxide Thin film transistor 102 Substrate 103 Source electrode 104 Drain electrode 105 Interlayer insulating layer 106 Gate electrode 109 Oxide semiconductor layer 110 Gate insulating layer 111 in the second embodiment 111 Contact hole 112 Pixel electrode 151 Organic insulating layer 152 Inorganic insulating layer 1a Oxide thin film transistor 1b Oxidation Thin film transistor

Claims (13)

An insulating layer;
A source electrode and a drain electrode provided on the upper surface of the insulating layer so as to be spaced apart from each other;
An oxide semiconductor layer continuously provided on the upper surface of the insulating layer, the upper surface of the source electrode, and the upper surface of the drain electrode in the gap between the source electrode and the drain electrode;
An organic insulating layer provided on at least the upper surface of the oxide semiconductor layer;
An oxide thin film transistor comprising: an inorganic insulating layer provided on an upper surface of the organic insulating layer.   2. The oxide thin film transistor according to claim 1, wherein the inorganic insulating layer is formed by applying a solution in which a compound containing an inorganic element is dissolved to an upper surface of the organic insulating layer. An insulating layer;
An oxide semiconductor layer formed on the upper surface of the insulating layer;
A source electrode and a drain electrode which are spaced apart from each other on the upper surface of the oxide semiconductor layer and are continuously provided on the upper surface of the oxide semiconductor layer and the upper surface of the insulating layer,
An organic insulating layer provided on at least the upper surface of the oxide semiconductor layer;
An inorganic insulating layer provided on the upper surface of the organic insulating layer,
The inorganic thin film transistor is formed by applying a solution in which a compound containing an inorganic element is dissolved to an upper surface of the organic insulating layer.   4. The oxide thin film transistor according to claim 2, wherein the compound is perhydropolysilazane.   5. The oxide thin film transistor according to claim 1, wherein a gate electrode or a pixel electrode is provided on an upper surface of the inorganic insulating layer.   The oxide thin film transistor according to claim 1, wherein the oxide semiconductor layer is formed of an oxide containing at least one element of In, Ga, and Zn. An insulating layer; a source electrode and a drain electrode formed on an upper surface of the insulating layer; an oxide semiconductor layer formed on the upper surface of the insulating layer between the source electrode and the drain electrode; and a gate electrode. A method of manufacturing an oxide thin film transistor, comprising:
A first step of forming a source electrode and a drain electrode spaced apart from each other on the upper surface of the insulating layer;
A second step of forming a continuous oxide semiconductor layer on the upper surface of the insulating layer, the upper surface of the source electrode, and the upper surface of the drain electrode in the gap between the source electrode and the drain electrode;
A third step of forming an organic insulating layer on at least the upper surface of the oxide semiconductor layer;
And a fourth step of forming an inorganic insulating layer on the upper surface of the organic insulating layer.   In the fourth step, the inorganic insulating layer is formed on the upper surface of the organic insulating layer by applying a solution in which a compound containing an inorganic element is dissolved to the upper surface of the organic insulating layer. The manufacturing method of the oxide thin-film transistor of Claim 7. An insulating layer; a source electrode and a drain electrode formed on an upper surface of the insulating layer; an oxide semiconductor layer formed on the upper surface of the insulating layer between the source electrode and the drain electrode; and a gate electrode. A method of manufacturing an oxide thin film transistor, comprising:
A first step of forming an oxide semiconductor layer on the upper surface of the insulating layer;
A second step of forming a source electrode and a drain electrode that are spaced apart from each other on the upper surface of the oxide semiconductor layer and are continuous with the upper surface of the oxide semiconductor layer and the upper surface of the insulating layer, respectively;
A third step of forming an organic insulating layer on at least the upper surface of the oxide semiconductor layer;
And at least a fourth step of forming an inorganic insulating layer on the upper surface of the organic insulating layer,
The fourth step is a method for manufacturing an oxide thin film transistor, wherein a solution in which a compound containing an inorganic element is dissolved is applied to the upper surface of the organic insulating layer.   The method for producing an oxide thin film transistor according to claim 8 or 9, wherein the compound is perhydropolysilazane.   11. The method of manufacturing an oxide thin film transistor according to claim 7, further comprising a fifth step of forming a gate electrode or a pixel electrode on the upper surface of the inorganic insulating layer.   12. The oxide thin film transistor according to claim 7, wherein the oxide semiconductor layer is formed of an oxide containing at least one element of In, Ga, and Zn. Method.   An oxide thin film transistor manufactured by the method for manufacturing an oxide thin film transistor according to claim 7.

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