JP2009253118A - Method for manufacturing wiring board - Google Patents

Method for manufacturing wiring board Download PDF

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JP2009253118A
JP2009253118A JP2008100950A JP2008100950A JP2009253118A JP 2009253118 A JP2009253118 A JP 2009253118A JP 2008100950 A JP2008100950 A JP 2008100950A JP 2008100950 A JP2008100950 A JP 2008100950A JP 2009253118 A JP2009253118 A JP 2009253118A
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wiring board
layer
terminal pad
manufacturing
base portion
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JP4972601B2 (en
JP2009253118A5 (en
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Katsuya Fukase
克哉 深瀬
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To improve a conventional method for manufacturing a wiring board wherein the width of a recession, where the outer peripheral surface of a terminal pad is exposed, becomes uneven when the recession is formed by light exposure and development. <P>SOLUTION: The whole exposed surface of the base 12 of a terminal pad formed on one surface of a wiring board 10 is coated with a nickel layer 18 of a given thickness. The whole of the base 12 including the nickel layer 18 is then covered with a permanent resist layer 20. Subsequently, the permanent resist layer 20 is polished to expose the upper face of the nickel layer 18. The nickel layer 18 is then removed by etching to form a recession 22 along the outer peripheral edge of the base 12, where the outer peripheral surface of the base 12 is exposed to an inner wall surface in the recession 22. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は配線基板の製造方法に関し、更に詳細には一面側に端子用パッドが形成された配線基板の製造方法に関する。   The present invention relates to a method for manufacturing a wiring board, and more particularly to a method for manufacturing a wiring board in which terminal pads are formed on one side.

半導体装置等に用いられる配線基板の一面側に形成された端子用パッドには、図8(a)と図8(b)とに示すものがある。
図8(a)に示す端子用パッドは、配線基板100の一面側に形成された端子用パッド102の周縁近傍が、配線基板100の一面側を覆う樹脂層104に被覆されている。かかる図8(a)に示す端子用パッドは、SMD構造(Solder Mask Defined構造)と称せられている。
一方、図8(b)に示す端子パッドは、配線基板200の一面側に形成された端子用パッド202と樹脂層204との間に凹溝206が形成されており、端子用パッド202が凹溝206によって囲まれている。かかる図8(b)に示す端子用パッドは、NSMD構造(Non- Solder Mask Defined構造)と称せられている。
このSMD構造の端子用パッド102は、その周縁近傍が樹脂層104に被覆されているため、端子用パッド102の露出面に形成する端子に必要な露出面積を確保することを要し、樹脂層104に被覆される部分だけ端子用パッド102が大型化する。
更に、端子用パッド102の周縁近傍が樹脂層104に確実に被覆されるようにするには、加工精度を考慮して端子用パッド102の樹脂層104によって被覆する部分の幅を広く確保しておくことが必要であり、更に端子用パッド102が大型化する。
一方、NSMD構造の端子用パッド202では、端子用パッド202の全体が露出するため、SMD構造の端子用パッド102よりも小型化できる。このため、NSMD構造の端子用パッド202は、配線基板200の小型化及び配線パターンのファイン化に有効である。
As terminal pads formed on one surface side of a wiring board used for a semiconductor device or the like, there are those shown in FIGS. 8A and 8B.
In the terminal pad shown in FIG. 8A, the vicinity of the periphery of the terminal pad 102 formed on one surface side of the wiring substrate 100 is covered with a resin layer 104 that covers the one surface side of the wiring substrate 100. The terminal pad shown in FIG. 8A is called an SMD structure (Solder Mask Defined structure).
On the other hand, in the terminal pad shown in FIG. 8B, a concave groove 206 is formed between the terminal pad 202 formed on one surface side of the wiring board 200 and the resin layer 204, and the terminal pad 202 is concave. It is surrounded by the groove 206. The terminal pad shown in FIG. 8B is called an NSMD structure (Non-Solder Mask Defined structure).
The SMD structure of the terminal pad 102 is covered with the resin layer 104 in the vicinity of the periphery thereof, so that it is necessary to secure an exposed area necessary for the terminal formed on the exposed surface of the terminal pad 102. The size of the terminal pad 102 is increased only in the portion covered with 104.
Furthermore, in order to ensure that the resin layer 104 is coated in the vicinity of the periphery of the terminal pad 102, the width of the portion of the terminal pad 102 covered by the resin layer 104 is secured in consideration of processing accuracy. The terminal pad 102 is further enlarged.
On the other hand, the terminal pad 202 having the NSMD structure can be made smaller than the terminal pad 102 having the SMD structure because the entire terminal pad 202 is exposed. For this reason, the terminal pad 202 having the NSMD structure is effective for reducing the size of the wiring substrate 200 and making the wiring pattern finer.

かかるNSMD構造の端子用パッド202を具備する配線基板の製造方法は、例えば下記特許文献1に記載されている。
このNSMD構造の端子用パッド202を具備する配線基板の製造方法を図9に示す。図9に示す配線基板の製造方法では、図9(a)に示す様に、配線基板200の一面側に銅等によって端子用パッド202の基部202a及び配線パターン208を形成した後、基部202a及び配線パターン208の露出面を、ニッケル層210によって被覆する[図9(b)]。
次いで、図9(c)に示す様に、ニッケル層210によって被覆した基部202a及び配線パターン208の全体を、ソルダーレジスト等の樹脂層204によって覆った後、樹脂層204に露光・現像によるパターニングを施して、ニッケル層210によって被覆した基部202aの外周面が内壁面に露出する凹溝206を形成する[図9(d)]。
その後、図9(e)に示す様に、基部202aのニッケル層210の露出面に、金めっき等によって保護膜216を形成して端子用パッド202を形成した後、端子用パッド202の保護膜216上にはんだボールを搭載しリフローすることによって外部接続端子214を形成できる。
特開2007−67147
A method of manufacturing a wiring board having such a terminal pad 202 having an NSMD structure is described in, for example, Patent Document 1 below.
FIG. 9 shows a method of manufacturing a wiring board provided with the NSMD structure terminal pad 202. In the method of manufacturing the wiring board shown in FIG. 9, as shown in FIG. 9A, after the base 202a and the wiring pattern 208 of the terminal pad 202 are formed on one surface side of the wiring board 200 with copper or the like, the base 202a and The exposed surface of the wiring pattern 208 is covered with the nickel layer 210 [FIG. 9B].
Next, as shown in FIG. 9C, after the base 202a covered with the nickel layer 210 and the entire wiring pattern 208 are covered with a resin layer 204 such as a solder resist, the resin layer 204 is patterned by exposure and development. Then, a concave groove 206 is formed in which the outer peripheral surface of the base portion 202a covered with the nickel layer 210 is exposed on the inner wall surface [FIG. 9 (d)].
Thereafter, as shown in FIG. 9E, a protective film 216 is formed on the exposed surface of the nickel layer 210 of the base portion 202a by gold plating or the like to form the terminal pad 202, and then the protective film of the terminal pad 202 is formed. The external connection terminals 214 can be formed by mounting solder balls on 216 and performing reflow.
JP 2007-67147 A

図9に示す配線基板の製造方法には、配線基板の一面側にNSMD構造の端子用パッド202を形成できる。
しかしながら、図9に示す配線基板の製造方法では、基部202a及び配線パターン208の全体を覆う樹脂層204に露光・現像によるパターニングを施して凹溝206を形成する。
かかる露光・現像によって凹溝206を形成する工程では、露光、現像及び樹脂層204の除去の各工程での加工精度が積層され、最終的に形成される凹溝206の精度が低下する。特に、配線パターン208等がファイン化されると、端子用パッド202及び凹溝206もファイン化される。
しかしながら、露光・現像によってファイン化された凹溝206を形成すると、図10に示す如く、凹溝206の幅が不均一となる。このため、図10に示す端子用パッド202上に、はんだボールを搭載しリフローして外部接続端子214を形成すると、図10に示す如く、外部接続端子214の一部が樹脂層204に接触することがある。
In the method for manufacturing a wiring board shown in FIG. 9, a terminal pad 202 having an NSMD structure can be formed on one side of the wiring board.
However, in the method for manufacturing the wiring board shown in FIG. 9, the resin groove 204 covering the entire base portion 202a and the wiring pattern 208 is subjected to patterning by exposure and development to form the concave groove 206.
In the step of forming the concave groove 206 by such exposure / development, the processing accuracy in each step of exposure, development and removal of the resin layer 204 is laminated, and the accuracy of the concave groove 206 to be finally formed is lowered. In particular, when the wiring pattern 208 or the like is refined, the terminal pads 202 and the recessed grooves 206 are also refined.
However, when the concave groove 206 refined by exposure / development is formed, the width of the concave groove 206 becomes nonuniform as shown in FIG. Therefore, when a solder ball is mounted on the terminal pad 202 shown in FIG. 10 and reflowed to form the external connection terminal 214, a part of the external connection terminal 214 comes into contact with the resin layer 204 as shown in FIG. Sometimes.

この様に、外部接続端子214の一部が樹脂層204に接触している状態では、配線基板200に熱ショックを与えたとき、樹脂層204と接触している外部接続端子214の部分に応力が加えられ、外部接続端子214に亀裂が発生するおそれや外部接続端子214が脱落するおそれがある。
このため、露光・現像よって形成する凹溝206では、その加工精度を考慮した幅を確保することを要し、NSMD構造の端子用パッド202でも、その小型化には限界が存在する。
そこで、本発明は、端子用パッドの外周面が露出する凹溝を露光・現像よって形成したとき、凹溝の幅が不均一なる従来の配線基板の製造方法の課題を解決し、幅が可及的に均一で且つ端子用パッドの外周面が内壁面に露出する凹溝を形成できる配線基板の製造方法を提供することを目的とする。
As described above, in a state where a part of the external connection terminal 214 is in contact with the resin layer 204, stress is applied to the part of the external connection terminal 214 in contact with the resin layer 204 when a heat shock is applied to the wiring board 200. May cause cracks in the external connection terminals 214 and the external connection terminals 214 may fall off.
For this reason, the groove 206 formed by exposure / development needs to secure a width in consideration of the processing accuracy, and the terminal pad 202 having the NSMD structure has a limit in miniaturization.
Therefore, the present invention solves the problem of the conventional method of manufacturing a wiring board in which the width of the groove is non-uniform when the groove that exposes the outer peripheral surface of the terminal pad is formed by exposure and development. It is an object of the present invention to provide a method for manufacturing a wiring board capable of forming a concave groove that is as uniform as possible and whose outer peripheral surface of a terminal pad is exposed on an inner wall surface.

本発明者は、前記課題を解決すべく検討した結果、配線基板の一面側に形成した端子用パッドの基部の全露出面を被覆する所定厚さのめっき金属層を覆う樹脂層を研磨し、めっき金属層の上面を露出した後、めっき金属層をエッチングによって除去することによって、基部の外周面に、幅が均一の凹溝を形成できることを知り、本発明に到達した。
すなわち、本発明は、配線基板の少なくとも一面側に形成した端子用パッドの基部の全露出面を、所定厚さのめっき金属層によって被覆した後、前記めっき金属層を含む基部の全体を樹脂層によって覆い、次いで、前記めっき金属層の少なくとも上面が露出するように、前記樹脂層を除去した後、前記めっき金属層をエッチング除去して、前記基部の外周縁に沿って形成され、前記基部の外周面が内壁面に露出する凹溝を形成することを特徴とする配線基板の製造方法にある。
かかる本発明において、樹脂層を研磨によって除去し、めっき金属層の上面を研磨面よりも突出することによって、端子用パッドを形成したとき、端子用パッドの上面と樹脂層の上面とを面一にできる。
或いは、樹脂層をブラスト研磨によって除去することにより、端子用パッドの基部の上面を前記樹脂層の研磨面よりも高くできる。このため、端子用パッドの基部の上端部に、はんだボール等の低融点金属を容易に装着できる。
また、めっき金属層を、無電解めっきによって形成することにより、給電困難な基部にめっき金属層をできる。
特に、端子用パッドの基部として、銅から成る柱状の基部を形成し、前記基部の露出面に無電解ニッケルめっきによってニッケルめっき層を形成することが好適である。
更に、凹溝としては、幅2〜20μmの凹溝を形成すること、基部の露出面を、めっき金属層よりも薄い保護被膜によって被覆して端子用パッドを形成することが好ましい。
かかる端子用パッド上にはんだボールを搭載してリフローすることによって、はんだから成る端子部を容易に形成できる。
尚、端子用パッドの基部としては、銅から成る柱状の基部を形成してもよく、樹脂部を金属層で覆って成る柱状の基部を形成してもよい。
As a result of studying to solve the above problems, the present inventors polished a resin layer covering a plating metal layer having a predetermined thickness covering the entire exposed surface of the base portion of the terminal pad formed on one side of the wiring board, After the upper surface of the plated metal layer was exposed, it was found that a groove having a uniform width could be formed on the outer peripheral surface of the base by removing the plated metal layer by etching, and the present invention was achieved.
That is, according to the present invention, the entire exposed surface of the base portion of the terminal pad formed on at least one surface side of the wiring board is covered with the plating metal layer having a predetermined thickness, and then the entire base portion including the plating metal layer is covered with the resin layer. Then, after removing the resin layer so that at least the upper surface of the plated metal layer is exposed, the plated metal layer is removed by etching, and is formed along the outer periphery of the base. A method of manufacturing a wiring board is characterized in that a concave groove having an outer peripheral surface exposed to an inner wall surface is formed.
In the present invention, when the terminal pad is formed by removing the resin layer by polishing and projecting the upper surface of the plated metal layer from the polished surface, the upper surface of the terminal pad and the upper surface of the resin layer are flush with each other. Can be.
Alternatively, the upper surface of the base portion of the terminal pad can be made higher than the polished surface of the resin layer by removing the resin layer by blast polishing. For this reason, a low melting point metal such as a solder ball can be easily attached to the upper end of the base of the terminal pad.
Further, by forming the plated metal layer by electroless plating, the plated metal layer can be formed on the base that is difficult to feed.
In particular, it is preferable to form a columnar base portion made of copper as the base portion of the terminal pad and to form a nickel plating layer on the exposed surface of the base portion by electroless nickel plating.
Further, it is preferable to form a groove having a width of 2 to 20 μm as the groove, and to form a terminal pad by covering the exposed surface of the base with a protective film thinner than the plated metal layer.
By mounting a solder ball on the terminal pad and performing reflow, a terminal portion made of solder can be easily formed.
As the base portion of the terminal pad, a columnar base portion made of copper may be formed, or a columnar base portion formed by covering the resin portion with a metal layer may be formed.

また、本発明は、配線基板の少なくとも一面側に形成した端子用パッドの基部の全露出面を、めっきによって形成した所定厚さのはんだ層で被覆した後、前記はんだ層を含む基部の全体を樹脂層によって覆い、次いで、前記はんだ層の上面が露出するように、前記樹脂層を除去した後、前記はんだ層にリフローを施して、前記はんだ層が形成されていた凹溝で囲まれた前記基部の先端部に、はんだから成る端子部を形成することを特徴とする配線基板の製造方法でもある。
かかる本発明において、はんだ層を、無電解はんだめっきによって形成することによって、給電困難な基部にはんだ層を形成できる。
In the present invention, the entire exposed surface of the base portion of the terminal pad formed on at least one surface side of the wiring board is covered with a solder layer having a predetermined thickness formed by plating, and then the entire base portion including the solder layer is covered. The resin layer is then covered, and then the resin layer is removed so that the upper surface of the solder layer is exposed. Then, the solder layer is subjected to reflow, and the solder layer is surrounded by the concave groove formed. It is also a method for manufacturing a wiring board, characterized in that a terminal portion made of solder is formed at the distal end portion of the base portion.
In the present invention, by forming the solder layer by electroless solder plating, the solder layer can be formed on the base that is difficult to feed.

本発明に係る配線基板の製造方法によれば、露出面がめっき金属層で被覆された端子用パッドの基部が覆われている樹脂層に研磨を施して、めっき金属層の少ないとも上面を露出した後、めっき金属をエッチングによって除去して凹部を形成する。
かかるめっき金属層の厚さのバラツキは、樹脂層に露出・現像を施す加工精度よりも小さくでき、めっき金属層を除去して形成した凹溝は、樹脂層に露出・現像を施して形成した凹溝よりも、その幅のバラツキを可及的に小さくできる。
その結果、端子用パッドの基部の外周縁に沿って形成され、基部の外周面が内壁面に露出する凹溝は、その幅を可及的に均一に形成できる。このため、最終的に得られた端子用パッドに形成された端子部は、樹脂層と部分的に接触して発生する応力の偏在等に因る亀裂等を防止できる。更に、端子用パッド間のパットピッチも狭くできる。
According to the method of manufacturing a wiring board according to the present invention, the resin layer covering the base of the terminal pad whose exposed surface is coated with the plated metal layer is polished to expose the upper surface even if the plated metal layer is small. After that, the plating metal is removed by etching to form a recess.
The thickness variation of the plated metal layer can be made smaller than the processing accuracy of exposing / developing the resin layer, and the groove formed by removing the plated metal layer is formed by exposing / developing the resin layer. The variation in the width can be made as small as possible than the concave groove.
As a result, the concave groove formed along the outer peripheral edge of the base portion of the terminal pad and having the outer peripheral surface of the base portion exposed to the inner wall surface can be formed as uniformly as possible. For this reason, the terminal part formed in the terminal pad finally obtained can prevent cracks and the like due to uneven distribution of stress generated by partial contact with the resin layer. Further, the pad pitch between the terminal pads can be reduced.

本発明に係る配線基板の製造方法の一例を図1及び図2に示す。先ず、図1(a)に示す様に、樹脂製の配線基板10の一面側に、銅から成る端子用パッドの基部12,12・・と配線パターン14,14・・とを形成する。この基部12,12・・及び配線パターン14,14・・は、同一高さで且つ柱状である。かかる基部12,12・・及び配線パターン14,14・・は、公知のアディティブ法、セミアディティブ法或いはサブトラクティブ法によって形成できる。
形成した基部12,12・・及び配線パターン14,14・・をめっき用レジスト層で覆った後、めっき用レジスト層に露光・現像を施して、図1(b)に示す様に、配線パターン14,14・・をめっき用レジスト層16によって覆った状態で、基部12,12・・を露出する。
露出した基部12,12・・は、図1(c)に示す様に、無電解ニッケルめっきによって、めっき金属層としてのニッケル層18によって被覆する。かかるニッケル層18の厚さを、2〜20μmとすることが好ましい。
図1(c)に示す様に、基部12,12・・のみに、無電解ニッケルめっきによってニッケル層18を形成するには、めっき対象面である基部12,12・・の露出面を脱脂してからソフトエッチング及び酸洗浄した後、Pd活性化処理を施す。この際に、基部12,12・・の露出面のみに選択的にPdの核付けを行う。次いで、所定の無電解ニッケルめっき液に配線基板10を浸漬し、その浸漬時間を調整することによって、基部12,12・・の露出面のみに均一厚さで且つ所定厚さのニッケル層18を形成できる。
次いで、配線パターン14,14・・を覆うめっき用レジスト層16を除去し、図1(d)に示す様に、基部12,12・・及び配線パターン14,14・・を、樹脂層としての永久レジスト層20によって覆う。
An example of a method for manufacturing a wiring board according to the present invention is shown in FIGS. First, as shown in FIG. 1A, terminal pad bases 12, 12... And wiring patterns 14, 14... Made of copper are formed on one surface side of a resin wiring board 10. The base portions 12, 12,... And the wiring patterns 14, 14,... Have the same height and are columnar. .. And the wiring patterns 14, 14... Can be formed by a known additive method, semi-additive method, or subtractive method.
After the formed base portions 12, 12,... And wiring patterns 14, 14,... Are covered with a plating resist layer, the plating resist layer is exposed and developed, and as shown in FIG. The base portions 12, 12,... Are exposed in a state in which 14, 14,.
The exposed bases 12, 12,... Are covered with a nickel layer 18 as a plating metal layer by electroless nickel plating, as shown in FIG. The thickness of the nickel layer 18 is preferably 2 to 20 μm.
As shown in FIG. 1 (c), in order to form the nickel layer 18 only on the bases 12, 12,... By electroless nickel plating, the exposed surfaces of the bases 12, 12,. Then, after soft etching and acid cleaning, Pd activation treatment is performed. At this time, Pd nucleation is selectively performed only on the exposed surfaces of the bases 12, 12,. Next, the wiring board 10 is immersed in a predetermined electroless nickel plating solution, and the immersion time is adjusted, whereby the nickel layer 18 having a uniform thickness and a predetermined thickness is formed only on the exposed surfaces of the bases 12, 12,. Can be formed.
Next, the plating resist layer 16 covering the wiring patterns 14, 14,... Is removed, and the base portions 12, 12, .. and the wiring patterns 14, 14,. Covered with a permanent resist layer 20.

かかる永久レジスト層20には、図2(a)に示す様に、基部12,12・・の上面に対応する部分に、粒子を研磨面に噴射するブラスト研磨による研磨を施し、基部12,12・・を被覆するニッケル層18の上面を露出する。
このブラスト研磨は、配線パターン14,14・・の上面を覆う永久レジスト層20の厚さが充分ではないため、配線パターン14,14・・を覆う永久レジスト層20には施さない。
この様に、上面が露出したニッケル層18を、図2(b)に示す様に、エッチングにより除去することによって、基部12,12・・の各外周縁に沿って、凹溝22が形成される。かかる凹溝22,22・・の各内壁面には、基部12の外周面が露出している。
かかる凹溝22,22・・は、ニッケル層18をエッチング除去して形成しているため、その幅はニッケル層18の厚さと等しく、2〜20μmとすることが好ましい。
As shown in FIG. 2A, the permanent resist layer 20 is subjected to polishing by blast polishing in which particles are sprayed onto the polishing surface at portions corresponding to the upper surfaces of the base portions 12, 12,. .. The upper surface of the nickel layer 18 covering the.
This blast polishing is not performed on the permanent resist layer 20 covering the wiring patterns 14, 14,... Because the thickness of the permanent resist layer 20 covering the upper surfaces of the wiring patterns 14, 14,.
In this way, by removing the nickel layer 18 whose upper surface is exposed by etching as shown in FIG. 2 (b), concave grooves 22 are formed along the outer peripheral edges of the bases 12, 12,. The The outer peripheral surface of the base 12 is exposed on each inner wall surface of the concave grooves 22, 22.
Since the concave grooves 22, 22... Are formed by removing the nickel layer 18 by etching, the width is equal to the thickness of the nickel layer 18 and is preferably 2 to 20 μm.

この様に、凹溝22,22・・は、無電解ニッケルめっきによって形成したニッケル層18をエッチング除去して形成しているため、その幅のバラツキはニッケル層18の厚さのバラツキと等しくなる。このため、凹溝22,22・・の幅のバラツキは、樹脂層に露光・現像によって形成した凹溝の幅のバラツキに比較して極めて小さくできる。
更に、外周縁に沿って形成された凹溝22の内壁面に露出する基部12,12・・の外周面には、図2(c)に示す様に、ニッケル層18よりも薄い保護被膜24を形成して端子用パッド25とする。かかる保護被膜24としては、基部12の露出面を被覆する薄膜ニッケル層上に、薄膜状の金層やパラジウム層を無電解めっきによって形成する。
その後、端子用パッド25,25・・の各上面に、はんだボールを搭載してリフローすることによって端子部を形成できる。
尚、保護被膜24としては、水性プリフラックス等の有機薄膜を形成してもよい。
In this way, since the concave grooves 22, 22... Are formed by etching away the nickel layer 18 formed by electroless nickel plating, the variation in the width is equal to the variation in the thickness of the nickel layer 18. . For this reason, the variation in the width of the concave grooves 22, 22,... Can be made extremely small compared to the variation in the width of the concave grooves formed in the resin layer by exposure and development.
Further, on the outer peripheral surface of the base 12, 12,... Exposed on the inner wall surface of the concave groove 22 formed along the outer peripheral edge, as shown in FIG. To form a terminal pad 25. As the protective coating 24, a thin gold layer or palladium layer is formed by electroless plating on the thin nickel layer covering the exposed surface of the base 12.
Thereafter, solder balls are mounted on the upper surfaces of the terminal pads 25, 25,... And reflowed to form terminal portions.
As the protective film 24, an organic thin film such as an aqueous preflux may be formed.

端子用パッド25,25・・の各々は、図3に示す様に、永久レジスト層20と端子用パッド25の上面との間に段差hが形成されているが、端子用パッド25,25・・の各々は、幅が可及的に均一に形成された凹溝22によって囲まれている。
このため、端子用パッド25,25間に形成された永久レジスト層20は、はんだボールを搭載してリフローして端子部を形成する際に、溶融はんだが隣接する端子用パッドに流出することを防止しできる隔壁としての役割も果たす。
しかも、端子用パッド25,25・・の各々に形成した端子部は、永久レジスト層20と部分的に接触して発生する応力の偏在等に因る亀裂等を防止できる。
As shown in FIG. 3, each of the terminal pads 25, 25... Has a step h formed between the permanent resist layer 20 and the upper surface of the terminal pad 25, but the terminal pads 25, 25. Each is surrounded by a concave groove 22 having a width as uniform as possible.
For this reason, when the permanent resist layer 20 formed between the terminal pads 25 and 25 is mounted with solder balls and reflowed to form the terminal portion, the molten solder flows out to the adjacent terminal pads. It also serves as a barrier that can be prevented.
Moreover, the terminal portions formed in each of the terminal pads 25, 25,... Can prevent cracks and the like due to uneven distribution of stress generated by partial contact with the permanent resist layer 20.

図3に示す様に、永久レジスト層20と端子用パッド25との間に段差hを形成することなく、永久レジスト層20と端子用パッド25とを面一に形成するには、図4に示す製造方法を採用することが好ましい。
図4に示す製造方法では、図1(a)〜(d)に示す工程と同様にして、ニッケル層18によって被覆された基部12,12・・及び配線パターン14,14・・を、永久レジスト層20によって覆った後、永久レジスト層20にブラスト研磨を施してニッケル層18を露出する際に、図4(a)に示す様に、ニッケル層18の上面を研磨面よりも突出するように、永久レジスト層20をブラスト研磨する。
この様に、ブラスト研磨によって、ニッケル層18の上面を研磨面よりも突出できるのは、金属であるニッケル層18が永久レジスト層20よりも硬いためである。
次いで、図4(b)に示す様に、ニッケル層18をエッチング除去することによって、上面が研磨面よりも若干低い基部12,12・・を得ることができる。
かかる基部12,12・・の露出面を、図4(c)に示す様に、保護被膜24によって被覆して端子用パッド25を形成すると、図5に示す様に、永久レジスト層20と端子用パッド25の上面とを面一に形成できる。
この様に、永久レジスト層20と端子用パッド25とを面一に形成しても、端子用パッド25は凹溝22によって囲まれているため、はんだボールを搭載してリフローしても、隣接する端子用パッド25に溶融はんだが流出することを防止できる。
As shown in FIG. 3, in order to form the permanent resist layer 20 and the terminal pad 25 flush with each other without forming a step h between the permanent resist layer 20 and the terminal pad 25, FIG. It is preferable to employ the manufacturing method shown.
In the manufacturing method shown in FIG. 4, in the same manner as in the steps shown in FIGS. 1A to 1D, the base portions 12, 12,... And the wiring patterns 14, 14,. When the nickel resist layer 18 is exposed by blasting the permanent resist layer 20 after being covered with the layer 20, as shown in FIG. 4A, the upper surface of the nickel layer 18 protrudes from the polished surface. The permanent resist layer 20 is blast polished.
The reason why the upper surface of the nickel layer 18 can protrude from the polished surface by blast polishing is that the nickel layer 18 that is a metal is harder than the permanent resist layer 20.
Next, as shown in FIG. 4B, by removing the nickel layer 18 by etching, bases 12, 12,... Whose upper surface is slightly lower than the polished surface can be obtained.
When the exposed surfaces of the bases 12, 12,... Are covered with a protective film 24 to form terminal pads 25 as shown in FIG. 4C, the permanent resist layer 20 and the terminals are formed as shown in FIG. The upper surface of the pad 25 can be flush with the upper surface.
In this manner, even if the permanent resist layer 20 and the terminal pad 25 are formed flush with each other, the terminal pad 25 is surrounded by the concave groove 22, so that even if the solder ball is mounted and reflowed, it is adjacent. It is possible to prevent the molten solder from flowing out to the terminal pad 25 to be performed.

図1〜図5に示す配線基板10では、配線基板10の一面側に形成する配線パターン14と基部12が同一高さであったが、図6(a)に示す様に、配線パターン14が基部12よりも低くてもよい。
この場合には、基部12,12・・及び配線パターン14,14・・を永久レジスト層20によって覆ったとき、図6(a)に示す様に、配線パターン14,14・・を覆う永久レジスト層20の厚さを充分に保持できる。
このため、永久レジスト層20を研磨して基部12,12・・被覆するニッケル層18の上面を露出するとき、図6(b)に示す様に、永久レジスト層20の表面全面を一様に研磨してもよい。
次いで、図2(b)に示す様に、基部12を被覆するニッケル層18をエッチング除去して、凹溝22を形成した後、図2(c)に示す様に、基部12をニッケル層18よりも薄い保護被膜24によって被覆することによって端子用パッド25を形成する。
In the wiring board 10 shown in FIGS. 1 to 5, the wiring pattern 14 formed on the one surface side of the wiring board 10 and the base 12 have the same height. However, as shown in FIG. It may be lower than the base 12.
In this case, when the base portions 12, 12,... And the wiring patterns 14, 14,... Are covered with the permanent resist layer 20, the permanent resist covering the wiring patterns 14, 14,. The thickness of the layer 20 can be sufficiently maintained.
For this reason, when the upper surface of the nickel layer 18 covering the base portions 12, 12... Is exposed by polishing the permanent resist layer 20, the entire surface of the permanent resist layer 20 is uniformly formed as shown in FIG. You may grind | polish.
Next, as shown in FIG. 2B, the nickel layer 18 covering the base 12 is removed by etching to form the concave groove 22, and then the base 12 is formed on the nickel layer 18 as shown in FIG. The terminal pad 25 is formed by covering with a thinner protective coating 24.

図1〜図6に示す配線基板の製造方法では、基部12,12・・の露出面に、所定厚さのニッケル層18を形成していたが、図7(a)に示す様に、形成した基部12,12・・の露出面に、所定厚さのはんだ層26を形成してもよい。このはんだ層26は、電解めっきによって形成してもよいが、無電解めっきによって形成することが、給電できない基部12にも形成できる。
かかる無電解めっきによって、基部12,12・・の露出面のみにはんだ層26を形成するには、基部12,12・・の露出面を脱脂してからソフトエッチング及び酸洗浄した後、Pd活性化処理を施す。この際に、基部12,12・・の露出面のみに選択的にPdの核付けを行う。次いで、所定の無電解はんだめっき液に配線基板10を浸漬し、その浸漬時間を調整することによって、基部12,12・・の露出面のみに均一厚さで且つ所定厚さのはんだ層26を形成できる。このはんだ層26の厚さは、2〜20μmとすることが好ましい。
1 to 6, the nickel layer 18 having a predetermined thickness is formed on the exposed surfaces of the base portions 12, 12..., But as shown in FIG. A solder layer 26 having a predetermined thickness may be formed on the exposed surfaces of the bases 12, 12,. The solder layer 26 may be formed by electrolytic plating, but can also be formed by electroless plating on the base 12 where power cannot be supplied.
In order to form the solder layer 26 only on the exposed surface of the base 12, 12,... By such electroless plating, the exposed surface of the base 12, 12,. The process is applied. At this time, Pd nucleation is selectively performed only on the exposed surfaces of the bases 12, 12,. Next, the wiring substrate 10 is immersed in a predetermined electroless solder plating solution, and the immersion time is adjusted, so that a solder layer 26 having a uniform thickness and a predetermined thickness is formed only on the exposed surfaces of the bases 12, 12,. Can be formed. The thickness of the solder layer 26 is preferably 2 to 20 μm.

所定厚さのはんだ層26によって被覆された基部12,12・・は、配線基板10の同一面に形成された配線パターン14,14・・と共に、永久レジスト層20によって覆った後、図7(a)に示す様に、ブラスト研磨によってはんだ層26,26・・の上面を露出する。
その後、配線基板10を加熱雰囲気下に載置し、はんだ層26,26・・にリフローを施すことによって、図7(b)に示す様に、溶融はんだは表面張力によって基部12,12・・の各上面に集まって端子部28を形成できる。
かかるはんだ層26,26・・が形成されていた箇所が、基部12,12・・の各周面が内壁面に露出する凹溝22,22・・に形成される。
尚、図7に示す基部12に代えて、基部12の露出面に保護被膜24を形成して端子用パッド25を用いてもよい。
The base portions 12, 12... Covered with the solder layer 26 having a predetermined thickness are covered with the permanent resist layer 20 together with the wiring patterns 14, 14... Formed on the same surface of the wiring substrate 10. As shown in a), the upper surfaces of the solder layers 26, 26,... are exposed by blast polishing.
After that, the wiring board 10 is placed in a heated atmosphere, and the solder layers 26, 26,... Are reflowed, so that the molten solder is subjected to surface tension as shown in FIG. The terminal portions 28 can be formed by gathering on the respective upper surfaces.
The portions where the solder layers 26, 26,... Are formed are formed in the concave grooves 22, 22,... Where the peripheral surfaces of the base portions 12, 12,.
Instead of the base 12 shown in FIG. 7, the terminal pad 25 may be used by forming a protective film 24 on the exposed surface of the base 12.

図1〜図7では、配線パターン14,14・・には、ニッケル層18で被覆されていないが、基部12,12・・と同様にニッケル層18で被覆されて永久レジスト層20によって覆われていてもよい。
また、図1〜図7では、基部12,12・・を銅によって形成しているが、配線基板10を形成する樹脂と同一樹脂又は異なる樹脂から成る樹脂部を金属層で覆って基部12,12・・を形成してもよい。
更に、図1〜図7に示す配線基板10では、その一面側に基部12,12・・を形成しているが、必要に応じて配線基板10の両面側に基部12,12・・を形成して、配線基板10の両面側に端子用パッドを形成してもよい。
1 to 7, the wiring patterns 14, 14... Are not covered with the nickel layer 18, but are covered with the nickel layer 18 and covered with the permanent resist layer 20 like the base portions 12, 12. It may be.
1 to 7, the base portions 12, 12... Are made of copper. However, the base portion 12, 12 is formed by covering a resin portion made of the same resin as or different from the resin forming the wiring substrate 10 with a metal layer. 12... May be formed.
Further, in the wiring substrate 10 shown in FIGS. 1 to 7, the base portions 12, 12,... Are formed on one surface side, but the base portions 12, 12,. Then, terminal pads may be formed on both sides of the wiring board 10.

本発明に係る配線基板の製造方法の一例を説明するための工程図の一部である。It is a part of process drawing for demonstrating an example of the manufacturing method of the wiring board which concerns on this invention. 本発明に係る配線基板の製造方法の一例を説明ための工程図の残部である。It is the remainder of the process drawing for demonstrating an example of the manufacturing method of the wiring board which concerns on this invention. 図1及び図2に示す配線基板の製造方法で得られた配線基板の部分拡大断面図である。FIG. 3 is a partial enlarged cross-sectional view of a wiring board obtained by the method for manufacturing a wiring board shown in FIGS. 1 and 2. 本発明に係る配線基板の製造方法の他の例を説明ための工程図である。It is process drawing for demonstrating the other example of the manufacturing method of the wiring board which concerns on this invention. 図4に示す配線基板の製造方法でで得られた配線基板の部分拡大断面図である。It is the elements on larger scale of the wiring board obtained with the manufacturing method of the wiring board shown in FIG. 本発明に係る配線基板の製造方法の他の例を説明ための工程図である。It is process drawing for demonstrating the other example of the manufacturing method of the wiring board which concerns on this invention. 本発明に係る配線基板の製造方法の他の例を説明ための工程図である。It is process drawing for demonstrating the other example of the manufacturing method of the wiring board which concerns on this invention. 配線基板に形成される端子用パッドの種類について説明する説明図である。It is explanatory drawing explaining the kind of terminal pad formed in a wiring board. 従来の配線基板の製造方法を説明する工程図である。It is process drawing explaining the manufacturing method of the conventional wiring board. 従来の配線基板の製造方法で得られた配線基板の断面図である。It is sectional drawing of the wiring board obtained with the manufacturing method of the conventional wiring board.

符号の説明Explanation of symbols

10 配線基板
12 基部
14 配線パターン
16 めっき用レジスト層
18 ニッケル層(めっき用金属層)
20 永久レジスト層(樹脂層)
22 凹溝
24 保護被膜
25 端子用パッド
26 はんだ層
28 端子部
DESCRIPTION OF SYMBOLS 10 Wiring board 12 Base 14 Wiring pattern 16 Resist layer 18 for plating Nickel layer (metal layer for plating)
20 Permanent resist layer (resin layer)
22 Concave groove 24 Protective film 25 Terminal pad 26 Solder layer 28 Terminal portion

Claims (13)

配線基板の少なくとも一面側に形成した端子用パッドの基部の全露出面を、所定厚さのめっき金属層によって被覆した後、前記めっき金属層を含む基部の全体を樹脂層によって覆い、
次いで、前記めっき金属層の少なくとも上面が露出するように、前記樹脂層を除去した後、前記めっき金属層をエッチング除去して、前記基部の外周縁に沿って形成され、前記基部の外周面が内壁面に露出する凹溝を形成することを特徴とする配線基板の製造方法。
After covering the entire exposed surface of the base portion of the terminal pad formed on at least one side of the wiring board with a plating metal layer having a predetermined thickness, the entire base portion including the plating metal layer is covered with a resin layer,
Next, after removing the resin layer so that at least the upper surface of the plated metal layer is exposed, the plated metal layer is removed by etching, and the outer peripheral surface of the base is formed along the outer peripheral edge of the base. A method of manufacturing a wiring board, comprising forming a recessed groove exposed on an inner wall surface.
樹脂層を研磨によって除去し、端子用パッドを形成したとき、前記端子用パッドの基部の上面と樹脂層の上面とが面一となるように、めっき金属層の上面を研磨面よりも突出する請求項1記載の配線基板の製造方法。   When the resin layer is removed by polishing to form a terminal pad, the upper surface of the plated metal layer protrudes from the polished surface so that the upper surface of the base of the terminal pad and the upper surface of the resin layer are flush with each other. The manufacturing method of the wiring board of Claim 1. 樹脂層をブラスト研磨によって除去し、端子用パッドの基部の上面を前記樹脂層の研磨面よりも高くする請求項1記載の配線基板の製造方法。   2. The method for manufacturing a wiring board according to claim 1, wherein the resin layer is removed by blast polishing, and the upper surface of the base portion of the terminal pad is made higher than the polished surface of the resin layer. めっき金属層を、無電解めっきによって形成する請求項1〜3のいずれか一項記載の配線基板の製造方法。   The manufacturing method of the wiring board as described in any one of Claims 1-3 which forms a plating metal layer by electroless plating. 端子用パッドの基部として、銅から成る柱状の基部を形成し、前記基部の露出面に無電解ニッケルめっきによってニッケルめっき層を形成する請求項1〜4のいずれか一項記載の配線基板の製造方法。   The wiring board manufacturing method according to any one of claims 1 to 4, wherein a columnar base portion made of copper is formed as a base portion of a terminal pad, and a nickel plating layer is formed on the exposed surface of the base portion by electroless nickel plating. Method. 凹溝として、幅2〜20μmの凹溝を形成する請求項1〜5のいずれか一項記載の配線基板の製造方法。   The method for manufacturing a wiring board according to claim 1, wherein a concave groove having a width of 2 to 20 μm is formed as the concave groove. 端子用パッドの基部の露出面を、めっき金属層よりも薄い保護被膜によって被覆して端子用パッドを形成する請求項1〜6のいずれか一項記載の配線基板の製造方法。   The manufacturing method of the wiring board as described in any one of Claims 1-6 which coat | covers the exposed surface of the base part of a terminal pad with a protective film thinner than a metal plating layer, and forms a terminal pad. 端子用パッド上に搭載したはんだボールをリフローしてはんだから成る端子部を形成する請求項1〜7記載のいずれか一項記載の配線基板の製造方法。   The method for manufacturing a wiring board according to claim 1, wherein a solder ball mounted on the terminal pad is reflowed to form a terminal portion made of solder. 配線基板の少なくとも一面側に形成した端子用パッドの基部の全露出面を、めっきによって形成した所定厚さのはんだ層で被覆した後、前記はんだ層を含む基部の全体を樹脂層によって覆い、
次いで、前記はんだ層の上面が露出するように、前記樹脂層を除去した後、前記はんだ層にリフローを施して、前記はんだ層が形成されていた凹溝で囲まれた前記基部の先端部に、はんだから成る端子部を形成することを特徴とする配線基板の製造方法。
After covering the entire exposed surface of the base of the terminal pad formed on at least one side of the wiring board with a solder layer having a predetermined thickness formed by plating, the entire base including the solder layer is covered with a resin layer,
Next, after removing the resin layer so that the upper surface of the solder layer is exposed, the solder layer is subjected to reflow, and the tip of the base portion surrounded by the concave groove where the solder layer was formed is applied. A method of manufacturing a wiring board, comprising forming a terminal portion made of solder.
はんだ層を、無電解はんだめっきによって形成する請求項9記載の配線基板の製造方法。   The method for manufacturing a wiring board according to claim 9, wherein the solder layer is formed by electroless solder plating. 端子用パッドの基部として、銅から成る柱状の基部を形成する請求項9又は請求項10記載の配線基板の製造方法。   11. The method for manufacturing a wiring board according to claim 9, wherein a columnar base portion made of copper is formed as a base portion of the terminal pad. 端子用パッドの基部として、樹脂部を金属層で覆って成る柱状の基部を形成する請求項9又は請求項10記載の配線基板の製造方法。   The method for manufacturing a wiring board according to claim 9 or 10, wherein a columnar base portion formed by covering a resin portion with a metal layer is formed as a base portion of a terminal pad. 端子用パッドの基部を、外部接続端子用パッドの基部とする請求項1〜12のいずれか一項記載の配線基板の製造方法。   The method for manufacturing a wiring board according to claim 1, wherein the base portion of the terminal pad is the base portion of the external connection terminal pad.
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Publication number Priority date Publication date Assignee Title
WO2011055535A1 (en) 2009-11-04 2011-05-12 日本電気株式会社 Control method for wireless communication system, wireless communication system, and wireless communication device
JP2015050365A (en) * 2013-09-03 2015-03-16 信越化学工業株式会社 Semiconductor device, laminated semiconductor device, lamination after encapsulation type semiconductor device and manufacturing method of those
KR20180075697A (en) 2010-09-28 2018-07-04 미쓰비시 세이시 가부시키가이샤 Method for forming solder resist pattern

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JPH1154930A (en) * 1997-07-30 1999-02-26 Ngk Spark Plug Co Ltd Manufacture of multilayered wiring board
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WO2011055535A1 (en) 2009-11-04 2011-05-12 日本電気株式会社 Control method for wireless communication system, wireless communication system, and wireless communication device
KR20180075697A (en) 2010-09-28 2018-07-04 미쓰비시 세이시 가부시키가이샤 Method for forming solder resist pattern
JP2015050365A (en) * 2013-09-03 2015-03-16 信越化学工業株式会社 Semiconductor device, laminated semiconductor device, lamination after encapsulation type semiconductor device and manufacturing method of those

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