JP6812678B2 - Manufacturing method of wiring board - Google Patents

Description

The present invention relates to a method for manufacturing a wiring board.

Conventionally, as a wiring board, a wiring board including a plurality of build-up layers formed by alternately laminating conductor layers and insulating layers on a core substrate and a solder resist layer formed on the build-up layers is known. ing. On the other hand, in recent years, electronic devices such as portable information and communication device terminals are rapidly becoming smaller and more sophisticated, and thin and highly functional semiconductor devices are required. If the wiring board used for the semiconductor device is made thin, it is directly linked to the thinning of the semiconductor device, and the length of the conductor path in the wiring board can be shortened, which is advantageous for high functionality. Therefore, it is required to make the wiring board material as thin as possible. In addition, by reducing the diameter of the IVH (Inner Via Hole) that connects the conductor layers in the wiring board at the same time as making the wiring board material thinner, it is possible to increase the number of holes in the IVH per unit area, and inside the wiring board. The density of the electric circuit is increased. Therefore, there is a demand for a method for easily forming a small diameter via.

By the way, when the wiring board material is made thinner, there is a problem that the warp of the semiconductor package becomes large and the mountability is lowered. Therefore, for example, Patent Document 1 discloses a method for manufacturing a wiring board using a sheet-like member having an elastic modulus and a thermal expansion coefficient similar to those of a mounted semiconductor element.

Further, in order to reduce the warp of the wiring board itself, a method of using a prepreg containing a glass cloth for the build-up layer (insulating layer) is known. However, when such a prepreg is used, it is difficult to form a clean (flat wall surface) IVH by protruding the glass cloth portion into the IVH by the current method of forming fine vias by laser irradiation. Therefore, for example, in Patent Document 2, a via hole is formed by laser irradiation, and the via hole is subjected to a glass etching treatment with a glass etching solution and then a desmear treatment with an oxidizing agent solution to manufacture a multilayer printed wiring board. The method is disclosed.

Japanese Unexamined Patent Publication No. 2011-198878 JP-A-2009-147323

However, in the manufacturing method described in Patent Document 1, although the warp of the package may be reduced, the chip is not mounted because of the structure in which a thin build-up layer is laminated on the base material having high rigidity and low thermal expansion. Then, the coefficient of thermal expansion is asymmetric, and there is a concern that the wiring board itself may warp.

Further, in the manufacturing method described in Patent Document 2, although the warp of the wiring board itself can be reduced, a wet process such as desmear treatment is performed in order to remove the glass cloth protruding into the IVH and secure the flatness of the IVH wall surface. Has to be added, and the process cost will inevitably increase.

The present invention has been made in view of such a situation, and provides a method for manufacturing a wiring board capable of ensuring flatness of an IVH wall surface without requiring a wet process while reducing warpage of the wiring board itself. The purpose is.

As a result of diligent studies, the present inventors have found a method for manufacturing a wiring board that can solve the above problems, and have completed the present invention.

That is, the method for manufacturing a wiring board according to one aspect of the present invention is a method for manufacturing a wiring board including a build-up layer, in which a build-up layer is formed by a prepreg having a thickness of 35 μm or less including a glass cloth. It includes a forming step and an IVH forming step of forming an IVH (Inner Via Hole) having a diameter of 50 μm or less on the build-up layer by a sandblasting method.

In this method of manufacturing a wiring board, the warp of the wiring board itself can be reduced by forming a build-up layer with a prepreg containing a glass cloth. Further, since IVH is formed by the sandblasting method, the flatness of the IVH wall surface can be ensured without the need for a wet process. In addition, since the thickness of the prepreg is 35 μm or less, it is possible to reduce the thickness of the wiring board and the warp of the package, and also to reduce the material cost.

In one aspect, the method for manufacturing a wiring board includes a solder resist layer forming step of forming a solder resist layer on a build-up layer and an SRO forming step of forming an SRO (Solder Resist Opening) on the solder resist layer by a sandblasting method. , Are further provided. In this case, the wet process is not required for the formation of SRO in the solder resist layer.

In one aspect, the method for manufacturing a wiring board includes a second dry film resist layer forming step of forming a second dry film resist layer on the solder resist layer and a second dry film after the solder resist layer forming step. It further includes an exposure step of exposing a part of the resist layer and an opening forming step of removing an unexposed region of the second dry film resist layer after exposure by a sandblast method to form an opening. By forming an opening in the second dry film resist layer in advance, the positional accuracy of the SRO formed in the solder resist layer is improved. Further, by forming an opening in the second dry film resist layer by the sandblast method, the process can be simplified.

In one aspect of the method for manufacturing a wiring board, a solder resist layer is formed by using a composition having no photocurability in the solder resist layer forming step. In this case, since the composition having no photocurability can contain a large amount of inorganic filler, a solder resist layer having high elasticity and low thermal expansion can be formed.

In one aspect, the method for manufacturing a wiring board includes a first dry film resist layer forming step of forming a first dry film resist layer on a build-up layer and a first dry film resist before the IVH forming step. It further includes an exposure step of exposing a part of the layer and an opening forming step of removing an unexposed region of the first dry film resist layer after exposure by a sandblast method to form an opening. By forming an opening in the first dry film resist layer in advance, the positional accuracy of the IVH formed in the build-up layer is improved. Further, by forming an opening in the first dry film resist layer by the sandblast method, the process can be simplified.

In one aspect, the method for manufacturing a wiring board further includes a resin layer forming step of forming a primer resin layer for a plating process on a build-up layer before the first dry film resist layer forming step, and in the IVH forming step. , The resin layer at the position corresponding to IVH is removed by the sandblasting method. In this case, it is not necessary to remove the copper foil layer on the IVH by etching as compared with the case where the copper foil layer is formed on the build-up layer described later.

In one aspect, the method for manufacturing a wiring plate includes a copper foil layer forming step of forming a copper foil layer on a build-up layer, an opening forming step, and an IVH forming step before the first dry film resist layer forming step. In between, a copper foil layer removing step of removing the copper foil layer at a position corresponding to IVH by etching treatment is further provided. By forming the copper foil layer on the build-up layer, the copper foil layer can be used as the seed layer, and it is not necessary to separately form the seed layer.

In one aspect, the method for manufacturing a wiring board further includes a copper foil layer forming step for forming a copper foil layer on a build-up layer before the first dry film resist layer forming step, and sandblasting in the IVH forming step. By the method, the exposed region of the first dry film resist layer after exposure and the copper foil layer at the position corresponding to the exposed region are removed. By removing the exposed region of the first dry film resist layer after exposure and the copper foil layer at the position corresponding to the exposed region by the sandblast method, the exposed region of the first dry film resist layer after exposure is separately separated. Since it is not necessary to remove the copper foil layer at a position corresponding to the exposed region, the time required for peeling the first dry film resist layer and etching the copper foil layer can be saved.

In one aspect of the method of manufacturing a wiring board, the glass cloth is made of quartz glass. In this case, it is possible to increase the elasticity and the coefficient of thermal expansion (low thermal expansion and high elasticity) when the wiring board is thinned, and the sandblasting process in the IVH forming step becomes easy.

The wiring board is, in one aspect, a wiring board manufactured by the above-mentioned manufacturing method of the wiring board.

According to the present invention, it is possible to provide a method for manufacturing a wiring board that can secure the flatness of the IVH wall surface without requiring a wet process while reducing the warp of the wiring board itself.

(A)-(f) are sectional views schematically showing the manufacturing method of the wiring board which concerns on 1st Embodiment. (A) to (e) are sectional views schematically showing the manufacturing method of the wiring board which concerns on 1st Embodiment. (A) to (d) are sectional views schematically showing the manufacturing method of the wiring board which concerns on 1st Embodiment. (A) to (f) are sectional views schematically showing a method of manufacturing a wiring board according to a second embodiment. (A) to (c) are sectional views schematically showing the manufacturing method of the wiring board which concerns on 3rd Embodiment.

Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings as necessary. However, the present invention is not limited to the following embodiments. Further, the dimensional ratios in the drawings are not limited to the ratios shown.

1 to 3 are cross-sectional views schematically showing a method for manufacturing a wiring board according to the first embodiment. In this manufacturing method, first, as shown in FIG. 1A, a laminate 3 including a support base material 1 and a conductor layer 2 formed on the support base material 1 is prepared (preparation step). The laminate 3 is obtained, for example, by laminating a conductor on the support base material 1.

The support base material 1 includes, for example, a substrate 4 and a plurality of metal foil layers 5a and 5b formed on the substrate 4. The substrate 4 may be FR-4 (glass epoxy resin base material), FR-5 (heat resistant glass epoxy base material), SUS (stainless steel) base material, or the like. The metal foil layer 5 may be composed of two or more metal foil layers, and at least two layers of the plurality of metal foil layers are physically peelable from each other. The metal foil layer 5 is preferably formed of peelable copper foil. Since the thickness of the layer farthest from the substrate 4 of the peelable copper foil layer is extremely thin, the time can be shortened at the time of final etching out. The support base material 1 is preferably one in which a peelable copper foil is attached to FR-4 or FR-5, but a metal foil layer may be formed on a SUS plate by a plating treatment.

The conductor layer 2 is made of, for example, copper. The conductor layer 2 may be, for example, a wiring patterned on the support base material 1, or may be a pad, a dummy pattern, or the like. The method for forming the conductor layer 2 is not particularly limited, and may be, for example, a method in which a metal foil layer (peelable copper foil layer) 5 is used as a seed layer and formed by a plating process.

Following the preparation step, as shown in FIG. 1 (b), a build-up layer (also referred to as an insulating layer) 6 is formed on the support base material 1 so as to cover the conductor layer 2 by using a prepreg (build). Up layer forming process). The build-up layer 6 is formed, for example, by vacuum pressing the prepreg on the support base material 1.

The prepreg contains a glass cloth, for example, the glass cloth is impregnated with a resin. The glass cloth can have high elasticity and low coefficient of thermal expansion (low thermal expansion and high elasticity) when the wiring substrate is thinned, and is preferably Q from the viewpoint of facilitating sandblasting in the IVH forming step described later. It is glass (quartz glass). As the resin, a siloxane resin, a polyimide resin, a cyanate resin, an epoxy resin and the like are suitable.

The thickness of the prepreg is 35 μm or less, preferably 25 μm or less, and more preferably 15 μm or less. When the thickness of the prepreg is 35 μm or less, the wiring board is thinned, the time required for processing fine IVH in the IVH forming step described later is shortened, and the diameter of IVH tends to be easily reduced. is there. The thickness of the prepreg may be, for example, 5 μm or more.

Following the build-up layer forming step, as shown in FIG. 1C, a resin layer (primer resin layer for plating process) 7 is formed on the build-up layer 6 (resin layer forming step). The resin layer 7 is formed, for example, by laminating. The resin used for the resin layer 7 is preferably a polyfunctional epoxy resin because it has little effect on the physical properties of the build-up layer 6 and has good adhesion to electroless plating.

By forming the resin layer 7 on the build-up layer 6, it is not necessary to remove the copper foil layer on the IVH by etching treatment as compared with the case where the copper foil layer is formed on the build-up layer 6 described later.

Following the resin layer forming step, as shown in FIG. 1C, the first dry film resist layer 8 is formed on the resin layer 7 (first dry film resist layer forming step). The first dry film resist layer 8 can be formed by a known method such as roll laminating or vacuum laminating. Laminating may be performed under the conditions of, for example, 0.001 N or more at 0 to 180 ° C. and a roll speed of 0.01 mm / s or more.

From the viewpoint of achieving both resolution and sandblast resistance, the thickness of the first dry film resist layer 8 is preferably 35 μm or less, and the first dry film resist layer 8 is preferably carboxyl. Alkali-soluble resin containing cellulose having a group or acrylic resin having a carboxyl group, photopolymerizable compound containing a monofunctional compound or a polyfunctional compound having an ethylenically unsaturated group, a urethane (meth) acrylate compound, and a photopolymerization initiator. It is formed of a photosensitive resin composition containing.

Following the first dry film resist layer forming step, as shown in FIG. 1D, for example, using an exposure mask 9, a predetermined region that is a part of the first dry film resist layer 8 is exposed to the active light L. Exposure with (exposure process). The predetermined region here is a region where an opening is planned to be formed in the first dry film resist layer 8. The exposure method may be a direct drawing method using a UV laser instead of the method using the exposure mask 9.

Following the exposure step, as shown in FIG. 1 (e), the unexposed region of the first dry film resist layer 8 after exposure (the region where the active light L was blocked by the exposure mask 9 in the exposure step). Is removed to form the opening 10 (opening forming step). The opening 10 is formed at a position corresponding to the region where IVH is to be formed in the build-up layer 6.

The method for removing the unexposed region of the first dry film resist layer 8 is not particularly limited, and examples thereof include a method of removing by shower development or mist development using a developing solution, a method of removing by a sandblast method, and the like. From the viewpoint of simplifying the steps by omitting the shower development or mist development with a developing solution, washing and drying steps, a method of removing by a sandblasting method is preferable. The sandblasting is performed under the same conditions as the sandblasting in the IVH forming step described later, for example.

Following the opening forming step, as shown in FIG. 1 (f), IVH (Inner Via Hole) 11 is formed in the build-up layer 6 by using the sandblasting method (IVH forming step).

In the IVH forming step, the first dry film resist layer 8 having the opening 10 serves as a mask, and by spraying abrasive grains (abrasive), the build-up layer 6 at the position corresponding to the opening 10 is formed. To cut. The conditions for sandblasting are not particularly limited. Examples of the abrasive grains include fine particles such as glass beads, SiC, SiO ₂ , Al ₂ O ₃ , and ZrO. The average particle size of the abrasive grains may be, for example, 2 to 100 μm. The abrasive grains are preferably Al ₂ O ₃ fine particles (alumina powder) having an average particle size of 30 μm or less. The amount of the abrasive grains injected is preferably such that the abrasive grains do not clog the IVH.

The diameter of IVH11 is 50 μm or less, and is preferably 40 μm or less, more preferably 30 μm or less, because the electric circuit (wiring) in the wiring board can be densified. When the diameter of the IVH 11 is 50 μm or less, the density of the electric circuit (wiring) in the wiring board is increased, the increase in the number of build-up layers 6 is suppressed, and the IVH is formed by the conventional CO ₂ laser. The cost is low.

In the IVH forming step, since the build-up layer 6 is formed of a prepreg having a thickness of 35 μm or less including glass cloth, when grinding by the sandblasting method, a desmear process or the like is performed as compared with the current IVH forming method by laser irradiation. Without the need, it is possible to process (form) a large number of IVH11s having a desired shape (for example, a cylindrical shape) having excellent flatness of the wall surface faster.

In the IVH forming step, since the build-up layer 6 is formed of a prepreg having a thickness of 35 μm or less containing a glass cloth (more preferably, a glass cloth of Q glass), the build-up layer 6 can be easily scraped by the sandblasting method. , It is possible to prevent all of the first dry film resist layer 8 from being scraped off by the sandblasting method before the IVH 11 reaches the conductor layer 2.

After the IVH forming step, for example, the first dry film resist layer 8 remaining on the resin layer 7 without being scraped off by sandblasting may be removed (first dry film resist layer removing step). Examples of the method for removing the first dry film resist layer 8 include a method for removing the dry film resist layer 8 with an alkaline aqueous solution.

After the first dry film resist layer removing step, a seed layer may be formed on the resin layer 7, the inner wall of IVH11, and the conductor layer 2 (seed layer forming step). The seed layer is preferably formed of copper. The seed layer is formed by, for example, electroless copper plating. The thickness of the seed layer is not particularly limited.

After the seed layer forming step, a third dry film resist layer may be formed on the seed layer (third dry film resist layer forming step). The third dry film resist layer is formed, for example, by the same material and method as the first dry film resist layer 8. The presence or absence of sandblast resistance of the third dry film resist layer does not matter.

After the third dry film resist layer forming step, a predetermined area of the third dry film resist layer is exposed in the same manner as in the first dry film resist layer 8, and then the third dry film resist layer is not yet exposed. The exposed portion may be removed.

Subsequently, wiring may be formed in IVH11 and on the seed layer on which the third dry film resist layer is not formed (wiring forming step). The wiring is preferably made of copper. The wiring is formed, for example, by electrolytic copper plating.

After the wiring forming step, the third dry film resist layer may be removed (third dry film resist layer removing step). The third dry film resist layer can be removed by the same method as the first dry film resist layer 8.

After the third dry film resist layer removing step, the seed layer corresponding to the region where the wiring is not laminated may be removed (seed layer removing step). Examples of the method for removing the seed layer include etching treatment.

The build-up layer forming step to the seed layer removing step described above may be repeated to form multiple layers. That is, two or more build-up layers 6 may be formed, and the plurality of build-up layers 6 may be electrically connected by wiring.

The first solder resist layer is further laminated on the laminate thus obtained. Specifically, as shown in FIG. 2A, the first solder resist layer 13 is formed on the resin layer 7 and the wiring 12 laminated on the build-up layer 6 (solder resist layer forming step). ..

The first solder resist layer 13 preferably contains a large amount of inorganic filler from the viewpoint of forming a highly elastic and low thermal expansion solder resist layer so that the obtained wiring board does not bend even if it is extremely thin. It is formed of a composition contained in (for example, 60% by mass or more) and having no photocurability. Such a first solder resist layer 13 is formed of, for example, a composition containing a modified epoxy resin and a silica filler of 60% by mass or more based on the total amount of the composition. As described above, when the first solder resist layer 13 is formed of the composition containing a large amount of silica filler, the first solder resist layer 13 is easily removed by the sandblast method.

Following the solder resist layer forming step, as shown in FIG. 2B, a second dry film resist layer 14 may be formed on the first solder resist layer 13 (formation of a second dry film resist layer). Process). The second dry film resist layer 14 is formed by the same material and method as the first dry film resist layer 8. The thickness of the second dry film resist layer 14 may be preferably the same as the thickness of the first dry film resist layer 8.

Following the second dry film resist layer forming step, as shown in FIG. 2C, for example, using an exposure mask 9, a predetermined region that is a part of the second dry film resist layer 14 is exposed to the active light L. Exposure with (exposure process). The predetermined region here is a region where an opening is planned to be formed in the second dry film resist layer 14. The exposure method may be a direct drawing method using a UV laser instead of the method using the exposure mask 9.

Following the exposure step, as shown in FIG. 2D, the unexposed region of the second dry film resist layer 14 after exposure (the region where the active light L was blocked by the exposure mask 9 in the exposure step). Is removed to form the opening 15 (opening forming step). The opening 15 is formed at a position corresponding to a region where the first SRO (Solder Rest Opening: opening of the solder resist) is to be formed in the first solder resist layer 13. The method for removing the unexposed region of the second dry film resist layer 14 may be the same as the method for removing the unexposed region of the first dry film resist layer 8.

Following the opening forming step, as shown in FIG. 2E, the first SRO 16 is formed on the first solder resist layer 13 by the sandblasting method (SRO forming step). The conditions for sandblasting may be the same as those for sandblasting in the IVH forming step.

Following the SRO forming step, as shown in FIG. 3A, the second dry film resist layer 14 is removed (second dry film resist layer removing step). The second dry film resist layer 14 is removed in the same manner as, for example, the first dry film resist layer 8.

Following the second dry film resist layer removing step, the support base material 1 is peeled from the build-up layer 6 and the conductor layer 2 as shown in FIG. 3 (b) (support base material peeling step). As a method of peeling the support base material 1, for example, after peeling the physically peelable metal foil layers 5a and 5b from each other, the metal foil layer 5a remaining on the surfaces of the build-up layer 6 and the conductor layer 2 is etched. , A method of removing by polishing or the like.

Following the support base material peeling step, as shown in FIG. 3C, a second solder resist layer 13 is formed on the surfaces of the exposed build-up layer 6 and the conductor layer 2. The method for forming the second solder resist layer 13 may be the same as the method for forming the first solder resist layer 13 described above.

Subsequently, as shown in FIG. 3D, a second SRO 17 is formed on the second solder resist layer 13. The method for forming the second SRO 17 may be the same as the method for forming the first SRO 16.

By the manufacturing method described above, the wiring board 18 as shown in FIG. 3D can be obtained. In this manufacturing method, the warp of the wiring board 18 itself can be reduced by forming the build-up layer 6 with the prepreg containing the glass cloth. Further, since IVH11 is formed by the sandblasting method, the flatness of the IVH11 wall surface and the cleanability inside the IVH11 can be ensured without the need for a wet process. In addition, since the thickness of the prepreg is 35 μm or less, it is possible to reduce the thickness of the wiring board 18 and the warp of the package, and also to reduce the material cost. Further, by forming the first SRO 16 on the first solder resist layer 13 by the sandblast method, the wet process becomes unnecessary. Further, by forming the resin layer 7 on the build-up layer 6, it is necessary to remove the copper foil layer on the IVH 11 by etching treatment as compared with the case where the copper foil layer is formed on the build-up layer 6 described later. It disappears.

FIG. 4 is a cross-sectional view schematically showing a method for manufacturing a wiring board according to a second embodiment. In the method for manufacturing a wiring board according to the first embodiment, the resin layer 7 is formed on the build-up layer 6, but in the method for manufacturing a wiring board according to the second embodiment, the resin layer 7 is formed on the build-up layer 6. Instead, the copper foil layer 19 is formed (copper foil layer forming step). The copper foil layer 19 is formed by, for example, a vacuum press. The copper foil layer 19 may be formed after the build-up layer 6 is formed, or may be formed at the same time as the build-up layer 6 (that is, the build-up layer forming step and the copper foil layer forming step are performed at the same time. May be broken).

In this case, except for forming the copper foil layer 19 instead of the resin layer 7, the first step up to the opening forming step (FIG. 1 (e)) of forming the opening 10 in the first dry film resist layer 8 is carried out. A process similar to that of the embodiment is carried out. After that, the copper foil layer 19 corresponding to the position where the IVH 11 is formed is removed (copper foil layer removing step) to form an opening in the copper foil layer 19 (FIG. 4A). As a method for removing the copper foil layer 19, a method for removing the copper foil layer 19 by etching copper with an acidic etching solution is preferable.

In the manufacturing method according to the second embodiment, the copper foil layer 19 can be used as the seed layer in the first embodiment by forming the copper foil layer 19 on the build-up layer 6.

That is, first, as shown in FIG. 4B, a third dry film resist layer 20 is formed on the copper foil layer 19, and then a predetermined region of the third dry film resist layer 20 is exposed to the third dry film resist layer 20. The unexposed portion of the third dry film resist layer 20 can be removed.

Subsequently, as shown in FIG. 4C, the wiring 12 is formed in the IVH 11 and on the copper foil layer 19 on which the third dry film resist layer is not formed. Then, as shown in FIG. 4D, the third dry film resist layer 20 is removed.

As described above, in the manufacturing method according to the second embodiment, the seed layer forming step in the first embodiment is not required when forming the wiring 12.

In this manufacturing method, subsequently, as shown in FIG. 4 (e), the copper foil layer 19 corresponding to the region where the wiring 12 is not laminated is removed instead of the seed layer removing step in the first embodiment ( Copper foil layer removal process). Examples of the method for removing the copper foil layer 19 include an etching process.

After that, as in the first embodiment, the build-up layer forming step to the copper foil layer removing step are repeated to form multiple layers, and the same steps as in the solder resist layer forming step to the SRO forming step in the first embodiment are carried out. As a result, as shown in FIG. 4 (f), the wiring board according to the second embodiment can be obtained.

FIG. 5 is a cross-sectional view schematically showing a method for manufacturing a wiring board according to a third embodiment. In the production method of the second embodiment, after the IVH forming step, the first dry film resist layer 8 remaining on the build-up layer 6 without being scraped off by the sandblasting treatment was removed (first dry film resist layer removing step). After that, a copper foil layer removing step is carried out, but in the method for manufacturing a wiring board according to the third embodiment, the first dry film resist layer 8 is scraped off before the IVH 11 is completely formed (first dry film). IVH11 is not completely formed when the resist layer has been scraped).

That is, first, after removing the unexposed region of the first dry film resist layer 8 to form the opening 10 (FIG. 5 (a)), as shown in FIG. 5 (b), the first is performed by the sandblast method. The build-up layer 6 located at the position corresponding to the opening 10 of the dry film resist layer 8 is ground to form IVH11, and at the same time, a part of the first dry film resist layer 8 and the copper foil layer 19 is removed. .. At this time, in order to scrape off the first dry film resist layer 8 before completely forming IVH11, the thickness of the first dry film resist layer 8 is reduced (for example, 20 to 30 μm), and the first dry film resist is formed. The sand blast resistance of the layer 8 is lowered, or the sand blasting conditions are adjusted. From the viewpoint of lowering the sandblast resistance, the first dry film resist layer 8 preferably contains a photosensitive resin composition containing a urethane (meth) acrylate compound or a photopolymerized polyfunctional compound having an ethylenically unsaturated group. It is formed by using the photosensitive resin composition contained therein, for example, after adjusting the content of the urethane (meth) acrylate compound or the photopolymerizable polyfunctional compound having an ethylenically unsaturated group in the composition.

Then, by further continuing sandblasting, IVH11 is completely formed and the surface of the conductor layer 2 is exposed (FIG. 5 (c)). At this time, for example, the thickness of the copper foil layer 19 is adjusted so that the copper foil layer 19 remains.

In the production method of the third embodiment, the first dry film resist layer 8 is removed at the same time as the IVH is formed, and the copper foil layer 19 is thinned by sandblasting, so that the first dry film resist layer 8 is thinned. The time for peeling and etching the copper foil layer 19 can be saved.

In the manufacturing methods of the first to third embodiments, the conductor layer 2 is formed on the support base material 1 having the substrate 4 and the metal foil layer 5 to obtain a so-called coreless substrate (wiring plate). The metal foil layer 5 of the above may be eliminated, and the supporting base material 1 may be used as a core base material (board) to obtain a wiring board having a core base material.

In the manufacturing methods of the first to third embodiments, the wiring board is formed only on one surface of the support base material 1, but the same process is applied to the other surface of the support base material 1 to obtain the wiring board. It may be formed.

In the production methods of the first to third embodiments, the first SRO16 is formed on the first solder resist layer 13 by the sandblasting method, but the first solder resist layer 13 is formed of a photocurable composition. If so, it may be formed by a general opening opening step (step involving exposure and development) of the photosensitive solder resist layer.

In the manufacturing methods of the first to third embodiments, the support base material peeling step is carried out after the SRO forming step, but the supporting base material peeling step may be carried out before the SRO forming step.

The wiring board of this embodiment is a wiring board manufactured by the manufacturing methods of the first to third embodiments.

As described above, according to the present invention, it is possible to provide a method for manufacturing a wiring board which is ultra-thin, has little deflection, has a small package warp after chip mounting, has a high wiring density, and is excellent in cost performance. The method for manufacturing a wiring board is suitable for a method for manufacturing a wiring board to be mounted on a thin and highly functional semiconductor device that can cope with miniaturization and high functionality of electronic devices, and has a very large industrial utility value. ..

1 ... Supporting substrate, 2 ... Conductor layer, 3 ... Laminated body, 4 ... Substrate, 5, 5a, 5b ... Metal foil layer, 6 ... Build-up layer, 7 ... Resin layer, 8 ... First dry film resist layer , 9 ... Exposure mask, 10 ... Opening, 11 ... IVH, 12 ... Wiring, 13 ... First solder resist layer, Second solder resist layer, 14 ... Second dry film resist layer, 16 ... First SRO, 17 ... second SRO, 18 ... wiring board, 19 ... copper foil layer, 20 ... third dry film resist layer.

Claims (10)

A method of manufacturing a wiring board with a build-up layer.
A build-up layer forming step of forming the build-up layer with a prepreg having a thickness of 35 μm or less including a glass cloth, and
An IVH forming step of forming an IVH (Inner Via Hole) having a diameter of 50 μm or less in the build-up layer by a sandblasting method.
A solder resist layer forming step of forming a solder resist layer on the build-up layer,
An SRO forming step of forming an SRO (Solder Rest Opening) on the solder resist layer by a sandblasting method,
After the solder resist layer forming step,
A second dry film resist layer forming step of forming a second dry film resist layer on the solder resist layer, and
An exposure step of exposing a part of the second dry film resist layer and
A method for manufacturing a wiring board , comprising: an opening forming step of removing an unexposed area of the second dry film resist layer after exposure by a sandblasting method to form an opening . The method for producing a wiring board according to claim 1 , wherein in the solder resist layer forming step, the solder resist layer is formed by using a composition having no photocurability. A method of manufacturing a wiring board with a build-up layer.
A build-up layer forming step of forming the build-up layer with a prepreg having a thickness of 35 μm or less including a glass cloth, and
An IVH forming step of forming an IVH (Inner Via Hole) having a diameter of 50 μm or less in the build-up layer by a sandblasting method.
Before the IVH forming step,
The first dry film resist layer forming step of forming the first dry film resist layer on the build-up layer, and
An exposure step of exposing a part of the first dry film resist layer and
An opening forming step of removing an unexposed region of the first dry film resist layer after exposure by a sandblasting method to form an opening.
Further comprising, a manufacturing method of the wiring plate. A solder resist layer forming step of forming a solder resist layer on the build-up layer,
An SRO forming step of forming an SRO (Solder Rest Opening) on the solder resist layer by a sandblasting method,
The method for manufacturing a wiring board according to claim 3, further comprising. After the solder resist layer forming step,
A second dry film resist layer forming step of forming a second dry film resist layer on the solder resist layer, and
An exposure step of exposing a part of the second dry film resist layer and
An opening forming step of removing an unexposed region of the second dry film resist layer after exposure by a sandblasting method to form an opening.
The method for manufacturing a wiring board according to claim 4, further comprising. The method for producing a wiring board according to claim 4 or 5, wherein in the solder resist layer forming step, the solder resist layer is formed using a composition having no photocurability. Prior to the first dry film resist layer forming step, a resin layer forming step of forming a primer resin layer for a plating process on the build-up layer is further provided.
The method for manufacturing a wiring board according to any one of claims 3 to 6, wherein in the IVH forming step, the resin layer at a position corresponding to the IVH is removed by a sandblasting method. Prior to the first dry film resist layer forming step, a copper foil layer forming step of forming a copper foil layer on the build-up layer and a copper foil layer forming step.
Between the opening forming step and the IVH forming step, a copper foil layer removing step of removing the copper foil layer at a position corresponding to the IVH by etching treatment,
The method for manufacturing a wiring board according to any one of claims 3 to 6 , further comprising. Prior to the first dry film resist layer forming step, a copper foil layer forming step of forming a copper foil layer on the build-up layer is further provided.
Any of claims 3 to 6 in the IVH forming step, wherein the exposed region of the first dry film resist layer after the exposure and the copper foil layer at a position corresponding to the exposed region are removed by a sandblasting method . The method for manufacturing a wiring board according to item 1 . The method for manufacturing a wiring board according to any one of claims 1 to 9 , wherein the glass cloth is made of quartz glass.

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