JP2018182252A - Manufacturing method of printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a solder resist layer having uniform thickness by suppressing deformation of a printed wiring board during formation of the solder resist layer.SOLUTION: A manufacturing method of a printed wiring board includes: laminating a peelable metal foil consisting of peelable two layers of metal foils 28a and 28b on a support plate 24 via an adhesive layer; forming a first solder resist layer 20; alternately laminating a conductor layer and a resin insulation layer 14 and forming a build-up layer 16; forming a second solder resist layer 22 on a second outermost conductor layer 12b and forming a build-up layer 16 with double-sided solder resist layer; physically peeling the two layers of metal foils from each other and separating the build-up layer 16 with double-sided solder resist layer from the support plate 24; removing the metal foil 28a on a surface of the first solder resist layer 20; and forming an opening in which a part of a first outermost conductor layer 12a adjacent to the first solder resist layer 20 is exposed as a first pad.SELECTED DRAWING: Figure 2K

Description

  The present invention relates to a method of manufacturing a coreless printed wiring board having no core substrate.

  Patent Document 1 discloses a method of manufacturing a multi-layer substrate having a coreless structure without a core substrate. In the manufacturing method of the multilayer substrate of patent document 1, a 1st seed layer is formed in one surface side of the copper plate as a support plate. A pad for semiconductor device made of copper is formed on the first seed layer. An insulating layer is formed on the surface of the copper plate on which the pad for semiconductor element is formed. A recess is formed in the insulating layer by laser light. A second seed layer is formed on the entire surface of the insulating layer including the inner wall surface of the recess. Vias and conductor wires are formed with the second seed layer as a feed layer. These steps are repeated to obtain an intermediate of a multilayer substrate in which conductor wiring and insulating layers are alternately stacked. The copper plate supporting the intermediate is removed by etching. Thereby, the first seed layer is exposed. The exposed first seed layer is removed by etching. Thus, the semiconductor device pad is exposed. Solder resist is respectively applied to both sides of the copper plate and the intermediate from which the first seed layer has been removed, to obtain a multilayer substrate.

JP 2000-323613 A

  In the method for manufacturing a multilayer substrate of Patent Document 1, the formation of the solder resist layer is performed as follows. A solder resist is applied to the first surface of the intermediate from which the copper plate has been removed. The intermediate coated with the solder resist on the first side is turned over. A solder resist is applied to the second surface of the intermediate. As described above, in the method for manufacturing a multilayer substrate disclosed in Patent Document 1, the solder resist is formed in a state in which the copper plate as a support plate is removed from the intermediate of the multilayer substrate. Therefore, the multilayer substrate is easily deformed during the formation of the solder resist layer, and the solder resist layer tends to be uneven in thickness.

  The method for producing a printed wiring board according to the present invention comprises laminating a pillarable metal foil composed of two layers of metal foils which can be physically separated from each other on a support plate via an adhesive layer, and on the pillarable metal foil. Forming a first solder resist layer; alternately laminating a conductor layer and a resin insulating layer on the first solder resist layer to form a buildup layer; and forming a buildup layer on the first solder resist layer. Forming a second solder resist layer on the conductor layer located farthest from the first solder resist layer among the conductor layers formed in the second layer, forming a buildup layer with a double-sided solder resist layer, and Separating the metal foils of the layers physically from each other to separate the buildup layer with the double-sided solder resist layer from the support plate together with the metal foil of one of the two layers of metal foils; Removing the metal foil on the surface of the first solder resist layer of the built-up layer with double-sided solder resist layer, and one of the conductor layers adjacent to the first solder resist layer on the first solder resist layer. Forming an opening that exposes the portion as a pad.

  According to the method for manufacturing a printed wiring board of the embodiment of the present invention, deformation of the printed wiring board during formation of the solder resist layer can be suppressed, and a solder resist layer having an even thickness can be formed.

BRIEF DESCRIPTION OF THE DRAWINGS Sectional drawing for demonstrating the printed wiring board manufactured by one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention. Sectional drawing which shows the manufacturing method of the printed wiring board of one Embodiment of this invention.

  One embodiment of a printed wiring board of the present invention will be described with reference to the drawings. FIG. 1 is a cross-sectional view of a printed wiring board 10 manufactured according to the embodiment. The printed wiring board 10 shown in FIG. 1 is a coreless structure printed wiring board having no core substrate. The printed wiring board 10 includes a buildup layer 16 composed of conductor layers 12 and a resin insulation layer 14 stacked alternately. The conductor layer 12 is formed of metal, such as copper. In the following description, among the conductor layers 12, the conductor layer 12 located below the resin insulation layer 14 in FIG. 1 is referred to as the first outermost conductor layer 12a, and is located above the resin insulation layer 14 in FIG. The conductor layer 12 may be referred to as a second outermost conductor layer 12b. The resin insulating layer 14 is made of, for example, a resin composition containing an inorganic filler such as silica or alumina and a resin such as epoxy. The printed wiring board 10 of the example of illustration is provided with the conductor layer 12 of two layers, and the resin insulating layer 14 of one layer. However, the number of conductor layers 12 and resin insulating layers 14 is not limited to this. For example, the printed wiring board 10 according to the modification which is not shown in figure is provided with the conductor layer 12 of three or more layers alternately arrange | positioned, and the resin insulating layer 14 of two or more layers. The conductor layers 12 may be connected to each other via the via conductor 18. The via conductor 18 can be formed of the same metal as the conductor layer 12.

  The printed wiring board 10 includes the first solder resist layer 20 on the first main surface of the buildup layer 16 and the second solder resist layer 22 on the second main surface of the buildup layer 16. . The first solder resist layer 20 is formed on the first outermost conductor layer 12 a and the exposed surface of the resin insulating layer 14 from the first outermost conductor layer 12 a. The second solder resist layer 22 is formed on the second outermost conductor layer 12 b and the exposed surface of the resin insulating layer 14 from the second outermost conductor layer 12 b.

  In the first solder resist layer 20, an opening 20a is formed to expose a part of the first outermost conductor layer 12a as a pad 12ap.

  The second solder resist layer 22 is formed with a plurality of openings 22a for exposing a part of the second outermost conductor layer 12b as a pad 12bp.

  One embodiment of a method of manufacturing the printed wiring board 10 shown in FIG. 1 will be described by way of example with reference to FIGS. 2A-2N.

  As shown in FIG. 2A, a support plate 24 is provided. For the support plate 24, for example, a metal plate or a resin plate can be used.

  As shown in FIG. 2B, the B-stage resin sheet 26 is laminated on the surface of the support plate 24. The resin sheet 26 is then cured to function as an adhesive layer for fixing a pillarable metal foil 28 described later to the support plate 24. The resin sheet 26 is made of, for example, a thermosetting resin, and may contain an inorganic filler such as silica. The resin sheet 26 may be a prepreg further including a reinforcing material such as a glass cloth.

  As shown in FIG. 2C, a pillarable metal foil 28 is disposed on the resin sheet 26. The pillarable metal foil 28 is composed of two layers of metal foils 28a and 28b physically peelable from each other. The two layers of metal foils 28a, 28b may be joined via an adhesive whose adhesion decreases with increasing temperature. Each metal foil 28a, 28b may be a copper foil.

  As shown in FIG. 2D, a liquid or dry film insulating resin is applied or laminated on the pillarable metal foil 28 to form a first solder resist layer 20. As a material of the first solder resist layer 20, a thermosetting resin can be used. Examples of the thermosetting resin include epoxy resin, phenol resin, amino resin such as melamine resin and urea resin, phenoxy resin, epoxy-modified polyimide resin, unsaturated polyester resin, polyimide resin, urethane resin, diallyl phthalate resin and the like. The thermosetting resin may contain 30 to 80% by mass of an inorganic filler such as silica. A photosensitive resin may be used as the material of the first solder resist layer 20.

  The planar dimension of the first solder resist layer 20 is preferably larger than the planar dimension of the pillarable metal foil 28. Thus, the pillarable metal foil 28 is completely covered with the first solder resist layer 20. Thereafter, the first solder resist layer 20 is cured. As a result, the pillarable metal foil 28 is more firmly fixed to the resin sheet 26 by the first solder resist layer 20. The curing of the first solder resist layer 20 and the curing of the resin sheet 26 may be performed simultaneously.

  As shown in FIG. 2E, the first outermost conductor layer 12a is formed on the upper surface (surface opposite to the resin sheet 26) of the first solder resist layer 20. For example, after forming a plating resist (not shown) having an opening at a position where the conductor pattern of the first outermost conductor layer 12a is to be formed on the upper surface of the first solder resist layer 20, the plating resist is formed by electroless plating. A metal layer (not shown) is formed on portions other than the pattern of. The first outermost conductor layer is formed by electrolytic copper plating using the metal layer as a seed layer. The metal layer may be formed by sputtering or vacuum evaporation. The plating resist is peeled off from the upper surface of the first solder resist layer 20 after the formation of the first outermost conductor layer 12a.

  As shown in FIG. 2F, a resin insulation layer 14 is formed on the upper surface of the first solder resist layer 20 and the first outermost conductor layer 12a. As a material of the resin insulating layer 14, a resin composition made of a resin such as epoxy and an inorganic filler such as silica or alumina is exemplified. Further, as shown in FIG. 2F, via conductors 18 and conductor layers 12 (second outermost conductor layers 12b) are formed. The via conductor 18 is formed in a via conductor hole 30 penetrating the resin insulating layer 14. The via conductor hole 30 is formed, for example, by laser processing. The via conductor holes 30 may be formed by etching or photolithography. A metal layer (not shown) is formed on the inner surface of the via conductor hole 30 and the upper surface of the resin insulating layer 14 by, for example, an electroless plating method. The metal layer may be formed by sputtering or vacuum evaporation. The via conductor 18 and the conductor layer 12 (second outermost conductor layer 12 b) can be formed by an electrolytic copper plating method using this metal layer as a seed layer. At the time of electroplating, a plating resist (not shown) having an opening on the formation position of the conductor pattern of the second outermost conductor layer 12b and the via conductor hole 30 is formed. FIG. 2F shows a state in which the plating resist is removed after the via conductor 18 and the conductor layer 12 (second outermost conductor layer 12 b) are formed. By repeating the process shown in FIG. 2F, the buildup layer 16 including the desired number of conductor layers 12 and the resin insulation layer 14 is formed.

  As shown in FIG. 2G, the second solder resist layer 22 is formed on the exposed surfaces of the second outermost conductor layer 12b and the second outermost conductor layer 12b of the resin insulating layer 14. For example, a resin layer 22 'made of a photosensitive resin is formed on the second outermost conductor layer 12b and the exposed surface of the resin insulating layer 14 exposed from the second outermost conductor layer 12b. The resin layer 22 'is developed after being exposed through the exposure mask 32, for example, as shown in FIG. 2H. As a result, as shown in FIG. 2I, a second solder resist layer 22 having an opening 22a is formed, and a buildup layer 16 with a double-sided solder resist layer is formed. The opening 22a exposes a part of the second outermost conductor layer 12b as a second pad 12bp. The material of the second solder resist layer 22 is not particularly limited. Preferably, an epoxy resin containing 30 to 80% by mass of an inorganic filler such as silica or alumina is used. As a material of the second solder resist layer, one made of a thermosetting resin, or a thermosetting resin and an inorganic filler such as silica may be used.

  As shown in FIG. 2J, the outer peripheral portions of the buildup layer 16 with a double-sided solder resist layer, the resin sheet 26, and the support plate 24 are removed by external processing such as router processing or mold processing. Preferably, the outer peripheral portions of the buildup layer 16 with a double-sided solder resist layer, the resin sheet 26 and the support plate 24 are removed at a position passing the end of the pillarable metal foil 28 (the position shown by phantom lines in the figure). . Thereby, waste of material can be reduced and the peelable metal foil 28 can be reliably peeled off.

  As shown in FIG. 2K, the buildup layer 16 with the double-sided solder resist layer is separated from the support plate 24 together with one metal foil 28 a of the pillarable metal foil 28. As described above, the metal foils 28a and 28b of the pillarable metal foil 28 may be joined via an adhesive whose adhesion decreases when the temperature is raised. Therefore, the metal foils 28a and 28b are easily peeled off by raising the temperature.

  As shown in FIG. 2L, the metal foil 28a remaining on the lower surface (the surface of the first solder resist layer 20) of the buildup layer 16 with the double-sided solder resist layer is removed by etching.

  As shown in FIG. 2M, on the surface of the first solder resist layer 20, a mask 34 having an opening 34a is formed. The opening 34 a exposes a portion of the first solder resist layer 20. The mask 34 is formed to protect a portion other than the formation site of the opening 20 a in the first solder resist layer 20 at the time of the blasting process described later. For example, an ordinary dry film resist can be used for the mask 34. The openings 34a of the mask 34 are formed by photolithography. Alternatively, copper foil may be used for the mask 34.

  As shown in FIG. 2N, the portion of the first solder resist layer 20 exposed from the opening 34a of the mask 34 is removed by blasting. As a result, an opening 20 a reaching the first outermost conductor layer 12 a is formed in the first solder resist layer 20. The opening 20a exposes a portion of the first outermost conductor layer 12a as a first pad 12ap and / or an alignment mark. In addition, it is preferable that a blast process is a wet blast process which sprays mixed liquids (slurry), such as a liquid and abrasive particles, on an exposed surface. After forming the openings in the first solder resist layer 20, the mask 34 is removed. When the mask 34 is made of a dry film resist, the mask 34 is removed using, for example, a resist stripping solution. For example, an organic acid chemical solution or the like is used as the resist stripping solution. When the mask 34 is made of copper foil, the mask 34 can be removed by etching. In addition, formation of the opening 20a to the 1st soldering resist layer 20 may be performed by laser processing.

  Thereafter, although not shown, the exposed surfaces of the first outermost conductor layer 12a and the second outermost conductor layer 12b are subjected to surface treatment such as OSP, Ni / Au, Ni / Pd / Au, Sn, etc. Good.

  According to the manufacturing method of the embodiment, both the first solder resist layer 20 and the second solder resist layer 22 are formed on the same support plate 24 having rigidity. Therefore, deformation of the buildup layer 16 during formation of the first and second solder resist layers 20, 22 can be suppressed, and the first and second solder resist layers 20, 22 can be formed uniformly. In addition, the second solder resist layer 22 can be formed without turning over the buildup layer 16 after the formation of the first solder resist layer 20. Therefore, according to the manufacturing method of the embodiment, the manufacture is easy and no misalignment occurs.

  In the manufacturing method of the embodiment, when the planar dimension of the first solder resist layer 20 formed on the pillarable metal foil 28 is larger than the planar dimension of the pillarable metal foil 28, the pillarable metal foil 28 is the first solder resist. Completely covered with layer 20. As a result, the pillarable metal foil 28 can be fixed to the resin sheet 26 more strongly.

  In the manufacturing method of the embodiment, when the opening 20a of the first solder resist layer 20 is formed by blasting, the opening 20a can be reliably formed in the first solder resist layer 20 already in a cured state. Also, the openings 20a may be formed at one time. Therefore, the time required to manufacture the printed wiring board 10 is shortened as compared with the manufacturing method in which the openings 20a are laser-processed one by one. In addition, since the expensive laser device is not required, the cost for manufacturing the printed wiring board 10 is reduced. Furthermore, when the opening 20a of the first solder resist layer 20 is formed by blasting, there is also an advantage that the residue of the solder resist layer 20 is not easily generated on the first pad 12ap.

  In the manufacturing method of the embodiment, when the buildup layer 16 with the double-sided solder resist layer is processed together with the support plate 24, the two metal foils 28 a and 28 b of the pillarable metal foil 28 are easily peeled off. The buildup layer 16 with the double-sided solder resist layer can be easily separated from the support plate 24.

  The present invention is not limited to the above embodiment, and various changes and modifications can be made without departing from the present invention. For example, in the above embodiment, the opening 22a of the second solder resist layer 22 is described as being formed by photolithography, but the opening 22a may be formed by laser processing.

DESCRIPTION OF SYMBOLS 10 printed wiring board 12 conductor layer 12a 1st outermost conductor layer 12ap 1st pad 12b 2nd outermost conductor layer 12bp 2nd pad 14 resin insulating layer 16 buildup layer 18 via conductor 20 1st solder resist layer 22 2nd solder Resist layer 24 Support plate 26 Resin sheet (adhesive layer)
28 pillarable metal foil

Claims (6)

A method of manufacturing a printed wiring board,
Laminating a pillarable metal foil composed of two layers of metal foils physically releasable from each other via an adhesive layer on a support plate;
Forming a first solder resist layer on the pillarable metal foil;
Alternately laminating a conductor layer and a resin insulation layer on the first solder resist layer to form a buildup layer;
A second solder resist layer is formed on the conductor layer located farthest from the first solder resist layer among the conductor layers formed on the first solder resist layer, and a buildup layer with a double-sided solder resist layer is formed. Forming and
Separating physically the two layers of metal foils from each other and separating the buildup layer with the double-sided solder resist layer from the support plate together with one metal foil of the two layers of metal foil;
Removing the metal foil on the surface of the first solder resist layer of the separated buildup layer with double-sided solder resist layer;
Forming an opening in the first solder resist layer to expose a part of the conductor layer adjacent to the first solder resist layer as a pad.   The method for manufacturing a printed wiring board according to claim 1, further comprising forming an opening in the first solder resist layer to expose a part of a conductor layer adjacent to the first solder resist layer as an alignment mark. Including.   The method for manufacturing a printed wiring board according to claim 1, wherein a planar dimension of the first solder resist layer formed on the pillarable metal foil is larger than a planar dimension of the pillarable metal foil.   The method for manufacturing a printed wiring board according to claim 1, wherein the opening of the first solder resist layer is formed by blasting.   2. The method for manufacturing a printed wiring board according to claim 1, wherein the two layers of metal foils are physically separated from each other by processing the buildup layer with the double-sided solder resist layer together with the support plate. By physically peeling the two metal foils together.   The method for manufacturing a printed wiring board according to claim 1, wherein the second solder resist layer is provided with an opening for exposing a part of the conductor layer adjacent to the second solder resist layer as a pad by exposure and development. Further include.

Images