JP2009206417A - Method for manufacturing semiconductor device, and device for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device and a device for manufacturing the semiconductor device by which the breaking, chipping and warping of a wafer are reduced while suppressing the increase of production cost. <P>SOLUTION: A ring-shaped first stage 10 and a second stage 20 which is columnar and larger in height than the first stage are installed in a base section 1 which is thicker at the outer peripheral end part than at the center part while matched with the shape of a reverse surface side of the wafer 30 installed on a dicing stage. When a rib wafer 30 is installed, a projection formed of the first stage 10 and second stage 20 is overlaid with a recess on the reverse surface side of the wafer. The wafer 30 includes its entire surface cut from the top surface side of the wafer 30 without cutting off a rib 32 to be parted into chips. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a power semiconductor device manufacturing method and a semiconductor device manufacturing apparatus used for a power conversion device and the like, and more particularly to a semiconductor device manufacturing method and a semiconductor device manufacturing method used when manufacturing a thin semiconductor device having a thin device thickness. Relates to the device.

  In recent years, high performance and low cost have become important issues in IGBTs. For this reason, a thin IGBT structure using a field stop (FS) layer is used. This is because the switching loss can be reduced and the high-speed switching characteristics can be improved, and the cost can be reduced. The FS type IGBT is manufactured using a low-cost wafer such as an n-type FZ (Floating Zone) wafer.

FIG. 22 is a cross-sectional view of a field stop (FS) IGBT using an FZ crystal substrate. In the FS type IGBT, an n ⁺ buffer layer is used as the field stop layer 102. In this way, the on-voltage and turn-off loss characteristics are further improved by making the base layer thinner than the conventional non-punch-through structure while using the basic operations of low carrier injection and high transport efficiency. It has become.

As shown in FIG. 22, in the surface structure of the n-type FZ wafer, for example, a p base region 104 is provided in a part of the surface layer of the n ⁻ drift layer 103. An n ⁺ emitter region 105 is provided in a part of the surface layer of the p base region 104. A trench 110 that penetrates the n ⁺ emitter region 105 and reaches the n ⁻ drift layer 103 is provided. A gate electrode 107 is provided inside the trench 110 via a gate oxide film 106. An insulating film 120 is provided on the gate oxide film 106 and the gate electrode 107, and the gate electrode 107 and the emitter electrode are separated by the insulating film 120. Emitter electrode 108 is provided in contact with p base region 104 and n ⁺ emitter region 105.

When manufacturing the FS type IGBT as shown in FIG. 22, after forming the surface structure of the n-type FZ wafer as described above on the front surface side of the wafer, the back surface of the n-type FZ wafer is scraped and thinned. Then, boron ions are irradiated from the back surface. Then, annealing is performed by irradiating the back surface with laser light while cooling the front surface of the wafer. Thus, the p ⁺ collector layer 101 is formed by activating boron atoms.

Here, in order to improve the characteristics of the FS-type IGBT as shown in FIG. 22, the n ⁻ drift layer 103 may be thinned according to the breakdown voltage. Specifically, for example, if the breakdown voltage is to create an IGBT of 1200 V, n ^- the thickness of the drift layer 103, by about 120 [mu] m, it is possible to obtain a sufficiently desired performance. Further, when forming an IGBT having a withstand voltage of 600 V, the thickness of the n ⁻ drift layer 103 may be about 60 μm.

  However, when the thickness of the wafer is reduced, the end portion of the wafer is likely to be chipped and chipping is likely to occur. Further, since the mechanical strength of the entire wafer is lowered, there is a problem that cracks, chips, and deflection are likely to occur.

  In order to solve such a problem, a wafer having a rib structure on the back surface of the wafer (hereinafter referred to as a rib wafer) has been proposed. The rib wafer is manufactured, for example, by polishing only the central portion on the back surface side of the wafer, leaving the outer peripheral edge of the wafer. By using a rib wafer, the warpage is greatly relieved, and when the wafer is handled in the subsequent dicing process and transfer process, the strength for holding the wafer is greatly improved, and cracking and chipping of the wafer can be reduced. .

  FIG. 23 is a cross-sectional view showing problems in the conventional dicing process. As shown in FIG. 23, the rib wafer 30 having the ribs 32 formed on the outer peripheral end portion has a step between the central portion 31 of the wafer 30 and the ribs 32, so that a dicing tape is formed on the back surface side of the rib wafer 30 in the dicing process. When affixing 33, a gap (A in the figure) is generated between the rib wafer 30 and the dicing tape 33 around the step. If there is a gap between the rib wafer 30 and the dicing tape 33, the chip formed at a location corresponding to the gap cannot be fixed to the stage 60 on which the rib wafer 30 is installed via the dicing tape 33. For this reason, when performing dicing or subsequent cleaning, there is a problem that chips formed on a portion where the dicing tape 33 is not attached are scattered.

  For example, even if the dicing tape 33 can be attached so that there is no gap on the back side of the rib wafer 30, a gap is generated between the central portion 31 of the rib wafer 30 and the stage 60 due to a step due to the rib. When the central portion 31 of the rib wafer 30 is cut by the blade 61, the wafer 30 is bent and the wafer 30 is damaged.

  Therefore, dicing tape on the backside of the wafer by flattening the backside of the wafer by cutting off the ribs before dicing or grinding the ribs to eliminate the step between the wafer outer edge and the wafer center. Has been proposed (see, for example, Patent Document 1 below). Patent Document 1 discloses a method in which a dicing tape having a convex portion having a height corresponding to the depth of the central portion (concave portion where no rib is formed) on the back side of the wafer is attached to the back side of the wafer. Are listed. According to these techniques, since no gap is generated between the wafer and the stage, it is possible to reduce the bending and breakage of the wafer during dicing.

JP 2007-19461 A

  However, in the technique of Patent Document 1 described above, it is necessary to introduce a new device for flattening the wafer or for attaching a dicing tape having a convex portion on the back surface side of the wafer so that no bubbles enter. In addition, the manufacturing cost of the semiconductor device increases. Further, since a new process is added during the manufacturing process, there is a problem that the production efficiency of the device is lowered.

  In addition, when a dicing tape with a convex portion is attached to the back side of the wafer, the depth and diameter of the rib differ depending on the type of device (for example, the difference in pressure resistance) produced on the wafer and the diameter of the wafer. Therefore, it is necessary to prepare a dicing tape having convex portions of different shapes, and there is a problem that the production efficiency of the device is lowered because the number of steps for processing the dicing tape is increased.

  In addition, in the dicing step, a method is conceivable in which a protective tape is applied to the front surface side of the wafer on which the device surface structure is formed, and dicing is performed from the back surface side of the wafer. However, since there is no mark such as a dicing line on the back side of the wafer, it is necessary to detect the scribe line formed on the front side of the wafer from the back side of the wafer. Therefore, for example, an apparatus such as an infrared camera is required. Alternatively, a marking device that marks the area where dicing is performed on the back side of the wafer is required. Therefore, there is a problem that a new capital investment is required and the production cost increases. Furthermore, when cutting from the back side of the wafer, the surface structure of the device formed on the front side of the wafer is pressed against the stage, so that the surface structure of the device is lost.

  The present invention provides a semiconductor device manufacturing method and a semiconductor device manufacturing apparatus capable of reducing the cracking, chipping, and warping of a wafer while suppressing the production cost in order to eliminate the above-described problems caused by the prior art. With the goal.

  In order to solve the above-described problems and achieve the object, a manufacturing method of a semiconductor device according to the invention of claim 1 includes a surface structure forming step of forming a surface structure of a device in a central portion on a front surface side of a semiconductor wafer. And a thinning step for forming a recess on the back surface side of the semiconductor wafer by making the thickness of the central portion on the back surface side of the semiconductor wafer thinner than the outer peripheral end, and on the entire back surface side of the semiconductor wafer. A dicing stage having a sticking step of sticking an adhesive tape, and a back surface side of the semiconductor wafer to which the adhesive tape has been attached has a convex portion having a diameter and a height substantially the same as the diameter and depth of the concave portion of the semiconductor wafer. A wafer installing step to be installed, a cutting step of cutting a portion corresponding to the concave portion of the semiconductor wafer from the front surface side of the semiconductor wafer into a chip shape, and cutting into the chip shape Characterized in that it comprises a and a separation step of separating the semiconductor wafer from the adhesive tape.

  According to a second aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to the first aspect of the present invention, wherein, in the cutting step, the notch is deeper than a thickness of a central portion of the semiconductor wafer, and the semiconductor By putting the wafer shallower than the outer peripheral end portion of the wafer, the semiconductor wafer is cut into chips while leaving the outer peripheral end portion.

  According to a third aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to the first or second aspect of the present invention, wherein in the cutting step, the semiconductor wafer is vacuum-sucked by the dicing stage while the semiconductor wafer is A portion corresponding to the concave portion is cut into a chip shape.

  According to a fourth aspect of the present invention, there is provided a semiconductor device manufacturing method according to any one of the first to third aspects, wherein the dicing stage includes a base portion and a stage portion detachable from the base portion. Before the wafer installation step, including a stage installation step in which a stage portion that protrudes from the base portion in accordance with the diameter and height of the concave portion of the semiconductor wafer is installed on the foundation portion. In the process, the semiconductor wafer is placed on a stage portion of the dicing stage.

  According to a fifth aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to any one of the first to fourth aspects, wherein, in the attaching step, the adhesive tape is applied to the entire back surface of the semiconductor wafer. Is stuck in a vacuum atmosphere or a reduced-pressure atmosphere.

  According to a sixth aspect of the present invention, there is provided a semiconductor device manufacturing apparatus in which a central portion is a concave portion thinner than an outer peripheral end portion, a base portion having a vacuum suction groove on a bottom surface of the concave portion, And a stage portion that is detachably installed in the concave portion and sucks and holds the semiconductor wafer from the back surface side.

  According to a seventh aspect of the present invention, there is provided the semiconductor device manufacturing apparatus according to the sixth aspect, wherein the stage portion is processed so that the entire stage portion is thinner at the central portion on the back side than the outer peripheral end portion. Further, the semiconductor wafer has a shape covered with a recess on the back surface side of the semiconductor wafer.

  Further, in the semiconductor device manufacturing apparatus according to the invention of claim 8, in the invention of claim 6, the stage part has a convex part on the surface, and only the convex part of the stage part is on the back side. The center portion is shaped to be covered with a recess on the back side of the semiconductor wafer processed thinner than the outer peripheral end portion.

  According to a ninth aspect of the present invention, in the semiconductor device manufacturing apparatus according to the sixth or seventh aspect, the stage portion is higher in height than the concave portion of the base portion, The difference in height is substantially the same height as the recess on the back side of the semiconductor wafer, and the diameter is substantially the same as the diameter of the recess on the back side of the semiconductor wafer.

  According to a tenth aspect of the present invention, in the semiconductor device manufacturing apparatus according to the sixth or eighth aspect, the stage portion includes a first stage portion having a height substantially equal to a height of the concave portion of the base portion. The height difference from the first stage portion is substantially the same as the concave portion on the back surface side of the semiconductor wafer in which the center portion on the back surface side is processed thinner than the outer peripheral end portion. And a second stage portion having a diameter that is substantially the same as the diameter of the concave portion on the back surface side of the semiconductor wafer.

  According to an eleventh aspect of the present invention, there is provided the semiconductor device manufacturing apparatus according to the tenth aspect, wherein the first stage portion is composed of at least one ring-shaped member.

  A semiconductor device manufacturing apparatus according to a twelfth aspect of the present invention is the semiconductor device manufacturing apparatus according to the tenth or eleventh aspect, wherein the second stage portion has a columnar shape, and is a single columnar member or a single one. It consists of a column-shaped member and at least 1 or more ring-shaped member of the substantially same height as the said column-shaped member, It is characterized by the above-mentioned.

  A semiconductor device manufacturing apparatus according to a thirteenth aspect of the present invention is the semiconductor device manufacturing apparatus according to any one of the sixth to twelfth aspects, wherein the base portion is made of stainless steel.

  According to a fourteenth aspect of the present invention, there is provided the semiconductor device manufacturing apparatus according to any one of the sixth to thirteenth aspects, wherein the stage portion is made of ceramic.

  According to a fifteenth aspect of the present invention, there is provided the semiconductor device manufacturing apparatus according to any one of the sixth to fourteenth aspects, wherein the stage portion has a porous structure or a structure provided with holes. Features.

  According to the first to fifth aspects of the present invention, the rib wafer having the central portion on the back side thinner than the outer peripheral end is placed on the dicing stage that matches the shape of the concave portion on the back side, and the front side of the wafer Therefore, the entire surface of the wafer can be diced while leaving the ribs without being cut off.

  In addition, according to the inventions of claims 6 to 15 described above, even if the shape of the back surface side of the wafer is different, a wafer having a different shape on the same dicing stage can be obtained simply by changing the stage installed on the base portion of the dicing stage. Can be installed.

  According to the semiconductor device manufacturing method and the semiconductor device manufacturing apparatus of the present invention, it is possible to reduce the cracking, chipping, and warping of the wafer while suppressing the production cost.

  Exemplary embodiments of a semiconductor device manufacturing method and a semiconductor device manufacturing apparatus according to the present invention will be explained below in detail with reference to the accompanying drawings. Note that, in the following description of the embodiments and all the attached drawings, the same reference numerals are given to the same components, and duplicate descriptions are omitted.

(Embodiment 1)
FIG. 1 is a perspective view showing the structure of a first example of the semiconductor device manufacturing apparatus according to the first embodiment. As shown in FIG. 1, the semiconductor device manufacturing apparatus according to the first embodiment is a dicing stage on which a wafer is placed when dicing is performed. In this specification, as an example, a rib-structured first wafer (for example, a 6-inch wafer), a rib-structured second wafer (for example, an 8-inch wafer), and a flat surface without ribs formed on the back surface side. A case of applying to the third wafer will be described. In the first wafer, the diameter of the recess on the back surface side (center portion where no rib is formed) is amm (for example, 130 to 148 mm), and the height of the step between the rib portion and the center portion is c μm (for example, 0 to 700 μm). ). In the second wafer, the diameter of the recess on the back surface side is bmm (for example, 180 to 198 mm: a <b), and the height of the step between the rib portion and the central portion is c μm.

  As shown in FIG. 1, the dicing stage 51 of the first embodiment includes a base portion 1, a first stage 10, and a second stage 20. The first stage 10 and the second stage 20 can be attached to and detached from the base portion 1. The base portion 1 is made of, for example, stainless steel, and includes a recess in which the first stage 10 and the second stage 20 are installed, and an outer peripheral portion having a planar shape of, for example, a ring shape. The first stage 10 and the second stage 20 are made of ceramic, for example, and have a structure capable of performing vacuum suction of the wafers placed on the first stage 10 and the second stage 20. The structure capable of performing vacuum suction may be, for example, a porous structure or a structure provided with a vacuum suction hole so that a negative pressure can be applied to the mounting surface of the wafer from the non-mounting surface side. The planar shape of the first stage 10 is, for example, a ring shape, and the planar shape of the second stage 20 is, for example, a circular shape.

  Further, the outer diameter of the first stage 10 is the same as the inner diameter of the concave portion of the base portion 1 or smaller than the inner diameter of the concave portion of the base portion 1 to such an extent that the first stage 10 can be attached and detached. This is a value (b−Δr) obtained by subtracting the clearance amount Δr from the diameter b of the recess on the back surface side. The diameter of the second stage 20 is the same as the inner diameter of the first stage 10 or smaller than the inner diameter of the first stage 10 to such an extent that the second stage 20 can be attached and detached. This is a value (a−Δr) obtained by subtracting the clearance amount Δr from the diameter a of the recess.

  Here, the clearance amount Δr is preferably 0 to 10 mm. The reason is that if the diameter of the convex part of the dicing stage is larger than the diameter of the concave part on the back side of the wafer placed on the dicing stage, the wafer cannot be placed. Also, if the diameter of the convex part of the dicing stage is 10 mm or more smaller than the diameter of the concave part of the wafer, the area that is not fixed to the dicing stage on the wafer increases, the strength of the wafer is reduced, and the wafer may break during dicing. Because there is. The clearance amount Δr is preferably as small as possible.

  In the first embodiment, a step is generated between the second stage 20 and the first stage 10, and this forms a convex portion on the surface of the dicing stage 51. The diameter of the convex portion is the diameter of the second stage 20 and is a−Δr. Further, the height of the convex portion is a value (c ± Δh) obtained by adding an error Δh to the height c of the step of the rib wafer.

  Here, the error Δh is preferably within 40 μm. The reason is that even if there is an error Δh, the wafer center and rib are attached to the dicing stage. Therefore, if there is an error Δh, the wafer is perpendicular to the wafer surface between the wafer center and the rib. Force is applied in the direction. If the error Δh is larger than 40 μm, the wafer may be broken by a force applied in a direction perpendicular to the surface of the wafer.

  FIG. 2 is a sectional view showing the structure of the first example of the semiconductor device manufacturing apparatus according to the first embodiment. FIG. 2 shows a cross-sectional structure of a cut surface passing through the center of the dicing stage 51 of the first embodiment shown in FIG. As shown in FIG. 2, the base portion 1 has a thinner central portion than the outer peripheral portion, and the height h1 of the step between the central portion and the outer peripheral portion (the concave portion of the basic portion 1) is, for example, about 2 mm. Moreover, the groove | channel 2 is provided in the bottom face of the recessed part of the base part 1, and it connects with the area | region which is not shown in figure. Further, the groove 2 of the concave portion of the base portion 1 is provided so as not to overlap an area between the first stage 10 and the second stage 20.

  Further, for example, the groove 2 of the base portion 1 is connected to the vacuum pump 3. And by operating the vacuum pump 3, it was installed on the surface of the dicing stage 51 of the first embodiment via the groove 2 and the fine holes of the porous first stage 10 and the second stage 20. The wafer can be vacuum-sucked. When the first stage 10 and the second stage 20 are provided with a vacuum suction hole, the first stage 10 and the second stage 20 are provided with the vacuum suction hole and the first stage 10 and the second stage 20 through the vacuum suction hole. Thus, the wafer can be vacuum-sucked.

  The height h2 of the first stage 10 is equivalent to the height h1 of the concave portion of the base portion 1 (h1≈h2), and the height h3 of the second stage 20 is higher than the height of the first stage 10 (c ± Δh) higher, for example, about 2.5 mm. As described above, the first stage 10 and the second stage 20 are different in height from each other, so that a step is generated, and a convex portion is formed on the surface of the dicing stage 51 by the step.

  FIG. 3 is a diagram illustrating the structure of the foundation. As shown in FIG. 3, concentric grooves 2 are formed on the surface of the concave portion of the base portion 1, and each concentric groove 2 is connected by a groove 2 crossing the concave portion. In this example, the groove 2 is connected to the vacuum pump 3 at the center of the recess. Here, the groove 2 of the concave portion of the base portion 1 does not overlap the region between the first stage 10 and the second stage 20, that is, the diameter of the concentric groove 2 is the boundary between the stages. Be different from the diameter of the circle.

  FIG. 4 is a perspective view showing the structure of the first stage. As shown in FIG. 4, the first stage 10 has a ring shape. In addition, the 1st stage 10 should just consist of at least 1 or more ring-shaped member, for example, and may be comprised by the some ring-shaped member.

  FIG. 5 is a perspective view showing the structure of the second stage. As shown in FIG. 5, the second stage 20 has a cylindrical shape. The second stage 20 is configured by, for example, one columnar member, or one columnar member and at least one or more ring-shaped members having substantially the same height as the columnar member. It may be.

  Thus, according to the first embodiment, the first wafer having the rib structure can be set on the dicing stage 51.

  Next, a second example of the semiconductor device manufacturing apparatus according to the first embodiment will be described. FIG. 6 is a perspective view illustrating a second example of the semiconductor device manufacturing apparatus according to the first embodiment. FIG. 7 is a sectional view showing a second example of the semiconductor device manufacturing apparatus according to the first embodiment. FIG. 7 shows a cross-sectional structure of a cut surface passing through the center of the dicing stage 52 of the second embodiment shown in FIG.

  As shown in FIG. 6 or FIG. 7, the dicing stage 52 is configured by the base portion 1, the first stage 11, and the second stage 20. In the second embodiment, the first stage 11 having a height different from that of the first stage 10 of the first embodiment shown in FIG. 1 or FIG. 2 is used. That is, the height h2 of the first stage 11 is equal to the height h3 of the second stage 20 (h2≈h3). As a result, a step is generated between the first stage 11 and the outer peripheral portion of the base portion 1, and this step (h2−h1) becomes the height (c ± Δh) of the convex portion on the surface of the dicing stage 52. The diameter of the convex portion is the outer diameter (b−Δr) of the first stage 11.

  As described above, according to the second embodiment, the second wafer having the rib structure in which the diameter of the concave portion is different from that of the first wafer is obtained by simply replacing the first stage 10 of the first embodiment with the first stage 11. Can be installed.

  Next, a third example of the semiconductor device manufacturing apparatus according to the first embodiment will be described. FIG. 8 is a perspective view illustrating a third example of the semiconductor device manufacturing apparatus according to the first embodiment. FIG. 9 is a sectional view showing a third example of the semiconductor device manufacturing apparatus according to the first embodiment. FIG. 9 shows a cross-sectional structure of a cut surface passing through the center of the dicing stage 53 of the third embodiment shown in FIG.

  As shown in FIG. 8 or FIG. 9, the dicing stage 53 is configured by the base portion 1 and the first stage 12. In the third embodiment, the shape of the first stage 12 is different from that of the first and second embodiments, and the second stage is not used. In the third embodiment, the height h2 of the first stage 12 and the height h1 of the concave portion of the base portion 1 are different. Therefore, a step is generated between the first stage 12 and the outer peripheral end of the base portion 1, and this step (h 2 −h 1) is the height of the convex portion on the surface of the dicing stage 53 (c ± Δh). Further, the diameter of the convex portion is the diameter (b−Δr) of the first stage 12.

  FIG. 10 is a perspective view showing the structure of the first stage in the third embodiment. As shown in FIG. 10, the first stage 12 in the third embodiment is different in shape from the first stage 10 shown in FIG. The first stage 12 may be composed of one columnar member as in the above example, or at least one columnar member and approximately the same height as the columnar member. You may be comprised by the assembly of the above ring-shaped members.

  As described above, according to the third embodiment, the second wafer having the rib structure can be installed by using only the first stage 12 as the stage to be installed on the base portion 1.

  Next, a fourth example of the semiconductor device manufacturing apparatus according to the first embodiment will be described. FIG. 11 is a perspective view illustrating the structure of the fourth example of the semiconductor device manufacturing apparatus according to the first embodiment. FIG. 12 is a sectional view showing the structure of the fourth example of the semiconductor device manufacturing apparatus according to the first embodiment. FIG. 12 shows a cross-sectional structure of a cut surface passing through the center of the dicing stage 54 of the fourth embodiment shown in FIG.

  As shown in FIG. 11 or FIG. 12, the dicing stage 54 is configured by the base portion 1, the first stage 10, and the second stage 21. In the fourth embodiment, the height h2 of the first stage 10 and the height h3 of the second stage 21 are equal to the height h1 of the concave portion of the base portion 1 (h1≈h2≈h3), respectively. Therefore, the surface of the dicing stage 54 of the fourth embodiment is a flat surface on which no convex portion is formed.

  As described above, according to the fourth embodiment, it is possible to install a flat wafer having no rib formed on the back surface side by simply replacing the second stage 20 of the first embodiment with the second stage 21. .

  Next, a fifth example of the semiconductor device manufacturing apparatus according to the first embodiment will be described. FIG. 13 is a perspective view illustrating the structure of the fifth example of the semiconductor device manufacturing apparatus according to the first embodiment. FIG. 14 is a sectional view showing the structure of the fifth example of the semiconductor device manufacturing apparatus according to the first embodiment. FIG. 14 shows a cross-sectional structure of a cut surface passing through the center of the dicing stage 55 of the fifth embodiment shown in FIG.

  As shown in FIG. 13 or FIG. 14, the dicing stage 55 is configured by the base portion 1 and the first stage 13. Further, in the fifth embodiment, only the first stage 13 having the same shape as the first stage 12 shown in FIG. 10 is used without using the second stage. In the fifth embodiment, the height h2 of the first stage 13 is equivalent to the height h1 of the concave portion of the base portion 1 (h1≈h2). Therefore, the surface of the dicing stage 55 of the fifth embodiment is a flat surface on which no convex portion is formed.

  Thus, according to the fifth embodiment, a flat wafer having no ribs formed on the back surface side is set only by using the first stage 13 having a height different from that of the first stage 12 of the third embodiment. can do.

  Note that the number of stages installed on the foundation can be changed according to the diameter or height of the concave portion of the wafer installed on the dicing stage. That is, when the diameter of the concave portion on the back surface side of the wafer is not only amm (first wafer) and bmm (second wafer), but there are other diameter wafers, the outer diameter of the concave portion on the back surface side of each wafer is A stage having a value obtained by subtracting the clearance amount Δr from the diameter may be prepared.

  Further, when there are a plurality of types of recesses on the back side of the wafer, stages having different heights may be prepared. In addition, for example, the height of the stage may be constant, and a spacer may be installed between the stage and the base portion according to the height of the concave portion of each wafer.

  As described above, in the semiconductor device manufacturing apparatus according to the first embodiment, the diameter and height of the recesses on the back surface side are different by installing a combination of stages having different diameters, heights, and shapes on the base portion. Rib wafers and flat wafers can be installed using the same foundation. This eliminates the need for a dicing apparatus or a new dicing stage having different diameters and heights of the convex portions, thereby reducing the production cost. In addition, since a new dicing apparatus is not required, rib wafers and flat wafers having different diameters and heights of the recesses on the back side can be manufactured using the same manufacturing line, so that the production cost is reduced.

(Embodiment 2)
Next, a method for manufacturing a semiconductor device will be described. FIG. 15 is a flowchart illustrating the method for manufacturing the semiconductor device according to the second embodiment. In the second embodiment, the semiconductor device manufacturing apparatus described in the first embodiment is used as a dicing stage included in the dicing apparatus.

  As shown in the flowchart of FIG. 15, in the second embodiment, first, a wafer and a dicing frame are set in a sticking apparatus (step S1). In step S1, the wafer may be a normal flat wafer or a rib wafer in which ribs are formed on the outer peripheral end on the back surface side. In any wafer, an element structure may be formed on the front surface.

  Next, an adhesive tape (dicing tape) is attached to the back side of the wafer by the attaching device (step S2). In step S2, a dicing tape is affixed to the back surface side of the wafer so that no air bubbles enter between the back surface side of the wafer and the dicing tape, and no gap is formed between the wafer and the dicing tape. In addition, as a dicing tape, you may use the thing from which adhesive force falls by irradiating an ultraviolet-ray (UV). Next, a dicing frame is attached to the surface of the dicing tape on which the wafer is not attached.

  Next, the wafer is taken out from the sticking device and set in an insertion port of a dicer (dicing device) (step S3). In step S3, for example, after a wafer with a dicing frame attached thereto is placed in the wafer cassette, the wafer cassette is set in the insertion port of the dicer.

  Next, the wafer is set on the dicing stage by the transfer arm provided in the dicer (step S4). In step S4, the dicing stage of any of the first to fifth examples described in the first embodiment is prepared in advance, and a wafer is set on the dicing stage. That is, before step S4, the stage to be installed on the foundation is changed in accordance with the diameter and height of the recess on the back side of the wafer.

  Next, the wafer placed on the dicing stage is cut (step S5). In step S5, the wafer is cut from the front surface side of the wafer using a dicing blade or the like provided in the dicer while vacuum-adsorbing the wafer with a vacuum pump. In step S5, when dicing a wafer having a rib formed on the outer peripheral end on the back surface side, the wafer is diced with the rib remaining without cutting the rib. That is, the notch of the dicing blade is made deeper than the thickness of the central portion of the wafer and thicker than the outer peripheral end portion of the wafer. In this way, the wafer with the ribs remaining is separated (chiped).

  Next, the wafer is set on a spinner stage having the same shape as the dicing stage, and cleaning and drying are performed (step S6). Further, the wafer is taken out from the dicer and set in the pickup device (step S7). Then, the separated chip is picked up by the pickup device (step S8). In step S8, the chip is peeled from the dicing tape. In step S2, when a tape whose adhesive strength is reduced by irradiating ultraviolet rays (UV) is used, in step S8, pick-up is performed after irradiating an appropriate amount of UV with a UV irradiator.

  Next, a process for attaching a dicing tape to the back side of the rib wafer in step S2 of FIG. 15 will be described. FIG. 16 is a cross-sectional view illustrating a process of attaching a dicing tape to the back side of the rib wafer. As shown in FIG. 16, a wafer 30 having a rib 32 thicker than the center portion 31 is prepared at the outer peripheral end portion on the back surface side. For example, the diameter of the recess on the back side of the wafer 30 is amm or bmm, and the height of the recess is cmm.

  Then, for example, a dicing tape 33 is attached to the back side of the wafer 30 in a vacuum chamber provided in an attaching device (not shown). By doing so, without introducing bubbles between the back side of the wafer 30 and the dicing tape 33, and without causing a gap in the corner between the central portion 31 and the rib 32 of the wafer 30, A dicing tape 33 can be attached to the wafer 30. At this time, the dicing tape may be heated to an appropriate temperature and then attached to the back side of the wafer.

  Here, the dicing tape 33 is not particularly specified, but in order to improve the adhesion between the back surface side of the wafer 30 and the dicing tape 33, one having elasticity and stretchability is preferable. Moreover, in order to make it easy to peel off the chip in the subsequent pick-up process, it is preferable that the adhesive strength is reduced by irradiating with ultraviolet rays (UV). Further, a dicing frame 34 is attached to the surface of the dicing tape 33 on which the wafer 30 is not attached. In this manner, the wafer 30 attached to the dicing frame 34 is produced.

  Next, the process of setting the wafer on the dicing stage in step S4 in FIG. 15 will be described. 17 to 21 are cross-sectional views showing the process of setting the wafer on the dicing stage. First, it is determined whether or not a rib is formed on the back side of the wafer. If the rib is formed, the diameter of the recess on the back side is determined. And the dicing stage which has a convex part whose diameter is 0-10 mm smaller than the diameter of a recessed part is prepared.

  For example, when a rib wafer having a recess diameter of amm is set on a dicing stage, the first stage 10 and the second stage 20 are placed on the base 1 so as to become the dicing stage 51 of the first embodiment as shown in FIG. Install in.

  When a rib wafer having a recess diameter of b mm is set on the dicing stage, the first stage is set so as to be the dicing stages 52 and 53 of the second embodiment or the third embodiment as shown in FIG. 18 or FIG. 11 and the second stage 20 are installed on the foundation 1 or only the first stage 12 is installed on the foundation 1.

  When a flat wafer having no ribs formed on the back side of the wafer is set on the dicing stage, as shown in FIG. 20 or FIG. 21, the dicing stages 54 and 55 of the fourth or fifth embodiment are used. The first stage 10 and the second stage 21 are installed on the foundation part 1 or only the first stage 13 is installed on the foundation part 1 so that

  Here, as shown in FIGS. 17 to 19, in the case of the rib wafer 30, the concave portion of the wafer 30 attached to the dicing frame 34 using the dicing tape 33 is installed so as to match the convex portion of the dicing stage. . Further, as shown in FIG. 20 or FIG. 21, in the case of a flat wafer 40 in which no rib is formed on the back side of the wafer, the element structure of the wafer 40 is formed at least inside the outer periphery of the first stages 10 and 13. Install so that the areas that have been overlapped.

  As described above, according to the second embodiment, the rib wafer can be processed with the same number of steps as that of a flat wafer while suppressing cracking and chipping of the wafer. For this reason, manufacturing cost can be held down.

  As described above, the method for manufacturing a semiconductor device and the apparatus for manufacturing a semiconductor device according to the present invention are useful for manufacturing a semiconductor device with a thin device thickness, and in particular, a power semiconductor device used for a power conversion device or the like. Suitable for manufacturing.

1 is a perspective view showing a structure of a first example of a semiconductor device manufacturing apparatus according to a first embodiment; FIG. 3 is a cross-sectional view showing the structure of a first example of the semiconductor device manufacturing apparatus according to the first exemplary embodiment; It is a figure shown about the structure of a base part. It is a perspective view shown about the structure of the 1st stage. It is a perspective view shown about the structure of a 2nd stage. FIG. 6 is a perspective view showing a second example of the semiconductor device manufacturing apparatus according to the first exemplary embodiment; FIG. 6 is a sectional view showing a second example of the semiconductor device manufacturing apparatus according to the first embodiment; FIG. 6 is a perspective view showing a third example of the semiconductor device manufacturing apparatus according to the first embodiment; FIG. 6 is a cross-sectional view showing a third example of the semiconductor device manufacturing apparatus according to the first embodiment; It is a perspective view shown about the structure of the 1st stage in 3rd Example. FIG. 6 is a perspective view showing the structure of a fourth example of the semiconductor device manufacturing apparatus according to the first exemplary embodiment; FIG. 6 is a cross-sectional view showing a structure of a fourth example of the semiconductor device manufacturing apparatus according to the first embodiment; FIG. 10 is a perspective view showing a structure of a fifth example of the semiconductor device manufacturing apparatus according to the first embodiment; FIG. 7 is a cross-sectional view showing a structure of a fifth example of the semiconductor device manufacturing apparatus according to the first embodiment; 6 is a flowchart illustrating a method for manufacturing a semiconductor device according to a second embodiment; It is sectional drawing shown about the process which affixes a dicing tape on the back surface side of a rib wafer. It is sectional drawing shown about the process which sets a wafer to a dicing stage. It is sectional drawing shown about the process which sets a wafer to a dicing stage. It is sectional drawing shown about the process which sets a wafer to a dicing stage. It is sectional drawing shown about the process which sets a wafer to a dicing stage. It is sectional drawing shown about the process which sets a wafer to a dicing stage. It is sectional drawing of the field stop (FS) type IGBT using the conventional FZ crystal substrate. It is sectional drawing shown about the problem of the conventional dicing process.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Base part 2 Groove 10 1st stage 20 2nd stage 30 Wafer 31 Center part 32 Rib 33 Dicing tape (adhesive tape)
34 Dicing frame

Claims (15)

A surface structure forming step for forming the surface structure of the device in the center of the front side of the semiconductor wafer;
A thinning step of forming a recess on the back side of the semiconductor wafer by making the thickness of the central part on the back side of the semiconductor wafer thinner than the outer peripheral end,
An attaching step of attaching an adhesive tape to the entire back surface of the semiconductor wafer;
A wafer installation step of installing the back side of the semiconductor wafer to which the adhesive tape has been attached to a dicing stage having convex portions having substantially the same diameter and height as the diameter and depth of the concave portion of the semiconductor wafer;
From the front surface side of the semiconductor wafer, a cutting step of cutting a portion corresponding to the concave portion of the semiconductor wafer into a chip,
A peeling step of peeling the semiconductor wafer cut into the chip shape from the adhesive tape;
A method for manufacturing a semiconductor device, comprising:   In the cutting step, the cut is made deeper than the thickness of the central portion of the semiconductor wafer and shallower than the outer peripheral end of the semiconductor wafer, thereby cutting the semiconductor wafer while leaving the outer peripheral end. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is formed into a chip shape.   3. The semiconductor according to claim 1, wherein in the cutting step, the semiconductor wafer is vacuum-sucked by the dicing stage, and a portion corresponding to the concave portion of the semiconductor wafer is cut into a chip shape. Device manufacturing method. The dicing stage comprises a base part and a stage part detachable from the base part,
Before the wafer installation step, the base portion includes a stage installation step of installing a stage portion protruding from the base portion in accordance with the diameter and height of the concave portion of the semiconductor wafer,
The method of manufacturing a semiconductor device according to claim 1, wherein, in the wafer installation step, the semiconductor wafer is installed on a stage portion of the dicing stage.   5. The manufacturing of a semiconductor device according to claim 1, wherein, in the attaching step, the adhesive tape is attached to the entire back surface of the semiconductor wafer in a vacuum atmosphere or a reduced pressure atmosphere. Method. The center part is a concave part thinner than the outer peripheral end part, and a base part having a vacuum suction groove on the bottom surface of the concave part,
A stage part that is detachably installed in the concave part of the base part, and holds and holds the semiconductor wafer from the back side;
An apparatus for manufacturing a semiconductor device, comprising:   The said stage part is the shape where the whole said stage part is covered with the recessed part by the side of the back surface of the said semiconductor wafer by which the center part by the side of a back surface was processed thinner than the outer peripheral edge part. Semiconductor device manufacturing equipment.   The stage portion has a convex portion on the surface, and only the convex portion of the stage portion is covered with a concave portion on the back surface side of the semiconductor wafer in which the center portion on the back surface side is processed thinner than the outer peripheral end portion. The semiconductor device manufacturing apparatus according to claim 6.   The stage portion has a height higher than the recess of the base portion, the height difference from the recess of the base portion is substantially the same height as the recess on the back side of the semiconductor wafer, and the diameter of the semiconductor wafer 8. The apparatus for manufacturing a semiconductor device according to claim 6, wherein the diameter is substantially the same as the diameter of the concave portion on the back surface side of the semiconductor device. The stage part is
A first stage portion having substantially the same height as the concave portion of the base portion;
The height of the first stage portion is higher than that of the first stage portion, and the difference in height from the first stage portion is substantially the same as that of the concave portion on the back surface side of the semiconductor wafer processed at a center portion on the back surface side thinner than the outer peripheral end portion. A second stage portion having a diameter substantially the same as the diameter of the concave portion on the back surface side of the semiconductor wafer,
9. The apparatus for manufacturing a semiconductor device according to claim 6, further comprising:   The semiconductor device manufacturing apparatus according to claim 10, wherein the first stage portion is made of at least one or more ring-shaped members.   The second stage portion has a columnar shape, and is one columnar member, or one columnar member and at least one ring-shaped member having substantially the same height as the columnar member. The apparatus for manufacturing a semiconductor device according to claim 10, wherein:   The semiconductor device manufacturing apparatus according to claim 6, wherein the base portion is made of stainless steel.   The semiconductor device manufacturing apparatus according to claim 6, wherein the stage portion is made of ceramic.   15. The apparatus for manufacturing a semiconductor device according to claim 6, wherein the stage portion has a porous structure or a structure provided with a hole.

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