JP2009188229A - Laminated ceramic substrate and manufacturing method thereof - Google Patents

Laminated ceramic substrate and manufacturing method thereof Download PDF

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JP2009188229A
JP2009188229A JP2008027330A JP2008027330A JP2009188229A JP 2009188229 A JP2009188229 A JP 2009188229A JP 2008027330 A JP2008027330 A JP 2008027330A JP 2008027330 A JP2008027330 A JP 2008027330A JP 2009188229 A JP2009188229 A JP 2009188229A
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ceramic substrate
groove
base material
ceramic
pad
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Tetsuo Tanaka
哲郎 田中
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Koa Corp
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Koa Corp
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<P>PROBLEM TO BE SOLVED: To provide a laminated ceramic substrate which is enhanced in reliability by increasing fixing strength of a via pad for a ceramic base material. <P>SOLUTION: The laminated ceramic substrate comprises a ceramic base material 11 having a via hole 13, a via conductor 14 filling the via hole, and the via pad 16 made of a conductor connected to the via conductor and provided on a surface of the ceramic base material; and a groove 15 is formed on the surface of the ceramic base material at a periphery of the via hole and the via pad 16 is trenched in the groove 15 to be fixed to the surface of the ceramic base material. The anchor effect can enhance the fixing strength for the ceramic substrate, and the laminated ceramic substrate having high reliability is provided. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、配線パターン等を備えたセラミックスグリーンシートを複数層積層および圧着して、焼成して形成する、表層および内部に配線パターン等を備えた積層セラミックス基板に関する。   The present invention relates to a multilayer ceramic substrate having a surface layer and a wiring pattern or the like formed therein by laminating and pressing a plurality of ceramic green sheets having a wiring pattern or the like and firing them.

従来から、上記積層セラミックス基板においては、グリーンシートから形成されたセラミックス基材にビア導体が充填されたビア孔を備え、該ビア孔が設けられたセラミックス基材の表面にはビア導体に接続した導体パターンであるビアパッドを備え、ビア導体およびビアパッドを介して上下の配線パターンを接続することが行われている。   Conventionally, the laminated ceramic substrate has a via hole filled with a via conductor in a ceramic base formed from a green sheet, and the surface of the ceramic base provided with the via hole is connected to the via conductor. A via pad which is a conductor pattern is provided, and upper and lower wiring patterns are connected via the via conductor and the via pad.

係る積層セラミックス基板は、まずセラミックスグリーンシートを準備し、必要に応じてグリーンシートにビア孔をレーザエッチングまたはパンチングにより形成し、ビア孔に導電材ペーストを充填し、ビア孔の周辺のグリーンシート表面に導電材ペーストによるビアパッドパターンを形成し、導電材ペーストのスクリーン印刷により配線パターンを形成する。そして、複数のセラミックスグリーンシートを積層し圧着して、セラミックスグリーンシートブロックを形成し、焼成し、必要に応じて、分割し、端子電極のめっき処理等を行うことで、積層セラミックス基板が完成する。
特開昭64−9691号公報 特許第3074728号公報
The multilayer ceramic substrate is prepared by first preparing a ceramic green sheet, forming via holes in the green sheet by laser etching or punching as necessary, filling the via holes with a conductive material paste, and the surface of the green sheet around the via holes. A via pad pattern is formed using a conductive material paste, and a wiring pattern is formed by screen printing of the conductive material paste. Then, a plurality of ceramic green sheets are laminated and pressure-bonded to form a ceramic green sheet block, fired, and divided as necessary to perform terminal electrode plating treatment, etc., thereby completing a laminated ceramic substrate. .
JP-A 64-9691 Japanese Patent No. 3074728

しかしながら、上記積層セラミックス基板においては、表層に設けたビアパッドのセラミックス基材への固着強度が十分に確保できない場合があるという問題がある。   However, in the laminated ceramic substrate, there is a problem that sufficient adhesion strength of the via pad provided on the surface layer to the ceramic base material may not be ensured.

本発明は上述した事情に基づいてなされたもので、表層に設けたビアパッドのセラミックス基材への固着強度を増加し、信頼性を高めた積層セラミックス基板を提供することを目的とする。   The present invention has been made based on the above-described circumstances, and an object of the present invention is to provide a multilayer ceramic substrate that increases the adhesion strength of a via pad provided on a surface layer to a ceramic base material and has improved reliability.

本発明の積層セラミックス基板は、ビア孔を有するセラミックス基材と、前記ビア孔を充填したビア導体と、前記ビア導体に接続し、前記セラミックス基材の表面に設けた導体からなるビアパッドとを備え、前記セラミックス基材の表面のビア孔の周辺に溝が形成され、前記ビアパッドが前記溝に食い込んで、前記セラミックス基材の表面に固定されていることを特徴とする。   The multilayer ceramic substrate of the present invention includes a ceramic base material having via holes, a via conductor filled with the via holes, and a via pad connected to the via conductor and made of a conductor provided on the surface of the ceramic base material. A groove is formed around a via hole on the surface of the ceramic substrate, and the via pad bites into the groove and is fixed to the surface of the ceramic substrate.

本発明によれば、表層に設けたビアパッドの外周部分が溝に食い込んで、セラミックス基材の表面に固定されているので、そのアンカー効果によりセラミックス基板への固着強度を高めることができる。これにより、信頼性の高い積層セラミックス基板を提供することができる。   According to the present invention, since the outer peripheral portion of the via pad provided on the surface layer bites into the groove and is fixed to the surface of the ceramic substrate, the anchoring effect can enhance the fixing strength to the ceramic substrate. Thereby, a highly reliable laminated ceramic substrate can be provided.

以下、本発明の一実施形態について、添付図面を参照して説明する。図1は、本発明の積層セラミックス基板のビア周辺部分を示す。なお、各図中、同一または相当する部材または要素には、同一の符号を付して説明する。   Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings. FIG. 1 shows a peripheral portion of a via of the multilayer ceramic substrate of the present invention. In addition, in each figure, the same code | symbol is attached | subjected and demonstrated to the same or equivalent member or element.

積層セラミックス基板は、図示の例はセラミックス基材11,12の2層分のみを示すが、実際には5−20層の図示しないセラミックス基材が積層して形成されている。表層のセラミックス基材11および内部のセラミックス基材12にはそれぞれメタルグレーズ配線パターンを備え、ビア孔13を介して上下の配線層が導通接続されている。ここで、セラミックス基材11,12は、それぞれ導電材ペーストで形成された配線パターンを備えたセラミックスグリーンシートを積層および圧着し焼成して形成したものである。   In the illustrated example, the laminated ceramic substrate shows only two layers of the ceramic bases 11 and 12, but in actuality, 5 to 20 layers of ceramic bases (not shown) are laminated. The surface ceramic substrate 11 and the internal ceramic substrate 12 are each provided with a metal glaze wiring pattern, and the upper and lower wiring layers are conductively connected through the via holes 13. Here, the ceramic base materials 11 and 12 are formed by laminating, pressing and firing ceramic green sheets each having a wiring pattern formed of a conductive material paste.

表層のセラミックス基材11のビア孔13には、Ag,Ag−Pd,Cu等のビア導体14が充填されている。ビア導体14の下面は、セラミックス基材12の表面に設けた配線層17に接続されている。ビア孔13の上部には、ビア導体14に接続し、セラミックス基材11の表面に設けたAg,Ag−Pd,Cu等の導電材を含むビアパッド16を備える。セラミックス基材11の表面のビア孔13の周辺には、ビアパッド16の外周部分に沿って、且つビア孔13に対して同心リング状のV字状溝15が形成され、ビアパッド16の外周部分が溝15に食い込んで、ビアパッド16がセラミックス基材11の表面に強固に固定され、アンカー効果が得られる。ビアパッド16には、図示しないが、セラミックス基材11の表面に設けた配線層が接続されている。なお、ビア孔13の直径は、30−100μm程度であり、ビアパッド16の直径は、ビア孔直径の概略2倍程度であり、グリーンシートの厚さは30−150μmである。   The via hole 13 of the surface ceramic base material 11 is filled with a via conductor 14 such as Ag, Ag—Pd, or Cu. The lower surface of the via conductor 14 is connected to a wiring layer 17 provided on the surface of the ceramic substrate 12. An upper portion of the via hole 13 includes a via pad 16 connected to the via conductor 14 and including a conductive material such as Ag, Ag—Pd, or Cu provided on the surface of the ceramic substrate 11. A concentric ring-shaped V-shaped groove 15 is formed around the via hole 13 on the surface of the ceramic substrate 11 along the outer peripheral portion of the via pad 16, and the outer peripheral portion of the via pad 16 is formed. The via pad 16 bites into the groove 15 and is firmly fixed to the surface of the ceramic substrate 11, and an anchor effect is obtained. Although not shown, a wiring layer provided on the surface of the ceramic substrate 11 is connected to the via pad 16. The diameter of the via hole 13 is about 30-100 μm, the diameter of the via pad 16 is about twice the diameter of the via hole, and the thickness of the green sheet is 30-150 μm.

図2は、溝15の切り込み比率と固着強度との関係を示す。ここで、
切り込み比率=(切り込み深さ/グリーンシート厚さ)×100(%)
である。ボールシェア強度および引っ張り強度は、いずれもビアパッド接合面の接合強度である。ボールシェア強度が基板の面に沿って平行にビアパッドに荷重を加えたときに接合面が破断する強度であるのに対し、引っ張り強度は基板の面に垂直方向にビアパッドに引っ張り力を加えたときに接合面が破断する強度である。
FIG. 2 shows the relationship between the cutting ratio of the groove 15 and the fixing strength. here,
Cutting ratio = (cutting depth / green sheet thickness) x 100 (%)
It is. Both the ball shear strength and the tensile strength are the bonding strength of the via pad bonding surface. The ball shear strength is the strength at which the joint surface breaks when a load is applied to the via pad parallel to the surface of the board, whereas the tensile strength is when the tensile force is applied to the via pad perpendicular to the surface of the board. The strength at which the joint surface breaks.

図示するように、切り込み比率が10%以上で、ボールシェア強度は200%程度に向上し、引っ張り強度は150%程度に向上することが分かる。このことは、ビアパッド外周部分をセラミックス基材11に設けた溝15に固定することで、ビアパッド16に強固なアンカー効果が得られたことを示している。   As shown in the figure, it can be seen that when the cutting ratio is 10% or more, the ball shear strength is improved to about 200% and the tensile strength is improved to about 150%. This indicates that a firm anchor effect was obtained for the via pad 16 by fixing the outer peripheral portion of the via pad to the groove 15 provided in the ceramic substrate 11.

次に、図3を参照して、本発明の積層セラミックス基板の製造方法について説明する。まず、セラミックス粉末とガラスを一定比率で配合し、混合し、混合された原料に有機系のバインダーと溶剤を加え、均一になるまで分散させ、スラリーを形成する。スラリーを製膜装置でPETフィルム上に一定の厚さで塗布し、乾燥工程を経てグリーンシート11aを形成する。そして、グリーンシート11aを指定の大きさに切断する((a)参照)。   Next, with reference to FIG. 3, the manufacturing method of the laminated ceramic substrate of this invention is demonstrated. First, ceramic powder and glass are blended at a certain ratio, mixed, and an organic binder and solvent are added to the mixed raw materials and dispersed until uniform to form a slurry. The slurry is applied on the PET film with a certain thickness using a film forming apparatus, and a green sheet 11a is formed through a drying process. Then, the green sheet 11a is cut into a specified size (see (a)).

次に、上下層の導通を確保する為、ビア孔13をレーザエッチングまたはパンチングにより形成し、さらにビア孔13の周囲のビアパッド外周部分が配置される位置に断面V字状の溝15をレーザエッチングにより形成する((b)参照)。そして、Ag,Ag−Pd,Cu等を主成分とした導電材ペーストをビア孔13に充填し、ビア導体14aを形成するとともに、溝15に導電材ペーストを充填したビアパッドパターン16aをスクリーンマスク等を用いて形成する((c)参照)。なお、ビア導体14aの形成とビアパッドパターン16aの形成とは、上述のように同時に行っても、また別々に行っても良い。   Next, in order to ensure conduction between the upper and lower layers, the via hole 13 is formed by laser etching or punching, and the groove 15 having a V-shaped cross section is laser etched at a position where the outer peripheral portion of the via pad around the via hole 13 is disposed. (See (b)). Then, a conductive material paste mainly composed of Ag, Ag-Pd, Cu or the like is filled in the via hole 13 to form the via conductor 14a, and the via pad pattern 16a in which the groove 15 is filled with the conductive material paste is formed as a screen mask. Etc. (see (c)). The formation of the via conductor 14a and the formation of the via pad pattern 16a may be performed simultaneously as described above or separately.

さらに、配線パターンを導電材ペーストのスクリーン印刷により形成し、一層分のグリーンシートが出来上がる。なお、配線パターンの形成と、上記ビア導体14aおよびビアパッドパターン16aの形成とは、同時に行っても、また別々に行っても良い。このようにして配線パターンを備えたグリーンシートを複数層作成し、積層工程で圧力を加え積層し、セラミックスグリーンシートブロックを形成する((d)参照)。さらに、焼成工程を経て、セラミックスグリーンシートがセラミックス基材となり、導電材ペーストが固化して形成されたパターンがメタルグレーズ導電材パターンとなり、図1に示す積層セラミックス基板が形成され、仕様に応じて、めっき加工や個片への分割を行い、積層セラミックス基板が完成する。   Furthermore, a wiring pattern is formed by screen printing of a conductive material paste, and a green sheet for one layer is completed. The formation of the wiring pattern and the formation of the via conductor 14a and the via pad pattern 16a may be performed simultaneously or separately. In this way, a plurality of green sheets having a wiring pattern are prepared, and pressure is applied in the laminating process to laminate them to form a ceramic green sheet block (see (d)). Furthermore, after the firing process, the ceramic green sheet becomes a ceramic base material, the pattern formed by solidifying the conductive material paste becomes a metal glaze conductive material pattern, and the laminated ceramic substrate shown in FIG. Then, plating and division into individual pieces are performed to complete the laminated ceramic substrate.

なお、上記ビアパッド16は、配線層としてAgを用いたいわゆる低温焼成セラミックス基板(LTCC)に用いて、特に効果的にセラミックス基板へのアンカー効果を発揮させることができる。   The via pad 16 can be used for a so-called low-temperature fired ceramic substrate (LTCC) using Ag as a wiring layer, and can exhibit an anchor effect to the ceramic substrate particularly effectively.

また、溝の形状として、V字型のものについて説明したが、U字型あるいはコの字型のものについても同様に適用可能である。   Further, although the V-shaped groove has been described as the shape of the groove, it can be similarly applied to a U-shaped or U-shaped groove.

これまで本発明の一実施形態について説明したが、本発明は上述の実施形態に限定されず、その技術的思想の範囲内において種々異なる形態にて実施されてよいことは言うまでもない。   Although one embodiment of the present invention has been described so far, it is needless to say that the present invention is not limited to the above-described embodiment, and may be implemented in various forms within the scope of the technical idea.

本発明の一実施形態の積層セラミックス基板のビア周辺部分の断面図である。It is sectional drawing of the via periphery part of the multilayer ceramic substrate of one Embodiment of this invention. 溝の切り込み比率と固着強度との関係を示すグラフである。It is a graph which shows the relationship between the notch ratio of a groove | channel, and fixing strength. 上記積層セラミックス基板の製造工程を示す図である。It is a figure which shows the manufacturing process of the said laminated ceramic substrate.

符号の説明Explanation of symbols

11、12 セラミックス基材
13 ビア孔
14 ビア導体
15 溝
16 ビアパッド
17 配線層
11, 12 Ceramic substrate 13 Via hole 14 Via conductor 15 Groove 16 Via pad 17 Wiring layer

Claims (5)

ビア孔を有するセラミックス基材と、
前記ビア孔を充填したビア導体と、
前記ビア導体に接続し、前記セラミックス基材の表面に設けた導体からなるビアパッドとを備え、
前記セラミックス基材の表面のビア孔の周辺に溝が形成され、前記ビアパッドが前記溝に食い込んで、前記セラミックス基材の表面に固定されていることを特徴とする積層セラミックス基板。
A ceramic substrate having via holes;
A via conductor filling the via hole;
A via pad connected to the via conductor and made of a conductor provided on the surface of the ceramic substrate;
A laminated ceramic substrate, wherein a groove is formed around a via hole on the surface of the ceramic base material, and the via pad bites into the groove and is fixed to the surface of the ceramic base material.
前記溝は、前記ビアパッドの外周に沿って形成されていることを特徴とする請求項1記載の積層セラミックス基板。   The multilayer ceramic substrate according to claim 1, wherein the groove is formed along an outer periphery of the via pad. 前記溝は、断面がV字状であることを特徴とする請求項1記載の積層セラミックス基板。   The multilayer ceramic substrate according to claim 1, wherein the groove has a V-shaped cross section. 前記溝は、切り込み深さが前記基材の厚さの10%以上であることを特徴とする請求項1記載の積層セラミックス基板。   The multilayer ceramic substrate according to claim 1, wherein the groove has a cut depth of 10% or more of the thickness of the base material. セラミックスグリーンシートに、ビア孔と、該ビア孔の周辺に溝を形成し、
前記ビア孔に導電材ペーストを充填し、
前記ビア孔の周辺に形成した溝を含む領域に導電材ペーストによるビアパッドパターンを形成し、
複数のセラミックスグリーンシートを積層し、焼成することを特徴とする積層セラミックス基板の製造方法。
In the ceramic green sheet, via holes and grooves are formed around the via holes,
Fill the via hole with a conductive paste,
Forming a via pad pattern with a conductive material paste in a region including a groove formed around the via hole;
A method for producing a laminated ceramic substrate, comprising laminating and firing a plurality of ceramic green sheets.
JP2008027330A 2008-02-07 2008-02-07 Laminated ceramic substrate and manufacturing method thereof Pending JP2009188229A (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6191995A (en) * 1984-10-11 1986-05-10 大阪富士工業株式会社 Manufacture of printed circuit board
JPH07176864A (en) * 1993-12-21 1995-07-14 Fujitsu Ltd Manufacture of multilayered ceramic board
JP2004040029A (en) * 2002-07-08 2004-02-05 Denso Corp Thick film circuit board and method for manufacturing the same
WO2008053956A1 (en) * 2006-11-02 2008-05-08 Murata Manufacturing Co., Ltd. Ceramic substrate, electronic device and method for producing ceramic substrate

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6191995A (en) * 1984-10-11 1986-05-10 大阪富士工業株式会社 Manufacture of printed circuit board
JPH07176864A (en) * 1993-12-21 1995-07-14 Fujitsu Ltd Manufacture of multilayered ceramic board
JP2004040029A (en) * 2002-07-08 2004-02-05 Denso Corp Thick film circuit board and method for manufacturing the same
WO2008053956A1 (en) * 2006-11-02 2008-05-08 Murata Manufacturing Co., Ltd. Ceramic substrate, electronic device and method for producing ceramic substrate

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