JP2009124077A - Semiconductor chip and its production process - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize a semiconductor chip which is manufactured by a manufacturing method including a cutting process by a dicing process using laser light and can prevent a fine piece of a reformed region from peeling from a cut surface of the semiconductor chip, and its manufacturing method. <P>SOLUTION: In a reformed region formation process, a cutting predetermined line DL is set along a (111) surface forming an angle of 54.7° from a substrate surface 21a which is a (100) surface. A laser head 31 is scanned along the cutting predetermined line DL and a plurality of reformed regions K are formed arranged on the cutting predetermined line DL. Since the reformed region K is formed along a (111) surface which is a cleavage surface, a wafer 20 can be cut by a relatively small force in a following cutting process. Accordingly, excessive stress is not loaded on the reformed region K, thus enabling a semiconductor chip 22 to be manufactured while restraining generation of fine pieces. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor chip manufactured by cleaving a semiconductor substrate in the thickness direction and a manufacturing method thereof.

In recent years, in a dicing process for separating a silicon wafer (hereinafter referred to as a wafer) on which a semiconductor integrated circuit or a MEMS (Micro Electro Mechanical Systems) is formed into each semiconductor chip, a dicing process (laser dicing) using a laser beam is considered. For example, Patent Document 1 below discloses a wafer processing technique using a laser. FIG. 6 is an explanatory diagram showing a dicing process using laser light. FIG. 16A is an explanatory diagram of a modified region forming process by laser light irradiation, and FIG. 16B is an explanatory diagram of a cleaving process.
As shown in FIG. 16A, the laser head H that irradiates the laser light L includes a condenser lens CV that condenses the laser light L, and condenses the laser light L at a predetermined focal length. Can do. In the modified region forming step, the planned cutting line DL for cutting the wafer W under the laser light irradiation conditions set so that the condensing point P of the laser light L is formed at a depth d from the substrate surface of the wafer W. The laser head H is moved along the top (front side in the figure), and the laser beam L is irradiated from the substrate surface of the wafer W. As a result, a modified region K by multiphoton absorption is formed in a path of depth d where the condensing point P of the laser beam L is scanned.
Here, multiphoton absorption means that a substance absorbs a plurality of the same or different photons. Due to the multiphoton absorption, a phenomenon called optical damage occurs at the condensing point P of the semiconductor substrate W and in the vicinity thereof. Due to optical damage, a modified region K is formed, which is a region once melted and then solidified to change into an amorphous structure or a polycrystalline structure.
When the laser beam L is a pulse wave, the intensity of the laser beam L is determined by the peak power density (W / cm ² ) at the focal point P. For example, the peak power density is 1 × 10 ⁸ (W / cm ² ) or more. Multiphoton absorption occurs under conditions where the pulse width is 1 μs or less. As the laser beam L, for example, a laser beam by a YAG (Yttrium Aluminum Garnet) laser is used. The wavelength of the laser beam L is, for example, a wavelength in the infrared light region of 1064 nm.
Subsequently, as shown in FIG. 16B, by applying a stress in the in-plane direction of the semiconductor substrate W (directions indicated by arrows F2 and F3 in the figure), the substrate thickness starts from the modified region K. The crack C is advanced in the vertical direction, and the semiconductor substrate W is cleaved along the cleaved line DL.
Japanese Patent No. 3408805

Here, since the strength of the modified region K is reduced, a part of the modified region K exposed in the fractured surface is peeled off and scattered as a minute piece when the semiconductor substrate W is cleaved or in a later process. There is a risk. If the minute piece adheres to an element formed on the chip, it causes a malfunction of the semiconductor device, resulting in a problem that the yield and quality of the semiconductor chip cut and separated from the wafer is lowered.
In particular, when various sensor elements (pressure sensors, acceleration sensors, ultrasonic sensors, etc., including piezoelectric elements and electrostatic capacitance elements) and micromachines manufactured using MEMS technology are formed, the sensor elements and micromachines If the minute piece adheres to the movable part constituting the, the movement of the movable part is hindered by the minute piece, so that there is a possibility of degrading the performance of the sensor element or the micromachine.

  Accordingly, the present invention provides a semiconductor chip manufactured by a manufacturing method including a process of cleaving by a dicing process (laser dicing) using laser light, and a small piece of a modified region is peeled from a fractured surface of the semiconductor chip. An object of the present invention is to realize a semiconductor chip and a method for manufacturing the semiconductor chip that can prevent this.

In order to achieve the above object, according to the first aspect of the present invention, in the method for manufacturing a semiconductor chip, in the semiconductor chip manufacturing method, a cleaving line for cleaving a semiconductor substrate having elements formed on the substrate surface in the thickness direction. Is set along the cleavage plane of the semiconductor substrate, and a laser head that irradiates a laser beam along the planned cutting line is moved relative to the semiconductor substrate, and a focusing point is aligned with the semiconductor substrate. A modified region forming step in which a plurality of modified regions by multiphoton absorption are formed side by side along the cleavage plane of the semiconductor substrate, and the modified region forming step is performed. And a cleaving step of cleaving the semiconductor substrate in the thickness direction along the planned cleaving line with the modified region as a starting point to obtain a semiconductor chip.
In addition, the said condensing point is a location where the laser beam condensed.

  According to the first aspect of the present invention, in the modified region forming step, a plurality of modified regions are formed side by side along the cleavage plane, so that the semiconductor substrate can be cleaved with a relatively small force in the cleaving step. it can. Thereby, since an excessive stress is not applied to the modified region, it is possible to manufacture a semiconductor chip while suppressing generation of minute pieces from the modified region. Thereby, since a micro piece does not adhere to a semiconductor chip, it is possible to prevent a decrease in product yield and quality due to scattering of the micro piece.

  According to a second aspect of the present invention, in the semiconductor chip manufacturing method according to the first aspect, the semiconductor substrate is made of silicon whose substrate surface is a (100) surface, and the cleaving schedule is formed in the modified region forming step. The technical means of setting the line along the (111) plane of the semiconductor substrate is used.

  As in the second aspect of the present invention, the present invention can be applied to a semiconductor substrate made of silicon and having a (100) plane as a substrate surface widely used for manufacturing a semiconductor device.

  According to a third aspect of the present invention, in the semiconductor chip manufacturing method according to the first or second aspect, in the modified region forming step, the cleaving line is set by combining a plurality of cleaved surfaces having different directions. The technical means to do is used.

  As in the invention described in claim 3, in the modified region forming step, if the cleaving line is set in combination with a plurality of cleaved surfaces having different directions, the direction of the cleaving line extending in the thickness direction of the semiconductor substrate is changed. Therefore, the area occupied by the semiconductor chip in the substrate surface direction can be reduced.

  According to a fourth aspect of the present invention, in the semiconductor chip manufacturing method according to any one of the first to third aspects, the semiconductor chip cleaved through the cleaving step is a substrate surface direction of the semiconductor substrate. Therefore, a technical means for setting the cleaved line in the modified region forming step is used.

  When the semiconductor chip is formed symmetrically in the substrate surface direction as in the invention described in claim 4, the symmetry of the substrate portion is improved in order to improve the detection accuracy of acceleration or the like, for example, where the symmetry of the substrate portion is required. It can be suitably used for necessary acceleration sensors and the like.

  According to a fifth aspect of the present invention, in the semiconductor chip manufacturing method according to any one of the first to fourth aspects, the element formed on the substrate surface is formed by a MEMS (Micro Electro Mechanical Systems) technique. The technical means of being an element having a movable part formed is used.

  When the element formed on the substrate surface is an element having a movable part formed by the MEMS technology as in the invention described in claim 5, the movement of the movable part is caused by the minute piece being sandwiched between the movable parts. Therefore, the present invention can be preferably used because the device performance can be prevented from being deteriorated.

  In invention of Claim 6, it is a semiconductor chip manufactured by the manufacturing method of the semiconductor chip as described in any one of Claim 1 thru | or 5, Comprising: The fractured surface where the said semiconductor substrate was cleaved, The technical means that it is a cleavage plane of the semiconductor substrate is used.

  According to invention of Claim 6, it is a semiconductor chip manufactured by the manufacturing method of the semiconductor chip as described in any one of Claim 1 thru | or 5, Comprising: The fractured surface where the semiconductor substrate was cleaved has Because of the cleavage plane of the semiconductor substrate, the semiconductor substrate can be cleaved with a relatively small force. Thereby, since an excessive stress is not applied to the modified region, it is possible to manufacture a semiconductor chip while suppressing generation of minute pieces from the modified region. Thereby, since a micro piece does not adhere to a semiconductor chip, it is possible to prevent a decrease in product yield and quality due to scattering of the micro piece.

[First Embodiment]
A first embodiment of a semiconductor chip and a manufacturing method thereof according to the present invention will be described with reference to the drawings. FIG. 1 is a schematic diagram showing a configuration example of a wafer to be cut by the manufacturing method of the present invention. FIG. 1A is an explanatory plan view of the surface of a wafer, and FIG. 1B is an enlarged cross-sectional view taken along the line 1B-1B in FIG. FIG. 2 is an explanatory diagram of a cleaving apparatus that irradiates a semiconductor substrate with laser light. FIG. 3 is a cross-sectional explanatory view showing a method of forming a modified region in the modified region forming step of the first embodiment. FIG. 4 is a cross-sectional explanatory view showing the cleaving process of the first embodiment. FIG. 5 is an explanatory diagram of the shape of the semiconductor chip of the first embodiment. FIG. 5A is an explanatory plan view seen from the substrate surface side, and FIG. 5B is an enlarged cross-sectional view taken along the line 1C-1C in FIG. 5A.
In each figure, a part is enlarged and exaggerated for explanation.

First, a wafer 20 as shown in FIG. The wafer 20 is provided with a thin disk-shaped semiconductor substrate 21 made of silicon having a (100) plane orientation, and an orientation flat showing a crystal orientation <110> is formed on a part of the outer periphery thereof. Yes. On the substrate surface 21 a of the semiconductor substrate 21, an element formed through a diffusion process or the like, for example, a MEMS 23 constituting a sensor element having a movable part formed in a comb shape, for example, is aligned like a grid. Has been placed.
The wafer 20 is cleaved along the planned cleaving line DL by a dicing process to become semiconductor chips 22, and the semiconductor chip 22 is completed as a packaged IC or LSI through various processes such as a mounting process, a bonding process, and an encapsulating process. To do. In the present embodiment, the semiconductor substrate 21 can form a silicon layer that serves as a support substrate for the semiconductor chip 22.
The semiconductor substrate 21 has a back surface 21b bonded to a stretchable resin sheet 41, and the outer periphery of the sheet 41 is held by an annular frame 42 in a state where the sheet 41 is stretched.
For example, as shown in FIG. 1B, six semiconductor chips 22a to 22f are formed on the 1B-1B line. Seven cutting planned lines DL1 to DL7 are set in the thickness direction of the semiconductor substrate 21, and a modified region serving as a starting point of the cutting is formed by a method described later.

  As shown in FIG. 2, the cleaving apparatus 1 for the semiconductor substrate 21 is provided with a laser head 31 that irradiates a laser beam L. The laser head 31 includes a condensing lens 32 that condenses the laser light L, and can condense the laser light L at a predetermined focal length. Here, the condensing point P of the laser beam L is set so as to be formed at a depth d from the substrate surface 21 a of the semiconductor substrate 21.

First, a modified region forming step is performed. In order to form the modified region K in the semiconductor substrate 21, first, one of the planned cutting lines DL shown in FIG. 1A is scanned with a laser beam for wafer detection, and FIG. The outer peripheral end 21c shown is detected, and the scanning range of the laser light L is set.
The cleaving line DL is set so that each cleaving line DL is parallel to the (111) plane that forms an angle of 54.7 ° from the substrate surface 21a that is the (100) plane. Thereby, the modified region K is formed side by side on the same plane of the (111) plane. Here, the (111) plane is a cleavage plane of silicon constituting the semiconductor substrate 21.

  Subsequently, as shown in FIG. 2, the laser head 31 is scanned along the planned cutting line DL (in the direction of arrow F4 in the figure), and the laser beam L is irradiated from the substrate surface 21a, thereby condensing the laser beam L. The modified region K by multiphoton absorption is appropriately formed in the path of depth d scanned by the point P. The modified region K is a region having a size of about several μm in which the condensing point P of the semiconductor substrate W and its vicinity are once melted and solidified by multiphoton absorption and then changed to polycrystalline silicon or amorphous silicon. .

  As shown in FIG. 3, the modified region K is formed by first forming the lowermost modified region K <b> 1 in a state where the depth position of the condensing point P is set near the back surface 21 b of the semiconductor substrate 21. Next, the depth position of the condensing point P is moved upward to form the modified region K2 of the second layer, and similarly, the modified regions K3 to K5 are sequentially formed from below. Here, the number of layers in the modified region K may be appropriately set according to the thickness of the semiconductor substrate 21.

  Thus, the modified region K is preferably formed in order from the far side from the substrate surface 21a of the semiconductor substrate 21 on which the laser beam L is incident. According to this, since the new modified region K can be formed without the modified region K between the substrate surface 21a that is the incident surface of the laser beam L and the condensing point P, the modification that has already been formed. The laser beam L is not scattered by the quality region K, and the modified regions K1 to K5 can be formed uniformly.

Subsequently, a cleaving process is performed. In the cleaving step, as shown in FIG. 4, the sheet 41 is expanded by a known method (F direction in the figure) and stress is applied in the in-plane direction of the semiconductor substrate 21, thereby starting the modified region K as a starting point. , Cracks propagate in the substrate thickness direction.
For example, when the modified regions K1 to K5 are introduced as shown in FIG. 3, first, cracks (cracks) occur in the depth direction of the wafer 20 starting from the modified region K1 in the lowermost layer closest to the sheet 41. Then, a crack is generated in the depth direction of the wafer 20 starting from the modified region K2, and then cracks starting from the modified regions K3 to K5 are grown and connected, and the grown cracks Reaches the front and back surfaces of the wafer 20.
The modified regions K1 to K5 are formed continuously along the planned cutting line DL, that is, a plurality of the reformed regions K1 to K5 are formed side by side along the (111) plane which is a cleavage plane. The cut section 21d is formed.

  Then, as shown in FIGS. 5A and 5B, the wafer 20 is cleaved so that the substrate surface 21a and the back surface 21b are rectangular or square of the same size, and the opposing split sections 21d are parallel, A semiconductor chip 22 having a vertical cross section of a parallelogram is manufactured. In FIGS. 5A and 5B, the modified region K exposed in the fractured surface 21d is not shown. (The modified region K is also omitted in FIGS. 7, 10, and 12 described later.)

Here, since the (111) plane is a cleavage plane, it can be cleaved with a relatively small force. Thereby, since an excessive stress is not applied to the modified region K, the generation of the fine pieces can be suppressed and the semiconductor chip 22 can be manufactured.
It should be noted that shapes other than a rectangle or a square can be adopted as the shapes of the substrate surface 21a and the back surface 21b of the semiconductor chip 22 depending on how the cutting schedule line DL is set.

[Effect of the first embodiment]
In the modified region forming step, the modified region K is formed along the (111) plane which is a cleavage plane, so that the wafer 20 can be cleaved with a relatively small force in the cleaving step. Thereby, since an excessive stress is not applied to the modified region K, the generation of the fine pieces can be suppressed and the semiconductor chip 22 can be manufactured. Since the fine pieces do not adhere to the semiconductor chip 22, it is possible to prevent a decrease in product yield and quality due to the scattering of the fine pieces.

[Second Embodiment]
In the semiconductor chip and the manufacturing method thereof according to the second embodiment, in the modified region forming step, as shown in FIG. 6, the cleaving line DL has an angle of 54.7 ° from the substrate surface 21a which is the (100) plane. The thickness of the semiconductor substrate 21 is the line along the (111) plane and the line along the (111) plane that is at an angle of 54.7 ° from the back surface 21b and is not parallel to the (111) plane extending from the substrate surface 21a. It is set to intersect at the center of the direction. That is, it is set to have a “<” shape when viewed in a vertical section.

Then, in the cleaving step, as shown in FIGS. 7A and 7B, the wafer 20 has a rectangular or square substrate surface 21a and back surface 21b, and a parallel split surface 21d. It is cleaved into a semiconductor chip 22 having a shape of “<”.
According to this, compared with the semiconductor chip 22 of the first embodiment, the area occupied by the semiconductor chip 22 in the substrate surface direction can be reduced.

(Example of change)
The cleaving line DL can also be formed such that the (111) plane intersects the thickness direction of the wafer 20 a plurality of times. For example, as shown in FIG. 8, the (111) plane can be formed in a shape that intersects three times.

[Effects of Second Embodiment]
According to the semiconductor chip and the manufacturing method of the second embodiment, the same effects as the semiconductor chip and the manufacturing method of the first embodiment can be obtained, and the area occupied by the semiconductor chip 22 in the substrate surface direction can be reduced. be able to.

[Third Embodiment]
In the semiconductor chip and the manufacturing method thereof according to the third embodiment, in the modified region forming step, as shown in FIG. 9, the cleaving line DL has an angle of 54.7 ° with respect to the substrate surface 21a, and has a longitudinal section. When viewed in (1), each cleaving line DL is set so as to form an isosceles trapezoidal leg extending from the back surface 21b toward the substrate surface 21a. Thereby, the modified region K is formed side by side on the same plane.

In the cleaving step, the wafer 20 is cleaved at the cleavage plane (111) where the modified region K is formed, and the substrate surface 21a and the back surface 21b are similar as shown in FIGS. 10 (A) and 10 (B). It is a certain rectangle or square, and its longitudinal section is divided into an isosceles trapezoidal semiconductor chip 22 and a triangular prism-shaped remaining piece 24 whose upper base on the substrate surface 21a side is longer than the lower bottom on the rear surface 21b side.
Since the semiconductor chip manufactured in this way is formed symmetrically in the direction of the substrate surface, the substrate portion needs to be symmetrical in order to improve the detection accuracy such as acceleration, for example, where the symmetry of the substrate portion is required. It can be suitably used for an acceleration sensor or the like.

[Effect of the third embodiment]
According to the semiconductor chip and the manufacturing method thereof of the third embodiment, the same effect as that of the semiconductor chip of the first embodiment and the manufacturing method thereof can be obtained, and the substrate is formed symmetrically in the substrate surface direction. It can be suitably used for applications that require symmetry of the part, for example, an acceleration sensor that requires symmetry of the substrate part in order to improve detection accuracy such as acceleration.

[Fourth Embodiment]
In the semiconductor chip and the manufacturing method thereof according to the fourth embodiment, in the modified region forming step, as shown in FIG. 11, the cleaving line DL forms an angle of 54.7 ° with respect to the substrate surface 21a, and the longitudinal section As shown in FIG. 1, each of the planned split lines DL is set so as to form an isosceles trapezoidal leg extending from the substrate surface 21a toward the back surface 21b.

In the cleaving step, the wafer 20 is cleaved at the cleavage plane (111) where the modified region K is formed, and the substrate surface 21a and the back surface 21b are similar as shown in FIGS. 12 (A) and 12 (B). It is a certain rectangle or square, and its longitudinal section is divided into an isosceles trapezoidal semiconductor chip 22 and a triangular prism-shaped remaining piece 24 whose upper bottom on the substrate surface 21a side is shorter than the lower bottom on the rear surface 21b side.
The semiconductor chip 22 can be manufactured by, for example, picking up the semiconductor chip 22 with, for example, a suction jig after the remaining piece 24 is adhered and removed with a removing tape.
Since the semiconductor chip manufactured in this way is formed symmetrically in the direction of the substrate surface, the substrate portion needs to be symmetrical in order to improve the detection accuracy such as acceleration, for example, where the symmetry of the substrate portion is required. It can be suitably used for an acceleration sensor or the like.

(Example of change)
As shown in FIG. 13, the cleaving line DL may be set so that the semiconductor chips 22 of the third embodiment and the semiconductor chips 22 of the fourth embodiment are alternately produced. When this configuration is used, the number of semiconductor chips 22 that can be manufactured from one wafer 20 can be increased without generating the remaining piece 24.

[Effect of Fourth Embodiment]
According to the semiconductor chip of 4th Embodiment and its manufacturing method, there can exist an effect similar to the semiconductor chip of 3rd Embodiment and its manufacturing method.

[Other Embodiments]
(1) By forming a film on the fractured surface 21d, it is possible to suppress the scattering of small pieces from the modified region K.
For example, as shown in FIG. 14A, the semiconductor chip 22 after cleaving according to the second embodiment is protected with tetraethoxysilane (TEOS), coated glass (Spin on Glass: SOG), SiO ₂ or the like. 25 is formed.
Next, when anisotropic etching such as reactive ion etching is performed, the protective film 25 is removed from a region visible from the substrate surface 21a side such as the MEMS 23 as shown in FIG. The protective film 25 remains in the region. Thereby, since at least a part of the fractured surface 21d can be covered, generation of minute pieces from the modified region K can be more effectively prevented.

(2) The semiconductor substrate 21 is a semiconductor substrate whose substrate surface 21a is the (100) surface, but the application of the present invention is not limited to this. For example, the substrate surface 21a is the (110) surface. It is also possible to apply to a certain semiconductor substrate. FIG. 15 is an explanatory diagram of the shape of a semiconductor chip manufactured using a semiconductor substrate whose substrate surface is the (110) surface. FIG. 15A is an explanatory plan view seen from the substrate surface side, and FIG. 15B is an enlarged sectional view taken along the line 1G-1G in FIG. As shown in FIG. 15, in the semiconductor substrate in which the substrate surface 21a is the (110) surface, the angle formed by the (110) surface and the (111) surface serving as the split surface 21d is 90 °, and the shape of the substrate surface 21a is What is necessary is just to set so that it may become a rhombus chip | tip whose angle between a diagonal and one side is 35.3 and 54.7 degrees, respectively.

(3) Although the semiconductor substrate made of only silicon is used as the semiconductor substrate 21, the application of the present invention is not limited to this. For example, an oxide film made of silicon oxide is used as the substrate surface of the semiconductor substrate 21. The present invention can also be applied to those formed in 21a and SOI (Silicon On Insulator) wafers.

It is a schematic diagram which shows the structural example of the wafer cleaved with the manufacturing method of this invention. FIG. 1A is an explanatory plan view of the surface of a wafer, and FIG. 1B is an enlarged cross-sectional view taken along the line 1B-1B in FIG. It is explanatory drawing of the cleaving apparatus which irradiates a semiconductor substrate with a laser beam. It is sectional explanatory drawing which shows the method of forming a modification area | region in the modification area | region formation process of 1st Embodiment. It is sectional explanatory drawing which shows the cleaving process of 1st Embodiment. It is explanatory drawing of the shape of the semiconductor chip of 1st Embodiment. FIG. 5A is an explanatory plan view seen from the substrate surface side, and FIG. 5B is an enlarged cross-sectional view taken along the line 1C-1C in FIG. 5A. It is sectional explanatory drawing of the setting method of the cleaving plan line in the modification | reformation area | region formation process of 2nd Embodiment. It is explanatory drawing of the shape of the semiconductor chip of 2nd Embodiment. FIG. 7A is an explanatory plan view seen from the substrate surface side, and FIG. 7B is an enlarged cross-sectional view taken along the 1D-1D arrow in FIG. 7A. It is sectional explanatory drawing which shows the example of a change of the setting method of the cutting planned line in the modification | reformation area | region formation process of 2nd Embodiment. It is sectional explanatory drawing of the setting method of the cleaving planned line in the modification | reformation area | region formation process of 3rd Embodiment. It is explanatory drawing of the shape of the semiconductor chip of 3rd Embodiment. FIG. 10A is an explanatory plan view seen from the substrate surface side, and FIG. 10B is an enlarged cross-sectional view taken along the 1E-1E arrow in FIG. 10A. It is sectional explanatory drawing of the setting method of the cutting planned line in the modification | reformation area | region formation process of 4th Embodiment. It is explanatory drawing of the shape of the semiconductor chip of 4th Embodiment. FIG. 12A is an explanatory plan view seen from the substrate surface side, and FIG. 12B is an enlarged cross-sectional view taken along the 1F-1F arrow in FIG. It is sectional explanatory drawing which shows the example of a change of the setting method of the cutting planned line in the modification | reformation area | region formation process of 4th Embodiment. It is sectional explanatory drawing which shows the process of forming a protective film in a cleavage plane. It is explanatory drawing of the shape of the semiconductor chip manufactured using the semiconductor substrate whose board | substrate surface is a (110) plane. FIG. 15A is an explanatory plan view seen from the substrate surface side, and FIG. 15B is an enlarged sectional view taken along the line 1G-1G in FIG. It is sectional explanatory drawing which shows the conventional dicing process using a laser beam. FIG. 16A is a cross-sectional explanatory view of a modified region forming step by laser light irradiation, and FIG. 16B is a cross-sectional explanatory view of a cleaving step.

Explanation of symbols

20 Wafer 21 Semiconductor substrate 21a Substrate surface 21b Back surface 21c Outer peripheral edge 21d Split section 22 Semiconductor chip 23 MEMS (element)
24 Remnant 25 Protective film 41 Sheet 42 Frame K Modified region L Laser beam

Claims (6)

A laser head for setting a cleaving line for cleaving a semiconductor substrate having an element formed on the substrate surface in the thickness direction along the cleaved surface of the semiconductor substrate and irradiating a laser beam along the cleaving line Is moved relative to the semiconductor substrate, and a laser beam is irradiated with a condensing point inside the semiconductor substrate, and a modified region by multiphoton absorption is applied to the cleaved surface of the semiconductor substrate at the condensing point. A modified region forming step in which a plurality of the regions are formed side by side,
A cleaving step of cleaving the semiconductor substrate that has undergone the modified region formation step in the thickness direction along the planned cleaving line with the modified region as a starting point, to obtain a semiconductor chip. A method for manufacturing a semiconductor chip.   The semiconductor substrate is made of silicon having a (100) plane as a substrate surface, and the cleaving line is set along a (111) plane of the semiconductor substrate in the modified region forming step. 2. A method for producing a semiconductor chip according to 1.   3. The method of manufacturing a semiconductor chip according to claim 1, wherein, in the modified region forming step, the cleaving line is set in combination with a plurality of cleaved surfaces having different directions.   2. The cleaving line is set in the modified region forming step so that the semiconductor chips cleaved through the cleaving step are symmetric in the substrate surface direction of the semiconductor substrate. Item 4. The method for manufacturing a semiconductor chip according to any one of Items 3 to 4.   5. The semiconductor according to claim 1, wherein the element formed on the substrate surface is an element having a movable part formed by a MEMS (Micro Electro Mechanical Systems) technique. Chip manufacturing method.   6. A semiconductor chip manufactured by the method for manufacturing a semiconductor chip according to claim 1, wherein the fractured surface obtained by cleaving the semiconductor substrate is a cleavage plane of the semiconductor substrate. A semiconductor chip characterized by the following.

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